Commit | Line | Data |
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c906108c SS |
1 | /* Simulator instruction decoder for m32rbf. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
55552082 | 5 | Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. |
c906108c SS |
6 | |
7 | This file is part of the GNU Simulators. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #define WANT_CPU m32rbf | |
26 | #define WANT_CPU_M32RBF | |
27 | ||
28 | #include "sim-main.h" | |
29 | #include "sim-assert.h" | |
30 | ||
c906108c SS |
31 | /* The instruction descriptor array. |
32 | This is computed at runtime. Space for it is not malloc'd to save a | |
33 | teensy bit of cpu in the decoder. Moving it to malloc space is trivial | |
34 | but won't be done until necessary (we don't currently support the runtime | |
35 | addition of instructions nor an SMP machine with different cpus). */ | |
36 | static IDESC m32rbf_insn_data[M32RBF_INSN_MAX]; | |
37 | ||
c906108c SS |
38 | /* Commas between elements are contained in the macros. |
39 | Some of these are conditionally compiled out. */ | |
40 | ||
41 | static const struct insn_sem m32rbf_insn_sem[] = | |
42 | { | |
96baa820 JM |
43 | { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }, |
44 | { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY }, | |
45 | { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY }, | |
46 | { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY }, | |
47 | { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY }, | |
48 | { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY }, | |
49 | { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD }, | |
50 | { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 }, | |
51 | { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD }, | |
52 | { M32R_INSN_AND3, M32RBF_INSN_AND3, M32RBF_SFMT_AND3 }, | |
53 | { M32R_INSN_OR, M32RBF_INSN_OR, M32RBF_SFMT_ADD }, | |
54 | { M32R_INSN_OR3, M32RBF_INSN_OR3, M32RBF_SFMT_OR3 }, | |
55 | { M32R_INSN_XOR, M32RBF_INSN_XOR, M32RBF_SFMT_ADD }, | |
56 | { M32R_INSN_XOR3, M32RBF_INSN_XOR3, M32RBF_SFMT_AND3 }, | |
57 | { M32R_INSN_ADDI, M32RBF_INSN_ADDI, M32RBF_SFMT_ADDI }, | |
58 | { M32R_INSN_ADDV, M32RBF_INSN_ADDV, M32RBF_SFMT_ADDV }, | |
59 | { M32R_INSN_ADDV3, M32RBF_INSN_ADDV3, M32RBF_SFMT_ADDV3 }, | |
60 | { M32R_INSN_ADDX, M32RBF_INSN_ADDX, M32RBF_SFMT_ADDX }, | |
61 | { M32R_INSN_BC8, M32RBF_INSN_BC8, M32RBF_SFMT_BC8 }, | |
62 | { M32R_INSN_BC24, M32RBF_INSN_BC24, M32RBF_SFMT_BC24 }, | |
63 | { M32R_INSN_BEQ, M32RBF_INSN_BEQ, M32RBF_SFMT_BEQ }, | |
64 | { M32R_INSN_BEQZ, M32RBF_INSN_BEQZ, M32RBF_SFMT_BEQZ }, | |
65 | { M32R_INSN_BGEZ, M32RBF_INSN_BGEZ, M32RBF_SFMT_BEQZ }, | |
66 | { M32R_INSN_BGTZ, M32RBF_INSN_BGTZ, M32RBF_SFMT_BEQZ }, | |
67 | { M32R_INSN_BLEZ, M32RBF_INSN_BLEZ, M32RBF_SFMT_BEQZ }, | |
68 | { M32R_INSN_BLTZ, M32RBF_INSN_BLTZ, M32RBF_SFMT_BEQZ }, | |
69 | { M32R_INSN_BNEZ, M32RBF_INSN_BNEZ, M32RBF_SFMT_BEQZ }, | |
70 | { M32R_INSN_BL8, M32RBF_INSN_BL8, M32RBF_SFMT_BL8 }, | |
71 | { M32R_INSN_BL24, M32RBF_INSN_BL24, M32RBF_SFMT_BL24 }, | |
72 | { M32R_INSN_BNC8, M32RBF_INSN_BNC8, M32RBF_SFMT_BC8 }, | |
73 | { M32R_INSN_BNC24, M32RBF_INSN_BNC24, M32RBF_SFMT_BC24 }, | |
74 | { M32R_INSN_BNE, M32RBF_INSN_BNE, M32RBF_SFMT_BEQ }, | |
75 | { M32R_INSN_BRA8, M32RBF_INSN_BRA8, M32RBF_SFMT_BRA8 }, | |
76 | { M32R_INSN_BRA24, M32RBF_INSN_BRA24, M32RBF_SFMT_BRA24 }, | |
77 | { M32R_INSN_CMP, M32RBF_INSN_CMP, M32RBF_SFMT_CMP }, | |
78 | { M32R_INSN_CMPI, M32RBF_INSN_CMPI, M32RBF_SFMT_CMPI }, | |
79 | { M32R_INSN_CMPU, M32RBF_INSN_CMPU, M32RBF_SFMT_CMP }, | |
80 | { M32R_INSN_CMPUI, M32RBF_INSN_CMPUI, M32RBF_SFMT_CMPI }, | |
81 | { M32R_INSN_DIV, M32RBF_INSN_DIV, M32RBF_SFMT_DIV }, | |
82 | { M32R_INSN_DIVU, M32RBF_INSN_DIVU, M32RBF_SFMT_DIV }, | |
83 | { M32R_INSN_REM, M32RBF_INSN_REM, M32RBF_SFMT_DIV }, | |
84 | { M32R_INSN_REMU, M32RBF_INSN_REMU, M32RBF_SFMT_DIV }, | |
85 | { M32R_INSN_JL, M32RBF_INSN_JL, M32RBF_SFMT_JL }, | |
86 | { M32R_INSN_JMP, M32RBF_INSN_JMP, M32RBF_SFMT_JMP }, | |
87 | { M32R_INSN_LD, M32RBF_INSN_LD, M32RBF_SFMT_LD }, | |
88 | { M32R_INSN_LD_D, M32RBF_INSN_LD_D, M32RBF_SFMT_LD_D }, | |
89 | { M32R_INSN_LDB, M32RBF_INSN_LDB, M32RBF_SFMT_LD }, | |
90 | { M32R_INSN_LDB_D, M32RBF_INSN_LDB_D, M32RBF_SFMT_LD_D }, | |
91 | { M32R_INSN_LDH, M32RBF_INSN_LDH, M32RBF_SFMT_LD }, | |
92 | { M32R_INSN_LDH_D, M32RBF_INSN_LDH_D, M32RBF_SFMT_LD_D }, | |
93 | { M32R_INSN_LDUB, M32RBF_INSN_LDUB, M32RBF_SFMT_LD }, | |
94 | { M32R_INSN_LDUB_D, M32RBF_INSN_LDUB_D, M32RBF_SFMT_LD_D }, | |
95 | { M32R_INSN_LDUH, M32RBF_INSN_LDUH, M32RBF_SFMT_LD }, | |
96 | { M32R_INSN_LDUH_D, M32RBF_INSN_LDUH_D, M32RBF_SFMT_LD_D }, | |
97 | { M32R_INSN_LD_PLUS, M32RBF_INSN_LD_PLUS, M32RBF_SFMT_LD_PLUS }, | |
98 | { M32R_INSN_LD24, M32RBF_INSN_LD24, M32RBF_SFMT_LD24 }, | |
99 | { M32R_INSN_LDI8, M32RBF_INSN_LDI8, M32RBF_SFMT_LDI8 }, | |
100 | { M32R_INSN_LDI16, M32RBF_INSN_LDI16, M32RBF_SFMT_LDI16 }, | |
101 | { M32R_INSN_LOCK, M32RBF_INSN_LOCK, M32RBF_SFMT_LOCK }, | |
102 | { M32R_INSN_MACHI, M32RBF_INSN_MACHI, M32RBF_SFMT_MACHI }, | |
103 | { M32R_INSN_MACLO, M32RBF_INSN_MACLO, M32RBF_SFMT_MACHI }, | |
104 | { M32R_INSN_MACWHI, M32RBF_INSN_MACWHI, M32RBF_SFMT_MACHI }, | |
105 | { M32R_INSN_MACWLO, M32RBF_INSN_MACWLO, M32RBF_SFMT_MACHI }, | |
106 | { M32R_INSN_MUL, M32RBF_INSN_MUL, M32RBF_SFMT_ADD }, | |
107 | { M32R_INSN_MULHI, M32RBF_INSN_MULHI, M32RBF_SFMT_MULHI }, | |
108 | { M32R_INSN_MULLO, M32RBF_INSN_MULLO, M32RBF_SFMT_MULHI }, | |
109 | { M32R_INSN_MULWHI, M32RBF_INSN_MULWHI, M32RBF_SFMT_MULHI }, | |
110 | { M32R_INSN_MULWLO, M32RBF_INSN_MULWLO, M32RBF_SFMT_MULHI }, | |
111 | { M32R_INSN_MV, M32RBF_INSN_MV, M32RBF_SFMT_MV }, | |
112 | { M32R_INSN_MVFACHI, M32RBF_INSN_MVFACHI, M32RBF_SFMT_MVFACHI }, | |
113 | { M32R_INSN_MVFACLO, M32RBF_INSN_MVFACLO, M32RBF_SFMT_MVFACHI }, | |
114 | { M32R_INSN_MVFACMI, M32RBF_INSN_MVFACMI, M32RBF_SFMT_MVFACHI }, | |
115 | { M32R_INSN_MVFC, M32RBF_INSN_MVFC, M32RBF_SFMT_MVFC }, | |
116 | { M32R_INSN_MVTACHI, M32RBF_INSN_MVTACHI, M32RBF_SFMT_MVTACHI }, | |
117 | { M32R_INSN_MVTACLO, M32RBF_INSN_MVTACLO, M32RBF_SFMT_MVTACHI }, | |
118 | { M32R_INSN_MVTC, M32RBF_INSN_MVTC, M32RBF_SFMT_MVTC }, | |
119 | { M32R_INSN_NEG, M32RBF_INSN_NEG, M32RBF_SFMT_MV }, | |
120 | { M32R_INSN_NOP, M32RBF_INSN_NOP, M32RBF_SFMT_NOP }, | |
121 | { M32R_INSN_NOT, M32RBF_INSN_NOT, M32RBF_SFMT_MV }, | |
122 | { M32R_INSN_RAC, M32RBF_INSN_RAC, M32RBF_SFMT_RAC }, | |
123 | { M32R_INSN_RACH, M32RBF_INSN_RACH, M32RBF_SFMT_RAC }, | |
124 | { M32R_INSN_RTE, M32RBF_INSN_RTE, M32RBF_SFMT_RTE }, | |
125 | { M32R_INSN_SETH, M32RBF_INSN_SETH, M32RBF_SFMT_SETH }, | |
126 | { M32R_INSN_SLL, M32RBF_INSN_SLL, M32RBF_SFMT_ADD }, | |
127 | { M32R_INSN_SLL3, M32RBF_INSN_SLL3, M32RBF_SFMT_SLL3 }, | |
128 | { M32R_INSN_SLLI, M32RBF_INSN_SLLI, M32RBF_SFMT_SLLI }, | |
129 | { M32R_INSN_SRA, M32RBF_INSN_SRA, M32RBF_SFMT_ADD }, | |
130 | { M32R_INSN_SRA3, M32RBF_INSN_SRA3, M32RBF_SFMT_SLL3 }, | |
131 | { M32R_INSN_SRAI, M32RBF_INSN_SRAI, M32RBF_SFMT_SLLI }, | |
132 | { M32R_INSN_SRL, M32RBF_INSN_SRL, M32RBF_SFMT_ADD }, | |
133 | { M32R_INSN_SRL3, M32RBF_INSN_SRL3, M32RBF_SFMT_SLL3 }, | |
134 | { M32R_INSN_SRLI, M32RBF_INSN_SRLI, M32RBF_SFMT_SLLI }, | |
135 | { M32R_INSN_ST, M32RBF_INSN_ST, M32RBF_SFMT_ST }, | |
136 | { M32R_INSN_ST_D, M32RBF_INSN_ST_D, M32RBF_SFMT_ST_D }, | |
137 | { M32R_INSN_STB, M32RBF_INSN_STB, M32RBF_SFMT_STB }, | |
138 | { M32R_INSN_STB_D, M32RBF_INSN_STB_D, M32RBF_SFMT_STB_D }, | |
139 | { M32R_INSN_STH, M32RBF_INSN_STH, M32RBF_SFMT_STH }, | |
140 | { M32R_INSN_STH_D, M32RBF_INSN_STH_D, M32RBF_SFMT_STH_D }, | |
141 | { M32R_INSN_ST_PLUS, M32RBF_INSN_ST_PLUS, M32RBF_SFMT_ST_PLUS }, | |
142 | { M32R_INSN_ST_MINUS, M32RBF_INSN_ST_MINUS, M32RBF_SFMT_ST_PLUS }, | |
143 | { M32R_INSN_SUB, M32RBF_INSN_SUB, M32RBF_SFMT_ADD }, | |
144 | { M32R_INSN_SUBV, M32RBF_INSN_SUBV, M32RBF_SFMT_ADDV }, | |
145 | { M32R_INSN_SUBX, M32RBF_INSN_SUBX, M32RBF_SFMT_ADDX }, | |
146 | { M32R_INSN_TRAP, M32RBF_INSN_TRAP, M32RBF_SFMT_TRAP }, | |
147 | { M32R_INSN_UNLOCK, M32RBF_INSN_UNLOCK, M32RBF_SFMT_UNLOCK }, | |
c906108c SS |
148 | }; |
149 | ||
96baa820 JM |
150 | static const struct insn_sem m32rbf_insn_sem_invalid = { |
151 | VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY | |
c906108c SS |
152 | }; |
153 | ||
c906108c SS |
154 | /* Initialize an IDESC from the compile-time computable parts. */ |
155 | ||
156 | static INLINE void | |
157 | init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) | |
158 | { | |
159 | const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; | |
160 | ||
161 | id->num = t->index; | |
96baa820 | 162 | id->sfmt = t->sfmt; |
c906108c SS |
163 | if ((int) t->type <= 0) |
164 | id->idata = & cgen_virtual_insn_table[- (int) t->type]; | |
165 | else | |
166 | id->idata = & insn_table[t->type]; | |
167 | id->attrs = CGEN_INSN_ATTRS (id->idata); | |
168 | /* Oh my god, a magic number. */ | |
169 | id->length = CGEN_INSN_BITSIZE (id->idata) / 8; | |
96baa820 | 170 | |
c906108c SS |
171 | #if WITH_PROFILE_MODEL_P |
172 | id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; | |
173 | { | |
174 | SIM_DESC sd = CPU_STATE (cpu); | |
175 | SIM_ASSERT (t->index == id->timing->num); | |
176 | } | |
177 | #endif | |
96baa820 JM |
178 | |
179 | /* Semantic pointers are initialized elsewhere. */ | |
c906108c SS |
180 | } |
181 | ||
182 | /* Initialize the instruction descriptor table. */ | |
183 | ||
184 | void | |
185 | m32rbf_init_idesc_table (SIM_CPU *cpu) | |
186 | { | |
187 | IDESC *id,*tabend; | |
188 | const struct insn_sem *t,*tend; | |
189 | int tabsize = M32RBF_INSN_MAX; | |
190 | IDESC *table = m32rbf_insn_data; | |
191 | ||
192 | memset (table, 0, tabsize * sizeof (IDESC)); | |
193 | ||
194 | /* First set all entries to the `invalid insn'. */ | |
195 | t = & m32rbf_insn_sem_invalid; | |
196 | for (id = table, tabend = table + tabsize; id < tabend; ++id) | |
197 | init_idesc (cpu, id, t); | |
198 | ||
199 | /* Now fill in the values for the chosen cpu. */ | |
200 | for (t = m32rbf_insn_sem, tend = t + sizeof (m32rbf_insn_sem) / sizeof (*t); | |
201 | t != tend; ++t) | |
202 | { | |
203 | init_idesc (cpu, & table[t->index], t); | |
204 | } | |
205 | ||
206 | /* Link the IDESC table into the cpu. */ | |
207 | CPU_IDESC (cpu) = table; | |
208 | } | |
209 | ||
c906108c SS |
210 | /* Given an instruction, return a pointer to its IDESC entry. */ |
211 | ||
212 | const IDESC * | |
213 | m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, | |
214 | CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, | |
215 | ARGBUF *abuf) | |
216 | { | |
7a292a7a SS |
217 | /* Result of decoder. */ |
218 | M32RBF_INSN_TYPE itype; | |
c906108c SS |
219 | |
220 | { | |
c906108c | 221 | CGEN_INSN_INT insn = base_insn; |
c906108c SS |
222 | |
223 | { | |
7a292a7a SS |
224 | unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0))); |
225 | switch (val) | |
226 | { | |
55552082 | 227 | case 0 : itype = M32RBF_INSN_SUBV; goto extract_sfmt_addv; case 1 : itype = M32RBF_INSN_SUBX; goto extract_sfmt_addx; case 2 : itype = M32RBF_INSN_SUB; goto extract_sfmt_add; case 3 : itype = M32RBF_INSN_NEG; goto extract_sfmt_mv; case 4 : itype = M32RBF_INSN_CMP; goto extract_sfmt_cmp; case 5 : itype = M32RBF_INSN_CMPU; goto extract_sfmt_cmp; case 8 : itype = M32RBF_INSN_ADDV; goto extract_sfmt_addv; case 9 : itype = M32RBF_INSN_ADDX; goto extract_sfmt_addx; case 10 : itype = M32RBF_INSN_ADD; goto extract_sfmt_add; case 11 : itype = M32RBF_INSN_NOT; goto extract_sfmt_mv; case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add; case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add; case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add; case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add; case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add; case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add; case 22 : itype = M32RBF_INSN_MUL; goto extract_sfmt_add; case 24 : itype = M32RBF_INSN_MV; goto extract_sfmt_mv; case 25 : itype = M32RBF_INSN_MVFC; goto extract_sfmt_mvfc; case 26 : itype = M32RBF_INSN_MVTC; goto extract_sfmt_mvtc; case 28 : |
c906108c | 228 | { |
55552082 | 229 | unsigned int val = (((insn >> 8) & (1 << 0))); |
7a292a7a | 230 | switch (val) |
c906108c | 231 | { |
55552082 | 232 | case 0 : itype = M32RBF_INSN_JL; goto extract_sfmt_jl; case 1 : itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 233 | } |
7a292a7a | 234 | } |
55552082 | 235 | case 29 : itype = M32RBF_INSN_RTE; goto extract_sfmt_rte; case 31 : itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap; case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb; case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth; case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st; case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_sfmt_unlock; case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_sfmt_st_plus; case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_sfmt_st_plus; case 40 : itype = M32RBF_INSN_LDB; goto extract_sfmt_ld; case 41 : itype = M32RBF_INSN_LDUB; goto extract_sfmt_ld; case 42 : itype = M32RBF_INSN_LDH; goto extract_sfmt_ld; case 43 : itype = M32RBF_INSN_LDUH; goto extract_sfmt_ld; case 44 : itype = M32RBF_INSN_LD; goto extract_sfmt_ld; case 45 : itype = M32RBF_INSN_LOCK; goto extract_sfmt_lock; case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_sfmt_ld_plus; case 48 : itype = M32RBF_INSN_MULHI; goto extract_sfmt_mulhi; case 49 : itype = M32RBF_INSN_MULLO; goto extract_sfmt_mulhi; case 50 : itype = M32RBF_INSN_MULWHI; goto extract_sfmt_mulhi; case 51 : itype = M32RBF_INSN_MULWLO; goto extract_sfmt_mulhi; case 52 : itype = M32RBF_INSN_MACHI; goto extract_sfmt_machi; case 53 : itype = M32RBF_INSN_MACLO; goto extract_sfmt_machi; case 54 : itype = M32RBF_INSN_MACWHI; goto extract_sfmt_machi; case 55 : itype = M32RBF_INSN_MACWLO; goto extract_sfmt_machi; case 64 : /* fall through */ |
7a292a7a SS |
236 | case 65 : /* fall through */ |
237 | case 66 : /* fall through */ | |
238 | case 67 : /* fall through */ | |
239 | case 68 : /* fall through */ | |
240 | case 69 : /* fall through */ | |
241 | case 70 : /* fall through */ | |
242 | case 71 : /* fall through */ | |
243 | case 72 : /* fall through */ | |
244 | case 73 : /* fall through */ | |
245 | case 74 : /* fall through */ | |
246 | case 75 : /* fall through */ | |
247 | case 76 : /* fall through */ | |
248 | case 77 : /* fall through */ | |
249 | case 78 : /* fall through */ | |
55552082 DB |
250 | case 79 : itype = M32RBF_INSN_ADDI; goto extract_sfmt_addi; case 80 : /* fall through */ |
251 | case 81 : itype = M32RBF_INSN_SRLI; goto extract_sfmt_slli; case 82 : /* fall through */ | |
252 | case 83 : itype = M32RBF_INSN_SRAI; goto extract_sfmt_slli; case 84 : /* fall through */ | |
253 | case 85 : itype = M32RBF_INSN_SLLI; goto extract_sfmt_slli; case 87 : | |
7a292a7a | 254 | { |
55552082 | 255 | unsigned int val = (((insn >> 0) & (1 << 0))); |
7a292a7a | 256 | switch (val) |
c906108c | 257 | { |
55552082 | 258 | case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi; case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 259 | } |
7a292a7a | 260 | } |
55552082 | 261 | case 88 : itype = M32RBF_INSN_RACH; goto extract_sfmt_rac; case 89 : itype = M32RBF_INSN_RAC; goto extract_sfmt_rac; case 95 : |
7a292a7a | 262 | { |
55552082 | 263 | unsigned int val = (((insn >> 0) & (3 << 0))); |
7a292a7a | 264 | switch (val) |
c906108c | 265 | { |
55552082 | 266 | case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi; case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi; case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 267 | } |
7a292a7a SS |
268 | } |
269 | case 96 : /* fall through */ | |
270 | case 97 : /* fall through */ | |
271 | case 98 : /* fall through */ | |
272 | case 99 : /* fall through */ | |
273 | case 100 : /* fall through */ | |
274 | case 101 : /* fall through */ | |
275 | case 102 : /* fall through */ | |
276 | case 103 : /* fall through */ | |
277 | case 104 : /* fall through */ | |
278 | case 105 : /* fall through */ | |
279 | case 106 : /* fall through */ | |
280 | case 107 : /* fall through */ | |
281 | case 108 : /* fall through */ | |
282 | case 109 : /* fall through */ | |
283 | case 110 : /* fall through */ | |
55552082 | 284 | case 111 : itype = M32RBF_INSN_LDI8; goto extract_sfmt_ldi8; case 112 : |
7a292a7a SS |
285 | { |
286 | unsigned int val = (((insn >> 8) & (15 << 0))); | |
287 | switch (val) | |
c906108c | 288 | { |
55552082 | 289 | case 0 : itype = M32RBF_INSN_NOP; goto extract_sfmt_nop; case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 290 | } |
7a292a7a SS |
291 | } |
292 | case 113 : /* fall through */ | |
293 | case 114 : /* fall through */ | |
294 | case 115 : /* fall through */ | |
295 | case 116 : /* fall through */ | |
296 | case 117 : /* fall through */ | |
297 | case 118 : /* fall through */ | |
298 | case 119 : /* fall through */ | |
299 | case 120 : /* fall through */ | |
300 | case 121 : /* fall through */ | |
301 | case 122 : /* fall through */ | |
302 | case 123 : /* fall through */ | |
303 | case 124 : /* fall through */ | |
304 | case 125 : /* fall through */ | |
305 | case 126 : /* fall through */ | |
306 | case 127 : | |
307 | { | |
55552082 | 308 | unsigned int val = (((insn >> 8) & (3 << 0))); |
7a292a7a | 309 | switch (val) |
c906108c | 310 | { |
55552082 | 311 | case 0 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; case 1 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; case 2 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; case 3 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 312 | } |
7a292a7a | 313 | } |
55552082 | 314 | case 132 : itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi; case 133 : itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi; case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3; case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3; case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3; case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3; case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3; case 144 : itype = M32RBF_INSN_DIV; goto extract_sfmt_div; case 145 : itype = M32RBF_INSN_DIVU; goto extract_sfmt_div; case 146 : itype = M32RBF_INSN_REM; goto extract_sfmt_div; case 147 : itype = M32RBF_INSN_REMU; goto extract_sfmt_div; case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3; case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3; case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3; case 159 : itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16; case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d; case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d; case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d; case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ld_d; case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ld_d; case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ld_d; case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_sfmt_ld_d; case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d; case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq; case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq; case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz; case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz; case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz; case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz; case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz; case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz; case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth; case 224 : /* fall through */ |
7a292a7a SS |
315 | case 225 : /* fall through */ |
316 | case 226 : /* fall through */ | |
317 | case 227 : /* fall through */ | |
318 | case 228 : /* fall through */ | |
319 | case 229 : /* fall through */ | |
320 | case 230 : /* fall through */ | |
321 | case 231 : /* fall through */ | |
322 | case 232 : /* fall through */ | |
323 | case 233 : /* fall through */ | |
324 | case 234 : /* fall through */ | |
325 | case 235 : /* fall through */ | |
326 | case 236 : /* fall through */ | |
327 | case 237 : /* fall through */ | |
328 | case 238 : /* fall through */ | |
55552082 | 329 | case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24; case 240 : /* fall through */ |
7a292a7a SS |
330 | case 241 : /* fall through */ |
331 | case 242 : /* fall through */ | |
332 | case 243 : /* fall through */ | |
333 | case 244 : /* fall through */ | |
334 | case 245 : /* fall through */ | |
335 | case 246 : /* fall through */ | |
336 | case 247 : /* fall through */ | |
337 | case 248 : /* fall through */ | |
338 | case 249 : /* fall through */ | |
339 | case 250 : /* fall through */ | |
340 | case 251 : /* fall through */ | |
341 | case 252 : /* fall through */ | |
342 | case 253 : /* fall through */ | |
343 | case 254 : /* fall through */ | |
344 | case 255 : | |
345 | { | |
55552082 | 346 | unsigned int val = (((insn >> 8) & (3 << 0))); |
7a292a7a | 347 | switch (val) |
c906108c | 348 | { |
55552082 | 349 | case 0 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24; case 1 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24; case 2 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24; case 3 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 350 | } |
c906108c | 351 | } |
96baa820 | 352 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
7a292a7a | 353 | } |
c906108c | 354 | } |
c906108c SS |
355 | } |
356 | ||
357 | /* The instruction has been decoded, now extract the fields. */ | |
358 | ||
96baa820 | 359 | extract_sfmt_empty: |
c906108c | 360 | { |
7a292a7a | 361 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 362 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 363 | |
c906108c SS |
364 | |
365 | /* Record the fields for the semantic handler. */ | |
96baa820 | 366 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); |
c906108c SS |
367 | |
368 | #undef FLD | |
7a292a7a | 369 | return idesc; |
c906108c SS |
370 | } |
371 | ||
96baa820 | 372 | extract_sfmt_add: |
c906108c | 373 | { |
7a292a7a | 374 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 375 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
376 | #define FLD(f) abuf->fields.sfmt_add.f |
377 | UINT f_r1; | |
378 | UINT f_r2; | |
c906108c | 379 | |
96baa820 JM |
380 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
381 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
382 | |
383 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
384 | FLD (f_r1) = f_r1; |
385 | FLD (f_r2) = f_r2; | |
c906108c SS |
386 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
387 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 388 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
389 | |
390 | #if WITH_PROFILE_MODEL_P | |
391 | /* Record the fields for profiling. */ | |
392 | if (PROFILE_MODEL_P (current_cpu)) | |
393 | { | |
394 | FLD (in_dr) = f_r1; | |
395 | FLD (in_sr) = f_r2; | |
396 | FLD (out_dr) = f_r1; | |
397 | } | |
398 | #endif | |
399 | #undef FLD | |
7a292a7a | 400 | return idesc; |
c906108c SS |
401 | } |
402 | ||
96baa820 | 403 | extract_sfmt_add3: |
c906108c | 404 | { |
7a292a7a | 405 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 406 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
407 | #define FLD(f) abuf->fields.sfmt_add3.f |
408 | UINT f_r1; | |
409 | UINT f_r2; | |
410 | INT f_simm16; | |
c906108c | 411 | |
96baa820 JM |
412 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
413 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
414 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
415 | |
416 | /* Record the fields for the semantic handler. */ | |
417 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
418 | FLD (f_r2) = f_r2; |
419 | FLD (f_r1) = f_r1; | |
c906108c SS |
420 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
421 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 422 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
423 | |
424 | #if WITH_PROFILE_MODEL_P | |
425 | /* Record the fields for profiling. */ | |
426 | if (PROFILE_MODEL_P (current_cpu)) | |
427 | { | |
428 | FLD (in_sr) = f_r2; | |
429 | FLD (out_dr) = f_r1; | |
430 | } | |
431 | #endif | |
432 | #undef FLD | |
7a292a7a | 433 | return idesc; |
c906108c SS |
434 | } |
435 | ||
96baa820 | 436 | extract_sfmt_and3: |
c906108c | 437 | { |
7a292a7a | 438 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 439 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
440 | #define FLD(f) abuf->fields.sfmt_and3.f |
441 | UINT f_r1; | |
442 | UINT f_r2; | |
443 | UINT f_uimm16; | |
c906108c | 444 | |
96baa820 JM |
445 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
446 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
447 | f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
448 | |
449 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 450 | FLD (f_r2) = f_r2; |
c906108c | 451 | FLD (f_uimm16) = f_uimm16; |
de8f5985 | 452 | FLD (f_r1) = f_r1; |
c906108c SS |
453 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
454 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 455 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
456 | |
457 | #if WITH_PROFILE_MODEL_P | |
458 | /* Record the fields for profiling. */ | |
459 | if (PROFILE_MODEL_P (current_cpu)) | |
460 | { | |
461 | FLD (in_sr) = f_r2; | |
462 | FLD (out_dr) = f_r1; | |
463 | } | |
464 | #endif | |
465 | #undef FLD | |
7a292a7a | 466 | return idesc; |
c906108c SS |
467 | } |
468 | ||
96baa820 | 469 | extract_sfmt_or3: |
c906108c | 470 | { |
7a292a7a | 471 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 472 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
473 | #define FLD(f) abuf->fields.sfmt_and3.f |
474 | UINT f_r1; | |
475 | UINT f_r2; | |
476 | UINT f_uimm16; | |
c906108c | 477 | |
96baa820 JM |
478 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
479 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
480 | f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
481 | |
482 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 483 | FLD (f_r2) = f_r2; |
c906108c | 484 | FLD (f_uimm16) = f_uimm16; |
de8f5985 | 485 | FLD (f_r1) = f_r1; |
c906108c SS |
486 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
487 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 488 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
489 | |
490 | #if WITH_PROFILE_MODEL_P | |
491 | /* Record the fields for profiling. */ | |
492 | if (PROFILE_MODEL_P (current_cpu)) | |
493 | { | |
494 | FLD (in_sr) = f_r2; | |
495 | FLD (out_dr) = f_r1; | |
496 | } | |
497 | #endif | |
498 | #undef FLD | |
7a292a7a | 499 | return idesc; |
c906108c SS |
500 | } |
501 | ||
96baa820 | 502 | extract_sfmt_addi: |
c906108c | 503 | { |
7a292a7a | 504 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 505 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
506 | #define FLD(f) abuf->fields.sfmt_addi.f |
507 | UINT f_r1; | |
508 | INT f_simm8; | |
c906108c | 509 | |
96baa820 JM |
510 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
511 | f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); | |
c906108c SS |
512 | |
513 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 514 | FLD (f_r1) = f_r1; |
c906108c SS |
515 | FLD (f_simm8) = f_simm8; |
516 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 517 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
518 | |
519 | #if WITH_PROFILE_MODEL_P | |
520 | /* Record the fields for profiling. */ | |
521 | if (PROFILE_MODEL_P (current_cpu)) | |
522 | { | |
523 | FLD (in_dr) = f_r1; | |
524 | FLD (out_dr) = f_r1; | |
525 | } | |
526 | #endif | |
527 | #undef FLD | |
7a292a7a | 528 | return idesc; |
c906108c SS |
529 | } |
530 | ||
96baa820 | 531 | extract_sfmt_addv: |
c906108c | 532 | { |
7a292a7a | 533 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 534 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
535 | #define FLD(f) abuf->fields.sfmt_add.f |
536 | UINT f_r1; | |
537 | UINT f_r2; | |
c906108c | 538 | |
96baa820 JM |
539 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
540 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
541 | |
542 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
543 | FLD (f_r1) = f_r1; |
544 | FLD (f_r2) = f_r2; | |
c906108c SS |
545 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
546 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 547 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
548 | |
549 | #if WITH_PROFILE_MODEL_P | |
550 | /* Record the fields for profiling. */ | |
551 | if (PROFILE_MODEL_P (current_cpu)) | |
552 | { | |
553 | FLD (in_dr) = f_r1; | |
554 | FLD (in_sr) = f_r2; | |
555 | FLD (out_dr) = f_r1; | |
556 | } | |
557 | #endif | |
558 | #undef FLD | |
7a292a7a | 559 | return idesc; |
c906108c SS |
560 | } |
561 | ||
96baa820 | 562 | extract_sfmt_addv3: |
c906108c | 563 | { |
7a292a7a | 564 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 565 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
566 | #define FLD(f) abuf->fields.sfmt_add3.f |
567 | UINT f_r1; | |
568 | UINT f_r2; | |
569 | INT f_simm16; | |
c906108c | 570 | |
96baa820 JM |
571 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
572 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
573 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
574 | |
575 | /* Record the fields for the semantic handler. */ | |
576 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
577 | FLD (f_r2) = f_r2; |
578 | FLD (f_r1) = f_r1; | |
c906108c SS |
579 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
580 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 581 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
582 | |
583 | #if WITH_PROFILE_MODEL_P | |
584 | /* Record the fields for profiling. */ | |
585 | if (PROFILE_MODEL_P (current_cpu)) | |
586 | { | |
587 | FLD (in_sr) = f_r2; | |
588 | FLD (out_dr) = f_r1; | |
589 | } | |
590 | #endif | |
591 | #undef FLD | |
7a292a7a | 592 | return idesc; |
c906108c SS |
593 | } |
594 | ||
96baa820 | 595 | extract_sfmt_addx: |
c906108c | 596 | { |
7a292a7a | 597 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 598 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
599 | #define FLD(f) abuf->fields.sfmt_add.f |
600 | UINT f_r1; | |
601 | UINT f_r2; | |
c906108c | 602 | |
96baa820 JM |
603 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
604 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
605 | |
606 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
607 | FLD (f_r1) = f_r1; |
608 | FLD (f_r2) = f_r2; | |
c906108c SS |
609 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
610 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 611 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
612 | |
613 | #if WITH_PROFILE_MODEL_P | |
614 | /* Record the fields for profiling. */ | |
615 | if (PROFILE_MODEL_P (current_cpu)) | |
616 | { | |
617 | FLD (in_dr) = f_r1; | |
618 | FLD (in_sr) = f_r2; | |
619 | FLD (out_dr) = f_r1; | |
620 | } | |
621 | #endif | |
622 | #undef FLD | |
7a292a7a | 623 | return idesc; |
c906108c SS |
624 | } |
625 | ||
96baa820 | 626 | extract_sfmt_bc8: |
c906108c | 627 | { |
7a292a7a | 628 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 629 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
630 | #define FLD(f) abuf->fields.sfmt_bl8.f |
631 | SI f_disp8; | |
c906108c | 632 | |
96baa820 | 633 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
634 | |
635 | /* Record the fields for the semantic handler. */ | |
636 | FLD (i_disp8) = f_disp8; | |
96baa820 | 637 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
638 | |
639 | #if WITH_PROFILE_MODEL_P | |
640 | /* Record the fields for profiling. */ | |
641 | if (PROFILE_MODEL_P (current_cpu)) | |
642 | { | |
643 | } | |
644 | #endif | |
645 | #undef FLD | |
7a292a7a | 646 | return idesc; |
c906108c SS |
647 | } |
648 | ||
96baa820 | 649 | extract_sfmt_bc24: |
c906108c | 650 | { |
7a292a7a | 651 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 652 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
653 | #define FLD(f) abuf->fields.sfmt_bl24.f |
654 | SI f_disp24; | |
c906108c | 655 | |
96baa820 | 656 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
657 | |
658 | /* Record the fields for the semantic handler. */ | |
659 | FLD (i_disp24) = f_disp24; | |
96baa820 | 660 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
661 | |
662 | #if WITH_PROFILE_MODEL_P | |
663 | /* Record the fields for profiling. */ | |
664 | if (PROFILE_MODEL_P (current_cpu)) | |
665 | { | |
666 | } | |
667 | #endif | |
668 | #undef FLD | |
7a292a7a | 669 | return idesc; |
c906108c SS |
670 | } |
671 | ||
96baa820 | 672 | extract_sfmt_beq: |
c906108c | 673 | { |
7a292a7a | 674 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 675 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
676 | #define FLD(f) abuf->fields.sfmt_beq.f |
677 | UINT f_r1; | |
678 | UINT f_r2; | |
679 | SI f_disp16; | |
c906108c | 680 | |
96baa820 JM |
681 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
682 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
683 | f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); | |
c906108c SS |
684 | |
685 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
686 | FLD (f_r1) = f_r1; |
687 | FLD (f_r2) = f_r2; | |
c906108c SS |
688 | FLD (i_disp16) = f_disp16; |
689 | FLD (i_src1) = & CPU (h_gr)[f_r1]; | |
690 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 691 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
692 | |
693 | #if WITH_PROFILE_MODEL_P | |
694 | /* Record the fields for profiling. */ | |
695 | if (PROFILE_MODEL_P (current_cpu)) | |
696 | { | |
697 | FLD (in_src1) = f_r1; | |
698 | FLD (in_src2) = f_r2; | |
699 | } | |
700 | #endif | |
701 | #undef FLD | |
7a292a7a | 702 | return idesc; |
c906108c SS |
703 | } |
704 | ||
96baa820 | 705 | extract_sfmt_beqz: |
c906108c | 706 | { |
7a292a7a | 707 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 708 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
709 | #define FLD(f) abuf->fields.sfmt_beq.f |
710 | UINT f_r2; | |
711 | SI f_disp16; | |
c906108c | 712 | |
96baa820 JM |
713 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); |
714 | f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); | |
c906108c SS |
715 | |
716 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 717 | FLD (f_r2) = f_r2; |
c906108c SS |
718 | FLD (i_disp16) = f_disp16; |
719 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 720 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
721 | |
722 | #if WITH_PROFILE_MODEL_P | |
723 | /* Record the fields for profiling. */ | |
724 | if (PROFILE_MODEL_P (current_cpu)) | |
725 | { | |
726 | FLD (in_src2) = f_r2; | |
727 | } | |
728 | #endif | |
729 | #undef FLD | |
7a292a7a | 730 | return idesc; |
c906108c SS |
731 | } |
732 | ||
96baa820 | 733 | extract_sfmt_bl8: |
c906108c | 734 | { |
7a292a7a | 735 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 736 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
737 | #define FLD(f) abuf->fields.sfmt_bl8.f |
738 | SI f_disp8; | |
c906108c | 739 | |
96baa820 | 740 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
741 | |
742 | /* Record the fields for the semantic handler. */ | |
743 | FLD (i_disp8) = f_disp8; | |
96baa820 | 744 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
745 | |
746 | #if WITH_PROFILE_MODEL_P | |
747 | /* Record the fields for profiling. */ | |
748 | if (PROFILE_MODEL_P (current_cpu)) | |
749 | { | |
750 | FLD (out_h_gr_14) = 14; | |
751 | } | |
752 | #endif | |
753 | #undef FLD | |
7a292a7a | 754 | return idesc; |
c906108c SS |
755 | } |
756 | ||
96baa820 | 757 | extract_sfmt_bl24: |
c906108c | 758 | { |
7a292a7a | 759 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 760 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
761 | #define FLD(f) abuf->fields.sfmt_bl24.f |
762 | SI f_disp24; | |
c906108c | 763 | |
96baa820 | 764 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
765 | |
766 | /* Record the fields for the semantic handler. */ | |
767 | FLD (i_disp24) = f_disp24; | |
96baa820 | 768 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
769 | |
770 | #if WITH_PROFILE_MODEL_P | |
771 | /* Record the fields for profiling. */ | |
772 | if (PROFILE_MODEL_P (current_cpu)) | |
773 | { | |
774 | FLD (out_h_gr_14) = 14; | |
775 | } | |
776 | #endif | |
777 | #undef FLD | |
7a292a7a | 778 | return idesc; |
c906108c SS |
779 | } |
780 | ||
96baa820 | 781 | extract_sfmt_bra8: |
c906108c | 782 | { |
7a292a7a | 783 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 784 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
785 | #define FLD(f) abuf->fields.sfmt_bl8.f |
786 | SI f_disp8; | |
c906108c | 787 | |
96baa820 | 788 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
789 | |
790 | /* Record the fields for the semantic handler. */ | |
791 | FLD (i_disp8) = f_disp8; | |
96baa820 | 792 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
793 | |
794 | #if WITH_PROFILE_MODEL_P | |
795 | /* Record the fields for profiling. */ | |
796 | if (PROFILE_MODEL_P (current_cpu)) | |
797 | { | |
798 | } | |
799 | #endif | |
800 | #undef FLD | |
7a292a7a | 801 | return idesc; |
c906108c SS |
802 | } |
803 | ||
96baa820 | 804 | extract_sfmt_bra24: |
c906108c | 805 | { |
7a292a7a | 806 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 807 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
808 | #define FLD(f) abuf->fields.sfmt_bl24.f |
809 | SI f_disp24; | |
c906108c | 810 | |
96baa820 | 811 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
812 | |
813 | /* Record the fields for the semantic handler. */ | |
814 | FLD (i_disp24) = f_disp24; | |
96baa820 | 815 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
816 | |
817 | #if WITH_PROFILE_MODEL_P | |
818 | /* Record the fields for profiling. */ | |
819 | if (PROFILE_MODEL_P (current_cpu)) | |
820 | { | |
821 | } | |
822 | #endif | |
823 | #undef FLD | |
7a292a7a | 824 | return idesc; |
c906108c SS |
825 | } |
826 | ||
96baa820 | 827 | extract_sfmt_cmp: |
c906108c | 828 | { |
7a292a7a | 829 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 830 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
831 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
832 | UINT f_r1; | |
833 | UINT f_r2; | |
c906108c | 834 | |
96baa820 JM |
835 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
836 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
837 | |
838 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
839 | FLD (f_r1) = f_r1; |
840 | FLD (f_r2) = f_r2; | |
c906108c SS |
841 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
842 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 843 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
844 | |
845 | #if WITH_PROFILE_MODEL_P | |
846 | /* Record the fields for profiling. */ | |
847 | if (PROFILE_MODEL_P (current_cpu)) | |
848 | { | |
849 | FLD (in_src1) = f_r1; | |
850 | FLD (in_src2) = f_r2; | |
851 | } | |
852 | #endif | |
853 | #undef FLD | |
7a292a7a | 854 | return idesc; |
c906108c SS |
855 | } |
856 | ||
96baa820 | 857 | extract_sfmt_cmpi: |
c906108c | 858 | { |
7a292a7a | 859 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 860 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
861 | #define FLD(f) abuf->fields.sfmt_st_d.f |
862 | UINT f_r2; | |
863 | INT f_simm16; | |
c906108c | 864 | |
96baa820 JM |
865 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); |
866 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
867 | |
868 | /* Record the fields for the semantic handler. */ | |
869 | FLD (f_simm16) = f_simm16; | |
de8f5985 | 870 | FLD (f_r2) = f_r2; |
c906108c | 871 | FLD (i_src2) = & CPU (h_gr)[f_r2]; |
de8f5985 | 872 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
873 | |
874 | #if WITH_PROFILE_MODEL_P | |
875 | /* Record the fields for profiling. */ | |
876 | if (PROFILE_MODEL_P (current_cpu)) | |
877 | { | |
878 | FLD (in_src2) = f_r2; | |
879 | } | |
880 | #endif | |
881 | #undef FLD | |
7a292a7a | 882 | return idesc; |
c906108c SS |
883 | } |
884 | ||
96baa820 | 885 | extract_sfmt_div: |
c906108c | 886 | { |
7a292a7a | 887 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 888 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
889 | #define FLD(f) abuf->fields.sfmt_add.f |
890 | UINT f_r1; | |
891 | UINT f_r2; | |
c906108c | 892 | |
96baa820 JM |
893 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
894 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
c906108c SS |
895 | |
896 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
897 | FLD (f_r1) = f_r1; |
898 | FLD (f_r2) = f_r2; | |
c906108c SS |
899 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
900 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 901 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
902 | |
903 | #if WITH_PROFILE_MODEL_P | |
904 | /* Record the fields for profiling. */ | |
905 | if (PROFILE_MODEL_P (current_cpu)) | |
906 | { | |
907 | FLD (in_dr) = f_r1; | |
908 | FLD (in_sr) = f_r2; | |
909 | FLD (out_dr) = f_r1; | |
910 | } | |
911 | #endif | |
912 | #undef FLD | |
7a292a7a | 913 | return idesc; |
c906108c SS |
914 | } |
915 | ||
96baa820 | 916 | extract_sfmt_jl: |
c906108c | 917 | { |
7a292a7a | 918 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 919 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
920 | #define FLD(f) abuf->fields.sfmt_jl.f |
921 | UINT f_r2; | |
c906108c | 922 | |
96baa820 | 923 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
924 | |
925 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 926 | FLD (f_r2) = f_r2; |
c906108c | 927 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
de8f5985 | 928 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
929 | |
930 | #if WITH_PROFILE_MODEL_P | |
931 | /* Record the fields for profiling. */ | |
932 | if (PROFILE_MODEL_P (current_cpu)) | |
933 | { | |
934 | FLD (in_sr) = f_r2; | |
935 | FLD (out_h_gr_14) = 14; | |
936 | } | |
937 | #endif | |
938 | #undef FLD | |
7a292a7a | 939 | return idesc; |
c906108c SS |
940 | } |
941 | ||
96baa820 | 942 | extract_sfmt_jmp: |
c906108c | 943 | { |
7a292a7a | 944 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 945 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 946 | #define FLD(f) abuf->fields.sfmt_jl.f |
96baa820 | 947 | UINT f_r2; |
c906108c | 948 | |
96baa820 | 949 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
950 | |
951 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 952 | FLD (f_r2) = f_r2; |
c906108c | 953 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
de8f5985 | 954 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
955 | |
956 | #if WITH_PROFILE_MODEL_P | |
957 | /* Record the fields for profiling. */ | |
958 | if (PROFILE_MODEL_P (current_cpu)) | |
959 | { | |
960 | FLD (in_sr) = f_r2; | |
c906108c SS |
961 | } |
962 | #endif | |
963 | #undef FLD | |
7a292a7a | 964 | return idesc; |
c906108c SS |
965 | } |
966 | ||
96baa820 | 967 | extract_sfmt_ld: |
c906108c | 968 | { |
7a292a7a | 969 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 970 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
971 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
972 | UINT f_r1; | |
973 | UINT f_r2; | |
c906108c | 974 | |
96baa820 JM |
975 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
976 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
977 | |
978 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
979 | FLD (f_r2) = f_r2; |
980 | FLD (f_r1) = f_r1; | |
c906108c SS |
981 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
982 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 983 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
984 | |
985 | #if WITH_PROFILE_MODEL_P | |
986 | /* Record the fields for profiling. */ | |
987 | if (PROFILE_MODEL_P (current_cpu)) | |
988 | { | |
989 | FLD (in_sr) = f_r2; | |
990 | FLD (out_dr) = f_r1; | |
991 | } | |
992 | #endif | |
993 | #undef FLD | |
7a292a7a | 994 | return idesc; |
c906108c SS |
995 | } |
996 | ||
96baa820 | 997 | extract_sfmt_ld_d: |
c906108c | 998 | { |
7a292a7a | 999 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1000 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1001 | #define FLD(f) abuf->fields.sfmt_add3.f |
1002 | UINT f_r1; | |
1003 | UINT f_r2; | |
1004 | INT f_simm16; | |
c906108c | 1005 | |
96baa820 JM |
1006 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1007 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1008 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1009 | |
1010 | /* Record the fields for the semantic handler. */ | |
1011 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1012 | FLD (f_r2) = f_r2; |
1013 | FLD (f_r1) = f_r1; | |
c906108c SS |
1014 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1015 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1016 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1017 | |
1018 | #if WITH_PROFILE_MODEL_P | |
1019 | /* Record the fields for profiling. */ | |
1020 | if (PROFILE_MODEL_P (current_cpu)) | |
1021 | { | |
1022 | FLD (in_sr) = f_r2; | |
1023 | FLD (out_dr) = f_r1; | |
1024 | } | |
1025 | #endif | |
1026 | #undef FLD | |
7a292a7a | 1027 | return idesc; |
c906108c SS |
1028 | } |
1029 | ||
96baa820 | 1030 | extract_sfmt_ld_plus: |
c906108c | 1031 | { |
7a292a7a | 1032 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1033 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1034 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1035 | UINT f_r1; | |
1036 | UINT f_r2; | |
c906108c | 1037 | |
96baa820 JM |
1038 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1039 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1040 | |
1041 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1042 | FLD (f_r2) = f_r2; |
1043 | FLD (f_r1) = f_r1; | |
c906108c SS |
1044 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1045 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1046 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1047 | |
1048 | #if WITH_PROFILE_MODEL_P | |
1049 | /* Record the fields for profiling. */ | |
1050 | if (PROFILE_MODEL_P (current_cpu)) | |
1051 | { | |
1052 | FLD (in_sr) = f_r2; | |
1053 | FLD (out_dr) = f_r1; | |
1054 | FLD (out_sr) = f_r2; | |
1055 | } | |
1056 | #endif | |
1057 | #undef FLD | |
7a292a7a | 1058 | return idesc; |
c906108c SS |
1059 | } |
1060 | ||
96baa820 | 1061 | extract_sfmt_ld24: |
c906108c | 1062 | { |
7a292a7a | 1063 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1064 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1065 | #define FLD(f) abuf->fields.sfmt_ld24.f |
1066 | UINT f_r1; | |
1067 | UINT f_uimm24; | |
c906108c | 1068 | |
96baa820 JM |
1069 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1070 | f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); | |
c906108c SS |
1071 | |
1072 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1073 | FLD (f_r1) = f_r1; |
c906108c SS |
1074 | FLD (i_uimm24) = f_uimm24; |
1075 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1076 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1077 | |
1078 | #if WITH_PROFILE_MODEL_P | |
1079 | /* Record the fields for profiling. */ | |
1080 | if (PROFILE_MODEL_P (current_cpu)) | |
1081 | { | |
1082 | FLD (out_dr) = f_r1; | |
1083 | } | |
1084 | #endif | |
1085 | #undef FLD | |
7a292a7a | 1086 | return idesc; |
c906108c SS |
1087 | } |
1088 | ||
96baa820 | 1089 | extract_sfmt_ldi8: |
c906108c | 1090 | { |
7a292a7a | 1091 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1092 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1093 | #define FLD(f) abuf->fields.sfmt_addi.f |
1094 | UINT f_r1; | |
1095 | INT f_simm8; | |
c906108c | 1096 | |
96baa820 JM |
1097 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1098 | f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); | |
c906108c SS |
1099 | |
1100 | /* Record the fields for the semantic handler. */ | |
1101 | FLD (f_simm8) = f_simm8; | |
de8f5985 | 1102 | FLD (f_r1) = f_r1; |
c906108c | 1103 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1104 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1105 | |
1106 | #if WITH_PROFILE_MODEL_P | |
1107 | /* Record the fields for profiling. */ | |
1108 | if (PROFILE_MODEL_P (current_cpu)) | |
1109 | { | |
1110 | FLD (out_dr) = f_r1; | |
1111 | } | |
1112 | #endif | |
1113 | #undef FLD | |
7a292a7a | 1114 | return idesc; |
c906108c SS |
1115 | } |
1116 | ||
96baa820 | 1117 | extract_sfmt_ldi16: |
c906108c | 1118 | { |
7a292a7a | 1119 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1120 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1121 | #define FLD(f) abuf->fields.sfmt_add3.f |
1122 | UINT f_r1; | |
1123 | INT f_simm16; | |
c906108c | 1124 | |
96baa820 JM |
1125 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1126 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1127 | |
1128 | /* Record the fields for the semantic handler. */ | |
1129 | FLD (f_simm16) = f_simm16; | |
de8f5985 | 1130 | FLD (f_r1) = f_r1; |
c906108c | 1131 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1132 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1133 | |
1134 | #if WITH_PROFILE_MODEL_P | |
1135 | /* Record the fields for profiling. */ | |
1136 | if (PROFILE_MODEL_P (current_cpu)) | |
1137 | { | |
1138 | FLD (out_dr) = f_r1; | |
1139 | } | |
1140 | #endif | |
1141 | #undef FLD | |
7a292a7a | 1142 | return idesc; |
c906108c SS |
1143 | } |
1144 | ||
96baa820 | 1145 | extract_sfmt_lock: |
c906108c | 1146 | { |
7a292a7a | 1147 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1148 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1149 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1150 | UINT f_r1; | |
1151 | UINT f_r2; | |
c906108c | 1152 | |
96baa820 JM |
1153 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1154 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1155 | |
1156 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1157 | FLD (f_r2) = f_r2; |
1158 | FLD (f_r1) = f_r1; | |
c906108c SS |
1159 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1160 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1161 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1162 | |
1163 | #if WITH_PROFILE_MODEL_P | |
1164 | /* Record the fields for profiling. */ | |
1165 | if (PROFILE_MODEL_P (current_cpu)) | |
1166 | { | |
1167 | FLD (in_sr) = f_r2; | |
1168 | FLD (out_dr) = f_r1; | |
1169 | } | |
1170 | #endif | |
1171 | #undef FLD | |
7a292a7a | 1172 | return idesc; |
c906108c SS |
1173 | } |
1174 | ||
96baa820 | 1175 | extract_sfmt_machi: |
c906108c | 1176 | { |
7a292a7a | 1177 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1178 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1179 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1180 | UINT f_r1; | |
1181 | UINT f_r2; | |
c906108c | 1182 | |
96baa820 JM |
1183 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1184 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1185 | |
1186 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1187 | FLD (f_r1) = f_r1; |
1188 | FLD (f_r2) = f_r2; | |
c906108c SS |
1189 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1190 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1191 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1192 | |
1193 | #if WITH_PROFILE_MODEL_P | |
1194 | /* Record the fields for profiling. */ | |
1195 | if (PROFILE_MODEL_P (current_cpu)) | |
1196 | { | |
1197 | FLD (in_src1) = f_r1; | |
1198 | FLD (in_src2) = f_r2; | |
1199 | } | |
1200 | #endif | |
1201 | #undef FLD | |
7a292a7a | 1202 | return idesc; |
c906108c SS |
1203 | } |
1204 | ||
96baa820 | 1205 | extract_sfmt_mulhi: |
c906108c | 1206 | { |
7a292a7a | 1207 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1208 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1209 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1210 | UINT f_r1; | |
1211 | UINT f_r2; | |
c906108c | 1212 | |
96baa820 JM |
1213 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1214 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1215 | |
1216 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1217 | FLD (f_r1) = f_r1; |
1218 | FLD (f_r2) = f_r2; | |
c906108c SS |
1219 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1220 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1221 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1222 | |
1223 | #if WITH_PROFILE_MODEL_P | |
1224 | /* Record the fields for profiling. */ | |
1225 | if (PROFILE_MODEL_P (current_cpu)) | |
1226 | { | |
1227 | FLD (in_src1) = f_r1; | |
1228 | FLD (in_src2) = f_r2; | |
1229 | } | |
1230 | #endif | |
1231 | #undef FLD | |
7a292a7a | 1232 | return idesc; |
c906108c SS |
1233 | } |
1234 | ||
96baa820 | 1235 | extract_sfmt_mv: |
c906108c | 1236 | { |
7a292a7a | 1237 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1238 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1239 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1240 | UINT f_r1; | |
1241 | UINT f_r2; | |
c906108c | 1242 | |
96baa820 JM |
1243 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1244 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1245 | |
1246 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1247 | FLD (f_r2) = f_r2; |
1248 | FLD (f_r1) = f_r1; | |
c906108c SS |
1249 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1250 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1251 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1252 | |
1253 | #if WITH_PROFILE_MODEL_P | |
1254 | /* Record the fields for profiling. */ | |
1255 | if (PROFILE_MODEL_P (current_cpu)) | |
1256 | { | |
1257 | FLD (in_sr) = f_r2; | |
1258 | FLD (out_dr) = f_r1; | |
1259 | } | |
1260 | #endif | |
1261 | #undef FLD | |
7a292a7a | 1262 | return idesc; |
c906108c SS |
1263 | } |
1264 | ||
96baa820 | 1265 | extract_sfmt_mvfachi: |
c906108c | 1266 | { |
7a292a7a | 1267 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1268 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1269 | #define FLD(f) abuf->fields.sfmt_seth.f |
1270 | UINT f_r1; | |
c906108c | 1271 | |
96baa820 | 1272 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
c906108c SS |
1273 | |
1274 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1275 | FLD (f_r1) = f_r1; |
c906108c | 1276 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1277 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1278 | |
1279 | #if WITH_PROFILE_MODEL_P | |
1280 | /* Record the fields for profiling. */ | |
1281 | if (PROFILE_MODEL_P (current_cpu)) | |
1282 | { | |
1283 | FLD (out_dr) = f_r1; | |
1284 | } | |
1285 | #endif | |
1286 | #undef FLD | |
7a292a7a | 1287 | return idesc; |
c906108c SS |
1288 | } |
1289 | ||
96baa820 | 1290 | extract_sfmt_mvfc: |
c906108c | 1291 | { |
7a292a7a | 1292 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1293 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1294 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
96baa820 JM |
1295 | UINT f_r1; |
1296 | UINT f_r2; | |
c906108c | 1297 | |
96baa820 JM |
1298 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1299 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1300 | |
1301 | /* Record the fields for the semantic handler. */ | |
1302 | FLD (f_r2) = f_r2; | |
de8f5985 | 1303 | FLD (f_r1) = f_r1; |
c906108c | 1304 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1305 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1306 | |
1307 | #if WITH_PROFILE_MODEL_P | |
1308 | /* Record the fields for profiling. */ | |
1309 | if (PROFILE_MODEL_P (current_cpu)) | |
1310 | { | |
1311 | FLD (out_dr) = f_r1; | |
1312 | } | |
1313 | #endif | |
1314 | #undef FLD | |
7a292a7a | 1315 | return idesc; |
c906108c SS |
1316 | } |
1317 | ||
96baa820 | 1318 | extract_sfmt_mvtachi: |
c906108c | 1319 | { |
7a292a7a | 1320 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1321 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1322 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1323 | UINT f_r1; | |
c906108c | 1324 | |
96baa820 | 1325 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
c906108c SS |
1326 | |
1327 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1328 | FLD (f_r1) = f_r1; |
c906108c | 1329 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1330 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1331 | |
1332 | #if WITH_PROFILE_MODEL_P | |
1333 | /* Record the fields for profiling. */ | |
1334 | if (PROFILE_MODEL_P (current_cpu)) | |
1335 | { | |
1336 | FLD (in_src1) = f_r1; | |
1337 | } | |
1338 | #endif | |
1339 | #undef FLD | |
7a292a7a | 1340 | return idesc; |
c906108c SS |
1341 | } |
1342 | ||
96baa820 | 1343 | extract_sfmt_mvtc: |
c906108c | 1344 | { |
7a292a7a | 1345 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1346 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1347 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
96baa820 JM |
1348 | UINT f_r1; |
1349 | UINT f_r2; | |
c906108c | 1350 | |
96baa820 JM |
1351 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1352 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1353 | |
1354 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1355 | FLD (f_r2) = f_r2; |
c906108c SS |
1356 | FLD (f_r1) = f_r1; |
1357 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1358 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1359 | |
1360 | #if WITH_PROFILE_MODEL_P | |
1361 | /* Record the fields for profiling. */ | |
1362 | if (PROFILE_MODEL_P (current_cpu)) | |
1363 | { | |
1364 | FLD (in_sr) = f_r2; | |
1365 | } | |
1366 | #endif | |
1367 | #undef FLD | |
7a292a7a | 1368 | return idesc; |
c906108c SS |
1369 | } |
1370 | ||
96baa820 | 1371 | extract_sfmt_nop: |
c906108c | 1372 | { |
7a292a7a | 1373 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1374 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1375 | |
c906108c SS |
1376 | |
1377 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1378 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); |
c906108c SS |
1379 | |
1380 | #undef FLD | |
7a292a7a | 1381 | return idesc; |
c906108c SS |
1382 | } |
1383 | ||
96baa820 | 1384 | extract_sfmt_rac: |
c906108c | 1385 | { |
7a292a7a | 1386 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1387 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1388 | |
c906108c SS |
1389 | |
1390 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1391 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0)); |
c906108c SS |
1392 | |
1393 | #undef FLD | |
7a292a7a | 1394 | return idesc; |
c906108c SS |
1395 | } |
1396 | ||
96baa820 | 1397 | extract_sfmt_rte: |
c906108c | 1398 | { |
7a292a7a | 1399 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1400 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1401 | |
c906108c SS |
1402 | |
1403 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1404 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); |
c906108c SS |
1405 | |
1406 | #if WITH_PROFILE_MODEL_P | |
1407 | /* Record the fields for profiling. */ | |
1408 | if (PROFILE_MODEL_P (current_cpu)) | |
1409 | { | |
1410 | } | |
1411 | #endif | |
1412 | #undef FLD | |
7a292a7a | 1413 | return idesc; |
c906108c SS |
1414 | } |
1415 | ||
96baa820 | 1416 | extract_sfmt_seth: |
c906108c | 1417 | { |
7a292a7a | 1418 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1419 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1420 | #define FLD(f) abuf->fields.sfmt_seth.f |
1421 | UINT f_r1; | |
1422 | UINT f_hi16; | |
c906108c | 1423 | |
96baa820 JM |
1424 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1425 | f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
1426 | |
1427 | /* Record the fields for the semantic handler. */ | |
1428 | FLD (f_hi16) = f_hi16; | |
de8f5985 | 1429 | FLD (f_r1) = f_r1; |
c906108c | 1430 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1431 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1432 | |
1433 | #if WITH_PROFILE_MODEL_P | |
1434 | /* Record the fields for profiling. */ | |
1435 | if (PROFILE_MODEL_P (current_cpu)) | |
1436 | { | |
1437 | FLD (out_dr) = f_r1; | |
1438 | } | |
1439 | #endif | |
1440 | #undef FLD | |
7a292a7a | 1441 | return idesc; |
c906108c SS |
1442 | } |
1443 | ||
96baa820 | 1444 | extract_sfmt_sll3: |
c906108c | 1445 | { |
7a292a7a | 1446 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1447 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1448 | #define FLD(f) abuf->fields.sfmt_add3.f |
1449 | UINT f_r1; | |
1450 | UINT f_r2; | |
1451 | INT f_simm16; | |
c906108c | 1452 | |
96baa820 JM |
1453 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1454 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1455 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1456 | |
1457 | /* Record the fields for the semantic handler. */ | |
1458 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1459 | FLD (f_r2) = f_r2; |
1460 | FLD (f_r1) = f_r1; | |
c906108c SS |
1461 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1462 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1463 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1464 | |
1465 | #if WITH_PROFILE_MODEL_P | |
1466 | /* Record the fields for profiling. */ | |
1467 | if (PROFILE_MODEL_P (current_cpu)) | |
1468 | { | |
1469 | FLD (in_sr) = f_r2; | |
1470 | FLD (out_dr) = f_r1; | |
1471 | } | |
1472 | #endif | |
1473 | #undef FLD | |
7a292a7a | 1474 | return idesc; |
c906108c SS |
1475 | } |
1476 | ||
96baa820 | 1477 | extract_sfmt_slli: |
c906108c | 1478 | { |
7a292a7a | 1479 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1480 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1481 | #define FLD(f) abuf->fields.sfmt_slli.f |
1482 | UINT f_r1; | |
1483 | UINT f_uimm5; | |
c906108c | 1484 | |
96baa820 JM |
1485 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1486 | f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); | |
c906108c SS |
1487 | |
1488 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1489 | FLD (f_r1) = f_r1; |
c906108c SS |
1490 | FLD (f_uimm5) = f_uimm5; |
1491 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1492 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1493 | |
1494 | #if WITH_PROFILE_MODEL_P | |
1495 | /* Record the fields for profiling. */ | |
1496 | if (PROFILE_MODEL_P (current_cpu)) | |
1497 | { | |
1498 | FLD (in_dr) = f_r1; | |
1499 | FLD (out_dr) = f_r1; | |
1500 | } | |
1501 | #endif | |
1502 | #undef FLD | |
7a292a7a | 1503 | return idesc; |
c906108c SS |
1504 | } |
1505 | ||
96baa820 | 1506 | extract_sfmt_st: |
c906108c | 1507 | { |
7a292a7a | 1508 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1509 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1510 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1511 | UINT f_r1; | |
1512 | UINT f_r2; | |
c906108c | 1513 | |
96baa820 JM |
1514 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1515 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1516 | |
1517 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1518 | FLD (f_r1) = f_r1; |
1519 | FLD (f_r2) = f_r2; | |
c906108c SS |
1520 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1521 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1522 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1523 | |
1524 | #if WITH_PROFILE_MODEL_P | |
1525 | /* Record the fields for profiling. */ | |
1526 | if (PROFILE_MODEL_P (current_cpu)) | |
1527 | { | |
1528 | FLD (in_src1) = f_r1; | |
1529 | FLD (in_src2) = f_r2; | |
1530 | } | |
1531 | #endif | |
1532 | #undef FLD | |
7a292a7a | 1533 | return idesc; |
c906108c SS |
1534 | } |
1535 | ||
96baa820 | 1536 | extract_sfmt_st_d: |
c906108c | 1537 | { |
7a292a7a | 1538 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1539 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1540 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1541 | UINT f_r1; | |
1542 | UINT f_r2; | |
1543 | INT f_simm16; | |
c906108c | 1544 | |
96baa820 JM |
1545 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1546 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1547 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1548 | |
1549 | /* Record the fields for the semantic handler. */ | |
1550 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1551 | FLD (f_r1) = f_r1; |
1552 | FLD (f_r2) = f_r2; | |
c906108c SS |
1553 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1554 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1555 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1556 | |
1557 | #if WITH_PROFILE_MODEL_P | |
1558 | /* Record the fields for profiling. */ | |
1559 | if (PROFILE_MODEL_P (current_cpu)) | |
1560 | { | |
1561 | FLD (in_src1) = f_r1; | |
1562 | FLD (in_src2) = f_r2; | |
1563 | } | |
1564 | #endif | |
1565 | #undef FLD | |
7a292a7a | 1566 | return idesc; |
c906108c SS |
1567 | } |
1568 | ||
96baa820 | 1569 | extract_sfmt_stb: |
c906108c | 1570 | { |
7a292a7a | 1571 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1572 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1573 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1574 | UINT f_r1; | |
1575 | UINT f_r2; | |
c906108c | 1576 | |
96baa820 JM |
1577 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1578 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1579 | |
1580 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1581 | FLD (f_r1) = f_r1; |
1582 | FLD (f_r2) = f_r2; | |
c906108c SS |
1583 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1584 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1585 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1586 | |
1587 | #if WITH_PROFILE_MODEL_P | |
1588 | /* Record the fields for profiling. */ | |
1589 | if (PROFILE_MODEL_P (current_cpu)) | |
1590 | { | |
1591 | FLD (in_src1) = f_r1; | |
1592 | FLD (in_src2) = f_r2; | |
1593 | } | |
1594 | #endif | |
1595 | #undef FLD | |
7a292a7a | 1596 | return idesc; |
c906108c SS |
1597 | } |
1598 | ||
96baa820 | 1599 | extract_sfmt_stb_d: |
c906108c | 1600 | { |
7a292a7a | 1601 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1602 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1603 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1604 | UINT f_r1; | |
1605 | UINT f_r2; | |
1606 | INT f_simm16; | |
c906108c | 1607 | |
96baa820 JM |
1608 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1609 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1610 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1611 | |
1612 | /* Record the fields for the semantic handler. */ | |
1613 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1614 | FLD (f_r1) = f_r1; |
1615 | FLD (f_r2) = f_r2; | |
c906108c SS |
1616 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1617 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1618 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1619 | |
1620 | #if WITH_PROFILE_MODEL_P | |
1621 | /* Record the fields for profiling. */ | |
1622 | if (PROFILE_MODEL_P (current_cpu)) | |
1623 | { | |
1624 | FLD (in_src1) = f_r1; | |
1625 | FLD (in_src2) = f_r2; | |
1626 | } | |
1627 | #endif | |
1628 | #undef FLD | |
7a292a7a | 1629 | return idesc; |
c906108c SS |
1630 | } |
1631 | ||
96baa820 | 1632 | extract_sfmt_sth: |
c906108c | 1633 | { |
7a292a7a | 1634 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1635 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1636 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1637 | UINT f_r1; | |
1638 | UINT f_r2; | |
c906108c | 1639 | |
96baa820 JM |
1640 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1641 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1642 | |
1643 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1644 | FLD (f_r1) = f_r1; |
1645 | FLD (f_r2) = f_r2; | |
c906108c SS |
1646 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1647 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1648 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1649 | |
1650 | #if WITH_PROFILE_MODEL_P | |
1651 | /* Record the fields for profiling. */ | |
1652 | if (PROFILE_MODEL_P (current_cpu)) | |
1653 | { | |
1654 | FLD (in_src1) = f_r1; | |
1655 | FLD (in_src2) = f_r2; | |
1656 | } | |
1657 | #endif | |
1658 | #undef FLD | |
7a292a7a | 1659 | return idesc; |
c906108c SS |
1660 | } |
1661 | ||
96baa820 | 1662 | extract_sfmt_sth_d: |
c906108c | 1663 | { |
7a292a7a | 1664 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1665 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1666 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1667 | UINT f_r1; | |
1668 | UINT f_r2; | |
1669 | INT f_simm16; | |
c906108c | 1670 | |
96baa820 JM |
1671 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1672 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1673 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1674 | |
1675 | /* Record the fields for the semantic handler. */ | |
1676 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1677 | FLD (f_r1) = f_r1; |
1678 | FLD (f_r2) = f_r2; | |
c906108c SS |
1679 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1680 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1681 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1682 | |
1683 | #if WITH_PROFILE_MODEL_P | |
1684 | /* Record the fields for profiling. */ | |
1685 | if (PROFILE_MODEL_P (current_cpu)) | |
1686 | { | |
1687 | FLD (in_src1) = f_r1; | |
1688 | FLD (in_src2) = f_r2; | |
1689 | } | |
1690 | #endif | |
1691 | #undef FLD | |
7a292a7a | 1692 | return idesc; |
c906108c SS |
1693 | } |
1694 | ||
96baa820 | 1695 | extract_sfmt_st_plus: |
c906108c | 1696 | { |
7a292a7a | 1697 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1698 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1699 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1700 | UINT f_r1; | |
1701 | UINT f_r2; | |
c906108c | 1702 | |
96baa820 JM |
1703 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1704 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1705 | |
1706 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1707 | FLD (f_r1) = f_r1; |
1708 | FLD (f_r2) = f_r2; | |
c906108c SS |
1709 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1710 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1711 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1712 | |
1713 | #if WITH_PROFILE_MODEL_P | |
1714 | /* Record the fields for profiling. */ | |
1715 | if (PROFILE_MODEL_P (current_cpu)) | |
1716 | { | |
1717 | FLD (in_src1) = f_r1; | |
1718 | FLD (in_src2) = f_r2; | |
1719 | FLD (out_src2) = f_r2; | |
1720 | } | |
1721 | #endif | |
1722 | #undef FLD | |
7a292a7a | 1723 | return idesc; |
c906108c SS |
1724 | } |
1725 | ||
96baa820 | 1726 | extract_sfmt_trap: |
c906108c | 1727 | { |
7a292a7a | 1728 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1729 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1730 | #define FLD(f) abuf->fields.sfmt_trap.f |
1731 | UINT f_uimm4; | |
c906108c | 1732 | |
96baa820 | 1733 | f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1734 | |
1735 | /* Record the fields for the semantic handler. */ | |
1736 | FLD (f_uimm4) = f_uimm4; | |
96baa820 | 1737 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); |
c906108c SS |
1738 | |
1739 | #if WITH_PROFILE_MODEL_P | |
1740 | /* Record the fields for profiling. */ | |
1741 | if (PROFILE_MODEL_P (current_cpu)) | |
1742 | { | |
1743 | } | |
1744 | #endif | |
1745 | #undef FLD | |
7a292a7a | 1746 | return idesc; |
c906108c SS |
1747 | } |
1748 | ||
96baa820 | 1749 | extract_sfmt_unlock: |
c906108c | 1750 | { |
7a292a7a | 1751 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1752 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1753 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1754 | UINT f_r1; | |
1755 | UINT f_r2; | |
c906108c | 1756 | |
96baa820 JM |
1757 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1758 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1759 | |
1760 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1761 | FLD (f_r1) = f_r1; |
1762 | FLD (f_r2) = f_r2; | |
c906108c SS |
1763 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1764 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1765 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1766 | |
1767 | #if WITH_PROFILE_MODEL_P | |
1768 | /* Record the fields for profiling. */ | |
1769 | if (PROFILE_MODEL_P (current_cpu)) | |
1770 | { | |
1771 | FLD (in_src1) = f_r1; | |
1772 | FLD (in_src2) = f_r2; | |
1773 | } | |
1774 | #endif | |
1775 | #undef FLD | |
7a292a7a | 1776 | return idesc; |
c906108c SS |
1777 | } |
1778 | ||
c906108c | 1779 | } |