Commit | Line | Data |
---|---|---|
c906108c SS |
1 | /* Simulator instruction decoder for m32rbf. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
378af1d6 | 5 | Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. |
c906108c | 6 | |
378af1d6 | 7 | This file is part of the GNU simulators. |
c906108c SS |
8 | |
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #define WANT_CPU m32rbf | |
26 | #define WANT_CPU_M32RBF | |
27 | ||
28 | #include "sim-main.h" | |
29 | #include "sim-assert.h" | |
30 | ||
c906108c SS |
31 | /* The instruction descriptor array. |
32 | This is computed at runtime. Space for it is not malloc'd to save a | |
33 | teensy bit of cpu in the decoder. Moving it to malloc space is trivial | |
34 | but won't be done until necessary (we don't currently support the runtime | |
35 | addition of instructions nor an SMP machine with different cpus). */ | |
378af1d6 | 36 | static IDESC m32rbf_insn_data[M32RBF_INSN_UNLOCK + 1]; |
c906108c | 37 | |
c906108c SS |
38 | /* Commas between elements are contained in the macros. |
39 | Some of these are conditionally compiled out. */ | |
40 | ||
41 | static const struct insn_sem m32rbf_insn_sem[] = | |
42 | { | |
96baa820 JM |
43 | { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }, |
44 | { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY }, | |
45 | { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY }, | |
46 | { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY }, | |
47 | { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY }, | |
48 | { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY }, | |
49 | { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD }, | |
50 | { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 }, | |
51 | { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD }, | |
52 | { M32R_INSN_AND3, M32RBF_INSN_AND3, M32RBF_SFMT_AND3 }, | |
53 | { M32R_INSN_OR, M32RBF_INSN_OR, M32RBF_SFMT_ADD }, | |
54 | { M32R_INSN_OR3, M32RBF_INSN_OR3, M32RBF_SFMT_OR3 }, | |
55 | { M32R_INSN_XOR, M32RBF_INSN_XOR, M32RBF_SFMT_ADD }, | |
56 | { M32R_INSN_XOR3, M32RBF_INSN_XOR3, M32RBF_SFMT_AND3 }, | |
57 | { M32R_INSN_ADDI, M32RBF_INSN_ADDI, M32RBF_SFMT_ADDI }, | |
58 | { M32R_INSN_ADDV, M32RBF_INSN_ADDV, M32RBF_SFMT_ADDV }, | |
59 | { M32R_INSN_ADDV3, M32RBF_INSN_ADDV3, M32RBF_SFMT_ADDV3 }, | |
60 | { M32R_INSN_ADDX, M32RBF_INSN_ADDX, M32RBF_SFMT_ADDX }, | |
61 | { M32R_INSN_BC8, M32RBF_INSN_BC8, M32RBF_SFMT_BC8 }, | |
62 | { M32R_INSN_BC24, M32RBF_INSN_BC24, M32RBF_SFMT_BC24 }, | |
63 | { M32R_INSN_BEQ, M32RBF_INSN_BEQ, M32RBF_SFMT_BEQ }, | |
64 | { M32R_INSN_BEQZ, M32RBF_INSN_BEQZ, M32RBF_SFMT_BEQZ }, | |
65 | { M32R_INSN_BGEZ, M32RBF_INSN_BGEZ, M32RBF_SFMT_BEQZ }, | |
66 | { M32R_INSN_BGTZ, M32RBF_INSN_BGTZ, M32RBF_SFMT_BEQZ }, | |
67 | { M32R_INSN_BLEZ, M32RBF_INSN_BLEZ, M32RBF_SFMT_BEQZ }, | |
68 | { M32R_INSN_BLTZ, M32RBF_INSN_BLTZ, M32RBF_SFMT_BEQZ }, | |
69 | { M32R_INSN_BNEZ, M32RBF_INSN_BNEZ, M32RBF_SFMT_BEQZ }, | |
70 | { M32R_INSN_BL8, M32RBF_INSN_BL8, M32RBF_SFMT_BL8 }, | |
71 | { M32R_INSN_BL24, M32RBF_INSN_BL24, M32RBF_SFMT_BL24 }, | |
72 | { M32R_INSN_BNC8, M32RBF_INSN_BNC8, M32RBF_SFMT_BC8 }, | |
73 | { M32R_INSN_BNC24, M32RBF_INSN_BNC24, M32RBF_SFMT_BC24 }, | |
74 | { M32R_INSN_BNE, M32RBF_INSN_BNE, M32RBF_SFMT_BEQ }, | |
75 | { M32R_INSN_BRA8, M32RBF_INSN_BRA8, M32RBF_SFMT_BRA8 }, | |
76 | { M32R_INSN_BRA24, M32RBF_INSN_BRA24, M32RBF_SFMT_BRA24 }, | |
77 | { M32R_INSN_CMP, M32RBF_INSN_CMP, M32RBF_SFMT_CMP }, | |
78 | { M32R_INSN_CMPI, M32RBF_INSN_CMPI, M32RBF_SFMT_CMPI }, | |
79 | { M32R_INSN_CMPU, M32RBF_INSN_CMPU, M32RBF_SFMT_CMP }, | |
80 | { M32R_INSN_CMPUI, M32RBF_INSN_CMPUI, M32RBF_SFMT_CMPI }, | |
81 | { M32R_INSN_DIV, M32RBF_INSN_DIV, M32RBF_SFMT_DIV }, | |
82 | { M32R_INSN_DIVU, M32RBF_INSN_DIVU, M32RBF_SFMT_DIV }, | |
83 | { M32R_INSN_REM, M32RBF_INSN_REM, M32RBF_SFMT_DIV }, | |
84 | { M32R_INSN_REMU, M32RBF_INSN_REMU, M32RBF_SFMT_DIV }, | |
85 | { M32R_INSN_JL, M32RBF_INSN_JL, M32RBF_SFMT_JL }, | |
86 | { M32R_INSN_JMP, M32RBF_INSN_JMP, M32RBF_SFMT_JMP }, | |
87 | { M32R_INSN_LD, M32RBF_INSN_LD, M32RBF_SFMT_LD }, | |
88 | { M32R_INSN_LD_D, M32RBF_INSN_LD_D, M32RBF_SFMT_LD_D }, | |
378af1d6 DB |
89 | { M32R_INSN_LDB, M32RBF_INSN_LDB, M32RBF_SFMT_LDB }, |
90 | { M32R_INSN_LDB_D, M32RBF_INSN_LDB_D, M32RBF_SFMT_LDB_D }, | |
91 | { M32R_INSN_LDH, M32RBF_INSN_LDH, M32RBF_SFMT_LDH }, | |
92 | { M32R_INSN_LDH_D, M32RBF_INSN_LDH_D, M32RBF_SFMT_LDH_D }, | |
93 | { M32R_INSN_LDUB, M32RBF_INSN_LDUB, M32RBF_SFMT_LDB }, | |
94 | { M32R_INSN_LDUB_D, M32RBF_INSN_LDUB_D, M32RBF_SFMT_LDB_D }, | |
95 | { M32R_INSN_LDUH, M32RBF_INSN_LDUH, M32RBF_SFMT_LDH }, | |
96 | { M32R_INSN_LDUH_D, M32RBF_INSN_LDUH_D, M32RBF_SFMT_LDH_D }, | |
96baa820 JM |
97 | { M32R_INSN_LD_PLUS, M32RBF_INSN_LD_PLUS, M32RBF_SFMT_LD_PLUS }, |
98 | { M32R_INSN_LD24, M32RBF_INSN_LD24, M32RBF_SFMT_LD24 }, | |
99 | { M32R_INSN_LDI8, M32RBF_INSN_LDI8, M32RBF_SFMT_LDI8 }, | |
100 | { M32R_INSN_LDI16, M32RBF_INSN_LDI16, M32RBF_SFMT_LDI16 }, | |
101 | { M32R_INSN_LOCK, M32RBF_INSN_LOCK, M32RBF_SFMT_LOCK }, | |
102 | { M32R_INSN_MACHI, M32RBF_INSN_MACHI, M32RBF_SFMT_MACHI }, | |
103 | { M32R_INSN_MACLO, M32RBF_INSN_MACLO, M32RBF_SFMT_MACHI }, | |
104 | { M32R_INSN_MACWHI, M32RBF_INSN_MACWHI, M32RBF_SFMT_MACHI }, | |
105 | { M32R_INSN_MACWLO, M32RBF_INSN_MACWLO, M32RBF_SFMT_MACHI }, | |
106 | { M32R_INSN_MUL, M32RBF_INSN_MUL, M32RBF_SFMT_ADD }, | |
107 | { M32R_INSN_MULHI, M32RBF_INSN_MULHI, M32RBF_SFMT_MULHI }, | |
108 | { M32R_INSN_MULLO, M32RBF_INSN_MULLO, M32RBF_SFMT_MULHI }, | |
109 | { M32R_INSN_MULWHI, M32RBF_INSN_MULWHI, M32RBF_SFMT_MULHI }, | |
110 | { M32R_INSN_MULWLO, M32RBF_INSN_MULWLO, M32RBF_SFMT_MULHI }, | |
111 | { M32R_INSN_MV, M32RBF_INSN_MV, M32RBF_SFMT_MV }, | |
112 | { M32R_INSN_MVFACHI, M32RBF_INSN_MVFACHI, M32RBF_SFMT_MVFACHI }, | |
113 | { M32R_INSN_MVFACLO, M32RBF_INSN_MVFACLO, M32RBF_SFMT_MVFACHI }, | |
114 | { M32R_INSN_MVFACMI, M32RBF_INSN_MVFACMI, M32RBF_SFMT_MVFACHI }, | |
115 | { M32R_INSN_MVFC, M32RBF_INSN_MVFC, M32RBF_SFMT_MVFC }, | |
116 | { M32R_INSN_MVTACHI, M32RBF_INSN_MVTACHI, M32RBF_SFMT_MVTACHI }, | |
117 | { M32R_INSN_MVTACLO, M32RBF_INSN_MVTACLO, M32RBF_SFMT_MVTACHI }, | |
118 | { M32R_INSN_MVTC, M32RBF_INSN_MVTC, M32RBF_SFMT_MVTC }, | |
119 | { M32R_INSN_NEG, M32RBF_INSN_NEG, M32RBF_SFMT_MV }, | |
120 | { M32R_INSN_NOP, M32RBF_INSN_NOP, M32RBF_SFMT_NOP }, | |
121 | { M32R_INSN_NOT, M32RBF_INSN_NOT, M32RBF_SFMT_MV }, | |
122 | { M32R_INSN_RAC, M32RBF_INSN_RAC, M32RBF_SFMT_RAC }, | |
123 | { M32R_INSN_RACH, M32RBF_INSN_RACH, M32RBF_SFMT_RAC }, | |
124 | { M32R_INSN_RTE, M32RBF_INSN_RTE, M32RBF_SFMT_RTE }, | |
125 | { M32R_INSN_SETH, M32RBF_INSN_SETH, M32RBF_SFMT_SETH }, | |
126 | { M32R_INSN_SLL, M32RBF_INSN_SLL, M32RBF_SFMT_ADD }, | |
127 | { M32R_INSN_SLL3, M32RBF_INSN_SLL3, M32RBF_SFMT_SLL3 }, | |
128 | { M32R_INSN_SLLI, M32RBF_INSN_SLLI, M32RBF_SFMT_SLLI }, | |
129 | { M32R_INSN_SRA, M32RBF_INSN_SRA, M32RBF_SFMT_ADD }, | |
130 | { M32R_INSN_SRA3, M32RBF_INSN_SRA3, M32RBF_SFMT_SLL3 }, | |
131 | { M32R_INSN_SRAI, M32RBF_INSN_SRAI, M32RBF_SFMT_SLLI }, | |
132 | { M32R_INSN_SRL, M32RBF_INSN_SRL, M32RBF_SFMT_ADD }, | |
133 | { M32R_INSN_SRL3, M32RBF_INSN_SRL3, M32RBF_SFMT_SLL3 }, | |
134 | { M32R_INSN_SRLI, M32RBF_INSN_SRLI, M32RBF_SFMT_SLLI }, | |
135 | { M32R_INSN_ST, M32RBF_INSN_ST, M32RBF_SFMT_ST }, | |
136 | { M32R_INSN_ST_D, M32RBF_INSN_ST_D, M32RBF_SFMT_ST_D }, | |
137 | { M32R_INSN_STB, M32RBF_INSN_STB, M32RBF_SFMT_STB }, | |
138 | { M32R_INSN_STB_D, M32RBF_INSN_STB_D, M32RBF_SFMT_STB_D }, | |
139 | { M32R_INSN_STH, M32RBF_INSN_STH, M32RBF_SFMT_STH }, | |
140 | { M32R_INSN_STH_D, M32RBF_INSN_STH_D, M32RBF_SFMT_STH_D }, | |
141 | { M32R_INSN_ST_PLUS, M32RBF_INSN_ST_PLUS, M32RBF_SFMT_ST_PLUS }, | |
142 | { M32R_INSN_ST_MINUS, M32RBF_INSN_ST_MINUS, M32RBF_SFMT_ST_PLUS }, | |
143 | { M32R_INSN_SUB, M32RBF_INSN_SUB, M32RBF_SFMT_ADD }, | |
144 | { M32R_INSN_SUBV, M32RBF_INSN_SUBV, M32RBF_SFMT_ADDV }, | |
145 | { M32R_INSN_SUBX, M32RBF_INSN_SUBX, M32RBF_SFMT_ADDX }, | |
146 | { M32R_INSN_TRAP, M32RBF_INSN_TRAP, M32RBF_SFMT_TRAP }, | |
147 | { M32R_INSN_UNLOCK, M32RBF_INSN_UNLOCK, M32RBF_SFMT_UNLOCK }, | |
c906108c SS |
148 | }; |
149 | ||
96baa820 JM |
150 | static const struct insn_sem m32rbf_insn_sem_invalid = { |
151 | VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY | |
c906108c SS |
152 | }; |
153 | ||
c906108c SS |
154 | /* Initialize an IDESC from the compile-time computable parts. */ |
155 | ||
156 | static INLINE void | |
157 | init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) | |
158 | { | |
159 | const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; | |
160 | ||
161 | id->num = t->index; | |
96baa820 | 162 | id->sfmt = t->sfmt; |
c906108c SS |
163 | if ((int) t->type <= 0) |
164 | id->idata = & cgen_virtual_insn_table[- (int) t->type]; | |
165 | else | |
166 | id->idata = & insn_table[t->type]; | |
167 | id->attrs = CGEN_INSN_ATTRS (id->idata); | |
168 | /* Oh my god, a magic number. */ | |
169 | id->length = CGEN_INSN_BITSIZE (id->idata) / 8; | |
96baa820 | 170 | |
c906108c SS |
171 | #if WITH_PROFILE_MODEL_P |
172 | id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; | |
173 | { | |
174 | SIM_DESC sd = CPU_STATE (cpu); | |
175 | SIM_ASSERT (t->index == id->timing->num); | |
176 | } | |
177 | #endif | |
96baa820 JM |
178 | |
179 | /* Semantic pointers are initialized elsewhere. */ | |
c906108c SS |
180 | } |
181 | ||
182 | /* Initialize the instruction descriptor table. */ | |
183 | ||
184 | void | |
185 | m32rbf_init_idesc_table (SIM_CPU *cpu) | |
186 | { | |
187 | IDESC *id,*tabend; | |
188 | const struct insn_sem *t,*tend; | |
378af1d6 | 189 | int tabsize = sizeof (m32rbf_insn_data) / sizeof (IDESC); |
c906108c SS |
190 | IDESC *table = m32rbf_insn_data; |
191 | ||
192 | memset (table, 0, tabsize * sizeof (IDESC)); | |
193 | ||
194 | /* First set all entries to the `invalid insn'. */ | |
195 | t = & m32rbf_insn_sem_invalid; | |
196 | for (id = table, tabend = table + tabsize; id < tabend; ++id) | |
197 | init_idesc (cpu, id, t); | |
198 | ||
199 | /* Now fill in the values for the chosen cpu. */ | |
200 | for (t = m32rbf_insn_sem, tend = t + sizeof (m32rbf_insn_sem) / sizeof (*t); | |
201 | t != tend; ++t) | |
202 | { | |
203 | init_idesc (cpu, & table[t->index], t); | |
204 | } | |
205 | ||
206 | /* Link the IDESC table into the cpu. */ | |
207 | CPU_IDESC (cpu) = table; | |
208 | } | |
209 | ||
c906108c SS |
210 | /* Given an instruction, return a pointer to its IDESC entry. */ |
211 | ||
212 | const IDESC * | |
213 | m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, | |
214 | CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, | |
215 | ARGBUF *abuf) | |
216 | { | |
7a292a7a SS |
217 | /* Result of decoder. */ |
218 | M32RBF_INSN_TYPE itype; | |
c906108c SS |
219 | |
220 | { | |
c906108c | 221 | CGEN_INSN_INT insn = base_insn; |
c906108c SS |
222 | |
223 | { | |
7a292a7a SS |
224 | unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0))); |
225 | switch (val) | |
226 | { | |
378af1d6 DB |
227 | case 0 : itype = M32RBF_INSN_SUBV;goto extract_sfmt_addv; |
228 | case 1 : itype = M32RBF_INSN_SUBX;goto extract_sfmt_addx; | |
229 | case 2 : itype = M32RBF_INSN_SUB;goto extract_sfmt_add; | |
230 | case 3 : itype = M32RBF_INSN_NEG;goto extract_sfmt_mv; | |
231 | case 4 : itype = M32RBF_INSN_CMP;goto extract_sfmt_cmp; | |
232 | case 5 : itype = M32RBF_INSN_CMPU;goto extract_sfmt_cmp; | |
233 | case 8 : itype = M32RBF_INSN_ADDV;goto extract_sfmt_addv; | |
234 | case 9 : itype = M32RBF_INSN_ADDX;goto extract_sfmt_addx; | |
235 | case 10 : itype = M32RBF_INSN_ADD;goto extract_sfmt_add; | |
236 | case 11 : itype = M32RBF_INSN_NOT;goto extract_sfmt_mv; | |
237 | case 12 : itype = M32RBF_INSN_AND;goto extract_sfmt_add; | |
238 | case 13 : itype = M32RBF_INSN_XOR;goto extract_sfmt_add; | |
239 | case 14 : itype = M32RBF_INSN_OR;goto extract_sfmt_add; | |
240 | case 16 : itype = M32RBF_INSN_SRL;goto extract_sfmt_add; | |
241 | case 18 : itype = M32RBF_INSN_SRA;goto extract_sfmt_add; | |
242 | case 20 : itype = M32RBF_INSN_SLL;goto extract_sfmt_add; | |
243 | case 22 : itype = M32RBF_INSN_MUL;goto extract_sfmt_add; | |
244 | case 24 : itype = M32RBF_INSN_MV;goto extract_sfmt_mv; | |
245 | case 25 : itype = M32RBF_INSN_MVFC;goto extract_sfmt_mvfc; | |
246 | case 26 : itype = M32RBF_INSN_MVTC;goto extract_sfmt_mvtc; | |
247 | case 28 : | |
c906108c | 248 | { |
55552082 | 249 | unsigned int val = (((insn >> 8) & (1 << 0))); |
7a292a7a | 250 | switch (val) |
c906108c | 251 | { |
378af1d6 DB |
252 | case 0 : itype = M32RBF_INSN_JL;goto extract_sfmt_jl; |
253 | case 1 : itype = M32RBF_INSN_JMP;goto extract_sfmt_jmp; | |
254 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 255 | } |
7a292a7a | 256 | } |
378af1d6 DB |
257 | case 29 : itype = M32RBF_INSN_RTE;goto extract_sfmt_rte; |
258 | case 31 : itype = M32RBF_INSN_TRAP;goto extract_sfmt_trap; | |
259 | case 32 : itype = M32RBF_INSN_STB;goto extract_sfmt_stb; | |
260 | case 34 : itype = M32RBF_INSN_STH;goto extract_sfmt_sth; | |
261 | case 36 : itype = M32RBF_INSN_ST;goto extract_sfmt_st; | |
262 | case 37 : itype = M32RBF_INSN_UNLOCK;goto extract_sfmt_unlock; | |
263 | case 38 : itype = M32RBF_INSN_ST_PLUS;goto extract_sfmt_st_plus; | |
264 | case 39 : itype = M32RBF_INSN_ST_MINUS;goto extract_sfmt_st_plus; | |
265 | case 40 : itype = M32RBF_INSN_LDB;goto extract_sfmt_ldb; | |
266 | case 41 : itype = M32RBF_INSN_LDUB;goto extract_sfmt_ldb; | |
267 | case 42 : itype = M32RBF_INSN_LDH;goto extract_sfmt_ldh; | |
268 | case 43 : itype = M32RBF_INSN_LDUH;goto extract_sfmt_ldh; | |
269 | case 44 : itype = M32RBF_INSN_LD;goto extract_sfmt_ld; | |
270 | case 45 : itype = M32RBF_INSN_LOCK;goto extract_sfmt_lock; | |
271 | case 46 : itype = M32RBF_INSN_LD_PLUS;goto extract_sfmt_ld_plus; | |
272 | case 48 : itype = M32RBF_INSN_MULHI;goto extract_sfmt_mulhi; | |
273 | case 49 : itype = M32RBF_INSN_MULLO;goto extract_sfmt_mulhi; | |
274 | case 50 : itype = M32RBF_INSN_MULWHI;goto extract_sfmt_mulhi; | |
275 | case 51 : itype = M32RBF_INSN_MULWLO;goto extract_sfmt_mulhi; | |
276 | case 52 : itype = M32RBF_INSN_MACHI;goto extract_sfmt_machi; | |
277 | case 53 : itype = M32RBF_INSN_MACLO;goto extract_sfmt_machi; | |
278 | case 54 : itype = M32RBF_INSN_MACWHI;goto extract_sfmt_machi; | |
279 | case 55 : itype = M32RBF_INSN_MACWLO;goto extract_sfmt_machi; | |
280 | case 64 : /* fall through */ | |
7a292a7a SS |
281 | case 65 : /* fall through */ |
282 | case 66 : /* fall through */ | |
283 | case 67 : /* fall through */ | |
284 | case 68 : /* fall through */ | |
285 | case 69 : /* fall through */ | |
286 | case 70 : /* fall through */ | |
287 | case 71 : /* fall through */ | |
288 | case 72 : /* fall through */ | |
289 | case 73 : /* fall through */ | |
290 | case 74 : /* fall through */ | |
291 | case 75 : /* fall through */ | |
292 | case 76 : /* fall through */ | |
293 | case 77 : /* fall through */ | |
294 | case 78 : /* fall through */ | |
378af1d6 DB |
295 | case 79 : itype = M32RBF_INSN_ADDI;goto extract_sfmt_addi; |
296 | case 80 : /* fall through */ | |
297 | case 81 : itype = M32RBF_INSN_SRLI;goto extract_sfmt_slli; | |
298 | case 82 : /* fall through */ | |
299 | case 83 : itype = M32RBF_INSN_SRAI;goto extract_sfmt_slli; | |
300 | case 84 : /* fall through */ | |
301 | case 85 : itype = M32RBF_INSN_SLLI;goto extract_sfmt_slli; | |
302 | case 87 : | |
7a292a7a | 303 | { |
55552082 | 304 | unsigned int val = (((insn >> 0) & (1 << 0))); |
7a292a7a | 305 | switch (val) |
c906108c | 306 | { |
378af1d6 DB |
307 | case 0 : itype = M32RBF_INSN_MVTACHI;goto extract_sfmt_mvtachi; |
308 | case 1 : itype = M32RBF_INSN_MVTACLO;goto extract_sfmt_mvtachi; | |
309 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 310 | } |
7a292a7a | 311 | } |
378af1d6 DB |
312 | case 88 : itype = M32RBF_INSN_RACH;goto extract_sfmt_rac; |
313 | case 89 : itype = M32RBF_INSN_RAC;goto extract_sfmt_rac; | |
314 | case 95 : | |
7a292a7a | 315 | { |
55552082 | 316 | unsigned int val = (((insn >> 0) & (3 << 0))); |
7a292a7a | 317 | switch (val) |
c906108c | 318 | { |
378af1d6 DB |
319 | case 0 : itype = M32RBF_INSN_MVFACHI;goto extract_sfmt_mvfachi; |
320 | case 1 : itype = M32RBF_INSN_MVFACLO;goto extract_sfmt_mvfachi; | |
321 | case 2 : itype = M32RBF_INSN_MVFACMI;goto extract_sfmt_mvfachi; | |
322 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 323 | } |
7a292a7a SS |
324 | } |
325 | case 96 : /* fall through */ | |
326 | case 97 : /* fall through */ | |
327 | case 98 : /* fall through */ | |
328 | case 99 : /* fall through */ | |
329 | case 100 : /* fall through */ | |
330 | case 101 : /* fall through */ | |
331 | case 102 : /* fall through */ | |
332 | case 103 : /* fall through */ | |
333 | case 104 : /* fall through */ | |
334 | case 105 : /* fall through */ | |
335 | case 106 : /* fall through */ | |
336 | case 107 : /* fall through */ | |
337 | case 108 : /* fall through */ | |
338 | case 109 : /* fall through */ | |
339 | case 110 : /* fall through */ | |
378af1d6 DB |
340 | case 111 : itype = M32RBF_INSN_LDI8;goto extract_sfmt_ldi8; |
341 | case 112 : | |
7a292a7a SS |
342 | { |
343 | unsigned int val = (((insn >> 8) & (15 << 0))); | |
344 | switch (val) | |
c906108c | 345 | { |
378af1d6 DB |
346 | case 0 : itype = M32RBF_INSN_NOP;goto extract_sfmt_nop; |
347 | case 12 : itype = M32RBF_INSN_BC8;goto extract_sfmt_bc8; | |
348 | case 13 : itype = M32RBF_INSN_BNC8;goto extract_sfmt_bc8; | |
349 | case 14 : itype = M32RBF_INSN_BL8;goto extract_sfmt_bl8; | |
350 | case 15 : itype = M32RBF_INSN_BRA8;goto extract_sfmt_bra8; | |
351 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 352 | } |
7a292a7a SS |
353 | } |
354 | case 113 : /* fall through */ | |
355 | case 114 : /* fall through */ | |
356 | case 115 : /* fall through */ | |
357 | case 116 : /* fall through */ | |
358 | case 117 : /* fall through */ | |
359 | case 118 : /* fall through */ | |
360 | case 119 : /* fall through */ | |
361 | case 120 : /* fall through */ | |
362 | case 121 : /* fall through */ | |
363 | case 122 : /* fall through */ | |
364 | case 123 : /* fall through */ | |
365 | case 124 : /* fall through */ | |
366 | case 125 : /* fall through */ | |
367 | case 126 : /* fall through */ | |
368 | case 127 : | |
369 | { | |
55552082 | 370 | unsigned int val = (((insn >> 8) & (3 << 0))); |
7a292a7a | 371 | switch (val) |
c906108c | 372 | { |
378af1d6 DB |
373 | case 0 : itype = M32RBF_INSN_BC8;goto extract_sfmt_bc8; |
374 | case 1 : itype = M32RBF_INSN_BNC8;goto extract_sfmt_bc8; | |
375 | case 2 : itype = M32RBF_INSN_BL8;goto extract_sfmt_bl8; | |
376 | case 3 : itype = M32RBF_INSN_BRA8;goto extract_sfmt_bra8; | |
377 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 378 | } |
7a292a7a | 379 | } |
378af1d6 DB |
380 | case 132 : itype = M32RBF_INSN_CMPI;goto extract_sfmt_cmpi; |
381 | case 133 : itype = M32RBF_INSN_CMPUI;goto extract_sfmt_cmpi; | |
382 | case 136 : itype = M32RBF_INSN_ADDV3;goto extract_sfmt_addv3; | |
383 | case 138 : itype = M32RBF_INSN_ADD3;goto extract_sfmt_add3; | |
384 | case 140 : itype = M32RBF_INSN_AND3;goto extract_sfmt_and3; | |
385 | case 141 : itype = M32RBF_INSN_XOR3;goto extract_sfmt_and3; | |
386 | case 142 : itype = M32RBF_INSN_OR3;goto extract_sfmt_or3; | |
387 | case 144 : itype = M32RBF_INSN_DIV;goto extract_sfmt_div; | |
388 | case 145 : itype = M32RBF_INSN_DIVU;goto extract_sfmt_div; | |
389 | case 146 : itype = M32RBF_INSN_REM;goto extract_sfmt_div; | |
390 | case 147 : itype = M32RBF_INSN_REMU;goto extract_sfmt_div; | |
391 | case 152 : itype = M32RBF_INSN_SRL3;goto extract_sfmt_sll3; | |
392 | case 154 : itype = M32RBF_INSN_SRA3;goto extract_sfmt_sll3; | |
393 | case 156 : itype = M32RBF_INSN_SLL3;goto extract_sfmt_sll3; | |
394 | case 159 : itype = M32RBF_INSN_LDI16;goto extract_sfmt_ldi16; | |
395 | case 160 : itype = M32RBF_INSN_STB_D;goto extract_sfmt_stb_d; | |
396 | case 162 : itype = M32RBF_INSN_STH_D;goto extract_sfmt_sth_d; | |
397 | case 164 : itype = M32RBF_INSN_ST_D;goto extract_sfmt_st_d; | |
398 | case 168 : itype = M32RBF_INSN_LDB_D;goto extract_sfmt_ldb_d; | |
399 | case 169 : itype = M32RBF_INSN_LDUB_D;goto extract_sfmt_ldb_d; | |
400 | case 170 : itype = M32RBF_INSN_LDH_D;goto extract_sfmt_ldh_d; | |
401 | case 171 : itype = M32RBF_INSN_LDUH_D;goto extract_sfmt_ldh_d; | |
402 | case 172 : itype = M32RBF_INSN_LD_D;goto extract_sfmt_ld_d; | |
403 | case 176 : itype = M32RBF_INSN_BEQ;goto extract_sfmt_beq; | |
404 | case 177 : itype = M32RBF_INSN_BNE;goto extract_sfmt_beq; | |
405 | case 184 : itype = M32RBF_INSN_BEQZ;goto extract_sfmt_beqz; | |
406 | case 185 : itype = M32RBF_INSN_BNEZ;goto extract_sfmt_beqz; | |
407 | case 186 : itype = M32RBF_INSN_BLTZ;goto extract_sfmt_beqz; | |
408 | case 187 : itype = M32RBF_INSN_BGEZ;goto extract_sfmt_beqz; | |
409 | case 188 : itype = M32RBF_INSN_BLEZ;goto extract_sfmt_beqz; | |
410 | case 189 : itype = M32RBF_INSN_BGTZ;goto extract_sfmt_beqz; | |
411 | case 220 : itype = M32RBF_INSN_SETH;goto extract_sfmt_seth; | |
412 | case 224 : /* fall through */ | |
7a292a7a SS |
413 | case 225 : /* fall through */ |
414 | case 226 : /* fall through */ | |
415 | case 227 : /* fall through */ | |
416 | case 228 : /* fall through */ | |
417 | case 229 : /* fall through */ | |
418 | case 230 : /* fall through */ | |
419 | case 231 : /* fall through */ | |
420 | case 232 : /* fall through */ | |
421 | case 233 : /* fall through */ | |
422 | case 234 : /* fall through */ | |
423 | case 235 : /* fall through */ | |
424 | case 236 : /* fall through */ | |
425 | case 237 : /* fall through */ | |
426 | case 238 : /* fall through */ | |
378af1d6 DB |
427 | case 239 : itype = M32RBF_INSN_LD24;goto extract_sfmt_ld24; |
428 | case 240 : /* fall through */ | |
7a292a7a SS |
429 | case 241 : /* fall through */ |
430 | case 242 : /* fall through */ | |
431 | case 243 : /* fall through */ | |
432 | case 244 : /* fall through */ | |
433 | case 245 : /* fall through */ | |
434 | case 246 : /* fall through */ | |
435 | case 247 : /* fall through */ | |
436 | case 248 : /* fall through */ | |
437 | case 249 : /* fall through */ | |
438 | case 250 : /* fall through */ | |
439 | case 251 : /* fall through */ | |
440 | case 252 : /* fall through */ | |
441 | case 253 : /* fall through */ | |
442 | case 254 : /* fall through */ | |
443 | case 255 : | |
444 | { | |
55552082 | 445 | unsigned int val = (((insn >> 8) & (3 << 0))); |
7a292a7a | 446 | switch (val) |
c906108c | 447 | { |
378af1d6 DB |
448 | case 0 : itype = M32RBF_INSN_BC24;goto extract_sfmt_bc24; |
449 | case 1 : itype = M32RBF_INSN_BNC24;goto extract_sfmt_bc24; | |
450 | case 2 : itype = M32RBF_INSN_BL24;goto extract_sfmt_bl24; | |
451 | case 3 : itype = M32RBF_INSN_BRA24;goto extract_sfmt_bra24; | |
452 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; | |
c906108c | 453 | } |
c906108c | 454 | } |
96baa820 | 455 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
7a292a7a | 456 | } |
c906108c | 457 | } |
c906108c SS |
458 | } |
459 | ||
460 | /* The instruction has been decoded, now extract the fields. */ | |
461 | ||
96baa820 | 462 | extract_sfmt_empty: |
c906108c | 463 | { |
7a292a7a | 464 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 465 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 466 | |
c906108c SS |
467 | |
468 | /* Record the fields for the semantic handler. */ | |
96baa820 | 469 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); |
c906108c SS |
470 | |
471 | #undef FLD | |
7a292a7a | 472 | return idesc; |
c906108c SS |
473 | } |
474 | ||
96baa820 | 475 | extract_sfmt_add: |
c906108c | 476 | { |
7a292a7a | 477 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 478 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
479 | #define FLD(f) abuf->fields.sfmt_add.f |
480 | UINT f_r1; | |
481 | UINT f_r2; | |
c906108c | 482 | |
96baa820 JM |
483 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
484 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
485 | |
486 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
487 | FLD (f_r1) = f_r1; |
488 | FLD (f_r2) = f_r2; | |
c906108c SS |
489 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
490 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 491 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
492 | |
493 | #if WITH_PROFILE_MODEL_P | |
494 | /* Record the fields for profiling. */ | |
495 | if (PROFILE_MODEL_P (current_cpu)) | |
496 | { | |
497 | FLD (in_dr) = f_r1; | |
498 | FLD (in_sr) = f_r2; | |
499 | FLD (out_dr) = f_r1; | |
500 | } | |
501 | #endif | |
502 | #undef FLD | |
7a292a7a | 503 | return idesc; |
c906108c SS |
504 | } |
505 | ||
96baa820 | 506 | extract_sfmt_add3: |
c906108c | 507 | { |
7a292a7a | 508 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 509 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
510 | #define FLD(f) abuf->fields.sfmt_add3.f |
511 | UINT f_r1; | |
512 | UINT f_r2; | |
513 | INT f_simm16; | |
c906108c | 514 | |
96baa820 JM |
515 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
516 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
517 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
518 | |
519 | /* Record the fields for the semantic handler. */ | |
520 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
521 | FLD (f_r2) = f_r2; |
522 | FLD (f_r1) = f_r1; | |
c906108c SS |
523 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
524 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 525 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
526 | |
527 | #if WITH_PROFILE_MODEL_P | |
528 | /* Record the fields for profiling. */ | |
529 | if (PROFILE_MODEL_P (current_cpu)) | |
530 | { | |
531 | FLD (in_sr) = f_r2; | |
532 | FLD (out_dr) = f_r1; | |
533 | } | |
534 | #endif | |
535 | #undef FLD | |
7a292a7a | 536 | return idesc; |
c906108c SS |
537 | } |
538 | ||
96baa820 | 539 | extract_sfmt_and3: |
c906108c | 540 | { |
7a292a7a | 541 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 542 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
543 | #define FLD(f) abuf->fields.sfmt_and3.f |
544 | UINT f_r1; | |
545 | UINT f_r2; | |
546 | UINT f_uimm16; | |
c906108c | 547 | |
96baa820 JM |
548 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
549 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
550 | f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
551 | |
552 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 553 | FLD (f_r2) = f_r2; |
c906108c | 554 | FLD (f_uimm16) = f_uimm16; |
de8f5985 | 555 | FLD (f_r1) = f_r1; |
c906108c SS |
556 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
557 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 558 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
559 | |
560 | #if WITH_PROFILE_MODEL_P | |
561 | /* Record the fields for profiling. */ | |
562 | if (PROFILE_MODEL_P (current_cpu)) | |
563 | { | |
564 | FLD (in_sr) = f_r2; | |
565 | FLD (out_dr) = f_r1; | |
566 | } | |
567 | #endif | |
568 | #undef FLD | |
7a292a7a | 569 | return idesc; |
c906108c SS |
570 | } |
571 | ||
96baa820 | 572 | extract_sfmt_or3: |
c906108c | 573 | { |
7a292a7a | 574 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 575 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
576 | #define FLD(f) abuf->fields.sfmt_and3.f |
577 | UINT f_r1; | |
578 | UINT f_r2; | |
579 | UINT f_uimm16; | |
c906108c | 580 | |
96baa820 JM |
581 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
582 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
583 | f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
584 | |
585 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 586 | FLD (f_r2) = f_r2; |
c906108c | 587 | FLD (f_uimm16) = f_uimm16; |
de8f5985 | 588 | FLD (f_r1) = f_r1; |
c906108c SS |
589 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
590 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 591 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
592 | |
593 | #if WITH_PROFILE_MODEL_P | |
594 | /* Record the fields for profiling. */ | |
595 | if (PROFILE_MODEL_P (current_cpu)) | |
596 | { | |
597 | FLD (in_sr) = f_r2; | |
598 | FLD (out_dr) = f_r1; | |
599 | } | |
600 | #endif | |
601 | #undef FLD | |
7a292a7a | 602 | return idesc; |
c906108c SS |
603 | } |
604 | ||
96baa820 | 605 | extract_sfmt_addi: |
c906108c | 606 | { |
7a292a7a | 607 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 608 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
609 | #define FLD(f) abuf->fields.sfmt_addi.f |
610 | UINT f_r1; | |
611 | INT f_simm8; | |
c906108c | 612 | |
96baa820 JM |
613 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
614 | f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); | |
c906108c SS |
615 | |
616 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 617 | FLD (f_r1) = f_r1; |
c906108c SS |
618 | FLD (f_simm8) = f_simm8; |
619 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 620 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
621 | |
622 | #if WITH_PROFILE_MODEL_P | |
623 | /* Record the fields for profiling. */ | |
624 | if (PROFILE_MODEL_P (current_cpu)) | |
625 | { | |
626 | FLD (in_dr) = f_r1; | |
627 | FLD (out_dr) = f_r1; | |
628 | } | |
629 | #endif | |
630 | #undef FLD | |
7a292a7a | 631 | return idesc; |
c906108c SS |
632 | } |
633 | ||
96baa820 | 634 | extract_sfmt_addv: |
c906108c | 635 | { |
7a292a7a | 636 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 637 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
638 | #define FLD(f) abuf->fields.sfmt_add.f |
639 | UINT f_r1; | |
640 | UINT f_r2; | |
c906108c | 641 | |
96baa820 JM |
642 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
643 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
644 | |
645 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
646 | FLD (f_r1) = f_r1; |
647 | FLD (f_r2) = f_r2; | |
c906108c SS |
648 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
649 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 650 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
651 | |
652 | #if WITH_PROFILE_MODEL_P | |
653 | /* Record the fields for profiling. */ | |
654 | if (PROFILE_MODEL_P (current_cpu)) | |
655 | { | |
656 | FLD (in_dr) = f_r1; | |
657 | FLD (in_sr) = f_r2; | |
658 | FLD (out_dr) = f_r1; | |
659 | } | |
660 | #endif | |
661 | #undef FLD | |
7a292a7a | 662 | return idesc; |
c906108c SS |
663 | } |
664 | ||
96baa820 | 665 | extract_sfmt_addv3: |
c906108c | 666 | { |
7a292a7a | 667 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 668 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
669 | #define FLD(f) abuf->fields.sfmt_add3.f |
670 | UINT f_r1; | |
671 | UINT f_r2; | |
672 | INT f_simm16; | |
c906108c | 673 | |
96baa820 JM |
674 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
675 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
676 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
677 | |
678 | /* Record the fields for the semantic handler. */ | |
679 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
680 | FLD (f_r2) = f_r2; |
681 | FLD (f_r1) = f_r1; | |
c906108c SS |
682 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
683 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 684 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
685 | |
686 | #if WITH_PROFILE_MODEL_P | |
687 | /* Record the fields for profiling. */ | |
688 | if (PROFILE_MODEL_P (current_cpu)) | |
689 | { | |
690 | FLD (in_sr) = f_r2; | |
691 | FLD (out_dr) = f_r1; | |
692 | } | |
693 | #endif | |
694 | #undef FLD | |
7a292a7a | 695 | return idesc; |
c906108c SS |
696 | } |
697 | ||
96baa820 | 698 | extract_sfmt_addx: |
c906108c | 699 | { |
7a292a7a | 700 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 701 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
702 | #define FLD(f) abuf->fields.sfmt_add.f |
703 | UINT f_r1; | |
704 | UINT f_r2; | |
c906108c | 705 | |
96baa820 JM |
706 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
707 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
708 | |
709 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
710 | FLD (f_r1) = f_r1; |
711 | FLD (f_r2) = f_r2; | |
c906108c SS |
712 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
713 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 714 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
715 | |
716 | #if WITH_PROFILE_MODEL_P | |
717 | /* Record the fields for profiling. */ | |
718 | if (PROFILE_MODEL_P (current_cpu)) | |
719 | { | |
720 | FLD (in_dr) = f_r1; | |
721 | FLD (in_sr) = f_r2; | |
722 | FLD (out_dr) = f_r1; | |
723 | } | |
724 | #endif | |
725 | #undef FLD | |
7a292a7a | 726 | return idesc; |
c906108c SS |
727 | } |
728 | ||
96baa820 | 729 | extract_sfmt_bc8: |
c906108c | 730 | { |
7a292a7a | 731 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 732 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
733 | #define FLD(f) abuf->fields.sfmt_bl8.f |
734 | SI f_disp8; | |
c906108c | 735 | |
96baa820 | 736 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
737 | |
738 | /* Record the fields for the semantic handler. */ | |
739 | FLD (i_disp8) = f_disp8; | |
96baa820 | 740 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
741 | |
742 | #if WITH_PROFILE_MODEL_P | |
743 | /* Record the fields for profiling. */ | |
744 | if (PROFILE_MODEL_P (current_cpu)) | |
745 | { | |
746 | } | |
747 | #endif | |
748 | #undef FLD | |
7a292a7a | 749 | return idesc; |
c906108c SS |
750 | } |
751 | ||
96baa820 | 752 | extract_sfmt_bc24: |
c906108c | 753 | { |
7a292a7a | 754 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 755 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
756 | #define FLD(f) abuf->fields.sfmt_bl24.f |
757 | SI f_disp24; | |
c906108c | 758 | |
96baa820 | 759 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
760 | |
761 | /* Record the fields for the semantic handler. */ | |
762 | FLD (i_disp24) = f_disp24; | |
96baa820 | 763 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
764 | |
765 | #if WITH_PROFILE_MODEL_P | |
766 | /* Record the fields for profiling. */ | |
767 | if (PROFILE_MODEL_P (current_cpu)) | |
768 | { | |
769 | } | |
770 | #endif | |
771 | #undef FLD | |
7a292a7a | 772 | return idesc; |
c906108c SS |
773 | } |
774 | ||
96baa820 | 775 | extract_sfmt_beq: |
c906108c | 776 | { |
7a292a7a | 777 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 778 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
779 | #define FLD(f) abuf->fields.sfmt_beq.f |
780 | UINT f_r1; | |
781 | UINT f_r2; | |
782 | SI f_disp16; | |
c906108c | 783 | |
96baa820 JM |
784 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
785 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
786 | f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); | |
c906108c SS |
787 | |
788 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
789 | FLD (f_r1) = f_r1; |
790 | FLD (f_r2) = f_r2; | |
c906108c SS |
791 | FLD (i_disp16) = f_disp16; |
792 | FLD (i_src1) = & CPU (h_gr)[f_r1]; | |
793 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 794 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
795 | |
796 | #if WITH_PROFILE_MODEL_P | |
797 | /* Record the fields for profiling. */ | |
798 | if (PROFILE_MODEL_P (current_cpu)) | |
799 | { | |
800 | FLD (in_src1) = f_r1; | |
801 | FLD (in_src2) = f_r2; | |
802 | } | |
803 | #endif | |
804 | #undef FLD | |
7a292a7a | 805 | return idesc; |
c906108c SS |
806 | } |
807 | ||
96baa820 | 808 | extract_sfmt_beqz: |
c906108c | 809 | { |
7a292a7a | 810 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 811 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
812 | #define FLD(f) abuf->fields.sfmt_beq.f |
813 | UINT f_r2; | |
814 | SI f_disp16; | |
c906108c | 815 | |
96baa820 JM |
816 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); |
817 | f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); | |
c906108c SS |
818 | |
819 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 820 | FLD (f_r2) = f_r2; |
c906108c SS |
821 | FLD (i_disp16) = f_disp16; |
822 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 823 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
824 | |
825 | #if WITH_PROFILE_MODEL_P | |
826 | /* Record the fields for profiling. */ | |
827 | if (PROFILE_MODEL_P (current_cpu)) | |
828 | { | |
829 | FLD (in_src2) = f_r2; | |
830 | } | |
831 | #endif | |
832 | #undef FLD | |
7a292a7a | 833 | return idesc; |
c906108c SS |
834 | } |
835 | ||
96baa820 | 836 | extract_sfmt_bl8: |
c906108c | 837 | { |
7a292a7a | 838 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 839 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
840 | #define FLD(f) abuf->fields.sfmt_bl8.f |
841 | SI f_disp8; | |
c906108c | 842 | |
96baa820 | 843 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
844 | |
845 | /* Record the fields for the semantic handler. */ | |
846 | FLD (i_disp8) = f_disp8; | |
96baa820 | 847 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
848 | |
849 | #if WITH_PROFILE_MODEL_P | |
850 | /* Record the fields for profiling. */ | |
851 | if (PROFILE_MODEL_P (current_cpu)) | |
852 | { | |
378af1d6 | 853 | FLD (out_h_gr_SI_14) = 14; |
c906108c SS |
854 | } |
855 | #endif | |
856 | #undef FLD | |
7a292a7a | 857 | return idesc; |
c906108c SS |
858 | } |
859 | ||
96baa820 | 860 | extract_sfmt_bl24: |
c906108c | 861 | { |
7a292a7a | 862 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 863 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
864 | #define FLD(f) abuf->fields.sfmt_bl24.f |
865 | SI f_disp24; | |
c906108c | 866 | |
96baa820 | 867 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
868 | |
869 | /* Record the fields for the semantic handler. */ | |
870 | FLD (i_disp24) = f_disp24; | |
96baa820 | 871 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
872 | |
873 | #if WITH_PROFILE_MODEL_P | |
874 | /* Record the fields for profiling. */ | |
875 | if (PROFILE_MODEL_P (current_cpu)) | |
876 | { | |
378af1d6 | 877 | FLD (out_h_gr_SI_14) = 14; |
c906108c SS |
878 | } |
879 | #endif | |
880 | #undef FLD | |
7a292a7a | 881 | return idesc; |
c906108c SS |
882 | } |
883 | ||
96baa820 | 884 | extract_sfmt_bra8: |
c906108c | 885 | { |
7a292a7a | 886 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 887 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
888 | #define FLD(f) abuf->fields.sfmt_bl8.f |
889 | SI f_disp8; | |
c906108c | 890 | |
96baa820 | 891 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
892 | |
893 | /* Record the fields for the semantic handler. */ | |
894 | FLD (i_disp8) = f_disp8; | |
96baa820 | 895 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
896 | |
897 | #if WITH_PROFILE_MODEL_P | |
898 | /* Record the fields for profiling. */ | |
899 | if (PROFILE_MODEL_P (current_cpu)) | |
900 | { | |
901 | } | |
902 | #endif | |
903 | #undef FLD | |
7a292a7a | 904 | return idesc; |
c906108c SS |
905 | } |
906 | ||
96baa820 | 907 | extract_sfmt_bra24: |
c906108c | 908 | { |
7a292a7a | 909 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 910 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
911 | #define FLD(f) abuf->fields.sfmt_bl24.f |
912 | SI f_disp24; | |
c906108c | 913 | |
96baa820 | 914 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
915 | |
916 | /* Record the fields for the semantic handler. */ | |
917 | FLD (i_disp24) = f_disp24; | |
96baa820 | 918 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
919 | |
920 | #if WITH_PROFILE_MODEL_P | |
921 | /* Record the fields for profiling. */ | |
922 | if (PROFILE_MODEL_P (current_cpu)) | |
923 | { | |
924 | } | |
925 | #endif | |
926 | #undef FLD | |
7a292a7a | 927 | return idesc; |
c906108c SS |
928 | } |
929 | ||
96baa820 | 930 | extract_sfmt_cmp: |
c906108c | 931 | { |
7a292a7a | 932 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 933 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
934 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
935 | UINT f_r1; | |
936 | UINT f_r2; | |
c906108c | 937 | |
96baa820 JM |
938 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
939 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
940 | |
941 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
942 | FLD (f_r1) = f_r1; |
943 | FLD (f_r2) = f_r2; | |
c906108c SS |
944 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
945 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 946 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
947 | |
948 | #if WITH_PROFILE_MODEL_P | |
949 | /* Record the fields for profiling. */ | |
950 | if (PROFILE_MODEL_P (current_cpu)) | |
951 | { | |
952 | FLD (in_src1) = f_r1; | |
953 | FLD (in_src2) = f_r2; | |
954 | } | |
955 | #endif | |
956 | #undef FLD | |
7a292a7a | 957 | return idesc; |
c906108c SS |
958 | } |
959 | ||
96baa820 | 960 | extract_sfmt_cmpi: |
c906108c | 961 | { |
7a292a7a | 962 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 963 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
964 | #define FLD(f) abuf->fields.sfmt_st_d.f |
965 | UINT f_r2; | |
966 | INT f_simm16; | |
c906108c | 967 | |
96baa820 JM |
968 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); |
969 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
970 | |
971 | /* Record the fields for the semantic handler. */ | |
972 | FLD (f_simm16) = f_simm16; | |
de8f5985 | 973 | FLD (f_r2) = f_r2; |
c906108c | 974 | FLD (i_src2) = & CPU (h_gr)[f_r2]; |
de8f5985 | 975 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
976 | |
977 | #if WITH_PROFILE_MODEL_P | |
978 | /* Record the fields for profiling. */ | |
979 | if (PROFILE_MODEL_P (current_cpu)) | |
980 | { | |
981 | FLD (in_src2) = f_r2; | |
982 | } | |
983 | #endif | |
984 | #undef FLD | |
7a292a7a | 985 | return idesc; |
c906108c SS |
986 | } |
987 | ||
96baa820 | 988 | extract_sfmt_div: |
c906108c | 989 | { |
7a292a7a | 990 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 991 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
992 | #define FLD(f) abuf->fields.sfmt_add.f |
993 | UINT f_r1; | |
994 | UINT f_r2; | |
c906108c | 995 | |
96baa820 JM |
996 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
997 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
c906108c SS |
998 | |
999 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1000 | FLD (f_r1) = f_r1; |
1001 | FLD (f_r2) = f_r2; | |
c906108c SS |
1002 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
1003 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1004 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1005 | |
1006 | #if WITH_PROFILE_MODEL_P | |
1007 | /* Record the fields for profiling. */ | |
1008 | if (PROFILE_MODEL_P (current_cpu)) | |
1009 | { | |
1010 | FLD (in_dr) = f_r1; | |
1011 | FLD (in_sr) = f_r2; | |
1012 | FLD (out_dr) = f_r1; | |
1013 | } | |
1014 | #endif | |
1015 | #undef FLD | |
7a292a7a | 1016 | return idesc; |
c906108c SS |
1017 | } |
1018 | ||
96baa820 | 1019 | extract_sfmt_jl: |
c906108c | 1020 | { |
7a292a7a | 1021 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1022 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1023 | #define FLD(f) abuf->fields.sfmt_jl.f |
1024 | UINT f_r2; | |
c906108c | 1025 | |
96baa820 | 1026 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1027 | |
1028 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1029 | FLD (f_r2) = f_r2; |
c906108c | 1030 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
de8f5985 | 1031 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1032 | |
1033 | #if WITH_PROFILE_MODEL_P | |
1034 | /* Record the fields for profiling. */ | |
1035 | if (PROFILE_MODEL_P (current_cpu)) | |
1036 | { | |
1037 | FLD (in_sr) = f_r2; | |
378af1d6 | 1038 | FLD (out_h_gr_SI_14) = 14; |
c906108c SS |
1039 | } |
1040 | #endif | |
1041 | #undef FLD | |
7a292a7a | 1042 | return idesc; |
c906108c SS |
1043 | } |
1044 | ||
96baa820 | 1045 | extract_sfmt_jmp: |
c906108c | 1046 | { |
7a292a7a | 1047 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1048 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1049 | #define FLD(f) abuf->fields.sfmt_jl.f |
96baa820 | 1050 | UINT f_r2; |
c906108c | 1051 | |
96baa820 | 1052 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1053 | |
1054 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1055 | FLD (f_r2) = f_r2; |
c906108c | 1056 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
de8f5985 | 1057 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1058 | |
1059 | #if WITH_PROFILE_MODEL_P | |
1060 | /* Record the fields for profiling. */ | |
1061 | if (PROFILE_MODEL_P (current_cpu)) | |
1062 | { | |
1063 | FLD (in_sr) = f_r2; | |
c906108c SS |
1064 | } |
1065 | #endif | |
1066 | #undef FLD | |
7a292a7a | 1067 | return idesc; |
c906108c SS |
1068 | } |
1069 | ||
96baa820 | 1070 | extract_sfmt_ld: |
c906108c | 1071 | { |
7a292a7a | 1072 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1073 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1074 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1075 | UINT f_r1; | |
1076 | UINT f_r2; | |
c906108c | 1077 | |
96baa820 JM |
1078 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1079 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1080 | |
1081 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1082 | FLD (f_r2) = f_r2; |
1083 | FLD (f_r1) = f_r1; | |
c906108c SS |
1084 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1085 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1086 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1087 | |
1088 | #if WITH_PROFILE_MODEL_P | |
1089 | /* Record the fields for profiling. */ | |
1090 | if (PROFILE_MODEL_P (current_cpu)) | |
1091 | { | |
1092 | FLD (in_sr) = f_r2; | |
1093 | FLD (out_dr) = f_r1; | |
1094 | } | |
1095 | #endif | |
1096 | #undef FLD | |
7a292a7a | 1097 | return idesc; |
c906108c SS |
1098 | } |
1099 | ||
96baa820 | 1100 | extract_sfmt_ld_d: |
c906108c | 1101 | { |
7a292a7a | 1102 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1103 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1104 | #define FLD(f) abuf->fields.sfmt_add3.f |
1105 | UINT f_r1; | |
1106 | UINT f_r2; | |
1107 | INT f_simm16; | |
c906108c | 1108 | |
96baa820 JM |
1109 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1110 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1111 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1112 | |
1113 | /* Record the fields for the semantic handler. */ | |
1114 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1115 | FLD (f_r2) = f_r2; |
1116 | FLD (f_r1) = f_r1; | |
c906108c SS |
1117 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1118 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1119 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c | 1120 | |
378af1d6 DB |
1121 | #if WITH_PROFILE_MODEL_P |
1122 | /* Record the fields for profiling. */ | |
1123 | if (PROFILE_MODEL_P (current_cpu)) | |
1124 | { | |
1125 | FLD (in_sr) = f_r2; | |
1126 | FLD (out_dr) = f_r1; | |
1127 | } | |
1128 | #endif | |
1129 | #undef FLD | |
1130 | return idesc; | |
1131 | } | |
1132 | ||
1133 | extract_sfmt_ldb: | |
1134 | { | |
1135 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1136 | CGEN_INSN_INT insn = entire_insn; | |
1137 | #define FLD(f) abuf->fields.sfmt_ld_plus.f | |
1138 | UINT f_r1; | |
1139 | UINT f_r2; | |
1140 | ||
1141 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); | |
1142 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
1143 | ||
1144 | /* Record the fields for the semantic handler. */ | |
1145 | FLD (f_r2) = f_r2; | |
1146 | FLD (f_r1) = f_r1; | |
1147 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1148 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1149 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1150 | ||
1151 | #if WITH_PROFILE_MODEL_P | |
1152 | /* Record the fields for profiling. */ | |
1153 | if (PROFILE_MODEL_P (current_cpu)) | |
1154 | { | |
1155 | FLD (in_sr) = f_r2; | |
1156 | FLD (out_dr) = f_r1; | |
1157 | } | |
1158 | #endif | |
1159 | #undef FLD | |
1160 | return idesc; | |
1161 | } | |
1162 | ||
1163 | extract_sfmt_ldb_d: | |
1164 | { | |
1165 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1166 | CGEN_INSN_INT insn = entire_insn; | |
1167 | #define FLD(f) abuf->fields.sfmt_add3.f | |
1168 | UINT f_r1; | |
1169 | UINT f_r2; | |
1170 | INT f_simm16; | |
1171 | ||
1172 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); | |
1173 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1174 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
1175 | ||
1176 | /* Record the fields for the semantic handler. */ | |
1177 | FLD (f_simm16) = f_simm16; | |
1178 | FLD (f_r2) = f_r2; | |
1179 | FLD (f_r1) = f_r1; | |
1180 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1181 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1182 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1183 | ||
1184 | #if WITH_PROFILE_MODEL_P | |
1185 | /* Record the fields for profiling. */ | |
1186 | if (PROFILE_MODEL_P (current_cpu)) | |
1187 | { | |
1188 | FLD (in_sr) = f_r2; | |
1189 | FLD (out_dr) = f_r1; | |
1190 | } | |
1191 | #endif | |
1192 | #undef FLD | |
1193 | return idesc; | |
1194 | } | |
1195 | ||
1196 | extract_sfmt_ldh: | |
1197 | { | |
1198 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1199 | CGEN_INSN_INT insn = entire_insn; | |
1200 | #define FLD(f) abuf->fields.sfmt_ld_plus.f | |
1201 | UINT f_r1; | |
1202 | UINT f_r2; | |
1203 | ||
1204 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); | |
1205 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
1206 | ||
1207 | /* Record the fields for the semantic handler. */ | |
1208 | FLD (f_r2) = f_r2; | |
1209 | FLD (f_r1) = f_r1; | |
1210 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1211 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1212 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1213 | ||
1214 | #if WITH_PROFILE_MODEL_P | |
1215 | /* Record the fields for profiling. */ | |
1216 | if (PROFILE_MODEL_P (current_cpu)) | |
1217 | { | |
1218 | FLD (in_sr) = f_r2; | |
1219 | FLD (out_dr) = f_r1; | |
1220 | } | |
1221 | #endif | |
1222 | #undef FLD | |
1223 | return idesc; | |
1224 | } | |
1225 | ||
1226 | extract_sfmt_ldh_d: | |
1227 | { | |
1228 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1229 | CGEN_INSN_INT insn = entire_insn; | |
1230 | #define FLD(f) abuf->fields.sfmt_add3.f | |
1231 | UINT f_r1; | |
1232 | UINT f_r2; | |
1233 | INT f_simm16; | |
1234 | ||
1235 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); | |
1236 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1237 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
1238 | ||
1239 | /* Record the fields for the semantic handler. */ | |
1240 | FLD (f_simm16) = f_simm16; | |
1241 | FLD (f_r2) = f_r2; | |
1242 | FLD (f_r1) = f_r1; | |
1243 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1244 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1245 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1246 | ||
c906108c SS |
1247 | #if WITH_PROFILE_MODEL_P |
1248 | /* Record the fields for profiling. */ | |
1249 | if (PROFILE_MODEL_P (current_cpu)) | |
1250 | { | |
1251 | FLD (in_sr) = f_r2; | |
1252 | FLD (out_dr) = f_r1; | |
1253 | } | |
1254 | #endif | |
1255 | #undef FLD | |
7a292a7a | 1256 | return idesc; |
c906108c SS |
1257 | } |
1258 | ||
96baa820 | 1259 | extract_sfmt_ld_plus: |
c906108c | 1260 | { |
7a292a7a | 1261 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1262 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1263 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1264 | UINT f_r1; | |
1265 | UINT f_r2; | |
c906108c | 1266 | |
96baa820 JM |
1267 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1268 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1269 | |
1270 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1271 | FLD (f_r2) = f_r2; |
1272 | FLD (f_r1) = f_r1; | |
c906108c SS |
1273 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1274 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1275 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1276 | |
1277 | #if WITH_PROFILE_MODEL_P | |
1278 | /* Record the fields for profiling. */ | |
1279 | if (PROFILE_MODEL_P (current_cpu)) | |
1280 | { | |
1281 | FLD (in_sr) = f_r2; | |
1282 | FLD (out_dr) = f_r1; | |
1283 | FLD (out_sr) = f_r2; | |
1284 | } | |
1285 | #endif | |
1286 | #undef FLD | |
7a292a7a | 1287 | return idesc; |
c906108c SS |
1288 | } |
1289 | ||
96baa820 | 1290 | extract_sfmt_ld24: |
c906108c | 1291 | { |
7a292a7a | 1292 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1293 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1294 | #define FLD(f) abuf->fields.sfmt_ld24.f |
1295 | UINT f_r1; | |
1296 | UINT f_uimm24; | |
c906108c | 1297 | |
96baa820 JM |
1298 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1299 | f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); | |
c906108c SS |
1300 | |
1301 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1302 | FLD (f_r1) = f_r1; |
c906108c SS |
1303 | FLD (i_uimm24) = f_uimm24; |
1304 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1305 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1306 | |
1307 | #if WITH_PROFILE_MODEL_P | |
1308 | /* Record the fields for profiling. */ | |
1309 | if (PROFILE_MODEL_P (current_cpu)) | |
1310 | { | |
1311 | FLD (out_dr) = f_r1; | |
1312 | } | |
1313 | #endif | |
1314 | #undef FLD | |
7a292a7a | 1315 | return idesc; |
c906108c SS |
1316 | } |
1317 | ||
96baa820 | 1318 | extract_sfmt_ldi8: |
c906108c | 1319 | { |
7a292a7a | 1320 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1321 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1322 | #define FLD(f) abuf->fields.sfmt_addi.f |
1323 | UINT f_r1; | |
1324 | INT f_simm8; | |
c906108c | 1325 | |
96baa820 JM |
1326 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1327 | f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); | |
c906108c SS |
1328 | |
1329 | /* Record the fields for the semantic handler. */ | |
1330 | FLD (f_simm8) = f_simm8; | |
de8f5985 | 1331 | FLD (f_r1) = f_r1; |
c906108c | 1332 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1333 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1334 | |
1335 | #if WITH_PROFILE_MODEL_P | |
1336 | /* Record the fields for profiling. */ | |
1337 | if (PROFILE_MODEL_P (current_cpu)) | |
1338 | { | |
1339 | FLD (out_dr) = f_r1; | |
1340 | } | |
1341 | #endif | |
1342 | #undef FLD | |
7a292a7a | 1343 | return idesc; |
c906108c SS |
1344 | } |
1345 | ||
96baa820 | 1346 | extract_sfmt_ldi16: |
c906108c | 1347 | { |
7a292a7a | 1348 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1349 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1350 | #define FLD(f) abuf->fields.sfmt_add3.f |
1351 | UINT f_r1; | |
1352 | INT f_simm16; | |
c906108c | 1353 | |
96baa820 JM |
1354 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1355 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1356 | |
1357 | /* Record the fields for the semantic handler. */ | |
1358 | FLD (f_simm16) = f_simm16; | |
de8f5985 | 1359 | FLD (f_r1) = f_r1; |
c906108c | 1360 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1361 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1362 | |
1363 | #if WITH_PROFILE_MODEL_P | |
1364 | /* Record the fields for profiling. */ | |
1365 | if (PROFILE_MODEL_P (current_cpu)) | |
1366 | { | |
1367 | FLD (out_dr) = f_r1; | |
1368 | } | |
1369 | #endif | |
1370 | #undef FLD | |
7a292a7a | 1371 | return idesc; |
c906108c SS |
1372 | } |
1373 | ||
96baa820 | 1374 | extract_sfmt_lock: |
c906108c | 1375 | { |
7a292a7a | 1376 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1377 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1378 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1379 | UINT f_r1; | |
1380 | UINT f_r2; | |
c906108c | 1381 | |
96baa820 JM |
1382 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1383 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1384 | |
1385 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1386 | FLD (f_r2) = f_r2; |
1387 | FLD (f_r1) = f_r1; | |
c906108c SS |
1388 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1389 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1390 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1391 | |
1392 | #if WITH_PROFILE_MODEL_P | |
1393 | /* Record the fields for profiling. */ | |
1394 | if (PROFILE_MODEL_P (current_cpu)) | |
1395 | { | |
1396 | FLD (in_sr) = f_r2; | |
1397 | FLD (out_dr) = f_r1; | |
1398 | } | |
1399 | #endif | |
1400 | #undef FLD | |
7a292a7a | 1401 | return idesc; |
c906108c SS |
1402 | } |
1403 | ||
96baa820 | 1404 | extract_sfmt_machi: |
c906108c | 1405 | { |
7a292a7a | 1406 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1407 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1408 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1409 | UINT f_r1; | |
1410 | UINT f_r2; | |
c906108c | 1411 | |
96baa820 JM |
1412 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1413 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1414 | |
1415 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1416 | FLD (f_r1) = f_r1; |
1417 | FLD (f_r2) = f_r2; | |
c906108c SS |
1418 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1419 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1420 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1421 | |
1422 | #if WITH_PROFILE_MODEL_P | |
1423 | /* Record the fields for profiling. */ | |
1424 | if (PROFILE_MODEL_P (current_cpu)) | |
1425 | { | |
1426 | FLD (in_src1) = f_r1; | |
1427 | FLD (in_src2) = f_r2; | |
1428 | } | |
1429 | #endif | |
1430 | #undef FLD | |
7a292a7a | 1431 | return idesc; |
c906108c SS |
1432 | } |
1433 | ||
96baa820 | 1434 | extract_sfmt_mulhi: |
c906108c | 1435 | { |
7a292a7a | 1436 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1437 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1438 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1439 | UINT f_r1; | |
1440 | UINT f_r2; | |
c906108c | 1441 | |
96baa820 JM |
1442 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1443 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1444 | |
1445 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1446 | FLD (f_r1) = f_r1; |
1447 | FLD (f_r2) = f_r2; | |
c906108c SS |
1448 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1449 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1450 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1451 | |
1452 | #if WITH_PROFILE_MODEL_P | |
1453 | /* Record the fields for profiling. */ | |
1454 | if (PROFILE_MODEL_P (current_cpu)) | |
1455 | { | |
1456 | FLD (in_src1) = f_r1; | |
1457 | FLD (in_src2) = f_r2; | |
1458 | } | |
1459 | #endif | |
1460 | #undef FLD | |
7a292a7a | 1461 | return idesc; |
c906108c SS |
1462 | } |
1463 | ||
96baa820 | 1464 | extract_sfmt_mv: |
c906108c | 1465 | { |
7a292a7a | 1466 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1467 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1468 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1469 | UINT f_r1; | |
1470 | UINT f_r2; | |
c906108c | 1471 | |
96baa820 JM |
1472 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1473 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1474 | |
1475 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1476 | FLD (f_r2) = f_r2; |
1477 | FLD (f_r1) = f_r1; | |
c906108c SS |
1478 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1479 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1480 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1481 | |
1482 | #if WITH_PROFILE_MODEL_P | |
1483 | /* Record the fields for profiling. */ | |
1484 | if (PROFILE_MODEL_P (current_cpu)) | |
1485 | { | |
1486 | FLD (in_sr) = f_r2; | |
1487 | FLD (out_dr) = f_r1; | |
1488 | } | |
1489 | #endif | |
1490 | #undef FLD | |
7a292a7a | 1491 | return idesc; |
c906108c SS |
1492 | } |
1493 | ||
96baa820 | 1494 | extract_sfmt_mvfachi: |
c906108c | 1495 | { |
7a292a7a | 1496 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1497 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1498 | #define FLD(f) abuf->fields.sfmt_seth.f |
1499 | UINT f_r1; | |
c906108c | 1500 | |
96baa820 | 1501 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
c906108c SS |
1502 | |
1503 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1504 | FLD (f_r1) = f_r1; |
c906108c | 1505 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1506 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1507 | |
1508 | #if WITH_PROFILE_MODEL_P | |
1509 | /* Record the fields for profiling. */ | |
1510 | if (PROFILE_MODEL_P (current_cpu)) | |
1511 | { | |
1512 | FLD (out_dr) = f_r1; | |
1513 | } | |
1514 | #endif | |
1515 | #undef FLD | |
7a292a7a | 1516 | return idesc; |
c906108c SS |
1517 | } |
1518 | ||
96baa820 | 1519 | extract_sfmt_mvfc: |
c906108c | 1520 | { |
7a292a7a | 1521 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1522 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1523 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
96baa820 JM |
1524 | UINT f_r1; |
1525 | UINT f_r2; | |
c906108c | 1526 | |
96baa820 JM |
1527 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1528 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1529 | |
1530 | /* Record the fields for the semantic handler. */ | |
1531 | FLD (f_r2) = f_r2; | |
de8f5985 | 1532 | FLD (f_r1) = f_r1; |
c906108c | 1533 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1534 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1535 | |
1536 | #if WITH_PROFILE_MODEL_P | |
1537 | /* Record the fields for profiling. */ | |
1538 | if (PROFILE_MODEL_P (current_cpu)) | |
1539 | { | |
1540 | FLD (out_dr) = f_r1; | |
1541 | } | |
1542 | #endif | |
1543 | #undef FLD | |
7a292a7a | 1544 | return idesc; |
c906108c SS |
1545 | } |
1546 | ||
96baa820 | 1547 | extract_sfmt_mvtachi: |
c906108c | 1548 | { |
7a292a7a | 1549 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1550 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1551 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1552 | UINT f_r1; | |
c906108c | 1553 | |
96baa820 | 1554 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
c906108c SS |
1555 | |
1556 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1557 | FLD (f_r1) = f_r1; |
c906108c | 1558 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1559 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1560 | |
1561 | #if WITH_PROFILE_MODEL_P | |
1562 | /* Record the fields for profiling. */ | |
1563 | if (PROFILE_MODEL_P (current_cpu)) | |
1564 | { | |
1565 | FLD (in_src1) = f_r1; | |
1566 | } | |
1567 | #endif | |
1568 | #undef FLD | |
7a292a7a | 1569 | return idesc; |
c906108c SS |
1570 | } |
1571 | ||
96baa820 | 1572 | extract_sfmt_mvtc: |
c906108c | 1573 | { |
7a292a7a | 1574 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1575 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1576 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
96baa820 JM |
1577 | UINT f_r1; |
1578 | UINT f_r2; | |
c906108c | 1579 | |
96baa820 JM |
1580 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1581 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1582 | |
1583 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1584 | FLD (f_r2) = f_r2; |
c906108c SS |
1585 | FLD (f_r1) = f_r1; |
1586 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1587 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1588 | |
1589 | #if WITH_PROFILE_MODEL_P | |
1590 | /* Record the fields for profiling. */ | |
1591 | if (PROFILE_MODEL_P (current_cpu)) | |
1592 | { | |
1593 | FLD (in_sr) = f_r2; | |
1594 | } | |
1595 | #endif | |
1596 | #undef FLD | |
7a292a7a | 1597 | return idesc; |
c906108c SS |
1598 | } |
1599 | ||
96baa820 | 1600 | extract_sfmt_nop: |
c906108c | 1601 | { |
7a292a7a | 1602 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1603 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1604 | |
c906108c SS |
1605 | |
1606 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1607 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); |
c906108c SS |
1608 | |
1609 | #undef FLD | |
7a292a7a | 1610 | return idesc; |
c906108c SS |
1611 | } |
1612 | ||
96baa820 | 1613 | extract_sfmt_rac: |
c906108c | 1614 | { |
7a292a7a | 1615 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1616 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1617 | |
c906108c SS |
1618 | |
1619 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1620 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0)); |
c906108c SS |
1621 | |
1622 | #undef FLD | |
7a292a7a | 1623 | return idesc; |
c906108c SS |
1624 | } |
1625 | ||
96baa820 | 1626 | extract_sfmt_rte: |
c906108c | 1627 | { |
7a292a7a | 1628 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1629 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1630 | |
c906108c SS |
1631 | |
1632 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1633 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); |
c906108c SS |
1634 | |
1635 | #if WITH_PROFILE_MODEL_P | |
1636 | /* Record the fields for profiling. */ | |
1637 | if (PROFILE_MODEL_P (current_cpu)) | |
1638 | { | |
1639 | } | |
1640 | #endif | |
1641 | #undef FLD | |
7a292a7a | 1642 | return idesc; |
c906108c SS |
1643 | } |
1644 | ||
96baa820 | 1645 | extract_sfmt_seth: |
c906108c | 1646 | { |
7a292a7a | 1647 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1648 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1649 | #define FLD(f) abuf->fields.sfmt_seth.f |
1650 | UINT f_r1; | |
1651 | UINT f_hi16; | |
c906108c | 1652 | |
96baa820 JM |
1653 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1654 | f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
1655 | |
1656 | /* Record the fields for the semantic handler. */ | |
1657 | FLD (f_hi16) = f_hi16; | |
de8f5985 | 1658 | FLD (f_r1) = f_r1; |
c906108c | 1659 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1660 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1661 | |
1662 | #if WITH_PROFILE_MODEL_P | |
1663 | /* Record the fields for profiling. */ | |
1664 | if (PROFILE_MODEL_P (current_cpu)) | |
1665 | { | |
1666 | FLD (out_dr) = f_r1; | |
1667 | } | |
1668 | #endif | |
1669 | #undef FLD | |
7a292a7a | 1670 | return idesc; |
c906108c SS |
1671 | } |
1672 | ||
96baa820 | 1673 | extract_sfmt_sll3: |
c906108c | 1674 | { |
7a292a7a | 1675 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1676 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1677 | #define FLD(f) abuf->fields.sfmt_add3.f |
1678 | UINT f_r1; | |
1679 | UINT f_r2; | |
1680 | INT f_simm16; | |
c906108c | 1681 | |
96baa820 JM |
1682 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1683 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1684 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1685 | |
1686 | /* Record the fields for the semantic handler. */ | |
1687 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1688 | FLD (f_r2) = f_r2; |
1689 | FLD (f_r1) = f_r1; | |
c906108c SS |
1690 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1691 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1692 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1693 | |
1694 | #if WITH_PROFILE_MODEL_P | |
1695 | /* Record the fields for profiling. */ | |
1696 | if (PROFILE_MODEL_P (current_cpu)) | |
1697 | { | |
1698 | FLD (in_sr) = f_r2; | |
1699 | FLD (out_dr) = f_r1; | |
1700 | } | |
1701 | #endif | |
1702 | #undef FLD | |
7a292a7a | 1703 | return idesc; |
c906108c SS |
1704 | } |
1705 | ||
96baa820 | 1706 | extract_sfmt_slli: |
c906108c | 1707 | { |
7a292a7a | 1708 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1709 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1710 | #define FLD(f) abuf->fields.sfmt_slli.f |
1711 | UINT f_r1; | |
1712 | UINT f_uimm5; | |
c906108c | 1713 | |
96baa820 JM |
1714 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1715 | f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); | |
c906108c SS |
1716 | |
1717 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1718 | FLD (f_r1) = f_r1; |
c906108c SS |
1719 | FLD (f_uimm5) = f_uimm5; |
1720 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1721 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1722 | |
1723 | #if WITH_PROFILE_MODEL_P | |
1724 | /* Record the fields for profiling. */ | |
1725 | if (PROFILE_MODEL_P (current_cpu)) | |
1726 | { | |
1727 | FLD (in_dr) = f_r1; | |
1728 | FLD (out_dr) = f_r1; | |
1729 | } | |
1730 | #endif | |
1731 | #undef FLD | |
7a292a7a | 1732 | return idesc; |
c906108c SS |
1733 | } |
1734 | ||
96baa820 | 1735 | extract_sfmt_st: |
c906108c | 1736 | { |
7a292a7a | 1737 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1738 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1739 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1740 | UINT f_r1; | |
1741 | UINT f_r2; | |
c906108c | 1742 | |
96baa820 JM |
1743 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1744 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1745 | |
1746 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1747 | FLD (f_r1) = f_r1; |
1748 | FLD (f_r2) = f_r2; | |
c906108c SS |
1749 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1750 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1751 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1752 | |
1753 | #if WITH_PROFILE_MODEL_P | |
1754 | /* Record the fields for profiling. */ | |
1755 | if (PROFILE_MODEL_P (current_cpu)) | |
1756 | { | |
1757 | FLD (in_src1) = f_r1; | |
1758 | FLD (in_src2) = f_r2; | |
1759 | } | |
1760 | #endif | |
1761 | #undef FLD | |
7a292a7a | 1762 | return idesc; |
c906108c SS |
1763 | } |
1764 | ||
96baa820 | 1765 | extract_sfmt_st_d: |
c906108c | 1766 | { |
7a292a7a | 1767 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1768 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1769 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1770 | UINT f_r1; | |
1771 | UINT f_r2; | |
1772 | INT f_simm16; | |
c906108c | 1773 | |
96baa820 JM |
1774 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1775 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1776 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1777 | |
1778 | /* Record the fields for the semantic handler. */ | |
1779 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1780 | FLD (f_r1) = f_r1; |
1781 | FLD (f_r2) = f_r2; | |
c906108c SS |
1782 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1783 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1784 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1785 | |
1786 | #if WITH_PROFILE_MODEL_P | |
1787 | /* Record the fields for profiling. */ | |
1788 | if (PROFILE_MODEL_P (current_cpu)) | |
1789 | { | |
1790 | FLD (in_src1) = f_r1; | |
1791 | FLD (in_src2) = f_r2; | |
1792 | } | |
1793 | #endif | |
1794 | #undef FLD | |
7a292a7a | 1795 | return idesc; |
c906108c SS |
1796 | } |
1797 | ||
96baa820 | 1798 | extract_sfmt_stb: |
c906108c | 1799 | { |
7a292a7a | 1800 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1801 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1802 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1803 | UINT f_r1; | |
1804 | UINT f_r2; | |
c906108c | 1805 | |
96baa820 JM |
1806 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1807 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1808 | |
1809 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1810 | FLD (f_r1) = f_r1; |
1811 | FLD (f_r2) = f_r2; | |
c906108c SS |
1812 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1813 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1814 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1815 | |
1816 | #if WITH_PROFILE_MODEL_P | |
1817 | /* Record the fields for profiling. */ | |
1818 | if (PROFILE_MODEL_P (current_cpu)) | |
1819 | { | |
1820 | FLD (in_src1) = f_r1; | |
1821 | FLD (in_src2) = f_r2; | |
1822 | } | |
1823 | #endif | |
1824 | #undef FLD | |
7a292a7a | 1825 | return idesc; |
c906108c SS |
1826 | } |
1827 | ||
96baa820 | 1828 | extract_sfmt_stb_d: |
c906108c | 1829 | { |
7a292a7a | 1830 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1831 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1832 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1833 | UINT f_r1; | |
1834 | UINT f_r2; | |
1835 | INT f_simm16; | |
c906108c | 1836 | |
96baa820 JM |
1837 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1838 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1839 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1840 | |
1841 | /* Record the fields for the semantic handler. */ | |
1842 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1843 | FLD (f_r1) = f_r1; |
1844 | FLD (f_r2) = f_r2; | |
c906108c SS |
1845 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1846 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1847 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1848 | |
1849 | #if WITH_PROFILE_MODEL_P | |
1850 | /* Record the fields for profiling. */ | |
1851 | if (PROFILE_MODEL_P (current_cpu)) | |
1852 | { | |
1853 | FLD (in_src1) = f_r1; | |
1854 | FLD (in_src2) = f_r2; | |
1855 | } | |
1856 | #endif | |
1857 | #undef FLD | |
7a292a7a | 1858 | return idesc; |
c906108c SS |
1859 | } |
1860 | ||
96baa820 | 1861 | extract_sfmt_sth: |
c906108c | 1862 | { |
7a292a7a | 1863 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1864 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1865 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1866 | UINT f_r1; | |
1867 | UINT f_r2; | |
c906108c | 1868 | |
96baa820 JM |
1869 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1870 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1871 | |
1872 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1873 | FLD (f_r1) = f_r1; |
1874 | FLD (f_r2) = f_r2; | |
c906108c SS |
1875 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1876 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1877 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1878 | |
1879 | #if WITH_PROFILE_MODEL_P | |
1880 | /* Record the fields for profiling. */ | |
1881 | if (PROFILE_MODEL_P (current_cpu)) | |
1882 | { | |
1883 | FLD (in_src1) = f_r1; | |
1884 | FLD (in_src2) = f_r2; | |
1885 | } | |
1886 | #endif | |
1887 | #undef FLD | |
7a292a7a | 1888 | return idesc; |
c906108c SS |
1889 | } |
1890 | ||
96baa820 | 1891 | extract_sfmt_sth_d: |
c906108c | 1892 | { |
7a292a7a | 1893 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1894 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1895 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1896 | UINT f_r1; | |
1897 | UINT f_r2; | |
1898 | INT f_simm16; | |
c906108c | 1899 | |
96baa820 JM |
1900 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1901 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1902 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1903 | |
1904 | /* Record the fields for the semantic handler. */ | |
1905 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1906 | FLD (f_r1) = f_r1; |
1907 | FLD (f_r2) = f_r2; | |
c906108c SS |
1908 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1909 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1910 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1911 | |
1912 | #if WITH_PROFILE_MODEL_P | |
1913 | /* Record the fields for profiling. */ | |
1914 | if (PROFILE_MODEL_P (current_cpu)) | |
1915 | { | |
1916 | FLD (in_src1) = f_r1; | |
1917 | FLD (in_src2) = f_r2; | |
1918 | } | |
1919 | #endif | |
1920 | #undef FLD | |
7a292a7a | 1921 | return idesc; |
c906108c SS |
1922 | } |
1923 | ||
96baa820 | 1924 | extract_sfmt_st_plus: |
c906108c | 1925 | { |
7a292a7a | 1926 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1927 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1928 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1929 | UINT f_r1; | |
1930 | UINT f_r2; | |
c906108c | 1931 | |
96baa820 JM |
1932 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1933 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1934 | |
1935 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1936 | FLD (f_r1) = f_r1; |
1937 | FLD (f_r2) = f_r2; | |
c906108c SS |
1938 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1939 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1940 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1941 | |
1942 | #if WITH_PROFILE_MODEL_P | |
1943 | /* Record the fields for profiling. */ | |
1944 | if (PROFILE_MODEL_P (current_cpu)) | |
1945 | { | |
1946 | FLD (in_src1) = f_r1; | |
1947 | FLD (in_src2) = f_r2; | |
1948 | FLD (out_src2) = f_r2; | |
1949 | } | |
1950 | #endif | |
1951 | #undef FLD | |
7a292a7a | 1952 | return idesc; |
c906108c SS |
1953 | } |
1954 | ||
96baa820 | 1955 | extract_sfmt_trap: |
c906108c | 1956 | { |
7a292a7a | 1957 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1958 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1959 | #define FLD(f) abuf->fields.sfmt_trap.f |
1960 | UINT f_uimm4; | |
c906108c | 1961 | |
96baa820 | 1962 | f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1963 | |
1964 | /* Record the fields for the semantic handler. */ | |
1965 | FLD (f_uimm4) = f_uimm4; | |
96baa820 | 1966 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); |
c906108c SS |
1967 | |
1968 | #if WITH_PROFILE_MODEL_P | |
1969 | /* Record the fields for profiling. */ | |
1970 | if (PROFILE_MODEL_P (current_cpu)) | |
1971 | { | |
1972 | } | |
1973 | #endif | |
1974 | #undef FLD | |
7a292a7a | 1975 | return idesc; |
c906108c SS |
1976 | } |
1977 | ||
96baa820 | 1978 | extract_sfmt_unlock: |
c906108c | 1979 | { |
7a292a7a | 1980 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1981 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1982 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1983 | UINT f_r1; | |
1984 | UINT f_r2; | |
c906108c | 1985 | |
96baa820 JM |
1986 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1987 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1988 | |
1989 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1990 | FLD (f_r1) = f_r1; |
1991 | FLD (f_r2) = f_r2; | |
c906108c SS |
1992 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1993 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1994 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1995 | |
1996 | #if WITH_PROFILE_MODEL_P | |
1997 | /* Record the fields for profiling. */ | |
1998 | if (PROFILE_MODEL_P (current_cpu)) | |
1999 | { | |
2000 | FLD (in_src1) = f_r1; | |
2001 | FLD (in_src2) = f_r2; | |
2002 | } | |
2003 | #endif | |
2004 | #undef FLD | |
7a292a7a | 2005 | return idesc; |
c906108c SS |
2006 | } |
2007 | ||
c906108c | 2008 | } |