Add generic sim-info.c:sim_info() function using module mechanism.
[deliverable/binutils-gdb.git] / sim / m32r / mloopx.in
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1# Simulator main loop for m32rx. -*- C -*-
2# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
3#
4# This file is part of the GNU Simulators.
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
8# the Free Software Foundation; either version 2, or (at your option)
9# any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License along
17# with this program; if not, write to the Free Software Foundation, Inc.,
18# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20# Syntax:
21# /bin/sh mainloop.in init|support|{full,fast}-{extract,exec}-{scache,noscache}
22
23# ??? After a few more ports are done, revisit.
24# Will eventually need to machine generate a lot of this.
25
26case "x$1" in
27
28xsupport)
29
30cat <<EOF
31
32EOF
33
34;;
35
36xinit)
37
38cat <<EOF
02310b01 39 DECODE *d1,*d2;
b8a9943d 40 ARGBUF abufs[MAX_PARALLEL_INSNS];
02310b01 41 PAREXEC pbufs[MAX_PARALLEL_INSNS];
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42EOF
43
44;;
45
46xfull-extract-* | xfast-extract-*)
47
48cat <<EOF
49{
50 PCADDR pc = CPU (h_pc);
51
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52 /* ??? This code isn't very fast. Let's get it working first. */
53
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54 if ((pc & 3) != 0)
55 {
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56 USI insn = GETIMEMUHI (current_cpu, pc);
57 insn &= 0x7fff;
58 d1 = m32rx_decode (current_cpu, pc, insn);
59 abufs[0].insn = insn;
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60 icount = 1;
61 }
62 else
63 {
02310b01
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64 USI insn = GETIMEMUSI (current_cpu, pc);
65 if ((SI) insn < 0)
b8a9943d 66 {
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67 d1 = m32rx_decode (current_cpu, pc, insn >> 16);
68 abufs[0].insn = insn;
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69 icount = 1;
70 }
71 else
72 {
73 if (insn & 0x8000)
74 {
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75 d1 = m32rx_decode (current_cpu, pc, insn >> 16);
76 abufs[0].insn = insn >> 16;
77 d2 = m32rx_decode (current_cpu, pc, insn & 0x7fff);
78 abufs[1].insn = insn & 0x7fff;
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79 icount = 2;
80 }
81 else
82 {
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83 d1 = m32rx_decode (current_cpu, pc, insn >> 16);
84 abufs[0].insn = insn >> 16;
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85 icount = 1;
86 }
87 }
88 }
89
02310b01
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90 {
91 int icount2 = icount;
92 USI insn = abufs[0].insn;
93 DECODE *decode = d1;
94 /* decode, par_exec, and insn are refered to by readx.c. */
95 PAREXEC *par_exec = &pbufs[0];
96 do
97 {
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98#define DEFINE_SWITCH
99#include "readx.c"
100
02310b01
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101 decode = d2;
102 insn = abufs[1].insn;
103 ++par_exec;
104 }
105 while (--icount2 != 0);
106 }
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107}
108EOF
109
110;;
111
112xfull-exec-* | xfast-exec-*)
113
114cat <<EOF
115{
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116 SEM_ARG sem_arg = &abufs[0];
117 PAREXEC *par_exec = &pbufs[0];
118 PCADDR new_pc;
119
120 /* If doing parallel execution, verify insns are in the right pipeline. */
121 if (icount == 2)
122 {
123 ; /*wip*/
124 }
125
126 TRACE_INSN_INIT (current_cpu);
127 TRACE_INSN (current_cpu, d1->opcode, sem_arg, CPU (h_pc));
128 new_pc = (*d1->semantic) (current_cpu, sem_arg, par_exec);
129 TRACE_INSN_FINI (current_cpu);
130 PROFILE_COUNT_INSN (current_cpu, CPU (h_pc), CGEN_INSN_INDEX (d1->opcode));
131
132 /* The result of the semantic fn is one of:
133 - next address, branch only
134 - NEW_PC_SKIP, sc/snc insn
135 - NEW_PC_2, 2 byte non-branch non-sc/snc insn
136 - NEW_PC_4, 4 byte non-branch insn
137 */
138
139 if (new_pc == NEW_PC_4)
140 CPU (h_pc) += 4;
141 else if (NEW_PC_BRANCH_P (new_pc))
142 CPU (h_pc) = new_pc;
143 else
b8a9943d 144 {
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145 PCADDR pc = CPU (h_pc);
146
147 CPU (h_pc) = pc + 2;
148 if (icount == 2)
149 {
150 /* Note that we only get here if doing parallel execution. */
151 if (new_pc == NEW_PC_SKIP)
152 {
153 /* ??? Need generic notion of bypassing an insn for the name of
154 this macro. Annulled? On the otherhand such tracing can go
155 in the sc/snc semantic fn. */
156 ; /*TRACE_INSN_SKIPPED (current_cpu);*/
157 }
158 else
159 {
160 ++sem_arg;
161 ++par_exec;
162 TRACE_INSN_INIT (current_cpu);
163 TRACE_INSN (current_cpu, d2->opcode, sem_arg, CPU (h_pc));
164 /* new_pc isn't used. It's assigned a value for debugging. */
165 new_pc = (*d2->semantic) (current_cpu, sem_arg, par_exec);
166 TRACE_INSN_FINI (current_cpu);
167 PROFILE_COUNT_INSN (current_cpu, pc, CGEN_INSN_INDEX (d2->opcode));
168 }
169 CPU (h_pc) = pc + 4;
170 }
b8a9943d 171 }
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172}
173EOF
174
175;;
176
177*)
178 echo "Invalid argument to mainloop.in: $1" >&2
179 exit 1
180 ;;
181
182esac
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