Commit | Line | Data |
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8e420152 DE |
1 | /* Simulator instruction operand reader for m32r. |
2 | ||
b8a9943d DE |
3 | This file is machine generated with CGEN. |
4 | ||
8e420152 DE |
5 | Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. |
6 | ||
7 | This file is part of the GNU Simulators. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
8e420152 DE |
25 | #ifdef DEFINE_LABELS |
26 | #undef DEFINE_LABELS | |
27 | ||
8e420152 DE |
28 | /* The labels have the case they have because the enum of insn types |
29 | is all uppercase and in the non-stdc case the fmt symbol is built | |
30 | into the enum name. | |
31 | ||
32 | The order here must match the order in m32rx_decode_vars in decode.c. */ | |
33 | ||
34 | static void *labels[] = { | |
35 | && case_read_READ_ILLEGAL, | |
e0a85af6 DE |
36 | && case_read_READ_FMT_ADD, |
37 | && case_read_READ_FMT_ADD3, | |
38 | && case_read_READ_FMT_ADD, | |
39 | && case_read_READ_FMT_AND3, | |
40 | && case_read_READ_FMT_ADD, | |
41 | && case_read_READ_FMT_OR3, | |
42 | && case_read_READ_FMT_ADD, | |
43 | && case_read_READ_FMT_AND3, | |
44 | && case_read_READ_FMT_ADDI, | |
45 | && case_read_READ_FMT_ADDV, | |
46 | && case_read_READ_FMT_ADDV3, | |
47 | && case_read_READ_FMT_ADDX, | |
48 | && case_read_READ_FMT_BC8, | |
49 | && case_read_READ_FMT_BC24, | |
50 | && case_read_READ_FMT_BEQ, | |
51 | && case_read_READ_FMT_BEQZ, | |
52 | && case_read_READ_FMT_BEQZ, | |
53 | && case_read_READ_FMT_BEQZ, | |
54 | && case_read_READ_FMT_BEQZ, | |
55 | && case_read_READ_FMT_BEQZ, | |
56 | && case_read_READ_FMT_BEQZ, | |
57 | && case_read_READ_FMT_BL8, | |
58 | && case_read_READ_FMT_BL24, | |
59 | && case_read_READ_FMT_BCL8, | |
60 | && case_read_READ_FMT_BCL24, | |
61 | && case_read_READ_FMT_BC8, | |
62 | && case_read_READ_FMT_BC24, | |
63 | && case_read_READ_FMT_BEQ, | |
64 | && case_read_READ_FMT_BRA8, | |
65 | && case_read_READ_FMT_BRA24, | |
66 | && case_read_READ_FMT_BCL8, | |
67 | && case_read_READ_FMT_BCL24, | |
68 | && case_read_READ_FMT_CMP, | |
69 | && case_read_READ_FMT_CMPI, | |
70 | && case_read_READ_FMT_CMP, | |
71 | && case_read_READ_FMT_CMPI, | |
72 | && case_read_READ_FMT_CMP, | |
73 | && case_read_READ_FMT_CMPZ, | |
74 | && case_read_READ_FMT_DIV, | |
75 | && case_read_READ_FMT_DIV, | |
76 | && case_read_READ_FMT_DIV, | |
77 | && case_read_READ_FMT_DIV, | |
78 | && case_read_READ_FMT_DIV, | |
79 | && case_read_READ_FMT_JC, | |
80 | && case_read_READ_FMT_JC, | |
81 | && case_read_READ_FMT_JL, | |
82 | && case_read_READ_FMT_JMP, | |
83 | && case_read_READ_FMT_LD, | |
84 | && case_read_READ_FMT_LD_D, | |
85 | && case_read_READ_FMT_LDB, | |
86 | && case_read_READ_FMT_LDB_D, | |
87 | && case_read_READ_FMT_LDH, | |
88 | && case_read_READ_FMT_LDH_D, | |
89 | && case_read_READ_FMT_LDB, | |
90 | && case_read_READ_FMT_LDB_D, | |
91 | && case_read_READ_FMT_LDH, | |
92 | && case_read_READ_FMT_LDH_D, | |
93 | && case_read_READ_FMT_LD_PLUS, | |
94 | && case_read_READ_FMT_LD24, | |
95 | && case_read_READ_FMT_LDI8, | |
96 | && case_read_READ_FMT_LDI16, | |
97 | && case_read_READ_FMT_LOCK, | |
98 | && case_read_READ_FMT_MACHI_A, | |
99 | && case_read_READ_FMT_MACHI_A, | |
100 | && case_read_READ_FMT_MACWHI, | |
101 | && case_read_READ_FMT_MACWHI, | |
102 | && case_read_READ_FMT_ADD, | |
103 | && case_read_READ_FMT_MULHI_A, | |
104 | && case_read_READ_FMT_MULHI_A, | |
105 | && case_read_READ_FMT_MULWHI, | |
106 | && case_read_READ_FMT_MULWHI, | |
107 | && case_read_READ_FMT_MV, | |
108 | && case_read_READ_FMT_MVFACHI_A, | |
109 | && case_read_READ_FMT_MVFACHI_A, | |
110 | && case_read_READ_FMT_MVFACHI_A, | |
111 | && case_read_READ_FMT_MVFC, | |
112 | && case_read_READ_FMT_MVTACHI_A, | |
113 | && case_read_READ_FMT_MVTACHI_A, | |
114 | && case_read_READ_FMT_MVTC, | |
115 | && case_read_READ_FMT_MV, | |
116 | && case_read_READ_FMT_NOP, | |
117 | && case_read_READ_FMT_MV, | |
118 | && case_read_READ_FMT_RAC_DSI, | |
119 | && case_read_READ_FMT_RAC_DSI, | |
120 | && case_read_READ_FMT_RTE, | |
121 | && case_read_READ_FMT_SETH, | |
122 | && case_read_READ_FMT_ADD, | |
123 | && case_read_READ_FMT_SLL3, | |
124 | && case_read_READ_FMT_SLLI, | |
125 | && case_read_READ_FMT_ADD, | |
126 | && case_read_READ_FMT_SLL3, | |
127 | && case_read_READ_FMT_SLLI, | |
128 | && case_read_READ_FMT_ADD, | |
129 | && case_read_READ_FMT_SLL3, | |
130 | && case_read_READ_FMT_SLLI, | |
131 | && case_read_READ_FMT_ST, | |
132 | && case_read_READ_FMT_ST_D, | |
133 | && case_read_READ_FMT_STB, | |
134 | && case_read_READ_FMT_STB_D, | |
135 | && case_read_READ_FMT_STH, | |
136 | && case_read_READ_FMT_STH_D, | |
137 | && case_read_READ_FMT_ST_PLUS, | |
138 | && case_read_READ_FMT_ST_PLUS, | |
139 | && case_read_READ_FMT_ADD, | |
140 | && case_read_READ_FMT_ADDV, | |
141 | && case_read_READ_FMT_ADDX, | |
142 | && case_read_READ_FMT_TRAP, | |
143 | && case_read_READ_FMT_UNLOCK, | |
144 | && case_read_READ_FMT_SATB, | |
145 | && case_read_READ_FMT_SATB, | |
146 | && case_read_READ_FMT_SAT, | |
147 | && case_read_READ_FMT_CMPZ, | |
148 | && case_read_READ_FMT_SADD, | |
149 | && case_read_READ_FMT_MACWU1, | |
150 | && case_read_READ_FMT_MACWHI, | |
151 | && case_read_READ_FMT_MULWU1, | |
152 | && case_read_READ_FMT_MACWU1, | |
153 | && case_read_READ_FMT_SC, | |
154 | && case_read_READ_FMT_SC, | |
8e420152 DE |
155 | 0 |
156 | }; | |
157 | extern DECODE *m32rx_decode_vars[]; | |
158 | int i; | |
159 | ||
160 | for (i = 0; m32rx_decode_vars[i] != 0; ++i) | |
161 | m32rx_decode_vars[i]->read = labels[i]; | |
162 | ||
163 | #endif /* DEFINE_LABELS */ | |
164 | ||
165 | #ifdef DEFINE_SWITCH | |
166 | #undef DEFINE_SWITCH | |
167 | ||
168 | { | |
169 | SWITCH (read, decode->read) | |
170 | { | |
171 | ||
172 | CASE (read, READ_ILLEGAL) : | |
173 | { | |
174 | sim_engine_illegal_insn (current_cpu, NULL_CIA /*FIXME*/); | |
175 | } | |
176 | BREAK (read); | |
177 | ||
e0a85af6 | 178 | CASE (read, READ_FMT_ADD) : /* e.g. add $dr,$sr */ |
8e420152 | 179 | { |
e0a85af6 DE |
180 | #define OPRND(f) par_exec->operands.fmt_add.f |
181 | EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
182 | EXTRACT_FMT_ADD_CODE | |
8e420152 DE |
183 | |
184 | /* Fetch the input operands for the semantic handler. */ | |
185 | OPRND (dr) = CPU (h_gr[f_r1]); | |
186 | OPRND (sr) = CPU (h_gr[f_r2]); | |
187 | #undef OPRND | |
188 | } | |
189 | BREAK (read); | |
190 | ||
e0a85af6 | 191 | CASE (read, READ_FMT_ADD3) : /* e.g. add3 $dr,$sr,$hash$slo16 */ |
8e420152 | 192 | { |
e0a85af6 DE |
193 | #define OPRND(f) par_exec->operands.fmt_add3.f |
194 | EXTRACT_FMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
195 | EXTRACT_FMT_ADD3_CODE | |
8e420152 DE |
196 | |
197 | /* Fetch the input operands for the semantic handler. */ | |
198 | OPRND (slo16) = f_simm16; | |
199 | OPRND (sr) = CPU (h_gr[f_r2]); | |
200 | #undef OPRND | |
201 | } | |
202 | BREAK (read); | |
203 | ||
e0a85af6 | 204 | CASE (read, READ_FMT_AND3) : /* e.g. and3 $dr,$sr,$uimm16 */ |
8e420152 | 205 | { |
e0a85af6 DE |
206 | #define OPRND(f) par_exec->operands.fmt_and3.f |
207 | EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */ | |
208 | EXTRACT_FMT_AND3_CODE | |
8e420152 DE |
209 | |
210 | /* Fetch the input operands for the semantic handler. */ | |
211 | OPRND (sr) = CPU (h_gr[f_r2]); | |
212 | OPRND (uimm16) = f_uimm16; | |
213 | #undef OPRND | |
214 | } | |
215 | BREAK (read); | |
216 | ||
e0a85af6 | 217 | CASE (read, READ_FMT_OR3) : /* e.g. or3 $dr,$sr,$hash$ulo16 */ |
8e420152 | 218 | { |
e0a85af6 DE |
219 | #define OPRND(f) par_exec->operands.fmt_or3.f |
220 | EXTRACT_FMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */ | |
221 | EXTRACT_FMT_OR3_CODE | |
8e420152 DE |
222 | |
223 | /* Fetch the input operands for the semantic handler. */ | |
224 | OPRND (sr) = CPU (h_gr[f_r2]); | |
225 | OPRND (ulo16) = f_uimm16; | |
226 | #undef OPRND | |
227 | } | |
228 | BREAK (read); | |
229 | ||
e0a85af6 | 230 | CASE (read, READ_FMT_ADDI) : /* e.g. addi $dr,$simm8 */ |
8e420152 | 231 | { |
e0a85af6 DE |
232 | #define OPRND(f) par_exec->operands.fmt_addi.f |
233 | EXTRACT_FMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */ | |
234 | EXTRACT_FMT_ADDI_CODE | |
8e420152 DE |
235 | |
236 | /* Fetch the input operands for the semantic handler. */ | |
237 | OPRND (dr) = CPU (h_gr[f_r1]); | |
238 | OPRND (simm8) = f_simm8; | |
239 | #undef OPRND | |
240 | } | |
241 | BREAK (read); | |
242 | ||
e0a85af6 | 243 | CASE (read, READ_FMT_ADDV) : /* e.g. addv $dr,$sr */ |
8e420152 | 244 | { |
e0a85af6 DE |
245 | #define OPRND(f) par_exec->operands.fmt_addv.f |
246 | EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
247 | EXTRACT_FMT_ADDV_CODE | |
b8641a4d DE |
248 | |
249 | /* Fetch the input operands for the semantic handler. */ | |
250 | OPRND (dr) = CPU (h_gr[f_r1]); | |
251 | OPRND (sr) = CPU (h_gr[f_r2]); | |
252 | #undef OPRND | |
253 | } | |
254 | BREAK (read); | |
255 | ||
e0a85af6 | 256 | CASE (read, READ_FMT_ADDV3) : /* e.g. addv3 $dr,$sr,$simm16 */ |
b8641a4d | 257 | { |
e0a85af6 DE |
258 | #define OPRND(f) par_exec->operands.fmt_addv3.f |
259 | EXTRACT_FMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
260 | EXTRACT_FMT_ADDV3_CODE | |
8e420152 DE |
261 | |
262 | /* Fetch the input operands for the semantic handler. */ | |
263 | OPRND (simm16) = f_simm16; | |
264 | OPRND (sr) = CPU (h_gr[f_r2]); | |
265 | #undef OPRND | |
266 | } | |
267 | BREAK (read); | |
268 | ||
e0a85af6 | 269 | CASE (read, READ_FMT_ADDX) : /* e.g. addx $dr,$sr */ |
8e420152 | 270 | { |
e0a85af6 DE |
271 | #define OPRND(f) par_exec->operands.fmt_addx.f |
272 | EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
273 | EXTRACT_FMT_ADDX_CODE | |
8e420152 DE |
274 | |
275 | /* Fetch the input operands for the semantic handler. */ | |
276 | OPRND (condbit) = CPU (h_cond); | |
277 | OPRND (dr) = CPU (h_gr[f_r1]); | |
278 | OPRND (sr) = CPU (h_gr[f_r2]); | |
279 | #undef OPRND | |
280 | } | |
281 | BREAK (read); | |
282 | ||
e0a85af6 | 283 | CASE (read, READ_FMT_BC8) : /* e.g. bc $disp8 */ |
8e420152 | 284 | { |
e0a85af6 DE |
285 | #define OPRND(f) par_exec->operands.fmt_bc8.f |
286 | EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */ | |
287 | EXTRACT_FMT_BC8_CODE | |
8e420152 DE |
288 | |
289 | /* Fetch the input operands for the semantic handler. */ | |
290 | OPRND (condbit) = CPU (h_cond); | |
b8641a4d | 291 | RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8); |
8e420152 DE |
292 | #undef OPRND |
293 | } | |
294 | BREAK (read); | |
295 | ||
e0a85af6 | 296 | CASE (read, READ_FMT_BC24) : /* e.g. bc $disp24 */ |
8e420152 | 297 | { |
e0a85af6 DE |
298 | #define OPRND(f) par_exec->operands.fmt_bc24.f |
299 | EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */ | |
300 | EXTRACT_FMT_BC24_CODE | |
8e420152 DE |
301 | |
302 | /* Fetch the input operands for the semantic handler. */ | |
303 | OPRND (condbit) = CPU (h_cond); | |
b8641a4d | 304 | OPRND (disp24) = pc + f_disp24; |
8e420152 DE |
305 | #undef OPRND |
306 | } | |
307 | BREAK (read); | |
308 | ||
e0a85af6 | 309 | CASE (read, READ_FMT_BEQ) : /* e.g. beq $src1,$src2,$disp16 */ |
8e420152 | 310 | { |
e0a85af6 DE |
311 | #define OPRND(f) par_exec->operands.fmt_beq.f |
312 | EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */ | |
313 | EXTRACT_FMT_BEQ_CODE | |
8e420152 DE |
314 | |
315 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 316 | OPRND (disp16) = pc + f_disp16; |
8e420152 DE |
317 | OPRND (src1) = CPU (h_gr[f_r1]); |
318 | OPRND (src2) = CPU (h_gr[f_r2]); | |
319 | #undef OPRND | |
320 | } | |
321 | BREAK (read); | |
322 | ||
e0a85af6 | 323 | CASE (read, READ_FMT_BEQZ) : /* e.g. beqz $src2,$disp16 */ |
8e420152 | 324 | { |
e0a85af6 DE |
325 | #define OPRND(f) par_exec->operands.fmt_beqz.f |
326 | EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */ | |
327 | EXTRACT_FMT_BEQZ_CODE | |
8e420152 DE |
328 | |
329 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 330 | OPRND (disp16) = pc + f_disp16; |
8e420152 DE |
331 | OPRND (src2) = CPU (h_gr[f_r2]); |
332 | #undef OPRND | |
333 | } | |
334 | BREAK (read); | |
335 | ||
e0a85af6 | 336 | CASE (read, READ_FMT_BL8) : /* e.g. bl $disp8 */ |
8e420152 | 337 | { |
e0a85af6 DE |
338 | #define OPRND(f) par_exec->operands.fmt_bl8.f |
339 | EXTRACT_FMT_BL8_VARS /* f-op1 f-r1 f-disp8 */ | |
340 | EXTRACT_FMT_BL8_CODE | |
8e420152 DE |
341 | |
342 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 343 | RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8); |
8e420152 DE |
344 | OPRND (pc) = CPU (h_pc); |
345 | #undef OPRND | |
346 | } | |
347 | BREAK (read); | |
348 | ||
e0a85af6 | 349 | CASE (read, READ_FMT_BL24) : /* e.g. bl $disp24 */ |
8e420152 | 350 | { |
e0a85af6 DE |
351 | #define OPRND(f) par_exec->operands.fmt_bl24.f |
352 | EXTRACT_FMT_BL24_VARS /* f-op1 f-r1 f-disp24 */ | |
353 | EXTRACT_FMT_BL24_CODE | |
8e420152 DE |
354 | |
355 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 356 | OPRND (disp24) = pc + f_disp24; |
8e420152 DE |
357 | OPRND (pc) = CPU (h_pc); |
358 | #undef OPRND | |
359 | } | |
360 | BREAK (read); | |
361 | ||
e0a85af6 | 362 | CASE (read, READ_FMT_BCL8) : /* e.g. bcl $disp8 */ |
8e420152 | 363 | { |
e0a85af6 DE |
364 | #define OPRND(f) par_exec->operands.fmt_bcl8.f |
365 | EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */ | |
366 | EXTRACT_FMT_BCL8_CODE | |
8e420152 DE |
367 | |
368 | /* Fetch the input operands for the semantic handler. */ | |
369 | OPRND (condbit) = CPU (h_cond); | |
b8641a4d | 370 | RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8); |
8e420152 DE |
371 | OPRND (pc) = CPU (h_pc); |
372 | #undef OPRND | |
373 | } | |
374 | BREAK (read); | |
375 | ||
e0a85af6 | 376 | CASE (read, READ_FMT_BCL24) : /* e.g. bcl $disp24 */ |
8e420152 | 377 | { |
e0a85af6 DE |
378 | #define OPRND(f) par_exec->operands.fmt_bcl24.f |
379 | EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */ | |
380 | EXTRACT_FMT_BCL24_CODE | |
8e420152 DE |
381 | |
382 | /* Fetch the input operands for the semantic handler. */ | |
383 | OPRND (condbit) = CPU (h_cond); | |
b8641a4d | 384 | OPRND (disp24) = pc + f_disp24; |
8e420152 DE |
385 | OPRND (pc) = CPU (h_pc); |
386 | #undef OPRND | |
387 | } | |
388 | BREAK (read); | |
389 | ||
e0a85af6 | 390 | CASE (read, READ_FMT_BRA8) : /* e.g. bra $disp8 */ |
8e420152 | 391 | { |
e0a85af6 DE |
392 | #define OPRND(f) par_exec->operands.fmt_bra8.f |
393 | EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */ | |
394 | EXTRACT_FMT_BRA8_CODE | |
8e420152 DE |
395 | |
396 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 397 | RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8); |
8e420152 DE |
398 | #undef OPRND |
399 | } | |
400 | BREAK (read); | |
401 | ||
e0a85af6 | 402 | CASE (read, READ_FMT_BRA24) : /* e.g. bra $disp24 */ |
8e420152 | 403 | { |
e0a85af6 DE |
404 | #define OPRND(f) par_exec->operands.fmt_bra24.f |
405 | EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */ | |
406 | EXTRACT_FMT_BRA24_CODE | |
8e420152 DE |
407 | |
408 | /* Fetch the input operands for the semantic handler. */ | |
b8641a4d | 409 | OPRND (disp24) = pc + f_disp24; |
8e420152 DE |
410 | #undef OPRND |
411 | } | |
412 | BREAK (read); | |
413 | ||
e0a85af6 | 414 | CASE (read, READ_FMT_CMP) : /* e.g. cmp $src1,$src2 */ |
8e420152 | 415 | { |
e0a85af6 DE |
416 | #define OPRND(f) par_exec->operands.fmt_cmp.f |
417 | EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
418 | EXTRACT_FMT_CMP_CODE | |
8e420152 DE |
419 | |
420 | /* Fetch the input operands for the semantic handler. */ | |
421 | OPRND (src1) = CPU (h_gr[f_r1]); | |
422 | OPRND (src2) = CPU (h_gr[f_r2]); | |
423 | #undef OPRND | |
424 | } | |
425 | BREAK (read); | |
426 | ||
e0a85af6 | 427 | CASE (read, READ_FMT_CMPI) : /* e.g. cmpi $src2,$simm16 */ |
8e420152 | 428 | { |
e0a85af6 DE |
429 | #define OPRND(f) par_exec->operands.fmt_cmpi.f |
430 | EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
431 | EXTRACT_FMT_CMPI_CODE | |
8e420152 DE |
432 | |
433 | /* Fetch the input operands for the semantic handler. */ | |
434 | OPRND (simm16) = f_simm16; | |
435 | OPRND (src2) = CPU (h_gr[f_r2]); | |
436 | #undef OPRND | |
437 | } | |
438 | BREAK (read); | |
439 | ||
e0a85af6 | 440 | CASE (read, READ_FMT_CMPZ) : /* e.g. cmpz $src2 */ |
8e420152 | 441 | { |
e0a85af6 DE |
442 | #define OPRND(f) par_exec->operands.fmt_cmpz.f |
443 | EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
444 | EXTRACT_FMT_CMPZ_CODE | |
8e420152 DE |
445 | |
446 | /* Fetch the input operands for the semantic handler. */ | |
447 | OPRND (src2) = CPU (h_gr[f_r2]); | |
448 | #undef OPRND | |
449 | } | |
450 | BREAK (read); | |
451 | ||
e0a85af6 | 452 | CASE (read, READ_FMT_DIV) : /* e.g. div $dr,$sr */ |
8e420152 | 453 | { |
e0a85af6 DE |
454 | #define OPRND(f) par_exec->operands.fmt_div.f |
455 | EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
456 | EXTRACT_FMT_DIV_CODE | |
8e420152 DE |
457 | |
458 | /* Fetch the input operands for the semantic handler. */ | |
459 | OPRND (dr) = CPU (h_gr[f_r1]); | |
460 | OPRND (sr) = CPU (h_gr[f_r2]); | |
461 | #undef OPRND | |
462 | } | |
463 | BREAK (read); | |
464 | ||
e0a85af6 | 465 | CASE (read, READ_FMT_JC) : /* e.g. jc $sr */ |
8e420152 | 466 | { |
e0a85af6 DE |
467 | #define OPRND(f) par_exec->operands.fmt_jc.f |
468 | EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
469 | EXTRACT_FMT_JC_CODE | |
8e420152 DE |
470 | |
471 | /* Fetch the input operands for the semantic handler. */ | |
472 | OPRND (condbit) = CPU (h_cond); | |
473 | OPRND (sr) = CPU (h_gr[f_r2]); | |
474 | #undef OPRND | |
475 | } | |
476 | BREAK (read); | |
477 | ||
e0a85af6 | 478 | CASE (read, READ_FMT_JL) : /* e.g. jl $sr */ |
8e420152 | 479 | { |
e0a85af6 DE |
480 | #define OPRND(f) par_exec->operands.fmt_jl.f |
481 | EXTRACT_FMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
482 | EXTRACT_FMT_JL_CODE | |
8e420152 DE |
483 | |
484 | /* Fetch the input operands for the semantic handler. */ | |
485 | OPRND (pc) = CPU (h_pc); | |
486 | OPRND (sr) = CPU (h_gr[f_r2]); | |
487 | #undef OPRND | |
488 | } | |
489 | BREAK (read); | |
490 | ||
e0a85af6 | 491 | CASE (read, READ_FMT_JMP) : /* e.g. jmp $sr */ |
8e420152 | 492 | { |
e0a85af6 DE |
493 | #define OPRND(f) par_exec->operands.fmt_jmp.f |
494 | EXTRACT_FMT_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
495 | EXTRACT_FMT_JMP_CODE | |
8e420152 DE |
496 | |
497 | /* Fetch the input operands for the semantic handler. */ | |
498 | OPRND (sr) = CPU (h_gr[f_r2]); | |
499 | #undef OPRND | |
500 | } | |
501 | BREAK (read); | |
502 | ||
e0a85af6 | 503 | CASE (read, READ_FMT_LD) : /* e.g. ld $dr,@$sr */ |
8e420152 | 504 | { |
e0a85af6 DE |
505 | #define OPRND(f) par_exec->operands.fmt_ld.f |
506 | EXTRACT_FMT_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
507 | EXTRACT_FMT_LD_CODE | |
8e420152 DE |
508 | |
509 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 510 | OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2])); |
8e420152 DE |
511 | OPRND (sr) = CPU (h_gr[f_r2]); |
512 | #undef OPRND | |
513 | } | |
514 | BREAK (read); | |
515 | ||
e0a85af6 | 516 | CASE (read, READ_FMT_LD_D) : /* e.g. ld $dr,@($slo16,$sr) */ |
8e420152 | 517 | { |
e0a85af6 DE |
518 | #define OPRND(f) par_exec->operands.fmt_ld_d.f |
519 | EXTRACT_FMT_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
520 | EXTRACT_FMT_LD_D_CODE | |
8e420152 DE |
521 | |
522 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 523 | OPRND (h_memory_add_WI_sr_slo16) = GETMEMSI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16)); |
8e420152 DE |
524 | OPRND (slo16) = f_simm16; |
525 | OPRND (sr) = CPU (h_gr[f_r2]); | |
526 | #undef OPRND | |
527 | } | |
528 | BREAK (read); | |
529 | ||
e0a85af6 | 530 | CASE (read, READ_FMT_LDB) : /* e.g. ldb $dr,@$sr */ |
8e420152 | 531 | { |
e0a85af6 DE |
532 | #define OPRND(f) par_exec->operands.fmt_ldb.f |
533 | EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
534 | EXTRACT_FMT_LDB_CODE | |
8e420152 DE |
535 | |
536 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 537 | OPRND (h_memory_sr) = GETMEMQI (current_cpu, CPU (h_gr[f_r2])); |
8e420152 DE |
538 | OPRND (sr) = CPU (h_gr[f_r2]); |
539 | #undef OPRND | |
540 | } | |
541 | BREAK (read); | |
542 | ||
e0a85af6 | 543 | CASE (read, READ_FMT_LDB_D) : /* e.g. ldb $dr,@($slo16,$sr) */ |
8e420152 | 544 | { |
e0a85af6 DE |
545 | #define OPRND(f) par_exec->operands.fmt_ldb_d.f |
546 | EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
547 | EXTRACT_FMT_LDB_D_CODE | |
8e420152 DE |
548 | |
549 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 550 | OPRND (h_memory_add_WI_sr_slo16) = GETMEMQI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16)); |
8e420152 DE |
551 | OPRND (slo16) = f_simm16; |
552 | OPRND (sr) = CPU (h_gr[f_r2]); | |
553 | #undef OPRND | |
554 | } | |
555 | BREAK (read); | |
556 | ||
e0a85af6 | 557 | CASE (read, READ_FMT_LDH) : /* e.g. ldh $dr,@$sr */ |
8e420152 | 558 | { |
e0a85af6 DE |
559 | #define OPRND(f) par_exec->operands.fmt_ldh.f |
560 | EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
561 | EXTRACT_FMT_LDH_CODE | |
8e420152 DE |
562 | |
563 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 564 | OPRND (h_memory_sr) = GETMEMHI (current_cpu, CPU (h_gr[f_r2])); |
8e420152 DE |
565 | OPRND (sr) = CPU (h_gr[f_r2]); |
566 | #undef OPRND | |
567 | } | |
568 | BREAK (read); | |
569 | ||
e0a85af6 | 570 | CASE (read, READ_FMT_LDH_D) : /* e.g. ldh $dr,@($slo16,$sr) */ |
8e420152 | 571 | { |
e0a85af6 DE |
572 | #define OPRND(f) par_exec->operands.fmt_ldh_d.f |
573 | EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
574 | EXTRACT_FMT_LDH_D_CODE | |
8e420152 DE |
575 | |
576 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 577 | OPRND (h_memory_add_WI_sr_slo16) = GETMEMHI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16)); |
8e420152 DE |
578 | OPRND (slo16) = f_simm16; |
579 | OPRND (sr) = CPU (h_gr[f_r2]); | |
580 | #undef OPRND | |
581 | } | |
582 | BREAK (read); | |
583 | ||
e0a85af6 | 584 | CASE (read, READ_FMT_LD_PLUS) : /* e.g. ld $dr,@$sr+ */ |
8e420152 | 585 | { |
e0a85af6 DE |
586 | #define OPRND(f) par_exec->operands.fmt_ld_plus.f |
587 | EXTRACT_FMT_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
588 | EXTRACT_FMT_LD_PLUS_CODE | |
b8641a4d DE |
589 | |
590 | /* Fetch the input operands for the semantic handler. */ | |
591 | OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2])); | |
592 | OPRND (sr) = CPU (h_gr[f_r2]); | |
593 | #undef OPRND | |
594 | } | |
595 | BREAK (read); | |
596 | ||
e0a85af6 | 597 | CASE (read, READ_FMT_LD24) : /* e.g. ld24 $dr,$uimm24 */ |
b8641a4d | 598 | { |
e0a85af6 DE |
599 | #define OPRND(f) par_exec->operands.fmt_ld24.f |
600 | EXTRACT_FMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */ | |
601 | EXTRACT_FMT_LD24_CODE | |
8e420152 DE |
602 | |
603 | /* Fetch the input operands for the semantic handler. */ | |
604 | OPRND (uimm24) = f_uimm24; | |
605 | #undef OPRND | |
606 | } | |
607 | BREAK (read); | |
608 | ||
e0a85af6 | 609 | CASE (read, READ_FMT_LDI8) : /* e.g. ldi $dr,$simm8 */ |
8e420152 | 610 | { |
e0a85af6 DE |
611 | #define OPRND(f) par_exec->operands.fmt_ldi8.f |
612 | EXTRACT_FMT_LDI8_VARS /* f-op1 f-r1 f-simm8 */ | |
613 | EXTRACT_FMT_LDI8_CODE | |
8e420152 DE |
614 | |
615 | /* Fetch the input operands for the semantic handler. */ | |
616 | OPRND (simm8) = f_simm8; | |
617 | #undef OPRND | |
618 | } | |
619 | BREAK (read); | |
620 | ||
e0a85af6 | 621 | CASE (read, READ_FMT_LDI16) : /* e.g. ldi $dr,$hash$slo16 */ |
8e420152 | 622 | { |
e0a85af6 DE |
623 | #define OPRND(f) par_exec->operands.fmt_ldi16.f |
624 | EXTRACT_FMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
625 | EXTRACT_FMT_LDI16_CODE | |
8e420152 DE |
626 | |
627 | /* Fetch the input operands for the semantic handler. */ | |
628 | OPRND (slo16) = f_simm16; | |
629 | #undef OPRND | |
630 | } | |
631 | BREAK (read); | |
632 | ||
e0a85af6 | 633 | CASE (read, READ_FMT_LOCK) : /* e.g. lock $dr,@$sr */ |
b8641a4d | 634 | { |
e0a85af6 DE |
635 | #define OPRND(f) par_exec->operands.fmt_lock.f |
636 | EXTRACT_FMT_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
637 | EXTRACT_FMT_LOCK_CODE | |
b8641a4d DE |
638 | |
639 | /* Fetch the input operands for the semantic handler. */ | |
cab58155 | 640 | OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2])); |
b8641a4d DE |
641 | OPRND (sr) = CPU (h_gr[f_r2]); |
642 | #undef OPRND | |
643 | } | |
644 | BREAK (read); | |
645 | ||
e0a85af6 | 646 | CASE (read, READ_FMT_MACHI_A) : /* e.g. machi $src1,$src2,$acc */ |
8e420152 | 647 | { |
e0a85af6 DE |
648 | #define OPRND(f) par_exec->operands.fmt_machi_a.f |
649 | EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */ | |
650 | EXTRACT_FMT_MACHI_A_CODE | |
8e420152 DE |
651 | |
652 | /* Fetch the input operands for the semantic handler. */ | |
653 | OPRND (acc) = m32rx_h_accums_get (current_cpu, f_acc); | |
654 | OPRND (src1) = CPU (h_gr[f_r1]); | |
655 | OPRND (src2) = CPU (h_gr[f_r2]); | |
656 | #undef OPRND | |
657 | } | |
658 | BREAK (read); | |
659 | ||
e0a85af6 | 660 | CASE (read, READ_FMT_MACWHI) : /* e.g. macwhi $src1,$src2 */ |
8e420152 | 661 | { |
e0a85af6 DE |
662 | #define OPRND(f) par_exec->operands.fmt_macwhi.f |
663 | EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
664 | EXTRACT_FMT_MACWHI_CODE | |
8e420152 DE |
665 | |
666 | /* Fetch the input operands for the semantic handler. */ | |
83d9ce00 | 667 | OPRND (accum) = CPU (h_accum); |
8e420152 DE |
668 | OPRND (src1) = CPU (h_gr[f_r1]); |
669 | OPRND (src2) = CPU (h_gr[f_r2]); | |
670 | #undef OPRND | |
671 | } | |
672 | BREAK (read); | |
673 | ||
e0a85af6 | 674 | CASE (read, READ_FMT_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */ |
8e420152 | 675 | { |
e0a85af6 DE |
676 | #define OPRND(f) par_exec->operands.fmt_mulhi_a.f |
677 | EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */ | |
678 | EXTRACT_FMT_MULHI_A_CODE | |
83d9ce00 DE |
679 | |
680 | /* Fetch the input operands for the semantic handler. */ | |
681 | OPRND (src1) = CPU (h_gr[f_r1]); | |
682 | OPRND (src2) = CPU (h_gr[f_r2]); | |
683 | #undef OPRND | |
684 | } | |
685 | BREAK (read); | |
686 | ||
e0a85af6 | 687 | CASE (read, READ_FMT_MULWHI) : /* e.g. mulwhi $src1,$src2 */ |
83d9ce00 | 688 | { |
e0a85af6 DE |
689 | #define OPRND(f) par_exec->operands.fmt_mulwhi.f |
690 | EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
691 | EXTRACT_FMT_MULWHI_CODE | |
83d9ce00 DE |
692 | |
693 | /* Fetch the input operands for the semantic handler. */ | |
694 | OPRND (src1) = CPU (h_gr[f_r1]); | |
695 | OPRND (src2) = CPU (h_gr[f_r2]); | |
696 | #undef OPRND | |
697 | } | |
698 | BREAK (read); | |
699 | ||
e0a85af6 | 700 | CASE (read, READ_FMT_MV) : /* e.g. mv $dr,$sr */ |
83d9ce00 | 701 | { |
e0a85af6 DE |
702 | #define OPRND(f) par_exec->operands.fmt_mv.f |
703 | EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
704 | EXTRACT_FMT_MV_CODE | |
8e420152 DE |
705 | |
706 | /* Fetch the input operands for the semantic handler. */ | |
707 | OPRND (sr) = CPU (h_gr[f_r2]); | |
708 | #undef OPRND | |
709 | } | |
710 | BREAK (read); | |
711 | ||
e0a85af6 | 712 | CASE (read, READ_FMT_MVFACHI_A) : /* e.g. mvfachi $dr,$accs */ |
8e420152 | 713 | { |
e0a85af6 DE |
714 | #define OPRND(f) par_exec->operands.fmt_mvfachi_a.f |
715 | EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */ | |
716 | EXTRACT_FMT_MVFACHI_A_CODE | |
8e420152 DE |
717 | |
718 | /* Fetch the input operands for the semantic handler. */ | |
719 | OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs); | |
720 | #undef OPRND | |
721 | } | |
722 | BREAK (read); | |
723 | ||
e0a85af6 | 724 | CASE (read, READ_FMT_MVFC) : /* e.g. mvfc $dr,$scr */ |
8e420152 | 725 | { |
e0a85af6 DE |
726 | #define OPRND(f) par_exec->operands.fmt_mvfc.f |
727 | EXTRACT_FMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
728 | EXTRACT_FMT_MVFC_CODE | |
8e420152 DE |
729 | |
730 | /* Fetch the input operands for the semantic handler. */ | |
731 | OPRND (scr) = m32rx_h_cr_get (current_cpu, f_r2); | |
732 | #undef OPRND | |
733 | } | |
734 | BREAK (read); | |
735 | ||
e0a85af6 | 736 | CASE (read, READ_FMT_MVTACHI_A) : /* e.g. mvtachi $src1,$accs */ |
8e420152 | 737 | { |
e0a85af6 DE |
738 | #define OPRND(f) par_exec->operands.fmt_mvtachi_a.f |
739 | EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */ | |
740 | EXTRACT_FMT_MVTACHI_A_CODE | |
8e420152 DE |
741 | |
742 | /* Fetch the input operands for the semantic handler. */ | |
743 | OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs); | |
744 | OPRND (src1) = CPU (h_gr[f_r1]); | |
745 | #undef OPRND | |
746 | } | |
747 | BREAK (read); | |
748 | ||
e0a85af6 | 749 | CASE (read, READ_FMT_MVTC) : /* e.g. mvtc $sr,$dcr */ |
8e420152 | 750 | { |
e0a85af6 DE |
751 | #define OPRND(f) par_exec->operands.fmt_mvtc.f |
752 | EXTRACT_FMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
753 | EXTRACT_FMT_MVTC_CODE | |
8e420152 DE |
754 | |
755 | /* Fetch the input operands for the semantic handler. */ | |
756 | OPRND (sr) = CPU (h_gr[f_r2]); | |
757 | #undef OPRND | |
758 | } | |
759 | BREAK (read); | |
760 | ||
e0a85af6 | 761 | CASE (read, READ_FMT_NOP) : /* e.g. nop */ |
8e420152 | 762 | { |
e0a85af6 DE |
763 | #define OPRND(f) par_exec->operands.fmt_nop.f |
764 | EXTRACT_FMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
765 | EXTRACT_FMT_NOP_CODE | |
8e420152 DE |
766 | |
767 | /* Fetch the input operands for the semantic handler. */ | |
768 | #undef OPRND | |
769 | } | |
770 | BREAK (read); | |
771 | ||
e0a85af6 | 772 | CASE (read, READ_FMT_RAC_DSI) : /* e.g. rac $accd,$accs,$imm1 */ |
e0bd6e18 | 773 | { |
e0a85af6 DE |
774 | #define OPRND(f) par_exec->operands.fmt_rac_dsi.f |
775 | EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */ | |
776 | EXTRACT_FMT_RAC_DSI_CODE | |
8e420152 DE |
777 | |
778 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 779 | OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs); |
e0bd6e18 | 780 | OPRND (imm1) = f_imm1; |
8e420152 DE |
781 | #undef OPRND |
782 | } | |
783 | BREAK (read); | |
784 | ||
e0a85af6 | 785 | CASE (read, READ_FMT_RTE) : /* e.g. rte */ |
8e420152 | 786 | { |
e0a85af6 DE |
787 | #define OPRND(f) par_exec->operands.fmt_rte.f |
788 | EXTRACT_FMT_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
789 | EXTRACT_FMT_RTE_CODE | |
8e420152 DE |
790 | |
791 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d DE |
792 | OPRND (h_bcond_0) = CPU (h_bcond); |
793 | OPRND (h_bie_0) = CPU (h_bie); | |
794 | OPRND (h_bpc_0) = CPU (h_bpc); | |
795 | OPRND (h_bsm_0) = CPU (h_bsm); | |
8e420152 DE |
796 | #undef OPRND |
797 | } | |
798 | BREAK (read); | |
799 | ||
e0a85af6 | 800 | CASE (read, READ_FMT_SETH) : /* e.g. seth $dr,$hash$hi16 */ |
8e420152 | 801 | { |
e0a85af6 DE |
802 | #define OPRND(f) par_exec->operands.fmt_seth.f |
803 | EXTRACT_FMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */ | |
804 | EXTRACT_FMT_SETH_CODE | |
8e420152 DE |
805 | |
806 | /* Fetch the input operands for the semantic handler. */ | |
807 | OPRND (hi16) = f_hi16; | |
808 | #undef OPRND | |
809 | } | |
810 | BREAK (read); | |
811 | ||
e0a85af6 | 812 | CASE (read, READ_FMT_SLL3) : /* e.g. sll3 $dr,$sr,$simm16 */ |
8e420152 | 813 | { |
e0a85af6 DE |
814 | #define OPRND(f) par_exec->operands.fmt_sll3.f |
815 | EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
816 | EXTRACT_FMT_SLL3_CODE | |
b8641a4d DE |
817 | |
818 | /* Fetch the input operands for the semantic handler. */ | |
819 | OPRND (simm16) = f_simm16; | |
820 | OPRND (sr) = CPU (h_gr[f_r2]); | |
821 | #undef OPRND | |
822 | } | |
823 | BREAK (read); | |
824 | ||
e0a85af6 | 825 | CASE (read, READ_FMT_SLLI) : /* e.g. slli $dr,$uimm5 */ |
b8641a4d | 826 | { |
e0a85af6 DE |
827 | #define OPRND(f) par_exec->operands.fmt_slli.f |
828 | EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */ | |
829 | EXTRACT_FMT_SLLI_CODE | |
8e420152 DE |
830 | |
831 | /* Fetch the input operands for the semantic handler. */ | |
832 | OPRND (dr) = CPU (h_gr[f_r1]); | |
833 | OPRND (uimm5) = f_uimm5; | |
834 | #undef OPRND | |
835 | } | |
836 | BREAK (read); | |
837 | ||
e0a85af6 | 838 | CASE (read, READ_FMT_ST) : /* e.g. st $src1,@$src2 */ |
8e420152 | 839 | { |
e0a85af6 DE |
840 | #define OPRND(f) par_exec->operands.fmt_st.f |
841 | EXTRACT_FMT_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
842 | EXTRACT_FMT_ST_CODE | |
b8641a4d DE |
843 | |
844 | /* Fetch the input operands for the semantic handler. */ | |
845 | OPRND (src1) = CPU (h_gr[f_r1]); | |
846 | OPRND (src2) = CPU (h_gr[f_r2]); | |
847 | #undef OPRND | |
848 | } | |
849 | BREAK (read); | |
850 | ||
e0a85af6 | 851 | CASE (read, READ_FMT_ST_D) : /* e.g. st $src1,@($slo16,$src2) */ |
b8641a4d | 852 | { |
e0a85af6 DE |
853 | #define OPRND(f) par_exec->operands.fmt_st_d.f |
854 | EXTRACT_FMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
855 | EXTRACT_FMT_ST_D_CODE | |
8e420152 DE |
856 | |
857 | /* Fetch the input operands for the semantic handler. */ | |
858 | OPRND (slo16) = f_simm16; | |
859 | OPRND (src1) = CPU (h_gr[f_r1]); | |
860 | OPRND (src2) = CPU (h_gr[f_r2]); | |
861 | #undef OPRND | |
862 | } | |
863 | BREAK (read); | |
864 | ||
e0a85af6 | 865 | CASE (read, READ_FMT_STB) : /* e.g. stb $src1,@$src2 */ |
b8641a4d | 866 | { |
e0a85af6 DE |
867 | #define OPRND(f) par_exec->operands.fmt_stb.f |
868 | EXTRACT_FMT_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
869 | EXTRACT_FMT_STB_CODE | |
b8641a4d DE |
870 | |
871 | /* Fetch the input operands for the semantic handler. */ | |
872 | OPRND (src1) = CPU (h_gr[f_r1]); | |
873 | OPRND (src2) = CPU (h_gr[f_r2]); | |
874 | #undef OPRND | |
875 | } | |
876 | BREAK (read); | |
877 | ||
e0a85af6 | 878 | CASE (read, READ_FMT_STB_D) : /* e.g. stb $src1,@($slo16,$src2) */ |
8e420152 | 879 | { |
e0a85af6 DE |
880 | #define OPRND(f) par_exec->operands.fmt_stb_d.f |
881 | EXTRACT_FMT_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
882 | EXTRACT_FMT_STB_D_CODE | |
b8641a4d DE |
883 | |
884 | /* Fetch the input operands for the semantic handler. */ | |
885 | OPRND (slo16) = f_simm16; | |
886 | OPRND (src1) = CPU (h_gr[f_r1]); | |
887 | OPRND (src2) = CPU (h_gr[f_r2]); | |
888 | #undef OPRND | |
889 | } | |
890 | BREAK (read); | |
891 | ||
e0a85af6 | 892 | CASE (read, READ_FMT_STH) : /* e.g. sth $src1,@$src2 */ |
b8641a4d | 893 | { |
e0a85af6 DE |
894 | #define OPRND(f) par_exec->operands.fmt_sth.f |
895 | EXTRACT_FMT_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
896 | EXTRACT_FMT_STH_CODE | |
b8641a4d DE |
897 | |
898 | /* Fetch the input operands for the semantic handler. */ | |
899 | OPRND (src1) = CPU (h_gr[f_r1]); | |
900 | OPRND (src2) = CPU (h_gr[f_r2]); | |
901 | #undef OPRND | |
902 | } | |
903 | BREAK (read); | |
904 | ||
e0a85af6 | 905 | CASE (read, READ_FMT_STH_D) : /* e.g. sth $src1,@($slo16,$src2) */ |
b8641a4d | 906 | { |
e0a85af6 DE |
907 | #define OPRND(f) par_exec->operands.fmt_sth_d.f |
908 | EXTRACT_FMT_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */ | |
909 | EXTRACT_FMT_STH_D_CODE | |
b8641a4d DE |
910 | |
911 | /* Fetch the input operands for the semantic handler. */ | |
912 | OPRND (slo16) = f_simm16; | |
913 | OPRND (src1) = CPU (h_gr[f_r1]); | |
914 | OPRND (src2) = CPU (h_gr[f_r2]); | |
915 | #undef OPRND | |
916 | } | |
917 | BREAK (read); | |
918 | ||
e0a85af6 | 919 | CASE (read, READ_FMT_ST_PLUS) : /* e.g. st $src1,@+$src2 */ |
b8641a4d | 920 | { |
e0a85af6 DE |
921 | #define OPRND(f) par_exec->operands.fmt_st_plus.f |
922 | EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
923 | EXTRACT_FMT_ST_PLUS_CODE | |
b8641a4d DE |
924 | |
925 | /* Fetch the input operands for the semantic handler. */ | |
926 | OPRND (src1) = CPU (h_gr[f_r1]); | |
927 | OPRND (src2) = CPU (h_gr[f_r2]); | |
928 | #undef OPRND | |
929 | } | |
930 | BREAK (read); | |
931 | ||
e0a85af6 | 932 | CASE (read, READ_FMT_TRAP) : /* e.g. trap $uimm4 */ |
b8641a4d | 933 | { |
e0a85af6 DE |
934 | #define OPRND(f) par_exec->operands.fmt_trap.f |
935 | EXTRACT_FMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */ | |
936 | EXTRACT_FMT_TRAP_CODE | |
8e420152 DE |
937 | |
938 | /* Fetch the input operands for the semantic handler. */ | |
cab58155 DE |
939 | OPRND (pc) = CPU (h_pc); |
940 | OPRND (h_cr_0) = m32rx_h_cr_get (current_cpu, 0); | |
8e420152 DE |
941 | OPRND (uimm4) = f_uimm4; |
942 | #undef OPRND | |
943 | } | |
944 | BREAK (read); | |
945 | ||
e0a85af6 | 946 | CASE (read, READ_FMT_UNLOCK) : /* e.g. unlock $src1,@$src2 */ |
8e420152 | 947 | { |
e0a85af6 DE |
948 | #define OPRND(f) par_exec->operands.fmt_unlock.f |
949 | EXTRACT_FMT_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
950 | EXTRACT_FMT_UNLOCK_CODE | |
8e420152 DE |
951 | |
952 | /* Fetch the input operands for the semantic handler. */ | |
cab58155 | 953 | OPRND (h_lock_0) = CPU (h_lock); |
b8641a4d | 954 | OPRND (src1) = CPU (h_gr[f_r1]); |
b8a9943d | 955 | OPRND (src2) = CPU (h_gr[f_r2]); |
8e420152 DE |
956 | #undef OPRND |
957 | } | |
958 | BREAK (read); | |
959 | ||
e0a85af6 | 960 | CASE (read, READ_FMT_SATB) : /* e.g. satb $dr,$sr */ |
b8641a4d | 961 | { |
e0a85af6 DE |
962 | #define OPRND(f) par_exec->operands.fmt_satb.f |
963 | EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */ | |
964 | EXTRACT_FMT_SATB_CODE | |
b8641a4d DE |
965 | |
966 | /* Fetch the input operands for the semantic handler. */ | |
967 | OPRND (sr) = CPU (h_gr[f_r2]); | |
968 | #undef OPRND | |
969 | } | |
970 | BREAK (read); | |
971 | ||
e0a85af6 | 972 | CASE (read, READ_FMT_SAT) : /* e.g. sat $dr,$sr */ |
8e420152 | 973 | { |
e0a85af6 DE |
974 | #define OPRND(f) par_exec->operands.fmt_sat.f |
975 | EXTRACT_FMT_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */ | |
976 | EXTRACT_FMT_SAT_CODE | |
8e420152 DE |
977 | |
978 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 979 | OPRND (condbit) = CPU (h_cond); |
b8641a4d | 980 | OPRND (sr) = CPU (h_gr[f_r2]); |
8e420152 DE |
981 | #undef OPRND |
982 | } | |
983 | BREAK (read); | |
984 | ||
e0a85af6 | 985 | CASE (read, READ_FMT_SADD) : /* e.g. sadd */ |
8e420152 | 986 | { |
e0a85af6 DE |
987 | #define OPRND(f) par_exec->operands.fmt_sadd.f |
988 | EXTRACT_FMT_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
989 | EXTRACT_FMT_SADD_CODE | |
8e420152 DE |
990 | |
991 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d DE |
992 | OPRND (h_accums_0) = m32rx_h_accums_get (current_cpu, 0); |
993 | OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, 1); | |
8e420152 DE |
994 | #undef OPRND |
995 | } | |
996 | BREAK (read); | |
997 | ||
e0a85af6 | 998 | CASE (read, READ_FMT_MACWU1) : /* e.g. macwu1 $src1,$src2 */ |
8e420152 | 999 | { |
e0a85af6 DE |
1000 | #define OPRND(f) par_exec->operands.fmt_macwu1.f |
1001 | EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
1002 | EXTRACT_FMT_MACWU1_CODE | |
8e420152 DE |
1003 | |
1004 | /* Fetch the input operands for the semantic handler. */ | |
b8a9943d | 1005 | OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, 1); |
8e420152 DE |
1006 | OPRND (src1) = CPU (h_gr[f_r1]); |
1007 | OPRND (src2) = CPU (h_gr[f_r2]); | |
1008 | #undef OPRND | |
1009 | } | |
1010 | BREAK (read); | |
1011 | ||
e0a85af6 | 1012 | CASE (read, READ_FMT_MULWU1) : /* e.g. mulwu1 $src1,$src2 */ |
b8641a4d | 1013 | { |
e0a85af6 DE |
1014 | #define OPRND(f) par_exec->operands.fmt_mulwu1.f |
1015 | EXTRACT_FMT_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
1016 | EXTRACT_FMT_MULWU1_CODE | |
b8641a4d DE |
1017 | |
1018 | /* Fetch the input operands for the semantic handler. */ | |
1019 | OPRND (src1) = CPU (h_gr[f_r1]); | |
1020 | OPRND (src2) = CPU (h_gr[f_r2]); | |
1021 | #undef OPRND | |
1022 | } | |
1023 | BREAK (read); | |
1024 | ||
e0a85af6 | 1025 | CASE (read, READ_FMT_SC) : /* e.g. sc */ |
b8a9943d | 1026 | { |
e0a85af6 DE |
1027 | #define OPRND(f) par_exec->operands.fmt_sc.f |
1028 | EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */ | |
1029 | EXTRACT_FMT_SC_CODE | |
8e420152 DE |
1030 | |
1031 | /* Fetch the input operands for the semantic handler. */ | |
1032 | OPRND (condbit) = CPU (h_cond); | |
1033 | #undef OPRND | |
1034 | } | |
1035 | BREAK (read); | |
1036 | ||
1037 | } | |
1038 | ENDSWITCH (read) /* End of read switch. */ | |
1039 | } | |
1040 | ||
1041 | #endif /* DEFINE_SWITCH */ |