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2000-10-06 Dave Brolley <brolley@redhat.com>
[deliverable/binutils-gdb.git] / sim / m32r / semx-switch.c
CommitLineData
2df3850c
JM		 1/* Simulator instruction semantics for m32rxf.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
6
7This file is part of the GNU Simulators.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23*/
24
25#ifdef DEFINE_LABELS
26
27 /* The labels have the case they have because the enum of insn types
28 is all uppercase and in the non-stdc case the insn symbol is built
29 into the enum name. */
30
31 static struct {
32 int index;
33 void *label;
34 } labels[] = {
35 { M32RXF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
36 { M32RXF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
37 { M32RXF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
38 { M32RXF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
39 { M32RXF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
40 { M32RXF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
41 { M32RXF_INSN_ADD, && case_sem_INSN_ADD },
42 { M32RXF_INSN_ADD3, && case_sem_INSN_ADD3 },
43 { M32RXF_INSN_AND, && case_sem_INSN_AND },
44 { M32RXF_INSN_AND3, && case_sem_INSN_AND3 },
45 { M32RXF_INSN_OR, && case_sem_INSN_OR },
46 { M32RXF_INSN_OR3, && case_sem_INSN_OR3 },
47 { M32RXF_INSN_XOR, && case_sem_INSN_XOR },
48 { M32RXF_INSN_XOR3, && case_sem_INSN_XOR3 },
49 { M32RXF_INSN_ADDI, && case_sem_INSN_ADDI },
50 { M32RXF_INSN_ADDV, && case_sem_INSN_ADDV },
51 { M32RXF_INSN_ADDV3, && case_sem_INSN_ADDV3 },
52 { M32RXF_INSN_ADDX, && case_sem_INSN_ADDX },
53 { M32RXF_INSN_BC8, && case_sem_INSN_BC8 },
54 { M32RXF_INSN_BC24, && case_sem_INSN_BC24 },
55 { M32RXF_INSN_BEQ, && case_sem_INSN_BEQ },
56 { M32RXF_INSN_BEQZ, && case_sem_INSN_BEQZ },
57 { M32RXF_INSN_BGEZ, && case_sem_INSN_BGEZ },
58 { M32RXF_INSN_BGTZ, && case_sem_INSN_BGTZ },
59 { M32RXF_INSN_BLEZ, && case_sem_INSN_BLEZ },
60 { M32RXF_INSN_BLTZ, && case_sem_INSN_BLTZ },
61 { M32RXF_INSN_BNEZ, && case_sem_INSN_BNEZ },
62 { M32RXF_INSN_BL8, && case_sem_INSN_BL8 },
63 { M32RXF_INSN_BL24, && case_sem_INSN_BL24 },
64 { M32RXF_INSN_BCL8, && case_sem_INSN_BCL8 },
65 { M32RXF_INSN_BCL24, && case_sem_INSN_BCL24 },
66 { M32RXF_INSN_BNC8, && case_sem_INSN_BNC8 },
67 { M32RXF_INSN_BNC24, && case_sem_INSN_BNC24 },
68 { M32RXF_INSN_BNE, && case_sem_INSN_BNE },
69 { M32RXF_INSN_BRA8, && case_sem_INSN_BRA8 },
70 { M32RXF_INSN_BRA24, && case_sem_INSN_BRA24 },
71 { M32RXF_INSN_BNCL8, && case_sem_INSN_BNCL8 },
72 { M32RXF_INSN_BNCL24, && case_sem_INSN_BNCL24 },
73 { M32RXF_INSN_CMP, && case_sem_INSN_CMP },
74 { M32RXF_INSN_CMPI, && case_sem_INSN_CMPI },
75 { M32RXF_INSN_CMPU, && case_sem_INSN_CMPU },
76 { M32RXF_INSN_CMPUI, && case_sem_INSN_CMPUI },
77 { M32RXF_INSN_CMPEQ, && case_sem_INSN_CMPEQ },
78 { M32RXF_INSN_CMPZ, && case_sem_INSN_CMPZ },
79 { M32RXF_INSN_DIV, && case_sem_INSN_DIV },
80 { M32RXF_INSN_DIVU, && case_sem_INSN_DIVU },
81 { M32RXF_INSN_REM, && case_sem_INSN_REM },
82 { M32RXF_INSN_REMU, && case_sem_INSN_REMU },
83 { M32RXF_INSN_DIVH, && case_sem_INSN_DIVH },
84 { M32RXF_INSN_JC, && case_sem_INSN_JC },
85 { M32RXF_INSN_JNC, && case_sem_INSN_JNC },
86 { M32RXF_INSN_JL, && case_sem_INSN_JL },
87 { M32RXF_INSN_JMP, && case_sem_INSN_JMP },
88 { M32RXF_INSN_LD, && case_sem_INSN_LD },
89 { M32RXF_INSN_LD_D, && case_sem_INSN_LD_D },
90 { M32RXF_INSN_LDB, && case_sem_INSN_LDB },
91 { M32RXF_INSN_LDB_D, && case_sem_INSN_LDB_D },
92 { M32RXF_INSN_LDH, && case_sem_INSN_LDH },
93 { M32RXF_INSN_LDH_D, && case_sem_INSN_LDH_D },
94 { M32RXF_INSN_LDUB, && case_sem_INSN_LDUB },
95 { M32RXF_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
96 { M32RXF_INSN_LDUH, && case_sem_INSN_LDUH },
97 { M32RXF_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
98 { M32RXF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
99 { M32RXF_INSN_LD24, && case_sem_INSN_LD24 },
100 { M32RXF_INSN_LDI8, && case_sem_INSN_LDI8 },
101 { M32RXF_INSN_LDI16, && case_sem_INSN_LDI16 },
102 { M32RXF_INSN_LOCK, && case_sem_INSN_LOCK },
103 { M32RXF_INSN_MACHI_A, && case_sem_INSN_MACHI_A },
104 { M32RXF_INSN_MACLO_A, && case_sem_INSN_MACLO_A },
105 { M32RXF_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A },
106 { M32RXF_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A },
107 { M32RXF_INSN_MUL, && case_sem_INSN_MUL },
108 { M32RXF_INSN_MULHI_A, && case_sem_INSN_MULHI_A },
109 { M32RXF_INSN_MULLO_A, && case_sem_INSN_MULLO_A },
110 { M32RXF_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A },
111 { M32RXF_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A },
112 { M32RXF_INSN_MV, && case_sem_INSN_MV },
113 { M32RXF_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A },
114 { M32RXF_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A },
115 { M32RXF_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A },
116 { M32RXF_INSN_MVFC, && case_sem_INSN_MVFC },
117 { M32RXF_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A },
118 { M32RXF_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A },
119 { M32RXF_INSN_MVTC, && case_sem_INSN_MVTC },
120 { M32RXF_INSN_NEG, && case_sem_INSN_NEG },
121 { M32RXF_INSN_NOP, && case_sem_INSN_NOP },
122 { M32RXF_INSN_NOT, && case_sem_INSN_NOT },
123 { M32RXF_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI },
124 { M32RXF_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI },
125 { M32RXF_INSN_RTE, && case_sem_INSN_RTE },
126 { M32RXF_INSN_SETH, && case_sem_INSN_SETH },
127 { M32RXF_INSN_SLL, && case_sem_INSN_SLL },
128 { M32RXF_INSN_SLL3, && case_sem_INSN_SLL3 },
129 { M32RXF_INSN_SLLI, && case_sem_INSN_SLLI },
130 { M32RXF_INSN_SRA, && case_sem_INSN_SRA },
131 { M32RXF_INSN_SRA3, && case_sem_INSN_SRA3 },
132 { M32RXF_INSN_SRAI, && case_sem_INSN_SRAI },
133 { M32RXF_INSN_SRL, && case_sem_INSN_SRL },
134 { M32RXF_INSN_SRL3, && case_sem_INSN_SRL3 },
135 { M32RXF_INSN_SRLI, && case_sem_INSN_SRLI },
136 { M32RXF_INSN_ST, && case_sem_INSN_ST },
137 { M32RXF_INSN_ST_D, && case_sem_INSN_ST_D },
138 { M32RXF_INSN_STB, && case_sem_INSN_STB },
139 { M32RXF_INSN_STB_D, && case_sem_INSN_STB_D },
140 { M32RXF_INSN_STH, && case_sem_INSN_STH },
141 { M32RXF_INSN_STH_D, && case_sem_INSN_STH_D },
142 { M32RXF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
143 { M32RXF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
144 { M32RXF_INSN_SUB, && case_sem_INSN_SUB },
145 { M32RXF_INSN_SUBV, && case_sem_INSN_SUBV },
146 { M32RXF_INSN_SUBX, && case_sem_INSN_SUBX },
147 { M32RXF_INSN_TRAP, && case_sem_INSN_TRAP },
148 { M32RXF_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
149 { M32RXF_INSN_SATB, && case_sem_INSN_SATB },
150 { M32RXF_INSN_SATH, && case_sem_INSN_SATH },
151 { M32RXF_INSN_SAT, && case_sem_INSN_SAT },
152 { M32RXF_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ },
153 { M32RXF_INSN_SADD, && case_sem_INSN_SADD },
154 { M32RXF_INSN_MACWU1, && case_sem_INSN_MACWU1 },
155 { M32RXF_INSN_MSBLO, && case_sem_INSN_MSBLO },
156 { M32RXF_INSN_MULWU1, && case_sem_INSN_MULWU1 },
157 { M32RXF_INSN_MACLH1, && case_sem_INSN_MACLH1 },
158 { M32RXF_INSN_SC, && case_sem_INSN_SC },
159 { M32RXF_INSN_SNC, && case_sem_INSN_SNC },
160 { M32RXF_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD },
161 { M32RXF_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD },
162 { M32RXF_INSN_PAR_AND, && case_sem_INSN_PAR_AND },
163 { M32RXF_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND },
164 { M32RXF_INSN_PAR_OR, && case_sem_INSN_PAR_OR },
165 { M32RXF_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR },
166 { M32RXF_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR },
167 { M32RXF_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR },
168 { M32RXF_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI },
169 { M32RXF_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI },
170 { M32RXF_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV },
171 { M32RXF_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV },
172 { M32RXF_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX },
173 { M32RXF_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX },
174 { M32RXF_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 },
175 { M32RXF_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 },
176 { M32RXF_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 },
177 { M32RXF_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 },
178 { M32RXF_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 },
179 { M32RXF_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 },
180 { M32RXF_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 },
181 { M32RXF_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 },
182 { M32RXF_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 },
183 { M32RXF_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 },
184 { M32RXF_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 },
185 { M32RXF_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 },
186 { M32RXF_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP },
187 { M32RXF_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP },
188 { M32RXF_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU },
189 { M32RXF_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU },
190 { M32RXF_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ },
191 { M32RXF_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ },
192 { M32RXF_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ },
193 { M32RXF_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ },
194 { M32RXF_INSN_PAR_JC, && case_sem_INSN_PAR_JC },
195 { M32RXF_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC },
196 { M32RXF_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC },
197 { M32RXF_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC },
198 { M32RXF_INSN_PAR_JL, && case_sem_INSN_PAR_JL },
199 { M32RXF_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL },
200 { M32RXF_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP },
201 { M32RXF_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP },
202 { M32RXF_INSN_PAR_LD, && case_sem_INSN_PAR_LD },
203 { M32RXF_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD },
204 { M32RXF_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB },
205 { M32RXF_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB },
206 { M32RXF_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH },
207 { M32RXF_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH },
208 { M32RXF_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB },
209 { M32RXF_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB },
210 { M32RXF_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH },
211 { M32RXF_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH },
212 { M32RXF_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS },
213 { M32RXF_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS },
214 { M32RXF_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 },
215 { M32RXF_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 },
216 { M32RXF_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK },
217 { M32RXF_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK },
218 { M32RXF_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A },
219 { M32RXF_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A },
220 { M32RXF_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A },
221 { M32RXF_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A },
222 { M32RXF_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A },
223 { M32RXF_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A },
224 { M32RXF_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A },
225 { M32RXF_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A },
226 { M32RXF_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL },
227 { M32RXF_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL },
228 { M32RXF_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A },
229 { M32RXF_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A },
230 { M32RXF_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A },
231 { M32RXF_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A },
232 { M32RXF_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A },
233 { M32RXF_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A },
234 { M32RXF_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A },
235 { M32RXF_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A },
236 { M32RXF_INSN_PAR_MV, && case_sem_INSN_PAR_MV },
237 { M32RXF_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV },
238 { M32RXF_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A },
239 { M32RXF_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A },
240 { M32RXF_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A },
241 { M32RXF_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A },
242 { M32RXF_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A },
243 { M32RXF_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A },
244 { M32RXF_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC },
245 { M32RXF_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC },
246 { M32RXF_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A },
247 { M32RXF_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A },
248 { M32RXF_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A },
249 { M32RXF_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A },
250 { M32RXF_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC },
251 { M32RXF_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC },
252 { M32RXF_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG },
253 { M32RXF_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG },
254 { M32RXF_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP },
255 { M32RXF_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP },
256 { M32RXF_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT },
257 { M32RXF_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT },
258 { M32RXF_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI },
259 { M32RXF_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI },
260 { M32RXF_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI },
261 { M32RXF_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI },
262 { M32RXF_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE },
263 { M32RXF_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE },
264 { M32RXF_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL },
265 { M32RXF_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL },
266 { M32RXF_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI },
267 { M32RXF_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI },
268 { M32RXF_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA },
269 { M32RXF_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA },
270 { M32RXF_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI },
271 { M32RXF_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI },
272 { M32RXF_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL },
273 { M32RXF_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL },
274 { M32RXF_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI },
275 { M32RXF_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI },
276 { M32RXF_INSN_PAR_ST, && case_sem_INSN_PAR_ST },
277 { M32RXF_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST },
278 { M32RXF_INSN_PAR_STB, && case_sem_INSN_PAR_STB },
279 { M32RXF_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB },
280 { M32RXF_INSN_PAR_STH, && case_sem_INSN_PAR_STH },
281 { M32RXF_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH },
282 { M32RXF_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS },
283 { M32RXF_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS },
284 { M32RXF_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS },
285 { M32RXF_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS },
286 { M32RXF_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB },
287 { M32RXF_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB },
288 { M32RXF_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV },
289 { M32RXF_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV },
290 { M32RXF_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX },
291 { M32RXF_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX },
292 { M32RXF_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP },
293 { M32RXF_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP },
294 { M32RXF_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK },
295 { M32RXF_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK },
296 { M32RXF_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ },
297 { M32RXF_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ },
298 { M32RXF_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD },
299 { M32RXF_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD },
300 { M32RXF_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 },
301 { M32RXF_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 },
302 { M32RXF_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO },
303 { M32RXF_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO },
304 { M32RXF_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 },
305 { M32RXF_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 },
306 { M32RXF_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 },
307 { M32RXF_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 },
308 { M32RXF_INSN_PAR_SC, && case_sem_INSN_PAR_SC },
309 { M32RXF_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC },
310 { M32RXF_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC },
311 { M32RXF_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC },
312 { 0, 0 }
313 };
314 int i;
315
316 for (i = 0; labels[i].label != 0; ++i)
317 {
318#if FAST_P
319 CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
320#else
321 CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
322#endif
323 }
324
325#undef DEFINE_LABELS
326#endif /* DEFINE_LABELS */
327
328#ifdef DEFINE_SWITCH
329
330/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
331 off frills like tracing and profiling. */
332/* FIXME: A better way would be to have TRACE_RESULT check for something
333 that can cause it to be optimized out. Another way would be to emit
334 special handlers into the instruction "stream". */
335
336#if FAST_P
337#undef TRACE_RESULT
338#define TRACE_RESULT(cpu, abuf, name, type, val)
339#endif
340
341#undef GET_ATTR
342#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
343
344{
345
346#if WITH_SCACHE_PBB
347
348/* Branch to next handler without going around main loop. */
349#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
350SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
351
352#else /* ! WITH_SCACHE_PBB */
353
354#define NEXT(vpc) BREAK (sem)
355#ifdef __GNUC__
356#if FAST_P
357 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
358#else
359 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
360#endif
361#else
362 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
363#endif
364
365#endif /* ! WITH_SCACHE_PBB */
366
367 {
368
369 CASE (sem, INSN_X_INVALID) : /* --invalid-- */
370{
371 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
372 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
373#define FLD(f) abuf->fields.fmt_empty.f
374 int UNUSED written = 0;
375 IADDR UNUSED pc = abuf->addr;
376 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
377
378 {
379 /* Update the recorded pc in the cpu state struct.
380 Only necessary for WITH_SCACHE case, but to avoid the
381 conditional compilation .... */
382 SET_H_PC (pc);
383 /* Virtual insns have zero size. Overwrite vpc with address of next insn
384 using the default-insn-bitsize spec. When executing insns in parallel
385 we may want to queue the fault and continue execution. */
386 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
387 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
388 }
389
390#undef FLD
391}
392 NEXT (vpc);
393
394 CASE (sem, INSN_X_AFTER) : /* --after-- */
395{
396 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
397 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
398#define FLD(f) abuf->fields.fmt_empty.f
399 int UNUSED written = 0;
400 IADDR UNUSED pc = abuf->addr;
401 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
402
403 {
404#if WITH_SCACHE_PBB_M32RXF
405 m32rxf_pbb_after (current_cpu, sem_arg);
406#endif
407 }
408
409#undef FLD
410}
411 NEXT (vpc);
412
413 CASE (sem, INSN_X_BEFORE) : /* --before-- */
414{
415 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
416 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
417#define FLD(f) abuf->fields.fmt_empty.f
418 int UNUSED written = 0;
419 IADDR UNUSED pc = abuf->addr;
420 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
421
422 {
423#if WITH_SCACHE_PBB_M32RXF
424 m32rxf_pbb_before (current_cpu, sem_arg);
425#endif
426 }
427
428#undef FLD
429}
430 NEXT (vpc);
431
432 CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
433{
434 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
435 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
436#define FLD(f) abuf->fields.fmt_empty.f
437 int UNUSED written = 0;
438 IADDR UNUSED pc = abuf->addr;
439 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
440
441 {
442#if WITH_SCACHE_PBB_M32RXF
443#ifdef DEFINE_SWITCH
444 vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
445 pbb_br_type, pbb_br_npc);
446 BREAK (sem);
447#else
448 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
449 vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
450 CPU_PBB_BR_TYPE (current_cpu),
451 CPU_PBB_BR_NPC (current_cpu));
452#endif
453#endif
454 }
455
456#undef FLD
457}
458 NEXT (vpc);
459
460 CASE (sem, INSN_X_CHAIN) : /* --chain-- */
461{
462 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
463 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
464#define FLD(f) abuf->fields.fmt_empty.f
465 int UNUSED written = 0;
466 IADDR UNUSED pc = abuf->addr;
467 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
468
469 {
470#if WITH_SCACHE_PBB_M32RXF
471 vpc = m32rxf_pbb_chain (current_cpu, sem_arg);
472#ifdef DEFINE_SWITCH
473 BREAK (sem);
474#endif
475#endif
476 }
477
478#undef FLD
479}
480 NEXT (vpc);
481
482 CASE (sem, INSN_X_BEGIN) : /* --begin-- */
483{
484 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
485 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
486#define FLD(f) abuf->fields.fmt_empty.f
487 int UNUSED written = 0;
488 IADDR UNUSED pc = abuf->addr;
489 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
490
491 {
492#if WITH_SCACHE_PBB_M32RXF
fb27a91c 493#if defined DEFINE_SWITCH || defined FAST_P
2df3850c
JM		 494 /* In the switch case FAST_P is a constant, allowing several optimizations
495 in any called inline functions. */
496 vpc = m32rxf_pbb_begin (current_cpu, FAST_P);
497#else
fb27a91c 498#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
2df3850c 499 vpc = m32rxf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
fb27a91c
DB		 500#else
501 vpc = m32rxf_pbb_begin (current_cpu, 0);
502#endif
2df3850c
JM		 503#endif
504#endif
505 }
506
507#undef FLD
508}
509 NEXT (vpc);
510
511 CASE (sem, INSN_ADD) : /* add $dr,$sr */
512{
513 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
514 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
515#define FLD(f) abuf->fields.sfmt_add.f
516 int UNUSED written = 0;
517 IADDR UNUSED pc = abuf->addr;
518 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
519
520 {
521 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
522 * FLD (i_dr) = opval;
523 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
524 }
525
526#undef FLD
527}
528 NEXT (vpc);
529
530 CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
531{
532 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
533 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
534#define FLD(f) abuf->fields.sfmt_add3.f
535 int UNUSED written = 0;
536 IADDR UNUSED pc = abuf->addr;
537 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
538
539 {
540 SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
541 * FLD (i_dr) = opval;
542 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
543 }
544
545#undef FLD
546}
547 NEXT (vpc);
548
549 CASE (sem, INSN_AND) : /* and $dr,$sr */
550{
551 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
552 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
553#define FLD(f) abuf->fields.sfmt_add.f
554 int UNUSED written = 0;
555 IADDR UNUSED pc = abuf->addr;
556 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
557
558 {
559 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
560 * FLD (i_dr) = opval;
561 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
562 }
563
564#undef FLD
565}
566 NEXT (vpc);
567
568 CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
569{
570 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
571 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
572#define FLD(f) abuf->fields.sfmt_and3.f
573 int UNUSED written = 0;
574 IADDR UNUSED pc = abuf->addr;
575 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
576
577 {
578 SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
579 * FLD (i_dr) = opval;
580 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
581 }
582
583#undef FLD
584}
585 NEXT (vpc);
586
587 CASE (sem, INSN_OR) : /* or $dr,$sr */
588{
589 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
590 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
591#define FLD(f) abuf->fields.sfmt_add.f
592 int UNUSED written = 0;
593 IADDR UNUSED pc = abuf->addr;
594 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
595
596 {
597 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
598 * FLD (i_dr) = opval;
599 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
600 }
601
602#undef FLD
603}
604 NEXT (vpc);
605
606 CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
607{
608 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
609 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
610#define FLD(f) abuf->fields.sfmt_and3.f
611 int UNUSED written = 0;
612 IADDR UNUSED pc = abuf->addr;
613 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
614
615 {
616 SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
617 * FLD (i_dr) = opval;
618 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
619 }
620
621#undef FLD
622}
623 NEXT (vpc);
624
625 CASE (sem, INSN_XOR) : /* xor $dr,$sr */
626{
627 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
628 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
629#define FLD(f) abuf->fields.sfmt_add.f
630 int UNUSED written = 0;
631 IADDR UNUSED pc = abuf->addr;
632 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
633
634 {
635 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
636 * FLD (i_dr) = opval;
637 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
638 }
639
640#undef FLD
641}
642 NEXT (vpc);
643
644 CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
645{
646 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
647 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
648#define FLD(f) abuf->fields.sfmt_and3.f
649 int UNUSED written = 0;
650 IADDR UNUSED pc = abuf->addr;
651 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
652
653 {
654 SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
655 * FLD (i_dr) = opval;
656 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
657 }
658
659#undef FLD
660}
661 NEXT (vpc);
662
663 CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
664{
665 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
666 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
667#define FLD(f) abuf->fields.sfmt_addi.f
668 int UNUSED written = 0;
669 IADDR UNUSED pc = abuf->addr;
670 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
671
672 {
673 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
674 * FLD (i_dr) = opval;
675 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
676 }
677
678#undef FLD
679}
680 NEXT (vpc);
681
682 CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
683{
684 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
685 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
686#define FLD(f) abuf->fields.sfmt_add.f
687 int UNUSED written = 0;
688 IADDR UNUSED pc = abuf->addr;
689 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
690
691{
692 SI temp0;BI temp1;
693 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
694 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
695 {
696 SI opval = temp0;
697 * FLD (i_dr) = opval;
698 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
699 }
700 {
701 BI opval = temp1;
702 CPU (h_cond) = opval;
703 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
704 }
705}
706
707#undef FLD
708}
709 NEXT (vpc);
710
711 CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
712{
713 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
714 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
715#define FLD(f) abuf->fields.sfmt_add3.f
716 int UNUSED written = 0;
717 IADDR UNUSED pc = abuf->addr;
718 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
719
720{
721 SI temp0;BI temp1;
722 temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
723 temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
724 {
725 SI opval = temp0;
726 * FLD (i_dr) = opval;
727 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
728 }
729 {
730 BI opval = temp1;
731 CPU (h_cond) = opval;
732 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
733 }
734}
735
736#undef FLD
737}
738 NEXT (vpc);
739
740 CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
741{
742 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
743 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
744#define FLD(f) abuf->fields.sfmt_add.f
745 int UNUSED written = 0;
746 IADDR UNUSED pc = abuf->addr;
747 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
748
749{
750 SI temp0;BI temp1;
751 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
752 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
753 {
754 SI opval = temp0;
755 * FLD (i_dr) = opval;
756 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
757 }
758 {
759 BI opval = temp1;
760 CPU (h_cond) = opval;
761 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
762 }
763}
764
765#undef FLD
766}
767 NEXT (vpc);
768
769 CASE (sem, INSN_BC8) : /* bc.s $disp8 */
770{
771 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
772 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
773#define FLD(f) abuf->fields.sfmt_bl8.f
774 int UNUSED written = 0;
775 IADDR UNUSED pc = abuf->addr;
776 SEM_BRANCH_INIT
777 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
778
779if (CPU (h_cond)) {
780 {
781 USI opval = FLD (i_disp8);
782 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
783 written |= (1 << 2);
784 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
785 }
786}
787
788 abuf->written = written;
789 SEM_BRANCH_FINI (vpc);
790#undef FLD
791}
792 NEXT (vpc);
793
794 CASE (sem, INSN_BC24) : /* bc.l $disp24 */
795{
796 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
797 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
798#define FLD(f) abuf->fields.sfmt_bl24.f
799 int UNUSED written = 0;
800 IADDR UNUSED pc = abuf->addr;
801 SEM_BRANCH_INIT
802 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
803
804if (CPU (h_cond)) {
805 {
806 USI opval = FLD (i_disp24);
807 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
808 written |= (1 << 2);
809 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
810 }
811}
812
813 abuf->written = written;
814 SEM_BRANCH_FINI (vpc);
815#undef FLD
816}
817 NEXT (vpc);
818
819 CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
820{
821 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
822 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
823#define FLD(f) abuf->fields.sfmt_beq.f
824 int UNUSED written = 0;
825 IADDR UNUSED pc = abuf->addr;
826 SEM_BRANCH_INIT
827 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
828
829if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
830 {
831 USI opval = FLD (i_disp16);
832 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
833 written |= (1 << 3);
834 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
835 }
836}
837
838 abuf->written = written;
839 SEM_BRANCH_FINI (vpc);
840#undef FLD
841}
842 NEXT (vpc);
843
844 CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
845{
846 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
847 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
848#define FLD(f) abuf->fields.sfmt_beq.f
849 int UNUSED written = 0;
850 IADDR UNUSED pc = abuf->addr;
851 SEM_BRANCH_INIT
852 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
853
854if (EQSI (* FLD (i_src2), 0)) {
855 {
856 USI opval = FLD (i_disp16);
857 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
858 written |= (1 << 2);
859 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
860 }
861}
862
863 abuf->written = written;
864 SEM_BRANCH_FINI (vpc);
865#undef FLD
866}
867 NEXT (vpc);
868
869 CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
870{
871 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
872 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
873#define FLD(f) abuf->fields.sfmt_beq.f
874 int UNUSED written = 0;
875 IADDR UNUSED pc = abuf->addr;
876 SEM_BRANCH_INIT
877 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
878
879if (GESI (* FLD (i_src2), 0)) {
880 {
881 USI opval = FLD (i_disp16);
882 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
883 written |= (1 << 2);
884 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
885 }
886}
887
888 abuf->written = written;
889 SEM_BRANCH_FINI (vpc);
890#undef FLD
891}
892 NEXT (vpc);
893
894 CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
895{
896 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
897 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
898#define FLD(f) abuf->fields.sfmt_beq.f
899 int UNUSED written = 0;
900 IADDR UNUSED pc = abuf->addr;
901 SEM_BRANCH_INIT
902 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
903
904if (GTSI (* FLD (i_src2), 0)) {
905 {
906 USI opval = FLD (i_disp16);
907 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
908 written |= (1 << 2);
909 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
910 }
911}
912
913 abuf->written = written;
914 SEM_BRANCH_FINI (vpc);
915#undef FLD
916}
917 NEXT (vpc);
918
919 CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
920{
921 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
922 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
923#define FLD(f) abuf->fields.sfmt_beq.f
924 int UNUSED written = 0;
925 IADDR UNUSED pc = abuf->addr;
926 SEM_BRANCH_INIT
927 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
928
929if (LESI (* FLD (i_src2), 0)) {
930 {
931 USI opval = FLD (i_disp16);
932 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
933 written |= (1 << 2);
934 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
935 }
936}
937
938 abuf->written = written;
939 SEM_BRANCH_FINI (vpc);
940#undef FLD
941}
942 NEXT (vpc);
943
944 CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
945{
946 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
947 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
948#define FLD(f) abuf->fields.sfmt_beq.f
949 int UNUSED written = 0;
950 IADDR UNUSED pc = abuf->addr;
951 SEM_BRANCH_INIT
952 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
953
954if (LTSI (* FLD (i_src2), 0)) {
955 {
956 USI opval = FLD (i_disp16);
957 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
958 written |= (1 << 2);
959 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
960 }
961}
962
963 abuf->written = written;
964 SEM_BRANCH_FINI (vpc);
965#undef FLD
966}
967 NEXT (vpc);
968
969 CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
970{
971 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
972 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
973#define FLD(f) abuf->fields.sfmt_beq.f
974 int UNUSED written = 0;
975 IADDR UNUSED pc = abuf->addr;
976 SEM_BRANCH_INIT
977 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
978
979if (NESI (* FLD (i_src2), 0)) {
980 {
981 USI opval = FLD (i_disp16);
982 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
983 written |= (1 << 2);
984 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
985 }
986}
987
988 abuf->written = written;
989 SEM_BRANCH_FINI (vpc);
990#undef FLD
991}
992 NEXT (vpc);
993
994 CASE (sem, INSN_BL8) : /* bl.s $disp8 */
995{
996 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
997 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
998#define FLD(f) abuf->fields.sfmt_bl8.f
999 int UNUSED written = 0;
1000 IADDR UNUSED pc = abuf->addr;
1001 SEM_BRANCH_INIT
1002 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1003
1004{
1005 {
1006 SI opval = ADDSI (ANDSI (pc, -4), 4);
1007 CPU (h_gr[((UINT) 14)]) = opval;
1008 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1009 }
1010 {
1011 USI opval = FLD (i_disp8);
1012 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1013 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1014 }
1015}
1016
1017 SEM_BRANCH_FINI (vpc);
1018#undef FLD
1019}
1020 NEXT (vpc);
1021
1022 CASE (sem, INSN_BL24) : /* bl.l $disp24 */
1023{
1024 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1025 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1026#define FLD(f) abuf->fields.sfmt_bl24.f
1027 int UNUSED written = 0;
1028 IADDR UNUSED pc = abuf->addr;
1029 SEM_BRANCH_INIT
1030 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1031
1032{
1033 {
1034 SI opval = ADDSI (pc, 4);
1035 CPU (h_gr[((UINT) 14)]) = opval;
1036 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1037 }
1038 {
1039 USI opval = FLD (i_disp24);
1040 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1041 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1042 }
1043}
1044
1045 SEM_BRANCH_FINI (vpc);
1046#undef FLD
1047}
1048 NEXT (vpc);
1049
1050 CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */
1051{
1052 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1053 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1054#define FLD(f) abuf->fields.sfmt_bl8.f
1055 int UNUSED written = 0;
1056 IADDR UNUSED pc = abuf->addr;
1057 SEM_BRANCH_INIT
1058 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1059
1060if (CPU (h_cond)) {
1061{
1062 {
1063 SI opval = ADDSI (ANDSI (pc, -4), 4);
1064 CPU (h_gr[((UINT) 14)]) = opval;
1065 written |= (1 << 3);
1066 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1067 }
1068 {
1069 USI opval = FLD (i_disp8);
1070 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1071 written |= (1 << 4);
1072 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1073 }
1074}
1075}
1076
1077 abuf->written = written;
1078 SEM_BRANCH_FINI (vpc);
1079#undef FLD
1080}
1081 NEXT (vpc);
1082
1083 CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */
1084{
1085 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1086 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1087#define FLD(f) abuf->fields.sfmt_bl24.f
1088 int UNUSED written = 0;
1089 IADDR UNUSED pc = abuf->addr;
1090 SEM_BRANCH_INIT
1091 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1092
1093if (CPU (h_cond)) {
1094{
1095 {
1096 SI opval = ADDSI (pc, 4);
1097 CPU (h_gr[((UINT) 14)]) = opval;
1098 written |= (1 << 3);
1099 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1100 }
1101 {
1102 USI opval = FLD (i_disp24);
1103 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1104 written |= (1 << 4);
1105 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1106 }
1107}
1108}
1109
1110 abuf->written = written;
1111 SEM_BRANCH_FINI (vpc);
1112#undef FLD
1113}
1114 NEXT (vpc);
1115
1116 CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
1117{
1118 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1119 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1120#define FLD(f) abuf->fields.sfmt_bl8.f
1121 int UNUSED written = 0;
1122 IADDR UNUSED pc = abuf->addr;
1123 SEM_BRANCH_INIT
1124 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1125
1126if (NOTBI (CPU (h_cond))) {
1127 {
1128 USI opval = FLD (i_disp8);
1129 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1130 written |= (1 << 2);
1131 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1132 }
1133}
1134
1135 abuf->written = written;
1136 SEM_BRANCH_FINI (vpc);
1137#undef FLD
1138}
1139 NEXT (vpc);
1140
1141 CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
1142{
1143 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1144 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1145#define FLD(f) abuf->fields.sfmt_bl24.f
1146 int UNUSED written = 0;
1147 IADDR UNUSED pc = abuf->addr;
1148 SEM_BRANCH_INIT
1149 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1150
1151if (NOTBI (CPU (h_cond))) {
1152 {
1153 USI opval = FLD (i_disp24);
1154 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1155 written |= (1 << 2);
1156 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1157 }
1158}
1159
1160 abuf->written = written;
1161 SEM_BRANCH_FINI (vpc);
1162#undef FLD
1163}
1164 NEXT (vpc);
1165
1166 CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
1167{
1168 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1169 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1170#define FLD(f) abuf->fields.sfmt_beq.f
1171 int UNUSED written = 0;
1172 IADDR UNUSED pc = abuf->addr;
1173 SEM_BRANCH_INIT
1174 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1175
1176if (NESI (* FLD (i_src1), * FLD (i_src2))) {
1177 {
1178 USI opval = FLD (i_disp16);
1179 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1180 written |= (1 << 3);
1181 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1182 }
1183}
1184
1185 abuf->written = written;
1186 SEM_BRANCH_FINI (vpc);
1187#undef FLD
1188}
1189 NEXT (vpc);
1190
1191 CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
1192{
1193 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1194 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1195#define FLD(f) abuf->fields.sfmt_bl8.f
1196 int UNUSED written = 0;
1197 IADDR UNUSED pc = abuf->addr;
1198 SEM_BRANCH_INIT
1199 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1200
1201 {
1202 USI opval = FLD (i_disp8);
1203 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1204 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1205 }
1206
1207 SEM_BRANCH_FINI (vpc);
1208#undef FLD
1209}
1210 NEXT (vpc);
1211
1212 CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
1213{
1214 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1215 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1216#define FLD(f) abuf->fields.sfmt_bl24.f
1217 int UNUSED written = 0;
1218 IADDR UNUSED pc = abuf->addr;
1219 SEM_BRANCH_INIT
1220 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1221
1222 {
1223 USI opval = FLD (i_disp24);
1224 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1225 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1226 }
1227
1228 SEM_BRANCH_FINI (vpc);
1229#undef FLD
1230}
1231 NEXT (vpc);
1232
1233 CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */
1234{
1235 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1236 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1237#define FLD(f) abuf->fields.sfmt_bl8.f
1238 int UNUSED written = 0;
1239 IADDR UNUSED pc = abuf->addr;
1240 SEM_BRANCH_INIT
1241 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1242
1243if (NOTBI (CPU (h_cond))) {
1244{
1245 {
1246 SI opval = ADDSI (ANDSI (pc, -4), 4);
1247 CPU (h_gr[((UINT) 14)]) = opval;
1248 written |= (1 << 3);
1249 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1250 }
1251 {
1252 USI opval = FLD (i_disp8);
1253 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1254 written |= (1 << 4);
1255 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1256 }
1257}
1258}
1259
1260 abuf->written = written;
1261 SEM_BRANCH_FINI (vpc);
1262#undef FLD
1263}
1264 NEXT (vpc);
1265
1266 CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */
1267{
1268 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1269 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1270#define FLD(f) abuf->fields.sfmt_bl24.f
1271 int UNUSED written = 0;
1272 IADDR UNUSED pc = abuf->addr;
1273 SEM_BRANCH_INIT
1274 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1275
1276if (NOTBI (CPU (h_cond))) {
1277{
1278 {
1279 SI opval = ADDSI (pc, 4);
1280 CPU (h_gr[((UINT) 14)]) = opval;
1281 written |= (1 << 3);
1282 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1283 }
1284 {
1285 USI opval = FLD (i_disp24);
1286 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1287 written |= (1 << 4);
1288 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1289 }
1290}
1291}
1292
1293 abuf->written = written;
1294 SEM_BRANCH_FINI (vpc);
1295#undef FLD
1296}
1297 NEXT (vpc);
1298
1299 CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
1300{
1301 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1302 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1303#define FLD(f) abuf->fields.sfmt_st_plus.f
1304 int UNUSED written = 0;
1305 IADDR UNUSED pc = abuf->addr;
1306 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1307
1308 {
1309 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
1310 CPU (h_cond) = opval;
1311 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1312 }
1313
1314#undef FLD
1315}
1316 NEXT (vpc);
1317
1318 CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
1319{
1320 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1321 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1322#define FLD(f) abuf->fields.sfmt_st_d.f
1323 int UNUSED written = 0;
1324 IADDR UNUSED pc = abuf->addr;
1325 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1326
1327 {
1328 BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
1329 CPU (h_cond) = opval;
1330 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1331 }
1332
1333#undef FLD
1334}
1335 NEXT (vpc);
1336
1337 CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
1338{
1339 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1340 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1341#define FLD(f) abuf->fields.sfmt_st_plus.f
1342 int UNUSED written = 0;
1343 IADDR UNUSED pc = abuf->addr;
1344 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1345
1346 {
1347 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
1348 CPU (h_cond) = opval;
1349 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1350 }
1351
1352#undef FLD
1353}
1354 NEXT (vpc);
1355
1356 CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
1357{
1358 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1359 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1360#define FLD(f) abuf->fields.sfmt_st_d.f
1361 int UNUSED written = 0;
1362 IADDR UNUSED pc = abuf->addr;
1363 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1364
1365 {
1366 BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
1367 CPU (h_cond) = opval;
1368 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1369 }
1370
1371#undef FLD
1372}
1373 NEXT (vpc);
1374
1375 CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */
1376{
1377 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1378 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1379#define FLD(f) abuf->fields.sfmt_st_plus.f
1380 int UNUSED written = 0;
1381 IADDR UNUSED pc = abuf->addr;
1382 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1383
1384 {
1385 BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
1386 CPU (h_cond) = opval;
1387 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1388 }
1389
1390#undef FLD
1391}
1392 NEXT (vpc);
1393
1394 CASE (sem, INSN_CMPZ) : /* cmpz $src2 */
1395{
1396 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1397 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1398#define FLD(f) abuf->fields.sfmt_st_plus.f
1399 int UNUSED written = 0;
1400 IADDR UNUSED pc = abuf->addr;
1401 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1402
1403 {
1404 BI opval = EQSI (* FLD (i_src2), 0);
1405 CPU (h_cond) = opval;
1406 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1407 }
1408
1409#undef FLD
1410}
1411 NEXT (vpc);
1412
1413 CASE (sem, INSN_DIV) : /* div $dr,$sr */
1414{
1415 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1416 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1417#define FLD(f) abuf->fields.sfmt_add.f
1418 int UNUSED written = 0;
1419 IADDR UNUSED pc = abuf->addr;
1420 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1421
1422if (NESI (* FLD (i_sr), 0)) {
1423 {
1424 SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1425 * FLD (i_dr) = opval;
1426 written |= (1 << 2);
1427 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1428 }
1429}
1430
1431 abuf->written = written;
1432#undef FLD
1433}
1434 NEXT (vpc);
1435
1436 CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
1437{
1438 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1439 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1440#define FLD(f) abuf->fields.sfmt_add.f
1441 int UNUSED written = 0;
1442 IADDR UNUSED pc = abuf->addr;
1443 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1444
1445if (NESI (* FLD (i_sr), 0)) {
1446 {
1447 SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1448 * FLD (i_dr) = opval;
1449 written |= (1 << 2);
1450 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1451 }
1452}
1453
1454 abuf->written = written;
1455#undef FLD
1456}
1457 NEXT (vpc);
1458
1459 CASE (sem, INSN_REM) : /* rem $dr,$sr */
1460{
1461 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1462 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1463#define FLD(f) abuf->fields.sfmt_add.f
1464 int UNUSED written = 0;
1465 IADDR UNUSED pc = abuf->addr;
1466 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1467
1468if (NESI (* FLD (i_sr), 0)) {
1469 {
1470 SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1471 * FLD (i_dr) = opval;
1472 written |= (1 << 2);
1473 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1474 }
1475}
1476
1477 abuf->written = written;
1478#undef FLD
1479}
1480 NEXT (vpc);
1481
1482 CASE (sem, INSN_REMU) : /* remu $dr,$sr */
1483{
1484 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1485 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1486#define FLD(f) abuf->fields.sfmt_add.f
1487 int UNUSED written = 0;
1488 IADDR UNUSED pc = abuf->addr;
1489 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1490
1491if (NESI (* FLD (i_sr), 0)) {
1492 {
1493 SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1494 * FLD (i_dr) = opval;
1495 written |= (1 << 2);
1496 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1497 }
1498}
1499
1500 abuf->written = written;
1501#undef FLD
1502}
1503 NEXT (vpc);
1504
1505 CASE (sem, INSN_DIVH) : /* divh $dr,$sr */
1506{
1507 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1508 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1509#define FLD(f) abuf->fields.sfmt_add.f
1510 int UNUSED written = 0;
1511 IADDR UNUSED pc = abuf->addr;
1512 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1513
1514if (NESI (* FLD (i_sr), 0)) {
1515 {
1516 SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
1517 * FLD (i_dr) = opval;
1518 written |= (1 << 2);
1519 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1520 }
1521}
1522
1523 abuf->written = written;
1524#undef FLD
1525}
1526 NEXT (vpc);
1527
1528 CASE (sem, INSN_JC) : /* jc $sr */
1529{
1530 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1531 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
de8f5985 1532#define FLD(f) abuf->fields.sfmt_jl.f
2df3850c
JM		 1533 int UNUSED written = 0;
1534 IADDR UNUSED pc = abuf->addr;
1535 SEM_BRANCH_INIT
1536 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1537
1538if (CPU (h_cond)) {
1539 {
1540 USI opval = ANDSI (* FLD (i_sr), -4);
1541 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1542 written |= (1 << 2);
1543 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1544 }
1545}
1546
1547 abuf->written = written;
1548 SEM_BRANCH_FINI (vpc);
1549#undef FLD
1550}
1551 NEXT (vpc);
1552
1553 CASE (sem, INSN_JNC) : /* jnc $sr */
1554{
1555 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1556 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
de8f5985 1557#define FLD(f) abuf->fields.sfmt_jl.f
2df3850c
JM		 1558 int UNUSED written = 0;
1559 IADDR UNUSED pc = abuf->addr;
1560 SEM_BRANCH_INIT
1561 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1562
1563if (NOTBI (CPU (h_cond))) {
1564 {
1565 USI opval = ANDSI (* FLD (i_sr), -4);
1566 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1567 written |= (1 << 2);
1568 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1569 }
1570}
1571
1572 abuf->written = written;
1573 SEM_BRANCH_FINI (vpc);
1574#undef FLD
1575}
1576 NEXT (vpc);
1577
1578 CASE (sem, INSN_JL) : /* jl $sr */
1579{
1580 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1581 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1582#define FLD(f) abuf->fields.sfmt_jl.f
1583 int UNUSED written = 0;
1584 IADDR UNUSED pc = abuf->addr;
1585 SEM_BRANCH_INIT
1586 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1587
1588{
1589 SI temp0;USI temp1;
1590 temp0 = ADDSI (ANDSI (pc, -4), 4);
1591 temp1 = ANDSI (* FLD (i_sr), -4);
1592 {
1593 SI opval = temp0;
1594 CPU (h_gr[((UINT) 14)]) = opval;
1595 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1596 }
1597 {
1598 USI opval = temp1;
1599 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1600 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1601 }
1602}
1603
1604 SEM_BRANCH_FINI (vpc);
1605#undef FLD
1606}
1607 NEXT (vpc);
1608
1609 CASE (sem, INSN_JMP) : /* jmp $sr */
1610{
1611 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1612 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
de8f5985 1613#define FLD(f) abuf->fields.sfmt_jl.f
2df3850c
JM		 1614 int UNUSED written = 0;
1615 IADDR UNUSED pc = abuf->addr;
1616 SEM_BRANCH_INIT
1617 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1618
1619 {
1620 USI opval = ANDSI (* FLD (i_sr), -4);
1621 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1622 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1623 }
1624
1625 SEM_BRANCH_FINI (vpc);
1626#undef FLD
1627}
1628 NEXT (vpc);
1629
1630 CASE (sem, INSN_LD) : /* ld $dr,@$sr */
1631{
1632 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1633 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1634#define FLD(f) abuf->fields.sfmt_ld_plus.f
1635 int UNUSED written = 0;
1636 IADDR UNUSED pc = abuf->addr;
1637 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1638
1639 {
1640 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1641 * FLD (i_dr) = opval;
1642 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1643 }
1644
1645#undef FLD
1646}
1647 NEXT (vpc);
1648
1649 CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
1650{
1651 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1652 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1653#define FLD(f) abuf->fields.sfmt_add3.f
1654 int UNUSED written = 0;
1655 IADDR UNUSED pc = abuf->addr;
1656 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1657
1658 {
1659 SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1660 * FLD (i_dr) = opval;
1661 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1662 }
1663
1664#undef FLD
1665}
1666 NEXT (vpc);
1667
1668 CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
1669{
1670 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1671 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1672#define FLD(f) abuf->fields.sfmt_ld_plus.f
1673 int UNUSED written = 0;
1674 IADDR UNUSED pc = abuf->addr;
1675 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1676
1677 {
1678 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1679 * FLD (i_dr) = opval;
1680 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1681 }
1682
1683#undef FLD
1684}
1685 NEXT (vpc);
1686
1687 CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
1688{
1689 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1690 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1691#define FLD(f) abuf->fields.sfmt_add3.f
1692 int UNUSED written = 0;
1693 IADDR UNUSED pc = abuf->addr;
1694 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1695
1696 {
1697 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1698 * FLD (i_dr) = opval;
1699 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1700 }
1701
1702#undef FLD
1703}
1704 NEXT (vpc);
1705
1706 CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
1707{
1708 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1709 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1710#define FLD(f) abuf->fields.sfmt_ld_plus.f
1711 int UNUSED written = 0;
1712 IADDR UNUSED pc = abuf->addr;
1713 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1714
1715 {
1716 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1717 * FLD (i_dr) = opval;
1718 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1719 }
1720
1721#undef FLD
1722}
1723 NEXT (vpc);
1724
1725 CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
1726{
1727 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1728 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1729#define FLD(f) abuf->fields.sfmt_add3.f
1730 int UNUSED written = 0;
1731 IADDR UNUSED pc = abuf->addr;
1732 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1733
1734 {
1735 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1736 * FLD (i_dr) = opval;
1737 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1738 }
1739
1740#undef FLD
1741}
1742 NEXT (vpc);
1743
1744 CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
1745{
1746 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1747 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1748#define FLD(f) abuf->fields.sfmt_ld_plus.f
1749 int UNUSED written = 0;
1750 IADDR UNUSED pc = abuf->addr;
1751 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1752
1753 {
1754 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1755 * FLD (i_dr) = opval;
1756 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1757 }
1758
1759#undef FLD
1760}
1761 NEXT (vpc);
1762
1763 CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
1764{
1765 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1766 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1767#define FLD(f) abuf->fields.sfmt_add3.f
1768 int UNUSED written = 0;
1769 IADDR UNUSED pc = abuf->addr;
1770 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1771
1772 {
1773 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1774 * FLD (i_dr) = opval;
1775 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1776 }
1777
1778#undef FLD
1779}
1780 NEXT (vpc);
1781
1782 CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
1783{
1784 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1785 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1786#define FLD(f) abuf->fields.sfmt_ld_plus.f
1787 int UNUSED written = 0;
1788 IADDR UNUSED pc = abuf->addr;
1789 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1790
1791 {
1792 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1793 * FLD (i_dr) = opval;
1794 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1795 }
1796
1797#undef FLD
1798}
1799 NEXT (vpc);
1800
1801 CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
1802{
1803 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1804 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1805#define FLD(f) abuf->fields.sfmt_add3.f
1806 int UNUSED written = 0;
1807 IADDR UNUSED pc = abuf->addr;
1808 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1809
1810 {
1811 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1812 * FLD (i_dr) = opval;
1813 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1814 }
1815
1816#undef FLD
1817}
1818 NEXT (vpc);
1819
1820 CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
1821{
1822 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1823 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1824#define FLD(f) abuf->fields.sfmt_ld_plus.f
1825 int UNUSED written = 0;
1826 IADDR UNUSED pc = abuf->addr;
1827 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1828
1829{
1830 SI temp0;SI temp1;
1831 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1832 temp1 = ADDSI (* FLD (i_sr), 4);
1833 {
1834 SI opval = temp0;
1835 * FLD (i_dr) = opval;
1836 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1837 }
1838 {
1839 SI opval = temp1;
1840 * FLD (i_sr) = opval;
1841 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
1842 }
1843}
1844
1845#undef FLD
1846}
1847 NEXT (vpc);
1848
1849 CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
1850{
1851 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1852 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1853#define FLD(f) abuf->fields.sfmt_ld24.f
1854 int UNUSED written = 0;
1855 IADDR UNUSED pc = abuf->addr;
1856 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1857
1858 {
1859 SI opval = FLD (i_uimm24);
1860 * FLD (i_dr) = opval;
1861 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1862 }
1863
1864#undef FLD
1865}
1866 NEXT (vpc);
1867
1868 CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
1869{
1870 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1871 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1872#define FLD(f) abuf->fields.sfmt_addi.f
1873 int UNUSED written = 0;
1874 IADDR UNUSED pc = abuf->addr;
1875 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1876
1877 {
1878 SI opval = FLD (f_simm8);
1879 * FLD (i_dr) = opval;
1880 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1881 }
1882
1883#undef FLD
1884}
1885 NEXT (vpc);
1886
1887 CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
1888{
1889 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1890 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1891#define FLD(f) abuf->fields.sfmt_add3.f
1892 int UNUSED written = 0;
1893 IADDR UNUSED pc = abuf->addr;
1894 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1895
1896 {
1897 SI opval = FLD (f_simm16);
1898 * FLD (i_dr) = opval;
1899 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1900 }
1901
1902#undef FLD
1903}
1904 NEXT (vpc);
1905
1906 CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
1907{
1908 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1909 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1910#define FLD(f) abuf->fields.sfmt_ld_plus.f
1911 int UNUSED written = 0;
1912 IADDR UNUSED pc = abuf->addr;
1913 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1914
1915{
1916 {
1917 BI opval = 1;
1918 CPU (h_lock) = opval;
1919 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
1920 }
1921 {
1922 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1923 * FLD (i_dr) = opval;
1924 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1925 }
1926}
1927
1928#undef FLD
1929}
1930 NEXT (vpc);
1931
1932 CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */
1933{
1934 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1935 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1936#define FLD(f) abuf->fields.sfmt_machi_a.f
1937 int UNUSED written = 0;
1938 IADDR UNUSED pc = abuf->addr;
1939 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1940
1941 {
1942 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1943 SET_H_ACCUMS (FLD (f_acc), opval);
1944 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
1945 }
1946
1947#undef FLD
1948}
1949 NEXT (vpc);
1950
1951 CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */
1952{
1953 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1954 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1955#define FLD(f) abuf->fields.sfmt_machi_a.f
1956 int UNUSED written = 0;
1957 IADDR UNUSED pc = abuf->addr;
1958 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1959
1960 {
1961 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1962 SET_H_ACCUMS (FLD (f_acc), opval);
1963 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
1964 }
1965
1966#undef FLD
1967}
1968 NEXT (vpc);
1969
1970 CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */
1971{
1972 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1973 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1974#define FLD(f) abuf->fields.sfmt_machi_a.f
1975 int UNUSED written = 0;
1976 IADDR UNUSED pc = abuf->addr;
1977 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1978
1979 {
1980 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
1981 SET_H_ACCUMS (FLD (f_acc), opval);
1982 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
1983 }
1984
1985#undef FLD
1986}
1987 NEXT (vpc);
1988
1989 CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */
1990{
1991 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1992 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1993#define FLD(f) abuf->fields.sfmt_machi_a.f
1994 int UNUSED written = 0;
1995 IADDR UNUSED pc = abuf->addr;
1996 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1997
1998 {
1999 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
2000 SET_H_ACCUMS (FLD (f_acc), opval);
2001 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2002 }
2003
2004#undef FLD
2005}
2006 NEXT (vpc);
2007
2008 CASE (sem, INSN_MUL) : /* mul $dr,$sr */
2009{
2010 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2011 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2012#define FLD(f) abuf->fields.sfmt_add.f
2013 int UNUSED written = 0;
2014 IADDR UNUSED pc = abuf->addr;
2015 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2016
2017 {
2018 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
2019 * FLD (i_dr) = opval;
2020 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2021 }
2022
2023#undef FLD
2024}
2025 NEXT (vpc);
2026
2027 CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */
2028{
2029 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2030 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2031#define FLD(f) abuf->fields.sfmt_machi_a.f
2032 int UNUSED written = 0;
2033 IADDR UNUSED pc = abuf->addr;
2034 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2035
2036 {
2037 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
2038 SET_H_ACCUMS (FLD (f_acc), opval);
2039 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2040 }
2041
2042#undef FLD
2043}
2044 NEXT (vpc);
2045
2046 CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */
2047{
2048 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2049 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2050#define FLD(f) abuf->fields.sfmt_machi_a.f
2051 int UNUSED written = 0;
2052 IADDR UNUSED pc = abuf->addr;
2053 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2054
2055 {
2056 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
2057 SET_H_ACCUMS (FLD (f_acc), opval);
2058 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2059 }
2060
2061#undef FLD
2062}
2063 NEXT (vpc);
2064
2065 CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
2066{
2067 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2068 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2069#define FLD(f) abuf->fields.sfmt_machi_a.f
2070 int UNUSED written = 0;
2071 IADDR UNUSED pc = abuf->addr;
2072 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2073
2074 {
2075 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
2076 SET_H_ACCUMS (FLD (f_acc), opval);
2077 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2078 }
2079
2080#undef FLD
2081}
2082 NEXT (vpc);
2083
2084 CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
2085{
2086 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2087 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2088#define FLD(f) abuf->fields.sfmt_machi_a.f
2089 int UNUSED written = 0;
2090 IADDR UNUSED pc = abuf->addr;
2091 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2092
2093 {
2094 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
2095 SET_H_ACCUMS (FLD (f_acc), opval);
2096 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2097 }
2098
2099#undef FLD
2100}
2101 NEXT (vpc);
2102
2103 CASE (sem, INSN_MV) : /* mv $dr,$sr */
2104{
2105 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2106 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2107#define FLD(f) abuf->fields.sfmt_ld_plus.f
2108 int UNUSED written = 0;
2109 IADDR UNUSED pc = abuf->addr;
2110 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2111
2112 {
2113 SI opval = * FLD (i_sr);
2114 * FLD (i_dr) = opval;
2115 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2116 }
2117
2118#undef FLD
2119}
2120 NEXT (vpc);
2121
2122 CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */
2123{
2124 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2125 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2126#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2127 int UNUSED written = 0;
2128 IADDR UNUSED pc = abuf->addr;
2129 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2130
2131 {
2132 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
2133 * FLD (i_dr) = opval;
2134 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2135 }
2136
2137#undef FLD
2138}
2139 NEXT (vpc);
2140
2141 CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */
2142{
2143 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2144 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2145#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2146 int UNUSED written = 0;
2147 IADDR UNUSED pc = abuf->addr;
2148 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2149
2150 {
2151 SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
2152 * FLD (i_dr) = opval;
2153 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2154 }
2155
2156#undef FLD
2157}
2158 NEXT (vpc);
2159
2160 CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */
2161{
2162 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2163 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2164#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2165 int UNUSED written = 0;
2166 IADDR UNUSED pc = abuf->addr;
2167 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2168
2169 {
2170 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
2171 * FLD (i_dr) = opval;
2172 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2173 }
2174
2175#undef FLD
2176}
2177 NEXT (vpc);
2178
2179 CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
2180{
2181 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2182 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
de8f5985 2183#define FLD(f) abuf->fields.sfmt_ld_plus.f
2df3850c
JM		 2184 int UNUSED written = 0;
2185 IADDR UNUSED pc = abuf->addr;
2186 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2187
2188 {
2189 SI opval = GET_H_CR (FLD (f_r2));
2190 * FLD (i_dr) = opval;
2191 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2192 }
2193
2194#undef FLD
2195}
2196 NEXT (vpc);
2197
2198 CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */
2199{
2200 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2201 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2202#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2203 int UNUSED written = 0;
2204 IADDR UNUSED pc = abuf->addr;
2205 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2206
2207 {
2208 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
2209 SET_H_ACCUMS (FLD (f_accs), opval);
2210 TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
2211 }
2212
2213#undef FLD
2214}
2215 NEXT (vpc);
2216
2217 CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */
2218{
2219 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2220 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2221#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2222 int UNUSED written = 0;
2223 IADDR UNUSED pc = abuf->addr;
2224 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2225
2226 {
2227 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
2228 SET_H_ACCUMS (FLD (f_accs), opval);
2229 TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
2230 }
2231
2232#undef FLD
2233}
2234 NEXT (vpc);
2235
2236 CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
2237{
2238 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2239 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
de8f5985 2240#define FLD(f) abuf->fields.sfmt_ld_plus.f
2df3850c
JM		 2241 int UNUSED written = 0;
2242 IADDR UNUSED pc = abuf->addr;
2243 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2244
2245 {
2246 USI opval = * FLD (i_sr);
2247 SET_H_CR (FLD (f_r1), opval);
2248 TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
2249 }
2250
2251#undef FLD
2252}
2253 NEXT (vpc);
2254
2255 CASE (sem, INSN_NEG) : /* neg $dr,$sr */
2256{
2257 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2258 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2259#define FLD(f) abuf->fields.sfmt_ld_plus.f
2260 int UNUSED written = 0;
2261 IADDR UNUSED pc = abuf->addr;
2262 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2263
2264 {
2265 SI opval = NEGSI (* FLD (i_sr));
2266 * FLD (i_dr) = opval;
2267 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2268 }
2269
2270#undef FLD
2271}
2272 NEXT (vpc);
2273
2274 CASE (sem, INSN_NOP) : /* nop */
2275{
2276 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2277 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2278#define FLD(f) abuf->fields.fmt_empty.f
2279 int UNUSED written = 0;
2280 IADDR UNUSED pc = abuf->addr;
2281 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2282
2283PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
2284
2285#undef FLD
2286}
2287 NEXT (vpc);
2288
2289 CASE (sem, INSN_NOT) : /* not $dr,$sr */
2290{
2291 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2292 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2293#define FLD(f) abuf->fields.sfmt_ld_plus.f
2294 int UNUSED written = 0;
2295 IADDR UNUSED pc = abuf->addr;
2296 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2297
2298 {
2299 SI opval = INVSI (* FLD (i_sr));
2300 * FLD (i_dr) = opval;
2301 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2302 }
2303
2304#undef FLD
2305}
2306 NEXT (vpc);
2307
2308 CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */
2309{
2310 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2311 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2312#define FLD(f) abuf->fields.sfmt_rac_dsi.f
2313 int UNUSED written = 0;
2314 IADDR UNUSED pc = abuf->addr;
2315 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2316
2317{
2318 DI tmp_tmp1;
2319 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2320 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
2321 {
2322 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
2323 SET_H_ACCUMS (FLD (f_accd), opval);
2324 TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
2325 }
2326}
2327
2328#undef FLD
2329}
2330 NEXT (vpc);
2331
2332 CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */
2333{
2334 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2335 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2336#define FLD(f) abuf->fields.sfmt_rac_dsi.f
2337 int UNUSED written = 0;
2338 IADDR UNUSED pc = abuf->addr;
2339 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2340
2341{
2342 DI tmp_tmp1;
2343 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2344 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
2345 {
2346 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
2347 SET_H_ACCUMS (FLD (f_accd), opval);
2348 TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
2349 }
2350}
2351
2352#undef FLD
2353}
2354 NEXT (vpc);
2355
2356 CASE (sem, INSN_RTE) : /* rte */
2357{
2358 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2359 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2360#define FLD(f) abuf->fields.fmt_empty.f
2361 int UNUSED written = 0;
2362 IADDR UNUSED pc = abuf->addr;
2363 SEM_BRANCH_INIT
2364 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2365
2366{
2367 {
2368 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
2369 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2370 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2371 }
2372 {
2373 USI opval = GET_H_CR (((UINT) 14));
2374 SET_H_CR (((UINT) 6), opval);
2375 TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
2376 }
2377 {
2378 UQI opval = CPU (h_bpsw);
2379 SET_H_PSW (opval);
2380 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2381 }
2382 {
2383 UQI opval = CPU (h_bbpsw);
2384 CPU (h_bpsw) = opval;
2385 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2386 }
2387}
2388
2389 SEM_BRANCH_FINI (vpc);
2390#undef FLD
2391}
2392 NEXT (vpc);
2393
2394 CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
2395{
2396 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2397 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2398#define FLD(f) abuf->fields.sfmt_seth.f
2399 int UNUSED written = 0;
2400 IADDR UNUSED pc = abuf->addr;
2401 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2402
2403 {
2404 SI opval = SLLSI (FLD (f_hi16), 16);
2405 * FLD (i_dr) = opval;
2406 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2407 }
2408
2409#undef FLD
2410}
2411 NEXT (vpc);
2412
2413 CASE (sem, INSN_SLL) : /* sll $dr,$sr */
2414{
2415 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2416 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2417#define FLD(f) abuf->fields.sfmt_add.f
2418 int UNUSED written = 0;
2419 IADDR UNUSED pc = abuf->addr;
2420 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2421
2422 {
2423 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2424 * FLD (i_dr) = opval;
2425 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2426 }
2427
2428#undef FLD
2429}
2430 NEXT (vpc);
2431
2432 CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
2433{
2434 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2435 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2436#define FLD(f) abuf->fields.sfmt_add3.f
2437 int UNUSED written = 0;
2438 IADDR UNUSED pc = abuf->addr;
2439 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2440
2441 {
2442 SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2443 * FLD (i_dr) = opval;
2444 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2445 }
2446
2447#undef FLD
2448}
2449 NEXT (vpc);
2450
2451 CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
2452{
2453 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2454 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2455#define FLD(f) abuf->fields.sfmt_slli.f
2456 int UNUSED written = 0;
2457 IADDR UNUSED pc = abuf->addr;
2458 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2459
2460 {
2461 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2462 * FLD (i_dr) = opval;
2463 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2464 }
2465
2466#undef FLD
2467}
2468 NEXT (vpc);
2469
2470 CASE (sem, INSN_SRA) : /* sra $dr,$sr */
2471{
2472 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2473 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2474#define FLD(f) abuf->fields.sfmt_add.f
2475 int UNUSED written = 0;
2476 IADDR UNUSED pc = abuf->addr;
2477 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2478
2479 {
2480 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2481 * FLD (i_dr) = opval;
2482 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2483 }
2484
2485#undef FLD
2486}
2487 NEXT (vpc);
2488
2489 CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
2490{
2491 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2492 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2493#define FLD(f) abuf->fields.sfmt_add3.f
2494 int UNUSED written = 0;
2495 IADDR UNUSED pc = abuf->addr;
2496 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2497
2498 {
2499 SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2500 * FLD (i_dr) = opval;
2501 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2502 }
2503
2504#undef FLD
2505}
2506 NEXT (vpc);
2507
2508 CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
2509{
2510 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2511 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2512#define FLD(f) abuf->fields.sfmt_slli.f
2513 int UNUSED written = 0;
2514 IADDR UNUSED pc = abuf->addr;
2515 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2516
2517 {
2518 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2519 * FLD (i_dr) = opval;
2520 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2521 }
2522
2523#undef FLD
2524}
2525 NEXT (vpc);
2526
2527 CASE (sem, INSN_SRL) : /* srl $dr,$sr */
2528{
2529 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2530 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2531#define FLD(f) abuf->fields.sfmt_add.f
2532 int UNUSED written = 0;
2533 IADDR UNUSED pc = abuf->addr;
2534 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2535
2536 {
2537 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2538 * FLD (i_dr) = opval;
2539 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2540 }
2541
2542#undef FLD
2543}
2544 NEXT (vpc);
2545
2546 CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
2547{
2548 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2549 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2550#define FLD(f) abuf->fields.sfmt_add3.f
2551 int UNUSED written = 0;
2552 IADDR UNUSED pc = abuf->addr;
2553 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2554
2555 {
2556 SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2557 * FLD (i_dr) = opval;
2558 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2559 }
2560
2561#undef FLD
2562}
2563 NEXT (vpc);
2564
2565 CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
2566{
2567 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2568 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2569#define FLD(f) abuf->fields.sfmt_slli.f
2570 int UNUSED written = 0;
2571 IADDR UNUSED pc = abuf->addr;
2572 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2573
2574 {
2575 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2576 * FLD (i_dr) = opval;
2577 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2578 }
2579
2580#undef FLD
2581}
2582 NEXT (vpc);
2583
2584 CASE (sem, INSN_ST) : /* st $src1,@$src2 */
2585{
2586 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2587 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2588#define FLD(f) abuf->fields.sfmt_st_plus.f
2589 int UNUSED written = 0;
2590 IADDR UNUSED pc = abuf->addr;
2591 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2592
2593 {
2594 SI opval = * FLD (i_src1);
2595 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2596 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2597 }
2598
2599#undef FLD
2600}
2601 NEXT (vpc);
2602
2603 CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
2604{
2605 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2606 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2607#define FLD(f) abuf->fields.sfmt_st_d.f
2608 int UNUSED written = 0;
2609 IADDR UNUSED pc = abuf->addr;
2610 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2611
2612 {
2613 SI opval = * FLD (i_src1);
2614 SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2615 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2616 }
2617
2618#undef FLD
2619}
2620 NEXT (vpc);
2621
2622 CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
2623{
2624 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2625 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2626#define FLD(f) abuf->fields.sfmt_st_plus.f
2627 int UNUSED written = 0;
2628 IADDR UNUSED pc = abuf->addr;
2629 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2630
2631 {
2632 QI opval = * FLD (i_src1);
2633 SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2634 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2635 }
2636
2637#undef FLD
2638}
2639 NEXT (vpc);
2640
2641 CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
2642{
2643 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2644 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2645#define FLD(f) abuf->fields.sfmt_st_d.f
2646 int UNUSED written = 0;
2647 IADDR UNUSED pc = abuf->addr;
2648 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2649
2650 {
2651 QI opval = * FLD (i_src1);
2652 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2653 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2654 }
2655
2656#undef FLD
2657}
2658 NEXT (vpc);
2659
2660 CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
2661{
2662 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2663 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2664#define FLD(f) abuf->fields.sfmt_st_plus.f
2665 int UNUSED written = 0;
2666 IADDR UNUSED pc = abuf->addr;
2667 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2668
2669 {
2670 HI opval = * FLD (i_src1);
2671 SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2672 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2673 }
2674
2675#undef FLD
2676}
2677 NEXT (vpc);
2678
2679 CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
2680{
2681 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2682 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2683#define FLD(f) abuf->fields.sfmt_st_d.f
2684 int UNUSED written = 0;
2685 IADDR UNUSED pc = abuf->addr;
2686 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2687
2688 {
2689 HI opval = * FLD (i_src1);
2690 SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2691 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2692 }
2693
2694#undef FLD
2695}
2696 NEXT (vpc);
2697
2698 CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
2699{
2700 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2701 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2702#define FLD(f) abuf->fields.sfmt_st_plus.f
2703 int UNUSED written = 0;
2704 IADDR UNUSED pc = abuf->addr;
2705 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2706
2707{
2708 SI tmp_new_src2;
2709 tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2710 {
2711 SI opval = * FLD (i_src1);
2712 SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2713 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2714 }
2715 {
2716 SI opval = tmp_new_src2;
2717 * FLD (i_src2) = opval;
2718 TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2719 }
2720}
2721
2722#undef FLD
2723}
2724 NEXT (vpc);
2725
2726 CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
2727{
2728 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2729 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2730#define FLD(f) abuf->fields.sfmt_st_plus.f
2731 int UNUSED written = 0;
2732 IADDR UNUSED pc = abuf->addr;
2733 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2734
2735{
2736 SI tmp_new_src2;
2737 tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2738 {
2739 SI opval = * FLD (i_src1);
2740 SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2741 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2742 }
2743 {
2744 SI opval = tmp_new_src2;
2745 * FLD (i_src2) = opval;
2746 TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2747 }
2748}
2749
2750#undef FLD
2751}
2752 NEXT (vpc);
2753
2754 CASE (sem, INSN_SUB) : /* sub $dr,$sr */
2755{
2756 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2757 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2758#define FLD(f) abuf->fields.sfmt_add.f
2759 int UNUSED written = 0;
2760 IADDR UNUSED pc = abuf->addr;
2761 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2762
2763 {
2764 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
2765 * FLD (i_dr) = opval;
2766 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2767 }
2768
2769#undef FLD
2770}
2771 NEXT (vpc);
2772
2773 CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
2774{
2775 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2776 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2777#define FLD(f) abuf->fields.sfmt_add.f
2778 int UNUSED written = 0;
2779 IADDR UNUSED pc = abuf->addr;
2780 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2781
2782{
2783 SI temp0;BI temp1;
2784 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
2785 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
2786 {
2787 SI opval = temp0;
2788 * FLD (i_dr) = opval;
2789 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2790 }
2791 {
2792 BI opval = temp1;
2793 CPU (h_cond) = opval;
2794 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2795 }
2796}
2797
2798#undef FLD
2799}
2800 NEXT (vpc);
2801
2802 CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
2803{
2804 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2805 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2806#define FLD(f) abuf->fields.sfmt_add.f
2807 int UNUSED written = 0;
2808 IADDR UNUSED pc = abuf->addr;
2809 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2810
2811{
2812 SI temp0;BI temp1;
2813 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2814 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2815 {
2816 SI opval = temp0;
2817 * FLD (i_dr) = opval;
2818 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2819 }
2820 {
2821 BI opval = temp1;
2822 CPU (h_cond) = opval;
2823 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2824 }
2825}
2826
2827#undef FLD
2828}
2829 NEXT (vpc);
2830
2831 CASE (sem, INSN_TRAP) : /* trap $uimm4 */
2832{
2833 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2834 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2835#define FLD(f) abuf->fields.sfmt_trap.f
2836 int UNUSED written = 0;
2837 IADDR UNUSED pc = abuf->addr;
2838 SEM_BRANCH_INIT
2839 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2840
2841{
2842 {
2843 USI opval = GET_H_CR (((UINT) 6));
2844 SET_H_CR (((UINT) 14), opval);
2845 TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
2846 }
2847 {
2848 USI opval = ADDSI (pc, 4);
2849 SET_H_CR (((UINT) 6), opval);
2850 TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
2851 }
2852 {
2853 UQI opval = CPU (h_bpsw);
2854 CPU (h_bbpsw) = opval;
2855 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
2856 }
2857 {
2858 UQI opval = GET_H_PSW ();
2859 CPU (h_bpsw) = opval;
2860 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2861 }
2862 {
2863 UQI opval = ANDQI (GET_H_PSW (), 128);
2864 SET_H_PSW (opval);
2865 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2866 }
2867 {
2868 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
2869 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2870 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2871 }
2872}
2873
2874 SEM_BRANCH_FINI (vpc);
2875#undef FLD
2876}
2877 NEXT (vpc);
2878
2879 CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
2880{
2881 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2882 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2883#define FLD(f) abuf->fields.sfmt_st_plus.f
2884 int UNUSED written = 0;
2885 IADDR UNUSED pc = abuf->addr;
2886 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2887
2888{
2889if (CPU (h_lock)) {
2890 {
2891 SI opval = * FLD (i_src1);
2892 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2893 written |= (1 << 4);
2894 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2895 }
2896}
2897 {
2898 BI opval = 0;
2899 CPU (h_lock) = opval;
2900 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
2901 }
2902}
2903
2904 abuf->written = written;
2905#undef FLD
2906}
2907 NEXT (vpc);
2908
2909 CASE (sem, INSN_SATB) : /* satb $dr,$sr */
2910{
2911 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2912 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2913#define FLD(f) abuf->fields.sfmt_ld_plus.f
2914 int UNUSED written = 0;
2915 IADDR UNUSED pc = abuf->addr;
2916 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2917
2918 {
2919 SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr));
2920 * FLD (i_dr) = opval;
2921 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2922 }
2923
2924#undef FLD
2925}
2926 NEXT (vpc);
2927
2928 CASE (sem, INSN_SATH) : /* sath $dr,$sr */
2929{
2930 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2931 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2932#define FLD(f) abuf->fields.sfmt_ld_plus.f
2933 int UNUSED written = 0;
2934 IADDR UNUSED pc = abuf->addr;
2935 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2936
2937 {
2938 SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr));
2939 * FLD (i_dr) = opval;
2940 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2941 }
2942
2943#undef FLD
2944}
2945 NEXT (vpc);
2946
2947 CASE (sem, INSN_SAT) : /* sat $dr,$sr */
2948{
2949 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2950 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2951#define FLD(f) abuf->fields.sfmt_ld_plus.f
2952 int UNUSED written = 0;
2953 IADDR UNUSED pc = abuf->addr;
2954 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2955
2956 {
2957 SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr)));
2958 * FLD (i_dr) = opval;
2959 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2960 }
2961
2962#undef FLD
2963}
2964 NEXT (vpc);
2965
2966 CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */
2967{
2968 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2969 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2970#define FLD(f) abuf->fields.sfmt_st_plus.f
2971 int UNUSED written = 0;
2972 IADDR UNUSED pc = abuf->addr;
2973 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2974
2975 {
2976 BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
2977 CPU (h_cond) = opval;
2978 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2979 }
2980
2981#undef FLD
2982}
2983 NEXT (vpc);
2984
2985 CASE (sem, INSN_SADD) : /* sadd */
2986{
2987 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2988 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2989#define FLD(f) abuf->fields.fmt_empty.f
2990 int UNUSED written = 0;
2991 IADDR UNUSED pc = abuf->addr;
2992 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2993
2994 {
2995 DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
2996 SET_H_ACCUMS (((UINT) 0), opval);
2997 TRACE_RESULT (current_cpu, abuf, "accums-0", 'D', opval);
2998 }
2999
3000#undef FLD
3001}
3002 NEXT (vpc);
3003
3004 CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */
3005{
3006 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3007 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3008#define FLD(f) abuf->fields.sfmt_st_plus.f
3009 int UNUSED written = 0;
3010 IADDR UNUSED pc = abuf->addr;
3011 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3012
3013 {
3014 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
3015 SET_H_ACCUMS (((UINT) 1), opval);
3016 TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
3017 }
3018
3019#undef FLD
3020}
3021 NEXT (vpc);
3022
3023 CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */
3024{
3025 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3026 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3027#define FLD(f) abuf->fields.sfmt_st_plus.f
3028 int UNUSED written = 0;
3029 IADDR UNUSED pc = abuf->addr;
3030 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3031
3032 {
3033 DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
3034 SET_H_ACCUM (opval);
3035 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
3036 }
3037
3038#undef FLD
3039}
3040 NEXT (vpc);
3041
3042 CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */
3043{
3044 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3045 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3046#define FLD(f) abuf->fields.sfmt_st_plus.f
3047 int UNUSED written = 0;
3048 IADDR UNUSED pc = abuf->addr;
3049 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3050
3051 {
3052 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
3053 SET_H_ACCUMS (((UINT) 1), opval);
3054 TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
3055 }
3056
3057#undef FLD
3058}
3059 NEXT (vpc);
3060
3061 CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */
3062{
3063 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3064 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3065#define FLD(f) abuf->fields.sfmt_st_plus.f
3066 int UNUSED written = 0;
3067 IADDR UNUSED pc = abuf->addr;
3068 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3069
3070 {
3071 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
3072 SET_H_ACCUMS (((UINT) 1), opval);
3073 TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
3074 }
3075
3076#undef FLD
3077}
3078 NEXT (vpc);
3079
3080 CASE (sem, INSN_SC) : /* sc */
3081{
3082 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3083 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3084#define FLD(f) abuf->fields.fmt_empty.f
3085 int UNUSED written = 0;
3086 IADDR UNUSED pc = abuf->addr;
3087 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3088
3089if (ZEXTBISI (CPU (h_cond)))
3090 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3091
3092#undef FLD
3093}
3094 NEXT (vpc);
3095
3096 CASE (sem, INSN_SNC) : /* snc */
3097{
3098 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3099 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3100#define FLD(f) abuf->fields.fmt_empty.f
3101 int UNUSED written = 0;
3102 IADDR UNUSED pc = abuf->addr;
3103 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3104
3105if (ZEXTBISI (NOTBI (CPU (h_cond))))
3106 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3107
3108#undef FLD
3109}
3110 NEXT (vpc);
3111
3112 CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */
3113{
3114 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3115 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3116#define FLD(f) abuf->fields.sfmt_add.f
3117#define OPRND(f) par_exec->operands.sfmt_add.f
3118 int UNUSED written = 0;
3119 IADDR UNUSED pc = abuf->addr;
3120 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3121
3122 {
3123 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
3124 OPRND (dr) = opval;
3125 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3126 }
3127
3128#undef OPRND
3129#undef FLD
3130}
3131 NEXT (vpc);
3132
3133CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */
3134 {
3135 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3136 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3137#define FLD(f) abuf->fields.sfmt_add.f
3138#define OPRND(f) par_exec->operands.sfmt_add.f
3139 int UNUSED written = abuf->written;
3140 IADDR UNUSED pc = abuf->addr;
3141 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3142
3143 * FLD (i_dr) = OPRND (dr);
3144
3145#undef OPRND
3146#undef FLD
3147 }
3148 NEXT (vpc);
3149
3150 CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */
3151{
3152 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3153 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3154#define FLD(f) abuf->fields.sfmt_add.f
3155#define OPRND(f) par_exec->operands.sfmt_add.f
3156 int UNUSED written = 0;
3157 IADDR UNUSED pc = abuf->addr;
3158 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3159
3160 {
3161 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
3162 OPRND (dr) = opval;
3163 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3164 }
3165
3166#undef OPRND
3167#undef FLD
3168}
3169 NEXT (vpc);
3170
3171CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */
3172 {
3173 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3174 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3175#define FLD(f) abuf->fields.sfmt_add.f
3176#define OPRND(f) par_exec->operands.sfmt_add.f
3177 int UNUSED written = abuf->written;
3178 IADDR UNUSED pc = abuf->addr;
3179 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3180
3181 * FLD (i_dr) = OPRND (dr);
3182
3183#undef OPRND
3184#undef FLD
3185 }
3186 NEXT (vpc);
3187
3188 CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */
3189{
3190 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3191 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3192#define FLD(f) abuf->fields.sfmt_add.f
3193#define OPRND(f) par_exec->operands.sfmt_add.f
3194 int UNUSED written = 0;
3195 IADDR UNUSED pc = abuf->addr;
3196 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3197
3198 {
3199 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
3200 OPRND (dr) = opval;
3201 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3202 }
3203
3204#undef OPRND
3205#undef FLD
3206}
3207 NEXT (vpc);
3208
3209CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */
3210 {
3211 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3212 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3213#define FLD(f) abuf->fields.sfmt_add.f
3214#define OPRND(f) par_exec->operands.sfmt_add.f
3215 int UNUSED written = abuf->written;
3216 IADDR UNUSED pc = abuf->addr;
3217 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3218
3219 * FLD (i_dr) = OPRND (dr);
3220
3221#undef OPRND
3222#undef FLD
3223 }
3224 NEXT (vpc);
3225
3226 CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */
3227{
3228 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3229 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3230#define FLD(f) abuf->fields.sfmt_add.f
3231#define OPRND(f) par_exec->operands.sfmt_add.f
3232 int UNUSED written = 0;
3233 IADDR UNUSED pc = abuf->addr;
3234 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3235
3236 {
3237 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
3238 OPRND (dr) = opval;
3239 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3240 }
3241
3242#undef OPRND
3243#undef FLD
3244}
3245 NEXT (vpc);
3246
3247CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */
3248 {
3249 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3250 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3251#define FLD(f) abuf->fields.sfmt_add.f
3252#define OPRND(f) par_exec->operands.sfmt_add.f
3253 int UNUSED written = abuf->written;
3254 IADDR UNUSED pc = abuf->addr;
3255 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3256
3257 * FLD (i_dr) = OPRND (dr);
3258
3259#undef OPRND
3260#undef FLD
3261 }
3262 NEXT (vpc);
3263
3264 CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */
3265{
3266 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3267 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3268#define FLD(f) abuf->fields.sfmt_addi.f
3269#define OPRND(f) par_exec->operands.sfmt_addi.f
3270 int UNUSED written = 0;
3271 IADDR UNUSED pc = abuf->addr;
3272 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3273
3274 {
3275 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
3276 OPRND (dr) = opval;
3277 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3278 }
3279
3280#undef OPRND
3281#undef FLD
3282}
3283 NEXT (vpc);
3284
3285CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */
3286 {
3287 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3288 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3289#define FLD(f) abuf->fields.sfmt_addi.f
3290#define OPRND(f) par_exec->operands.sfmt_addi.f
3291 int UNUSED written = abuf->written;
3292 IADDR UNUSED pc = abuf->addr;
3293 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3294
3295 * FLD (i_dr) = OPRND (dr);
3296
3297#undef OPRND
3298#undef FLD
3299 }
3300 NEXT (vpc);
3301
3302 CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */
3303{
3304 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3305 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3306#define FLD(f) abuf->fields.sfmt_add.f
3307#define OPRND(f) par_exec->operands.sfmt_addv.f
3308 int UNUSED written = 0;
3309 IADDR UNUSED pc = abuf->addr;
3310 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3311
3312{
3313 SI temp0;BI temp1;
3314 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
3315 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
3316 {
3317 SI opval = temp0;
3318 OPRND (dr) = opval;
3319 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3320 }
3321 {
3322 BI opval = temp1;
3323 OPRND (condbit) = opval;
3324 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3325 }
3326}
3327
3328#undef OPRND
3329#undef FLD
3330}
3331 NEXT (vpc);
3332
3333CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */
3334 {
3335 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3336 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3337#define FLD(f) abuf->fields.sfmt_add.f
3338#define OPRND(f) par_exec->operands.sfmt_addv.f
3339 int UNUSED written = abuf->written;
3340 IADDR UNUSED pc = abuf->addr;
3341 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3342
3343 CPU (h_cond) = OPRND (condbit);
3344 * FLD (i_dr) = OPRND (dr);
3345
3346#undef OPRND
3347#undef FLD
3348 }
3349 NEXT (vpc);
3350
3351 CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */
3352{
3353 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3354 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3355#define FLD(f) abuf->fields.sfmt_add.f
3356#define OPRND(f) par_exec->operands.sfmt_addx.f
3357 int UNUSED written = 0;
3358 IADDR UNUSED pc = abuf->addr;
3359 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3360
3361{
3362 SI temp0;BI temp1;
3363 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3364 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3365 {
3366 SI opval = temp0;
3367 OPRND (dr) = opval;
3368 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3369 }
3370 {
3371 BI opval = temp1;
3372 OPRND (condbit) = opval;
3373 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3374 }
3375}
3376
3377#undef OPRND
3378#undef FLD
3379}
3380 NEXT (vpc);
3381
3382CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */
3383 {
3384 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3385 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3386#define FLD(f) abuf->fields.sfmt_add.f
3387#define OPRND(f) par_exec->operands.sfmt_addx.f
3388 int UNUSED written = abuf->written;
3389 IADDR UNUSED pc = abuf->addr;
3390 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3391
3392 CPU (h_cond) = OPRND (condbit);
3393 * FLD (i_dr) = OPRND (dr);
3394
3395#undef OPRND
3396#undef FLD
3397 }
3398 NEXT (vpc);
3399
3400 CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */
3401{
3402 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3403 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3404#define FLD(f) abuf->fields.sfmt_bl8.f
3405#define OPRND(f) par_exec->operands.sfmt_bc8.f
3406 int UNUSED written = 0;
3407 IADDR UNUSED pc = abuf->addr;
3408 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3409
3410if (CPU (h_cond)) {
3411 {
3412 USI opval = FLD (i_disp8);
3413 OPRND (pc) = opval;
3414 written |= (1 << 2);
3415 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3416 }
3417}
3418
3419 abuf->written = written;
3420#undef OPRND
3421#undef FLD
3422}
3423 NEXT (vpc);
3424
3425CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */
3426 {
3427 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3428 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3429#define FLD(f) abuf->fields.sfmt_bl8.f
3430#define OPRND(f) par_exec->operands.sfmt_bc8.f
3431 int UNUSED written = abuf->written;
3432 IADDR UNUSED pc = abuf->addr;
3433 SEM_BRANCH_INIT
3434 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3435
3436 if (written & (1 << 2))
3437 {
3438 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3439 }
3440
3441 SEM_BRANCH_FINI (vpc);
3442#undef OPRND
3443#undef FLD
3444 }
3445 NEXT (vpc);
3446
3447 CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */
3448{
3449 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3450 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3451#define FLD(f) abuf->fields.sfmt_bl8.f
3452#define OPRND(f) par_exec->operands.sfmt_bl8.f
3453 int UNUSED written = 0;
3454 IADDR UNUSED pc = abuf->addr;
3455 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3456
3457{
3458 {
3459 SI opval = ADDSI (ANDSI (pc, -4), 4);
3460 OPRND (h_gr_14) = opval;
3461 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3462 }
3463 {
3464 USI opval = FLD (i_disp8);
3465 OPRND (pc) = opval;
3466 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3467 }
3468}
3469
3470#undef OPRND
3471#undef FLD
3472}
3473 NEXT (vpc);
3474
3475CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */
3476 {
3477 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3478 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3479#define FLD(f) abuf->fields.sfmt_bl8.f
3480#define OPRND(f) par_exec->operands.sfmt_bl8.f
3481 int UNUSED written = abuf->written;
3482 IADDR UNUSED pc = abuf->addr;
3483 SEM_BRANCH_INIT
3484 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3485
3486 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3487 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3488
3489 SEM_BRANCH_FINI (vpc);
3490#undef OPRND
3491#undef FLD
3492 }
3493 NEXT (vpc);
3494
3495 CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */
3496{
3497 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3498 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3499#define FLD(f) abuf->fields.sfmt_bl8.f
3500#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3501 int UNUSED written = 0;
3502 IADDR UNUSED pc = abuf->addr;
3503 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3504
3505if (CPU (h_cond)) {
3506{
3507 {
3508 SI opval = ADDSI (ANDSI (pc, -4), 4);
3509 OPRND (h_gr_14) = opval;
3510 written |= (1 << 3);
3511 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3512 }
3513 {
3514 USI opval = FLD (i_disp8);
3515 OPRND (pc) = opval;
3516 written |= (1 << 4);
3517 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3518 }
3519}
3520}
3521
3522 abuf->written = written;
3523#undef OPRND
3524#undef FLD
3525}
3526 NEXT (vpc);
3527
3528CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */
3529 {
3530 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3531 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3532#define FLD(f) abuf->fields.sfmt_bl8.f
3533#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3534 int UNUSED written = abuf->written;
3535 IADDR UNUSED pc = abuf->addr;
3536 SEM_BRANCH_INIT
3537 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3538
3539 if (written & (1 << 3))
3540 {
3541 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3542 }
3543 if (written & (1 << 4))
3544 {
3545 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3546 }
3547
3548 SEM_BRANCH_FINI (vpc);
3549#undef OPRND
3550#undef FLD
3551 }
3552 NEXT (vpc);
3553
3554 CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */
3555{
3556 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3557 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3558#define FLD(f) abuf->fields.sfmt_bl8.f
3559#define OPRND(f) par_exec->operands.sfmt_bc8.f
3560 int UNUSED written = 0;
3561 IADDR UNUSED pc = abuf->addr;
3562 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3563
3564if (NOTBI (CPU (h_cond))) {
3565 {
3566 USI opval = FLD (i_disp8);
3567 OPRND (pc) = opval;
3568 written |= (1 << 2);
3569 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3570 }
3571}
3572
3573 abuf->written = written;
3574#undef OPRND
3575#undef FLD
3576}
3577 NEXT (vpc);
3578
3579CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */
3580 {
3581 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3582 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3583#define FLD(f) abuf->fields.sfmt_bl8.f
3584#define OPRND(f) par_exec->operands.sfmt_bc8.f
3585 int UNUSED written = abuf->written;
3586 IADDR UNUSED pc = abuf->addr;
3587 SEM_BRANCH_INIT
3588 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3589
3590 if (written & (1 << 2))
3591 {
3592 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3593 }
3594
3595 SEM_BRANCH_FINI (vpc);
3596#undef OPRND
3597#undef FLD
3598 }
3599 NEXT (vpc);
3600
3601 CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */
3602{
3603 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3604 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3605#define FLD(f) abuf->fields.sfmt_bl8.f
3606#define OPRND(f) par_exec->operands.sfmt_bra8.f
3607 int UNUSED written = 0;
3608 IADDR UNUSED pc = abuf->addr;
3609 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3610
3611 {
3612 USI opval = FLD (i_disp8);
3613 OPRND (pc) = opval;
3614 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3615 }
3616
3617#undef OPRND
3618#undef FLD
3619}
3620 NEXT (vpc);
3621
3622CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */
3623 {
3624 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3625 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3626#define FLD(f) abuf->fields.sfmt_bl8.f
3627#define OPRND(f) par_exec->operands.sfmt_bra8.f
3628 int UNUSED written = abuf->written;
3629 IADDR UNUSED pc = abuf->addr;
3630 SEM_BRANCH_INIT
3631 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3632
3633 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3634
3635 SEM_BRANCH_FINI (vpc);
3636#undef OPRND
3637#undef FLD
3638 }
3639 NEXT (vpc);
3640
3641 CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */
3642{
3643 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3644 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3645#define FLD(f) abuf->fields.sfmt_bl8.f
3646#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3647 int UNUSED written = 0;
3648 IADDR UNUSED pc = abuf->addr;
3649 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3650
3651if (NOTBI (CPU (h_cond))) {
3652{
3653 {
3654 SI opval = ADDSI (ANDSI (pc, -4), 4);
3655 OPRND (h_gr_14) = opval;
3656 written |= (1 << 3);
3657 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3658 }
3659 {
3660 USI opval = FLD (i_disp8);
3661 OPRND (pc) = opval;
3662 written |= (1 << 4);
3663 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3664 }
3665}
3666}
3667
3668 abuf->written = written;
3669#undef OPRND
3670#undef FLD
3671}
3672 NEXT (vpc);
3673
3674CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */
3675 {
3676 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3677 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3678#define FLD(f) abuf->fields.sfmt_bl8.f
3679#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3680 int UNUSED written = abuf->written;
3681 IADDR UNUSED pc = abuf->addr;
3682 SEM_BRANCH_INIT
3683 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3684
3685 if (written & (1 << 3))
3686 {
3687 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3688 }
3689 if (written & (1 << 4))
3690 {
3691 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3692 }
3693
3694 SEM_BRANCH_FINI (vpc);
3695#undef OPRND
3696#undef FLD
3697 }
3698 NEXT (vpc);
3699
3700 CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */
3701{
3702 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3703 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3704#define FLD(f) abuf->fields.sfmt_st_plus.f
3705#define OPRND(f) par_exec->operands.sfmt_cmp.f
3706 int UNUSED written = 0;
3707 IADDR UNUSED pc = abuf->addr;
3708 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3709
3710 {
3711 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
3712 OPRND (condbit) = opval;
3713 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3714 }
3715
3716#undef OPRND
3717#undef FLD
3718}
3719 NEXT (vpc);
3720
3721CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */
3722 {
3723 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3724 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3725#define FLD(f) abuf->fields.sfmt_st_plus.f
3726#define OPRND(f) par_exec->operands.sfmt_cmp.f
3727 int UNUSED written = abuf->written;
3728 IADDR UNUSED pc = abuf->addr;
3729 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3730
3731 CPU (h_cond) = OPRND (condbit);
3732
3733#undef OPRND
3734#undef FLD
3735 }
3736 NEXT (vpc);
3737
3738 CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */
3739{
3740 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3741 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3742#define FLD(f) abuf->fields.sfmt_st_plus.f
3743#define OPRND(f) par_exec->operands.sfmt_cmp.f
3744 int UNUSED written = 0;
3745 IADDR UNUSED pc = abuf->addr;
3746 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3747
3748 {
3749 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
3750 OPRND (condbit) = opval;
3751 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3752 }
3753
3754#undef OPRND
3755#undef FLD
3756}
3757 NEXT (vpc);
3758
3759CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */
3760 {
3761 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3762 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3763#define FLD(f) abuf->fields.sfmt_st_plus.f
3764#define OPRND(f) par_exec->operands.sfmt_cmp.f
3765 int UNUSED written = abuf->written;
3766 IADDR UNUSED pc = abuf->addr;
3767 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3768
3769 CPU (h_cond) = OPRND (condbit);
3770
3771#undef OPRND
3772#undef FLD
3773 }
3774 NEXT (vpc);
3775
3776 CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */
3777{
3778 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3779 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3780#define FLD(f) abuf->fields.sfmt_st_plus.f
3781#define OPRND(f) par_exec->operands.sfmt_cmp.f
3782 int UNUSED written = 0;
3783 IADDR UNUSED pc = abuf->addr;
3784 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3785
3786 {
3787 BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
3788 OPRND (condbit) = opval;
3789 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3790 }
3791
3792#undef OPRND
3793#undef FLD
3794}
3795 NEXT (vpc);
3796
3797CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */
3798 {
3799 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3800 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3801#define FLD(f) abuf->fields.sfmt_st_plus.f
3802#define OPRND(f) par_exec->operands.sfmt_cmp.f
3803 int UNUSED written = abuf->written;
3804 IADDR UNUSED pc = abuf->addr;
3805 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3806
3807 CPU (h_cond) = OPRND (condbit);
3808
3809#undef OPRND
3810#undef FLD
3811 }
3812 NEXT (vpc);
3813
3814 CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */
3815{
3816 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3817 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3818#define FLD(f) abuf->fields.sfmt_st_plus.f
3819#define OPRND(f) par_exec->operands.sfmt_cmpz.f
3820 int UNUSED written = 0;
3821 IADDR UNUSED pc = abuf->addr;
3822 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3823
3824 {
3825 BI opval = EQSI (* FLD (i_src2), 0);
3826 OPRND (condbit) = opval;
3827 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3828 }
3829
3830#undef OPRND
3831#undef FLD
3832}
3833 NEXT (vpc);
3834
3835CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */
3836 {
3837 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3838 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3839#define FLD(f) abuf->fields.sfmt_st_plus.f
3840#define OPRND(f) par_exec->operands.sfmt_cmpz.f
3841 int UNUSED written = abuf->written;
3842 IADDR UNUSED pc = abuf->addr;
3843 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3844
3845 CPU (h_cond) = OPRND (condbit);
3846
3847#undef OPRND
3848#undef FLD
3849 }
3850 NEXT (vpc);
3851
3852 CASE (sem, INSN_PAR_JC) : /* jc $sr */
3853{
3854 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3855 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
de8f5985 3856#define FLD(f) abuf->fields.sfmt_jl.f
2df3850c
JM		 3857#define OPRND(f) par_exec->operands.sfmt_jc.f
3858 int UNUSED written = 0;
3859 IADDR UNUSED pc = abuf->addr;
3860 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3861
3862if (CPU (h_cond)) {
3863 {
3864 USI opval = ANDSI (* FLD (i_sr), -4);
3865 OPRND (pc) = opval;
3866 written |= (1 << 2);
3867 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3868 }
3869}
3870
3871 abuf->written = written;
3872#undef OPRND
3873#undef FLD
3874}
3875 NEXT (vpc);
3876
3877CASE (sem, INSN_WRITE_JC) : /* jc $sr */
3878 {
3879 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3880 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
de8f5985 3881#define FLD(f) abuf->fields.sfmt_jl.f
2df3850c
JM		 3882#define OPRND(f) par_exec->operands.sfmt_jc.f
3883 int UNUSED written = abuf->written;
3884 IADDR UNUSED pc = abuf->addr;
3885 SEM_BRANCH_INIT
3886 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3887
3888 if (written & (1 << 2))
3889 {
3890 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3891 }
3892
3893 SEM_BRANCH_FINI (vpc);
3894#undef OPRND
3895#undef FLD
3896 }
3897 NEXT (vpc);
3898
3899 CASE (sem, INSN_PAR_JNC) : /* jnc $sr */
3900{
3901 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3902 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
de8f5985 3903#define FLD(f) abuf->fields.sfmt_jl.f
2df3850c
JM		 3904#define OPRND(f) par_exec->operands.sfmt_jc.f
3905 int UNUSED written = 0;
3906 IADDR UNUSED pc = abuf->addr;
3907 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3908
3909if (NOTBI (CPU (h_cond))) {
3910 {
3911 USI opval = ANDSI (* FLD (i_sr), -4);
3912 OPRND (pc) = opval;
3913 written |= (1 << 2);
3914 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3915 }
3916}
3917
3918 abuf->written = written;
3919#undef OPRND
3920#undef FLD
3921}
3922 NEXT (vpc);
3923
3924CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */
3925 {
3926 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3927 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
de8f5985 3928#define FLD(f) abuf->fields.sfmt_jl.f
2df3850c
JM		 3929#define OPRND(f) par_exec->operands.sfmt_jc.f
3930 int UNUSED written = abuf->written;
3931 IADDR UNUSED pc = abuf->addr;
3932 SEM_BRANCH_INIT
3933 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3934
3935 if (written & (1 << 2))
3936 {
3937 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3938 }
3939
3940 SEM_BRANCH_FINI (vpc);
3941#undef OPRND
3942#undef FLD
3943 }
3944 NEXT (vpc);
3945
3946 CASE (sem, INSN_PAR_JL) : /* jl $sr */
3947{
3948 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3949 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3950#define FLD(f) abuf->fields.sfmt_jl.f
3951#define OPRND(f) par_exec->operands.sfmt_jl.f
3952 int UNUSED written = 0;
3953 IADDR UNUSED pc = abuf->addr;
3954 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3955
3956{
3957 SI temp0;USI temp1;
3958 temp0 = ADDSI (ANDSI (pc, -4), 4);
3959 temp1 = ANDSI (* FLD (i_sr), -4);
3960 {
3961 SI opval = temp0;
3962 OPRND (h_gr_14) = opval;
3963 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3964 }
3965 {
3966 USI opval = temp1;
3967 OPRND (pc) = opval;
3968 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3969 }
3970}
3971
3972#undef OPRND
3973#undef FLD
3974}
3975 NEXT (vpc);
3976
3977CASE (sem, INSN_WRITE_JL) : /* jl $sr */
3978 {
3979 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3980 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3981#define FLD(f) abuf->fields.sfmt_jl.f
3982#define OPRND(f) par_exec->operands.sfmt_jl.f
3983 int UNUSED written = abuf->written;
3984 IADDR UNUSED pc = abuf->addr;
3985 SEM_BRANCH_INIT
3986 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3987
3988 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3989 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3990
3991 SEM_BRANCH_FINI (vpc);
3992#undef OPRND
3993#undef FLD
3994 }
3995 NEXT (vpc);
3996
3997 CASE (sem, INSN_PAR_JMP) : /* jmp $sr */
3998{
3999 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4000 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
de8f5985 4001#define FLD(f) abuf->fields.sfmt_jl.f
2df3850c
JM		 4002#define OPRND(f) par_exec->operands.sfmt_jmp.f
4003 int UNUSED written = 0;
4004 IADDR UNUSED pc = abuf->addr;
4005 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4006
4007 {
4008 USI opval = ANDSI (* FLD (i_sr), -4);
4009 OPRND (pc) = opval;
4010 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4011 }
4012
4013#undef OPRND
4014#undef FLD
4015}
4016 NEXT (vpc);
4017
4018CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */
4019 {
4020 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4021 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
de8f5985 4022#define FLD(f) abuf->fields.sfmt_jl.f
2df3850c
JM		 4023#define OPRND(f) par_exec->operands.sfmt_jmp.f
4024 int UNUSED written = abuf->written;
4025 IADDR UNUSED pc = abuf->addr;
4026 SEM_BRANCH_INIT
4027 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4028
4029 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4030
4031 SEM_BRANCH_FINI (vpc);
4032#undef OPRND
4033#undef FLD
4034 }
4035 NEXT (vpc);
4036
4037 CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */
4038{
4039 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4040 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4041#define FLD(f) abuf->fields.sfmt_ld_plus.f
4042#define OPRND(f) par_exec->operands.sfmt_ld.f
4043 int UNUSED written = 0;
4044 IADDR UNUSED pc = abuf->addr;
4045 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4046
4047 {
4048 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4049 OPRND (dr) = opval;
4050 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4051 }
4052
4053#undef OPRND
4054#undef FLD
4055}
4056 NEXT (vpc);
4057
4058CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */
4059 {
4060 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4061 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4062#define FLD(f) abuf->fields.sfmt_ld_plus.f
4063#define OPRND(f) par_exec->operands.sfmt_ld.f
4064 int UNUSED written = abuf->written;
4065 IADDR UNUSED pc = abuf->addr;
4066 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4067
4068 * FLD (i_dr) = OPRND (dr);
4069
4070#undef OPRND
4071#undef FLD
4072 }
4073 NEXT (vpc);
4074
4075 CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */
4076{
4077 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4078 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4079#define FLD(f) abuf->fields.sfmt_ld_plus.f
4080#define OPRND(f) par_exec->operands.sfmt_ld.f
4081 int UNUSED written = 0;
4082 IADDR UNUSED pc = abuf->addr;
4083 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4084
4085 {
4086 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4087 OPRND (dr) = opval;
4088 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4089 }
4090
4091#undef OPRND
4092#undef FLD
4093}
4094 NEXT (vpc);
4095
4096CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */
4097 {
4098 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4099 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4100#define FLD(f) abuf->fields.sfmt_ld_plus.f
4101#define OPRND(f) par_exec->operands.sfmt_ld.f
4102 int UNUSED written = abuf->written;
4103 IADDR UNUSED pc = abuf->addr;
4104 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4105
4106 * FLD (i_dr) = OPRND (dr);
4107
4108#undef OPRND
4109#undef FLD
4110 }
4111 NEXT (vpc);
4112
4113 CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */
4114{
4115 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4116 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4117#define FLD(f) abuf->fields.sfmt_ld_plus.f
4118#define OPRND(f) par_exec->operands.sfmt_ld.f
4119 int UNUSED written = 0;
4120 IADDR UNUSED pc = abuf->addr;
4121 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4122
4123 {
4124 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4125 OPRND (dr) = opval;
4126 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4127 }
4128
4129#undef OPRND
4130#undef FLD
4131}
4132 NEXT (vpc);
4133
4134CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */
4135 {
4136 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4137 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4138#define FLD(f) abuf->fields.sfmt_ld_plus.f
4139#define OPRND(f) par_exec->operands.sfmt_ld.f
4140 int UNUSED written = abuf->written;
4141 IADDR UNUSED pc = abuf->addr;
4142 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4143
4144 * FLD (i_dr) = OPRND (dr);
4145
4146#undef OPRND
4147#undef FLD
4148 }
4149 NEXT (vpc);
4150
4151 CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */
4152{
4153 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4154 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4155#define FLD(f) abuf->fields.sfmt_ld_plus.f
4156#define OPRND(f) par_exec->operands.sfmt_ld.f
4157 int UNUSED written = 0;
4158 IADDR UNUSED pc = abuf->addr;
4159 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4160
4161 {
4162 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4163 OPRND (dr) = opval;
4164 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4165 }
4166
4167#undef OPRND
4168#undef FLD
4169}
4170 NEXT (vpc);
4171
4172CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */
4173 {
4174 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4175 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4176#define FLD(f) abuf->fields.sfmt_ld_plus.f
4177#define OPRND(f) par_exec->operands.sfmt_ld.f
4178 int UNUSED written = abuf->written;
4179 IADDR UNUSED pc = abuf->addr;
4180 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4181
4182 * FLD (i_dr) = OPRND (dr);
4183
4184#undef OPRND
4185#undef FLD
4186 }
4187 NEXT (vpc);
4188
4189 CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */
4190{
4191 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4192 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4193#define FLD(f) abuf->fields.sfmt_ld_plus.f
4194#define OPRND(f) par_exec->operands.sfmt_ld.f
4195 int UNUSED written = 0;
4196 IADDR UNUSED pc = abuf->addr;
4197 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4198
4199 {
4200 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4201 OPRND (dr) = opval;
4202 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4203 }
4204
4205#undef OPRND
4206#undef FLD
4207}
4208 NEXT (vpc);
4209
4210CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */
4211 {
4212 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4213 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4214#define FLD(f) abuf->fields.sfmt_ld_plus.f
4215#define OPRND(f) par_exec->operands.sfmt_ld.f
4216 int UNUSED written = abuf->written;
4217 IADDR UNUSED pc = abuf->addr;
4218 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4219
4220 * FLD (i_dr) = OPRND (dr);
4221
4222#undef OPRND
4223#undef FLD
4224 }
4225 NEXT (vpc);
4226
4227 CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */
4228{
4229 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4230 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4231#define FLD(f) abuf->fields.sfmt_ld_plus.f
4232#define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4233 int UNUSED written = 0;
4234 IADDR UNUSED pc = abuf->addr;
4235 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4236
4237{
4238 SI temp0;SI temp1;
4239 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4240 temp1 = ADDSI (* FLD (i_sr), 4);
4241 {
4242 SI opval = temp0;
4243 OPRND (dr) = opval;
4244 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4245 }
4246 {
4247 SI opval = temp1;
4248 OPRND (sr) = opval;
4249 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
4250 }
4251}
4252
4253#undef OPRND
4254#undef FLD
4255}
4256 NEXT (vpc);
4257
4258CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */
4259 {
4260 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4261 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4262#define FLD(f) abuf->fields.sfmt_ld_plus.f
4263#define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4264 int UNUSED written = abuf->written;
4265 IADDR UNUSED pc = abuf->addr;
4266 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4267
4268 * FLD (i_dr) = OPRND (dr);
4269 * FLD (i_sr) = OPRND (sr);
4270
4271#undef OPRND
4272#undef FLD
4273 }
4274 NEXT (vpc);
4275
4276 CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */
4277{
4278 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4279 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4280#define FLD(f) abuf->fields.sfmt_addi.f
4281#define OPRND(f) par_exec->operands.sfmt_ldi8.f
4282 int UNUSED written = 0;
4283 IADDR UNUSED pc = abuf->addr;
4284 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4285
4286 {
4287 SI opval = FLD (f_simm8);
4288 OPRND (dr) = opval;
4289 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4290 }
4291
4292#undef OPRND
4293#undef FLD
4294}
4295 NEXT (vpc);
4296
4297CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */
4298 {
4299 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4300 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4301#define FLD(f) abuf->fields.sfmt_addi.f
4302#define OPRND(f) par_exec->operands.sfmt_ldi8.f
4303 int UNUSED written = abuf->written;
4304 IADDR UNUSED pc = abuf->addr;
4305 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4306
4307 * FLD (i_dr) = OPRND (dr);
4308
4309#undef OPRND
4310#undef FLD
4311 }
4312 NEXT (vpc);
4313
4314 CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */
4315{
4316 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4317 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4318#define FLD(f) abuf->fields.sfmt_ld_plus.f
4319#define OPRND(f) par_exec->operands.sfmt_lock.f
4320 int UNUSED written = 0;
4321 IADDR UNUSED pc = abuf->addr;
4322 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4323
4324{
4325 {
4326 BI opval = 1;
4327 OPRND (h_lock) = opval;
4328 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
4329 }
4330 {
4331 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4332 OPRND (dr) = opval;
4333 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4334 }
4335}
4336
4337#undef OPRND
4338#undef FLD
4339}
4340 NEXT (vpc);
4341
4342CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */
4343 {
4344 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4345 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4346#define FLD(f) abuf->fields.sfmt_ld_plus.f
4347#define OPRND(f) par_exec->operands.sfmt_lock.f
4348 int UNUSED written = abuf->written;
4349 IADDR UNUSED pc = abuf->addr;
4350 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4351
4352 * FLD (i_dr) = OPRND (dr);
4353 CPU (h_lock) = OPRND (h_lock);
4354
4355#undef OPRND
4356#undef FLD
4357 }
4358 NEXT (vpc);
4359
4360 CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */
4361{
4362 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4363 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4364#define FLD(f) abuf->fields.sfmt_machi_a.f
4365#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4366 int UNUSED written = 0;
4367 IADDR UNUSED pc = abuf->addr;
4368 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4369
4370 {
4371 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
4372 OPRND (acc) = opval;
4373 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4374 }
4375
4376#undef OPRND
4377#undef FLD
4378}
4379 NEXT (vpc);
4380
4381CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */
4382 {
4383 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4384 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4385#define FLD(f) abuf->fields.sfmt_machi_a.f
4386#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4387 int UNUSED written = abuf->written;
4388 IADDR UNUSED pc = abuf->addr;
4389 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4390
4391 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4392
4393#undef OPRND
4394#undef FLD
4395 }
4396 NEXT (vpc);
4397
4398 CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */
4399{
4400 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4401 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4402#define FLD(f) abuf->fields.sfmt_machi_a.f
4403#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4404 int UNUSED written = 0;
4405 IADDR UNUSED pc = abuf->addr;
4406 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4407
4408 {
4409 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
4410 OPRND (acc) = opval;
4411 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4412 }
4413
4414#undef OPRND
4415#undef FLD
4416}
4417 NEXT (vpc);
4418
4419CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */
4420 {
4421 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4422 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4423#define FLD(f) abuf->fields.sfmt_machi_a.f
4424#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4425 int UNUSED written = abuf->written;
4426 IADDR UNUSED pc = abuf->addr;
4427 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4428
4429 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4430
4431#undef OPRND
4432#undef FLD
4433 }
4434 NEXT (vpc);
4435
4436 CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4437{
4438 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4439 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4440#define FLD(f) abuf->fields.sfmt_machi_a.f
4441#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4442 int UNUSED written = 0;
4443 IADDR UNUSED pc = abuf->addr;
4444 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4445
4446 {
4447 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
4448 OPRND (acc) = opval;
4449 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4450 }
4451
4452#undef OPRND
4453#undef FLD
4454}
4455 NEXT (vpc);
4456
4457CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4458 {
4459 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4460 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4461#define FLD(f) abuf->fields.sfmt_machi_a.f
4462#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4463 int UNUSED written = abuf->written;
4464 IADDR UNUSED pc = abuf->addr;
4465 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4466
4467 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4468
4469#undef OPRND
4470#undef FLD
4471 }
4472 NEXT (vpc);
4473
4474 CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4475{
4476 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4477 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4478#define FLD(f) abuf->fields.sfmt_machi_a.f
4479#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4480 int UNUSED written = 0;
4481 IADDR UNUSED pc = abuf->addr;
4482 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4483
4484 {
4485 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
4486 OPRND (acc) = opval;
4487 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4488 }
4489
4490#undef OPRND
4491#undef FLD
4492}
4493 NEXT (vpc);
4494
4495CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4496 {
4497 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4498 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4499#define FLD(f) abuf->fields.sfmt_machi_a.f
4500#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4501 int UNUSED written = abuf->written;
4502 IADDR UNUSED pc = abuf->addr;
4503 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4504
4505 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4506
4507#undef OPRND
4508#undef FLD
4509 }
4510 NEXT (vpc);
4511
4512 CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */
4513{
4514 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4515 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4516#define FLD(f) abuf->fields.sfmt_add.f
4517#define OPRND(f) par_exec->operands.sfmt_add.f
4518 int UNUSED written = 0;
4519 IADDR UNUSED pc = abuf->addr;
4520 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4521
4522 {
4523 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
4524 OPRND (dr) = opval;
4525 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4526 }
4527
4528#undef OPRND
4529#undef FLD
4530}
4531 NEXT (vpc);
4532
4533CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */
4534 {
4535 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4536 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4537#define FLD(f) abuf->fields.sfmt_add.f
4538#define OPRND(f) par_exec->operands.sfmt_add.f
4539 int UNUSED written = abuf->written;
4540 IADDR UNUSED pc = abuf->addr;
4541 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4542
4543 * FLD (i_dr) = OPRND (dr);
4544
4545#undef OPRND
4546#undef FLD
4547 }
4548 NEXT (vpc);
4549
4550 CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */
4551{
4552 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4553 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4554#define FLD(f) abuf->fields.sfmt_machi_a.f
4555#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4556 int UNUSED written = 0;
4557 IADDR UNUSED pc = abuf->addr;
4558 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4559
4560 {
4561 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
4562 OPRND (acc) = opval;
4563 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4564 }
4565
4566#undef OPRND
4567#undef FLD
4568}
4569 NEXT (vpc);
4570
4571CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */
4572 {
4573 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4574 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4575#define FLD(f) abuf->fields.sfmt_machi_a.f
4576#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4577 int UNUSED written = abuf->written;
4578 IADDR UNUSED pc = abuf->addr;
4579 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4580
4581 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4582
4583#undef OPRND
4584#undef FLD
4585 }
4586 NEXT (vpc);
4587
4588 CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */
4589{
4590 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4591 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4592#define FLD(f) abuf->fields.sfmt_machi_a.f
4593#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4594 int UNUSED written = 0;
4595 IADDR UNUSED pc = abuf->addr;
4596 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4597
4598 {
4599 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
4600 OPRND (acc) = opval;
4601 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4602 }
4603
4604#undef OPRND
4605#undef FLD
4606}
4607 NEXT (vpc);
4608
4609CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */
4610 {
4611 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4612 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4613#define FLD(f) abuf->fields.sfmt_machi_a.f
4614#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4615 int UNUSED written = abuf->written;
4616 IADDR UNUSED pc = abuf->addr;
4617 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4618
4619 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4620
4621#undef OPRND
4622#undef FLD
4623 }
4624 NEXT (vpc);
4625
4626 CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4627{
4628 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4629 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4630#define FLD(f) abuf->fields.sfmt_machi_a.f
4631#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4632 int UNUSED written = 0;
4633 IADDR UNUSED pc = abuf->addr;
4634 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4635
4636 {
4637 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
4638 OPRND (acc) = opval;
4639 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4640 }
4641
4642#undef OPRND
4643#undef FLD
4644}
4645 NEXT (vpc);
4646
4647CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4648 {
4649 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4650 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4651#define FLD(f) abuf->fields.sfmt_machi_a.f
4652#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4653 int UNUSED written = abuf->written;
4654 IADDR UNUSED pc = abuf->addr;
4655 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4656
4657 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4658
4659#undef OPRND
4660#undef FLD
4661 }
4662 NEXT (vpc);
4663
4664 CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4665{
4666 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4667 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4668#define FLD(f) abuf->fields.sfmt_machi_a.f
4669#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4670 int UNUSED written = 0;
4671 IADDR UNUSED pc = abuf->addr;
4672 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4673
4674 {
4675 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
4676 OPRND (acc) = opval;
4677 TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4678 }
4679
4680#undef OPRND
4681#undef FLD
4682}
4683 NEXT (vpc);
4684
4685CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4686 {
4687 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4688 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4689#define FLD(f) abuf->fields.sfmt_machi_a.f
4690#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4691 int UNUSED written = abuf->written;
4692 IADDR UNUSED pc = abuf->addr;
4693 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4694
4695 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4696
4697#undef OPRND
4698#undef FLD
4699 }
4700 NEXT (vpc);
4701
4702 CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */
4703{
4704 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4705 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4706#define FLD(f) abuf->fields.sfmt_ld_plus.f
4707#define OPRND(f) par_exec->operands.sfmt_mv.f
4708 int UNUSED written = 0;
4709 IADDR UNUSED pc = abuf->addr;
4710 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4711
4712 {
4713 SI opval = * FLD (i_sr);
4714 OPRND (dr) = opval;
4715 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4716 }
4717
4718#undef OPRND
4719#undef FLD
4720}
4721 NEXT (vpc);
4722
4723CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */
4724 {
4725 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4726 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4727#define FLD(f) abuf->fields.sfmt_ld_plus.f
4728#define OPRND(f) par_exec->operands.sfmt_mv.f
4729 int UNUSED written = abuf->written;
4730 IADDR UNUSED pc = abuf->addr;
4731 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4732
4733 * FLD (i_dr) = OPRND (dr);
4734
4735#undef OPRND
4736#undef FLD
4737 }
4738 NEXT (vpc);
4739
4740 CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */
4741{
4742 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4743 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4744#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4745#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4746 int UNUSED written = 0;
4747 IADDR UNUSED pc = abuf->addr;
4748 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4749
4750 {
4751 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
4752 OPRND (dr) = opval;
4753 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4754 }
4755
4756#undef OPRND
4757#undef FLD
4758}
4759 NEXT (vpc);
4760
4761CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */
4762 {
4763 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4764 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4765#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4766#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4767 int UNUSED written = abuf->written;
4768 IADDR UNUSED pc = abuf->addr;
4769 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4770
4771 * FLD (i_dr) = OPRND (dr);
4772
4773#undef OPRND
4774#undef FLD
4775 }
4776 NEXT (vpc);
4777
4778 CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */
4779{
4780 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4781 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4782#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4783#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4784 int UNUSED written = 0;
4785 IADDR UNUSED pc = abuf->addr;
4786 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4787
4788 {
4789 SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
4790 OPRND (dr) = opval;
4791 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4792 }
4793
4794#undef OPRND
4795#undef FLD
4796}
4797 NEXT (vpc);
4798
4799CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */
4800 {
4801 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4802 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4803#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4804#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4805 int UNUSED written = abuf->written;
4806 IADDR UNUSED pc = abuf->addr;
4807 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4808
4809 * FLD (i_dr) = OPRND (dr);
4810
4811#undef OPRND
4812#undef FLD
4813 }
4814 NEXT (vpc);
4815
4816 CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */
4817{
4818 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4819 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4820#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4821#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4822 int UNUSED written = 0;
4823 IADDR UNUSED pc = abuf->addr;
4824 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4825
4826 {
4827 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
4828 OPRND (dr) = opval;
4829 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4830 }
4831
4832#undef OPRND
4833#undef FLD
4834}
4835 NEXT (vpc);
4836
4837CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */
4838 {
4839 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4840 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4841#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4842#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4843 int UNUSED written = abuf->written;
4844 IADDR UNUSED pc = abuf->addr;
4845 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4846
4847 * FLD (i_dr) = OPRND (dr);
4848
4849#undef OPRND
4850#undef FLD
4851 }
4852 NEXT (vpc);
4853
4854 CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */
4855{
4856 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4857 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
de8f5985 4858#define FLD(f) abuf->fields.sfmt_ld_plus.f
2df3850c
JM		 4859#define OPRND(f) par_exec->operands.sfmt_mvfc.f
4860 int UNUSED written = 0;
4861 IADDR UNUSED pc = abuf->addr;
4862 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4863
4864 {
4865 SI opval = GET_H_CR (FLD (f_r2));
4866 OPRND (dr) = opval;
4867 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4868 }
4869
4870#undef OPRND
4871#undef FLD
4872}
4873 NEXT (vpc);
4874
4875CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */
4876 {
4877 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4878 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
de8f5985 4879#define FLD(f) abuf->fields.sfmt_ld_plus.f
2df3850c
JM		 4880#define OPRND(f) par_exec->operands.sfmt_mvfc.f
4881 int UNUSED written = abuf->written;
4882 IADDR UNUSED pc = abuf->addr;
4883 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4884
4885 * FLD (i_dr) = OPRND (dr);
4886
4887#undef OPRND
4888#undef FLD
4889 }
4890 NEXT (vpc);
4891
4892 CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */
4893{
4894 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4895 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4896#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4897#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4898 int UNUSED written = 0;
4899 IADDR UNUSED pc = abuf->addr;
4900 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4901
4902 {
4903 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
4904 OPRND (accs) = opval;
4905 TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
4906 }
4907
4908#undef OPRND
4909#undef FLD
4910}
4911 NEXT (vpc);
4912
4913CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */
4914 {
4915 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4916 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4917#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4918#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4919 int UNUSED written = abuf->written;
4920 IADDR UNUSED pc = abuf->addr;
4921 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4922
4923 SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
4924
4925#undef OPRND
4926#undef FLD
4927 }
4928 NEXT (vpc);
4929
4930 CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */
4931{
4932 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4933 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4934#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4935#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4936 int UNUSED written = 0;
4937 IADDR UNUSED pc = abuf->addr;
4938 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4939
4940 {
4941 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
4942 OPRND (accs) = opval;
4943 TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
4944 }
4945
4946#undef OPRND
4947#undef FLD
4948}
4949 NEXT (vpc);
4950
4951CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */
4952 {
4953 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4954 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4955#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4956#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4957 int UNUSED written = abuf->written;
4958 IADDR UNUSED pc = abuf->addr;
4959 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4960
4961 SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
4962
4963#undef OPRND
4964#undef FLD
4965 }
4966 NEXT (vpc);
4967
4968 CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */
4969{
4970 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4971 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
de8f5985 4972#define FLD(f) abuf->fields.sfmt_ld_plus.f
2df3850c
JM		 4973#define OPRND(f) par_exec->operands.sfmt_mvtc.f
4974 int UNUSED written = 0;
4975 IADDR UNUSED pc = abuf->addr;
4976 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4977
4978 {
4979 USI opval = * FLD (i_sr);
4980 OPRND (dcr) = opval;
4981 TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
4982 }
4983
4984#undef OPRND
4985#undef FLD
4986}
4987 NEXT (vpc);
4988
4989CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */
4990 {
4991 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4992 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
de8f5985 4993#define FLD(f) abuf->fields.sfmt_ld_plus.f
2df3850c
JM		 4994#define OPRND(f) par_exec->operands.sfmt_mvtc.f
4995 int UNUSED written = abuf->written;
4996 IADDR UNUSED pc = abuf->addr;
4997 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4998
4999 SET_H_CR (FLD (f_r1), OPRND (dcr));
5000
5001#undef OPRND
5002#undef FLD
5003 }
5004 NEXT (vpc);
5005
5006 CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */
5007{
5008 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5009 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5010#define FLD(f) abuf->fields.sfmt_ld_plus.f
5011#define OPRND(f) par_exec->operands.sfmt_mv.f
5012 int UNUSED written = 0;
5013 IADDR UNUSED pc = abuf->addr;
5014 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5015
5016 {
5017 SI opval = NEGSI (* FLD (i_sr));
5018 OPRND (dr) = opval;
5019 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5020 }
5021
5022#undef OPRND
5023#undef FLD
5024}
5025 NEXT (vpc);
5026
5027CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */
5028 {
5029 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5030 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5031#define FLD(f) abuf->fields.sfmt_ld_plus.f
5032#define OPRND(f) par_exec->operands.sfmt_mv.f
5033 int UNUSED written = abuf->written;
5034 IADDR UNUSED pc = abuf->addr;
5035 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5036
5037 * FLD (i_dr) = OPRND (dr);
5038
5039#undef OPRND
5040#undef FLD
5041 }
5042 NEXT (vpc);
5043
5044 CASE (sem, INSN_PAR_NOP) : /* nop */
5045{
5046 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5047 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5048#define FLD(f) abuf->fields.fmt_empty.f
5049#define OPRND(f) par_exec->operands.sfmt_nop.f
5050 int UNUSED written = 0;
5051 IADDR UNUSED pc = abuf->addr;
5052 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5053
5054PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
5055
5056#undef OPRND
5057#undef FLD
5058}
5059 NEXT (vpc);
5060
5061CASE (sem, INSN_WRITE_NOP) : /* nop */
5062 {
5063 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5064 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5065#define FLD(f) abuf->fields.fmt_empty.f
5066#define OPRND(f) par_exec->operands.sfmt_nop.f
5067 int UNUSED written = abuf->written;
5068 IADDR UNUSED pc = abuf->addr;
5069 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5070
5071
5072#undef OPRND
5073#undef FLD
5074 }
5075 NEXT (vpc);
5076
5077 CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */
5078{
5079 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5080 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5081#define FLD(f) abuf->fields.sfmt_ld_plus.f
5082#define OPRND(f) par_exec->operands.sfmt_mv.f
5083 int UNUSED written = 0;
5084 IADDR UNUSED pc = abuf->addr;
5085 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5086
5087 {
5088 SI opval = INVSI (* FLD (i_sr));
5089 OPRND (dr) = opval;
5090 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5091 }
5092
5093#undef OPRND
5094#undef FLD
5095}
5096 NEXT (vpc);
5097
5098CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */
5099 {
5100 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5101 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5102#define FLD(f) abuf->fields.sfmt_ld_plus.f
5103#define OPRND(f) par_exec->operands.sfmt_mv.f
5104 int UNUSED written = abuf->written;
5105 IADDR UNUSED pc = abuf->addr;
5106 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5107
5108 * FLD (i_dr) = OPRND (dr);
5109
5110#undef OPRND
5111#undef FLD
5112 }
5113 NEXT (vpc);
5114
5115 CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5116{
5117 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5118 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5119#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5120#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5121 int UNUSED written = 0;
5122 IADDR UNUSED pc = abuf->addr;
5123 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5124
5125{
5126 DI tmp_tmp1;
5127 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5128 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
5129 {
5130 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
5131 OPRND (accd) = opval;
5132 TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
5133 }
5134}
5135
5136#undef OPRND
5137#undef FLD
5138}
5139 NEXT (vpc);
5140
5141CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5142 {
5143 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5144 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5145#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5146#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5147 int UNUSED written = abuf->written;
5148 IADDR UNUSED pc = abuf->addr;
5149 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5150
5151 SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5152
5153#undef OPRND
5154#undef FLD
5155 }
5156 NEXT (vpc);
5157
5158 CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5159{
5160 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5161 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5162#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5163#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5164 int UNUSED written = 0;
5165 IADDR UNUSED pc = abuf->addr;
5166 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5167
5168{
5169 DI tmp_tmp1;
5170 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5171 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
5172 {
5173 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
5174 OPRND (accd) = opval;
5175 TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
5176 }
5177}
5178
5179#undef OPRND
5180#undef FLD
5181}
5182 NEXT (vpc);
5183
5184CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5185 {
5186 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5187 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5188#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5189#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5190 int UNUSED written = abuf->written;
5191 IADDR UNUSED pc = abuf->addr;
5192 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5193
5194 SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5195
5196#undef OPRND
5197#undef FLD
5198 }
5199 NEXT (vpc);
5200
5201 CASE (sem, INSN_PAR_RTE) : /* rte */
5202{
5203 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5204 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5205#define FLD(f) abuf->fields.fmt_empty.f
5206#define OPRND(f) par_exec->operands.sfmt_rte.f
5207 int UNUSED written = 0;
5208 IADDR UNUSED pc = abuf->addr;
5209 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5210
5211{
5212 {
5213 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
5214 OPRND (pc) = opval;
5215 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5216 }
5217 {
5218 USI opval = GET_H_CR (((UINT) 14));
5219 OPRND (h_cr_6) = opval;
5220 TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
5221 }
5222 {
5223 UQI opval = CPU (h_bpsw);
5224 OPRND (h_psw) = opval;
5225 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
5226 }
5227 {
5228 UQI opval = CPU (h_bbpsw);
5229 OPRND (h_bpsw) = opval;
5230 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
5231 }
5232}
5233
5234#undef OPRND
5235#undef FLD
5236}
5237 NEXT (vpc);
5238
5239CASE (sem, INSN_WRITE_RTE) : /* rte */
5240 {
5241 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5242 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5243#define FLD(f) abuf->fields.fmt_empty.f
5244#define OPRND(f) par_exec->operands.sfmt_rte.f
5245 int UNUSED written = abuf->written;
5246 IADDR UNUSED pc = abuf->addr;
5247 SEM_BRANCH_INIT
5248 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5249
5250 CPU (h_bpsw) = OPRND (h_bpsw);
5251 SET_H_CR (((UINT) 6), OPRND (h_cr_6));
5252 SET_H_PSW (OPRND (h_psw));
5253 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5254
5255 SEM_BRANCH_FINI (vpc);
5256#undef OPRND
5257#undef FLD
5258 }
5259 NEXT (vpc);
5260
5261 CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */
5262{
5263 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5264 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5265#define FLD(f) abuf->fields.sfmt_add.f
5266#define OPRND(f) par_exec->operands.sfmt_add.f
5267 int UNUSED written = 0;
5268 IADDR UNUSED pc = abuf->addr;
5269 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5270
5271 {
5272 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5273 OPRND (dr) = opval;
5274 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5275 }
5276
5277#undef OPRND
5278#undef FLD
5279}
5280 NEXT (vpc);
5281
5282CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */
5283 {
5284 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5285 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5286#define FLD(f) abuf->fields.sfmt_add.f
5287#define OPRND(f) par_exec->operands.sfmt_add.f
5288 int UNUSED written = abuf->written;
5289 IADDR UNUSED pc = abuf->addr;
5290 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5291
5292 * FLD (i_dr) = OPRND (dr);
5293
5294#undef OPRND
5295#undef FLD
5296 }
5297 NEXT (vpc);
5298
5299 CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */
5300{
5301 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5302 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5303#define FLD(f) abuf->fields.sfmt_slli.f
5304#define OPRND(f) par_exec->operands.sfmt_slli.f
5305 int UNUSED written = 0;
5306 IADDR UNUSED pc = abuf->addr;
5307 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5308
5309 {
5310 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
5311 OPRND (dr) = opval;
5312 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5313 }
5314
5315#undef OPRND
5316#undef FLD
5317}
5318 NEXT (vpc);
5319
5320CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */
5321 {
5322 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5323 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5324#define FLD(f) abuf->fields.sfmt_slli.f
5325#define OPRND(f) par_exec->operands.sfmt_slli.f
5326 int UNUSED written = abuf->written;
5327 IADDR UNUSED pc = abuf->addr;
5328 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5329
5330 * FLD (i_dr) = OPRND (dr);
5331
5332#undef OPRND
5333#undef FLD
5334 }
5335 NEXT (vpc);
5336
5337 CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */
5338{
5339 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5340 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5341#define FLD(f) abuf->fields.sfmt_add.f
5342#define OPRND(f) par_exec->operands.sfmt_add.f
5343 int UNUSED written = 0;
5344 IADDR UNUSED pc = abuf->addr;
5345 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5346
5347 {
5348 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5349 OPRND (dr) = opval;
5350 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5351 }
5352
5353#undef OPRND
5354#undef FLD
5355}
5356 NEXT (vpc);
5357
5358CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */
5359 {
5360 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5361 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5362#define FLD(f) abuf->fields.sfmt_add.f
5363#define OPRND(f) par_exec->operands.sfmt_add.f
5364 int UNUSED written = abuf->written;
5365 IADDR UNUSED pc = abuf->addr;
5366 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5367
5368 * FLD (i_dr) = OPRND (dr);
5369
5370#undef OPRND
5371#undef FLD
5372 }
5373 NEXT (vpc);
5374
5375 CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */
5376{
5377 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5378 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5379#define FLD(f) abuf->fields.sfmt_slli.f
5380#define OPRND(f) par_exec->operands.sfmt_slli.f
5381 int UNUSED written = 0;
5382 IADDR UNUSED pc = abuf->addr;
5383 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5384
5385 {
5386 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
5387 OPRND (dr) = opval;
5388 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5389 }
5390
5391#undef OPRND
5392#undef FLD
5393}
5394 NEXT (vpc);
5395
5396CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */
5397 {
5398 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5399 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5400#define FLD(f) abuf->fields.sfmt_slli.f
5401#define OPRND(f) par_exec->operands.sfmt_slli.f
5402 int UNUSED written = abuf->written;
5403 IADDR UNUSED pc = abuf->addr;
5404 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5405
5406 * FLD (i_dr) = OPRND (dr);
5407
5408#undef OPRND
5409#undef FLD
5410 }
5411 NEXT (vpc);
5412
5413 CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */
5414{
5415 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5416 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5417#define FLD(f) abuf->fields.sfmt_add.f
5418#define OPRND(f) par_exec->operands.sfmt_add.f
5419 int UNUSED written = 0;
5420 IADDR UNUSED pc = abuf->addr;
5421 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5422
5423 {
5424 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5425 OPRND (dr) = opval;
5426 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5427 }
5428
5429#undef OPRND
5430#undef FLD
5431}
5432 NEXT (vpc);
5433
5434CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */
5435 {
5436 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5437 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5438#define FLD(f) abuf->fields.sfmt_add.f
5439#define OPRND(f) par_exec->operands.sfmt_add.f
5440 int UNUSED written = abuf->written;
5441 IADDR UNUSED pc = abuf->addr;
5442 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5443
5444 * FLD (i_dr) = OPRND (dr);
5445
5446#undef OPRND
5447#undef FLD
5448 }
5449 NEXT (vpc);
5450
5451 CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */
5452{
5453 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5454 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5455#define FLD(f) abuf->fields.sfmt_slli.f
5456#define OPRND(f) par_exec->operands.sfmt_slli.f
5457 int UNUSED written = 0;
5458 IADDR UNUSED pc = abuf->addr;
5459 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5460
5461 {
5462 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
5463 OPRND (dr) = opval;
5464 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5465 }
5466
5467#undef OPRND
5468#undef FLD
5469}
5470 NEXT (vpc);
5471
5472CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */
5473 {
5474 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5475 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5476#define FLD(f) abuf->fields.sfmt_slli.f
5477#define OPRND(f) par_exec->operands.sfmt_slli.f
5478 int UNUSED written = abuf->written;
5479 IADDR UNUSED pc = abuf->addr;
5480 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5481
5482 * FLD (i_dr) = OPRND (dr);
5483
5484#undef OPRND
5485#undef FLD
5486 }
5487 NEXT (vpc);
5488
5489 CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */
5490{
5491 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5492 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5493#define FLD(f) abuf->fields.sfmt_st_plus.f
5494#define OPRND(f) par_exec->operands.sfmt_st.f
5495 int UNUSED written = 0;
5496 IADDR UNUSED pc = abuf->addr;
5497 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5498
5499 {
5500 SI opval = * FLD (i_src1);
5501 OPRND (h_memory_src2_idx) = * FLD (i_src2);
5502 OPRND (h_memory_src2) = opval;
5503 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5504 }
5505
5506#undef OPRND
5507#undef FLD
5508}
5509 NEXT (vpc);
5510
5511CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */
5512 {
5513 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5514 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5515#define FLD(f) abuf->fields.sfmt_st_plus.f
5516#define OPRND(f) par_exec->operands.sfmt_st.f
5517 int UNUSED written = abuf->written;
5518 IADDR UNUSED pc = abuf->addr;
5519 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5520
5521 SETMEMSI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5522
5523#undef OPRND
5524#undef FLD
5525 }
5526 NEXT (vpc);
5527
5528 CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */
5529{
5530 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5531 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5532#define FLD(f) abuf->fields.sfmt_st_plus.f
5533#define OPRND(f) par_exec->operands.sfmt_stb.f
5534 int UNUSED written = 0;
5535 IADDR UNUSED pc = abuf->addr;
5536 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5537
5538 {
5539 QI opval = * FLD (i_src1);
5540 OPRND (h_memory_src2_idx) = * FLD (i_src2);
5541 OPRND (h_memory_src2) = opval;
5542 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5543 }
5544
5545#undef OPRND
5546#undef FLD
5547}
5548 NEXT (vpc);
5549
5550CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */
5551 {
5552 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5553 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5554#define FLD(f) abuf->fields.sfmt_st_plus.f
5555#define OPRND(f) par_exec->operands.sfmt_stb.f
5556 int UNUSED written = abuf->written;
5557 IADDR UNUSED pc = abuf->addr;
5558 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5559
5560 SETMEMQI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5561
5562#undef OPRND
5563#undef FLD
5564 }
5565 NEXT (vpc);
5566
5567 CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */
5568{
5569 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5570 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5571#define FLD(f) abuf->fields.sfmt_st_plus.f
5572#define OPRND(f) par_exec->operands.sfmt_sth.f
5573 int UNUSED written = 0;
5574 IADDR UNUSED pc = abuf->addr;
5575 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5576
5577 {
5578 HI opval = * FLD (i_src1);
5579 OPRND (h_memory_src2_idx) = * FLD (i_src2);
5580 OPRND (h_memory_src2) = opval;
5581 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5582 }
5583
5584#undef OPRND
5585#undef FLD
5586}
5587 NEXT (vpc);
5588
5589CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */
5590 {
5591 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5592 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5593#define FLD(f) abuf->fields.sfmt_st_plus.f
5594#define OPRND(f) par_exec->operands.sfmt_sth.f
5595 int UNUSED written = abuf->written;
5596 IADDR UNUSED pc = abuf->addr;
5597 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5598
5599 SETMEMHI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5600
5601#undef OPRND
5602#undef FLD
5603 }
5604 NEXT (vpc);
5605
5606 CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */
5607{
5608 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5609 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5610#define FLD(f) abuf->fields.sfmt_st_plus.f
5611#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5612 int UNUSED written = 0;
5613 IADDR UNUSED pc = abuf->addr;
5614 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5615
5616{
5617 SI tmp_new_src2;
5618 tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
5619 {
5620 SI opval = * FLD (i_src1);
5621 OPRND (h_memory_new_src2_idx) = tmp_new_src2;
5622 OPRND (h_memory_new_src2) = opval;
5623 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5624 }
5625 {
5626 SI opval = tmp_new_src2;
5627 OPRND (src2) = opval;
5628 TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
5629 }
5630}
5631
5632#undef OPRND
5633#undef FLD
5634}
5635 NEXT (vpc);
5636
5637CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */
5638 {
5639 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5640 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5641#define FLD(f) abuf->fields.sfmt_st_plus.f
5642#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5643 int UNUSED written = abuf->written;
5644 IADDR UNUSED pc = abuf->addr;
5645 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5646
5647 SETMEMSI (current_cpu, pc, OPRND (h_memory_new_src2_idx), OPRND (h_memory_new_src2));
5648 * FLD (i_src2) = OPRND (src2);
5649
5650#undef OPRND
5651#undef FLD
5652 }
5653 NEXT (vpc);
5654
5655 CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */
5656{
5657 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5658 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5659#define FLD(f) abuf->fields.sfmt_st_plus.f
5660#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5661 int UNUSED written = 0;
5662 IADDR UNUSED pc = abuf->addr;
5663 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5664
5665{
5666 SI tmp_new_src2;
5667 tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
5668 {
5669 SI opval = * FLD (i_src1);
5670 OPRND (h_memory_new_src2_idx) = tmp_new_src2;
5671 OPRND (h_memory_new_src2) = opval;
5672 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5673 }
5674 {
5675 SI opval = tmp_new_src2;
5676 OPRND (src2) = opval;
5677 TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
5678 }
5679}
5680
5681#undef OPRND
5682#undef FLD
5683}
5684 NEXT (vpc);
5685
5686CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */
5687 {
5688 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5689 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5690#define FLD(f) abuf->fields.sfmt_st_plus.f
5691#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5692 int UNUSED written = abuf->written;
5693 IADDR UNUSED pc = abuf->addr;
5694 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5695
5696 SETMEMSI (current_cpu, pc, OPRND (h_memory_new_src2_idx), OPRND (h_memory_new_src2));
5697 * FLD (i_src2) = OPRND (src2);
5698
5699#undef OPRND
5700#undef FLD
5701 }
5702 NEXT (vpc);
5703
5704 CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */
5705{
5706 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5707 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5708#define FLD(f) abuf->fields.sfmt_add.f
5709#define OPRND(f) par_exec->operands.sfmt_add.f
5710 int UNUSED written = 0;
5711 IADDR UNUSED pc = abuf->addr;
5712 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5713
5714 {
5715 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
5716 OPRND (dr) = opval;
5717 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5718 }
5719
5720#undef OPRND
5721#undef FLD
5722}
5723 NEXT (vpc);
5724
5725CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */
5726 {
5727 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5728 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5729#define FLD(f) abuf->fields.sfmt_add.f
5730#define OPRND(f) par_exec->operands.sfmt_add.f
5731 int UNUSED written = abuf->written;
5732 IADDR UNUSED pc = abuf->addr;
5733 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5734
5735 * FLD (i_dr) = OPRND (dr);
5736
5737#undef OPRND
5738#undef FLD
5739 }
5740 NEXT (vpc);
5741
5742 CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */
5743{
5744 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5745 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5746#define FLD(f) abuf->fields.sfmt_add.f
5747#define OPRND(f) par_exec->operands.sfmt_addv.f
5748 int UNUSED written = 0;
5749 IADDR UNUSED pc = abuf->addr;
5750 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5751
5752{
5753 SI temp0;BI temp1;
5754 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
5755 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
5756 {
5757 SI opval = temp0;
5758 OPRND (dr) = opval;
5759 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5760 }
5761 {
5762 BI opval = temp1;
5763 OPRND (condbit) = opval;
5764 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
5765 }
5766}
5767
5768#undef OPRND
5769#undef FLD
5770}
5771 NEXT (vpc);
5772
5773CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */
5774 {
5775 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5776 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5777#define FLD(f) abuf->fields.sfmt_add.f
5778#define OPRND(f) par_exec->operands.sfmt_addv.f
5779 int UNUSED written = abuf->written;
5780 IADDR UNUSED pc = abuf->addr;
5781 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5782
5783 CPU (h_cond) = OPRND (condbit);
5784 * FLD (i_dr) = OPRND (dr);
5785
5786#undef OPRND
5787#undef FLD
5788 }
5789 NEXT (vpc);
5790
5791 CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */
5792{
5793 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5794 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5795#define FLD(f) abuf->fields.sfmt_add.f
5796#define OPRND(f) par_exec->operands.sfmt_addx.f
5797 int UNUSED written = 0;
5798 IADDR UNUSED pc = abuf->addr;
5799 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5800
5801{
5802 SI temp0;BI temp1;
5803 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
5804 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
5805 {
5806 SI opval = temp0;
5807 OPRND (dr) = opval;
5808 TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5809 }
5810 {
5811 BI opval = temp1;
5812 OPRND (condbit) = opval;
5813 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
5814 }
5815}
5816
5817#undef OPRND
5818#undef FLD
5819}
5820 NEXT (vpc);
5821
5822CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */
5823 {
5824 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5825 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5826#define FLD(f) abuf->fields.sfmt_add.f
5827#define OPRND(f) par_exec->operands.sfmt_addx.f
5828 int UNUSED written = abuf->written;
5829 IADDR UNUSED pc = abuf->addr;
5830 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5831
5832 CPU (h_cond) = OPRND (condbit);
5833 * FLD (i_dr) = OPRND (dr);
5834
5835#undef OPRND
5836#undef FLD
5837 }
5838 NEXT (vpc);
5839
5840 CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */
5841{
5842 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5843 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5844#define FLD(f) abuf->fields.sfmt_trap.f
5845#define OPRND(f) par_exec->operands.sfmt_trap.f
5846 int UNUSED written = 0;
5847 IADDR UNUSED pc = abuf->addr;
5848 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5849
5850{
5851 {
5852 USI opval = GET_H_CR (((UINT) 6));
5853 OPRND (h_cr_14) = opval;
5854 TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
5855 }
5856 {
5857 USI opval = ADDSI (pc, 4);
5858 OPRND (h_cr_6) = opval;
5859 TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
5860 }
5861 {
5862 UQI opval = CPU (h_bpsw);
5863 OPRND (h_bbpsw) = opval;
5864 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
5865 }
5866 {
5867 UQI opval = GET_H_PSW ();
5868 OPRND (h_bpsw) = opval;
5869 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
5870 }
5871 {
5872 UQI opval = ANDQI (GET_H_PSW (), 128);
5873 OPRND (h_psw) = opval;
5874 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
5875 }
5876 {
5877 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
5878 OPRND (pc) = opval;
5879 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5880 }
5881}
5882
5883#undef OPRND
5884#undef FLD
5885}
5886 NEXT (vpc);
5887
5888CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */
5889 {
5890 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5891 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5892#define FLD(f) abuf->fields.sfmt_trap.f
5893#define OPRND(f) par_exec->operands.sfmt_trap.f
5894 int UNUSED written = abuf->written;
5895 IADDR UNUSED pc = abuf->addr;
5896 SEM_BRANCH_INIT
5897 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5898
5899 CPU (h_bbpsw) = OPRND (h_bbpsw);
5900 CPU (h_bpsw) = OPRND (h_bpsw);
5901 SET_H_CR (((UINT) 14), OPRND (h_cr_14));
5902 SET_H_CR (((UINT) 6), OPRND (h_cr_6));
5903 SET_H_PSW (OPRND (h_psw));
5904 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5905
5906 SEM_BRANCH_FINI (vpc);
5907#undef OPRND
5908#undef FLD
5909 }
5910 NEXT (vpc);
5911
5912 CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */
5913{
5914 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5915 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5916#define FLD(f) abuf->fields.sfmt_st_plus.f
5917#define OPRND(f) par_exec->operands.sfmt_unlock.f
5918 int UNUSED written = 0;
5919 IADDR UNUSED pc = abuf->addr;
5920 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5921
5922{
5923if (CPU (h_lock)) {
5924 {
5925 SI opval = * FLD (i_src1);
5926 OPRND (h_memory_src2_idx) = * FLD (i_src2);
5927 OPRND (h_memory_src2) = opval;
5928 written |= (1 << 4);
5929 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5930 }
5931}
5932 {
5933 BI opval = 0;
5934 OPRND (h_lock) = opval;
5935 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
5936 }
5937}
5938
5939 abuf->written = written;
5940#undef OPRND
5941#undef FLD
5942}
5943 NEXT (vpc);
5944
5945CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */
5946 {
5947 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5948 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5949#define FLD(f) abuf->fields.sfmt_st_plus.f
5950#define OPRND(f) par_exec->operands.sfmt_unlock.f
5951 int UNUSED written = abuf->written;
5952 IADDR UNUSED pc = abuf->addr;
5953 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5954
5955 CPU (h_lock) = OPRND (h_lock);
5956 if (written & (1 << 4))
5957 {
5958 SETMEMSI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5959 }
5960
5961#undef OPRND
5962#undef FLD
5963 }
5964 NEXT (vpc);
5965
5966 CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */
5967{
5968 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5969 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5970#define FLD(f) abuf->fields.sfmt_st_plus.f
5971#define OPRND(f) par_exec->operands.sfmt_cmpz.f
5972 int UNUSED written = 0;
5973 IADDR UNUSED pc = abuf->addr;
5974 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5975
5976 {
5977 BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
5978 OPRND (condbit) = opval;
5979 TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
5980 }
5981
5982#undef OPRND
5983#undef FLD
5984}
5985 NEXT (vpc);
5986
5987CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */
5988 {
5989 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5990 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5991#define FLD(f) abuf->fields.sfmt_st_plus.f
5992#define OPRND(f) par_exec->operands.sfmt_cmpz.f
5993 int UNUSED written = abuf->written;
5994 IADDR UNUSED pc = abuf->addr;
5995 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5996
5997 CPU (h_cond) = OPRND (condbit);
5998
5999#undef OPRND
6000#undef FLD
6001 }
6002 NEXT (vpc);
6003
6004 CASE (sem, INSN_PAR_SADD) : /* sadd */
6005{
6006 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6007 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6008#define FLD(f) abuf->fields.fmt_empty.f
6009#define OPRND(f) par_exec->operands.sfmt_sadd.f
6010 int UNUSED written = 0;
6011 IADDR UNUSED pc = abuf->addr;
6012 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6013
6014 {
6015 DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
6016 OPRND (h_accums_0) = opval;
6017 TRACE_RESULT (current_cpu, abuf, "accums-0", 'D', opval);
6018 }
6019
6020#undef OPRND
6021#undef FLD
6022}
6023 NEXT (vpc);
6024
6025CASE (sem, INSN_WRITE_SADD) : /* sadd */
6026 {
6027 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6028 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6029#define FLD(f) abuf->fields.fmt_empty.f
6030#define OPRND(f) par_exec->operands.sfmt_sadd.f
6031 int UNUSED written = abuf->written;
6032 IADDR UNUSED pc = abuf->addr;
6033 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6034
6035 SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_0));
6036
6037#undef OPRND
6038#undef FLD
6039 }
6040 NEXT (vpc);
6041
6042 CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */
6043{
6044 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6045 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6046#define FLD(f) abuf->fields.sfmt_st_plus.f
6047#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6048 int UNUSED written = 0;
6049 IADDR UNUSED pc = abuf->addr;
6050 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6051
6052 {
6053 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
6054 OPRND (h_accums_1) = opval;
6055 TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
6056 }
6057
6058#undef OPRND
6059#undef FLD
6060}
6061 NEXT (vpc);
6062
6063CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */
6064 {
6065 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6066 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6067#define FLD(f) abuf->fields.sfmt_st_plus.f
6068#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6069 int UNUSED written = abuf->written;
6070 IADDR UNUSED pc = abuf->addr;
6071 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6072
6073 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
6074
6075#undef OPRND
6076#undef FLD
6077 }
6078 NEXT (vpc);
6079
6080 CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */
6081{
6082 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6083 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6084#define FLD(f) abuf->fields.sfmt_st_plus.f
6085#define OPRND(f) par_exec->operands.sfmt_msblo.f
6086 int UNUSED written = 0;
6087 IADDR UNUSED pc = abuf->addr;
6088 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6089
6090 {
6091 DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
6092 OPRND (accum) = opval;
6093 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
6094 }
6095
6096#undef OPRND
6097#undef FLD
6098}
6099 NEXT (vpc);
6100
6101CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */
6102 {
6103 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6104 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6105#define FLD(f) abuf->fields.sfmt_st_plus.f
6106#define OPRND(f) par_exec->operands.sfmt_msblo.f
6107 int UNUSED written = abuf->written;
6108 IADDR UNUSED pc = abuf->addr;
6109 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6110
6111 SET_H_ACCUM (OPRND (accum));
6112
6113#undef OPRND
6114#undef FLD
6115 }
6116 NEXT (vpc);
6117
6118 CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */
6119{
6120 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6121 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6122#define FLD(f) abuf->fields.sfmt_st_plus.f
6123#define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6124 int UNUSED written = 0;
6125 IADDR UNUSED pc = abuf->addr;
6126 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6127
6128 {
6129 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
6130 OPRND (h_accums_1) = opval;
6131 TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
6132 }
6133
6134#undef OPRND
6135#undef FLD
6136}
6137 NEXT (vpc);
6138
6139CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */
6140 {
6141 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6142 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6143#define FLD(f) abuf->fields.sfmt_st_plus.f
6144#define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6145 int UNUSED written = abuf->written;
6146 IADDR UNUSED pc = abuf->addr;
6147 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6148
6149 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
6150
6151#undef OPRND
6152#undef FLD
6153 }
6154 NEXT (vpc);
6155
6156 CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */
6157{
6158 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6159 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6160#define FLD(f) abuf->fields.sfmt_st_plus.f
6161#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6162 int UNUSED written = 0;
6163 IADDR UNUSED pc = abuf->addr;
6164 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6165
6166 {
6167 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
6168 OPRND (h_accums_1) = opval;
6169 TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
6170 }
6171
6172#undef OPRND
6173#undef FLD
6174}
6175 NEXT (vpc);
6176
6177CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */
6178 {
6179 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6180 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6181#define FLD(f) abuf->fields.sfmt_st_plus.f
6182#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6183 int UNUSED written = abuf->written;
6184 IADDR UNUSED pc = abuf->addr;
6185 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6186
6187 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
6188
6189#undef OPRND
6190#undef FLD
6191 }
6192 NEXT (vpc);
6193
6194 CASE (sem, INSN_PAR_SC) : /* sc */
6195{
6196 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6197 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6198#define FLD(f) abuf->fields.fmt_empty.f
6199#define OPRND(f) par_exec->operands.sfmt_sc.f
6200 int UNUSED written = 0;
6201 IADDR UNUSED pc = abuf->addr;
6202 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6203
6204if (ZEXTBISI (CPU (h_cond)))
6205 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6206
6207#undef OPRND
6208#undef FLD
6209}
6210 NEXT (vpc);
6211
6212CASE (sem, INSN_WRITE_SC) : /* sc */
6213 {
6214 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6215 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6216#define FLD(f) abuf->fields.fmt_empty.f
6217#define OPRND(f) par_exec->operands.sfmt_sc.f
6218 int UNUSED written = abuf->written;
6219 IADDR UNUSED pc = abuf->addr;
6220 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6221
6222
6223#undef OPRND
6224#undef FLD
6225 }
6226 NEXT (vpc);
6227
6228 CASE (sem, INSN_PAR_SNC) : /* snc */
6229{
6230 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6231 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6232#define FLD(f) abuf->fields.fmt_empty.f
6233#define OPRND(f) par_exec->operands.sfmt_sc.f
6234 int UNUSED written = 0;
6235 IADDR UNUSED pc = abuf->addr;
6236 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6237
6238if (ZEXTBISI (NOTBI (CPU (h_cond))))
6239 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6240
6241#undef OPRND
6242#undef FLD
6243}
6244 NEXT (vpc);
6245
6246CASE (sem, INSN_WRITE_SNC) : /* snc */
6247 {
6248 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6249 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6250#define FLD(f) abuf->fields.fmt_empty.f
6251#define OPRND(f) par_exec->operands.sfmt_sc.f
6252 int UNUSED written = abuf->written;
6253 IADDR UNUSED pc = abuf->addr;
6254 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6255
6256
6257#undef OPRND
6258#undef FLD
6259 }
6260 NEXT (vpc);
6261
6262
6263 }
6264 ENDSWITCH (sem) /* End of semantic switch. */
6265
6266 /* At this point `vpc' contains the next insn to execute. */
6267}
6268
6269#undef DEFINE_SWITCH
6270#endif /* DEFINE_SWITCH */
GDB Binutils - Deliverables
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