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(PAREXEC): Renamed from PARALLEL_EXEC. All uses updated.
[deliverable/binutils-gdb.git] / sim / m32r / semx.c
CommitLineData
8e420152
DE		 1/* Simulator instruction semantics for m32rx.
2
b8a9943d
DE		 3This file is machine generated with CGEN.
4
8e420152
DE		 5Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
6
7This file is part of the GNU Simulators.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23*/
24
25#define WANT_CPU
26#define WANT_CPU_M32RX
27
28#include "sim-main.h"
29#include "cgen-mem.h"
30#include "cgen-ops.h"
31#include "cpu-sim.h"
32
33#if ! defined (SCACHE_P) || (defined (SCACHE_P) && WITH_SCACHE)
34
35#undef GET_ATTR
36#define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->opcode, CGEN_INSN_##attr)
37
38/* Perform add: add $dr,$sr. */
39CIA
40SEM_FN_NAME (m32rx,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
41{
b8a9943d 42 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 43#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
44 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 45 CIA new_pc = CPU (h_pc) + 2;
46 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
47 EXTRACT_FMT_0_ADD_CODE
48
8e420152 49 CPU (h_gr[f_r1]) = ADDSI (OPRND (dr), OPRND (sr));
b8a9943d
DE		 50 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
51
8e420152
DE		 52#if WITH_PROFILE_MODEL_P
53 if (PROFILE_MODEL_P (current_cpu))
54 {
55 m32rx_model_mark_get_h_gr (current_cpu, abuf);
56 m32rx_model_mark_set_h_gr (current_cpu, abuf);
57 m32rx_model_profile_insn (current_cpu, abuf);
58 }
59#endif
b8a9943d 60
8e420152
DE		 61 return new_pc;
62#undef OPRND
8e420152
DE		 63}
64
65/* Perform add3: add3 $dr,$sr,#$slo16. */
66CIA
67SEM_FN_NAME (m32rx,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
68{
b8a9943d 69 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 70#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_1_add3.f
71 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 72 CIA new_pc = CPU (h_pc) + 4;
73 EXTRACT_FMT_1_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
74 EXTRACT_FMT_1_ADD3_CODE
75
8e420152 76 CPU (h_gr[f_r1]) = ADDSI (OPRND (sr), OPRND (slo16));
b8a9943d
DE		 77 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
78
8e420152
DE		 79#if WITH_PROFILE_MODEL_P
80 if (PROFILE_MODEL_P (current_cpu))
81 {
82 m32rx_model_mark_get_h_gr (current_cpu, abuf);
83 m32rx_model_mark_set_h_gr (current_cpu, abuf);
84 m32rx_model_profile_insn (current_cpu, abuf);
85 }
86#endif
b8a9943d 87
8e420152
DE		 88 return new_pc;
89#undef OPRND
8e420152
DE		 90}
91
92/* Perform and: and $dr,$sr. */
93CIA
94SEM_FN_NAME (m32rx,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
95{
b8a9943d 96 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 97#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
98 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 99 CIA new_pc = CPU (h_pc) + 2;
100 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
101 EXTRACT_FMT_0_ADD_CODE
102
8e420152 103 CPU (h_gr[f_r1]) = ANDSI (OPRND (dr), OPRND (sr));
b8a9943d
DE		 104 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
105
8e420152
DE		 106#if WITH_PROFILE_MODEL_P
107 if (PROFILE_MODEL_P (current_cpu))
108 {
109 m32rx_model_mark_get_h_gr (current_cpu, abuf);
110 m32rx_model_mark_set_h_gr (current_cpu, abuf);
111 m32rx_model_profile_insn (current_cpu, abuf);
112 }
113#endif
b8a9943d 114
8e420152
DE		 115 return new_pc;
116#undef OPRND
8e420152
DE		 117}
118
119/* Perform and3: and3 $dr,$sr,#$uimm16. */
120CIA
121SEM_FN_NAME (m32rx,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
122{
b8a9943d 123 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 124#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_2_and3.f
125 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 126 CIA new_pc = CPU (h_pc) + 4;
127 EXTRACT_FMT_2_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
128 EXTRACT_FMT_2_AND3_CODE
129
8e420152 130 CPU (h_gr[f_r1]) = ANDSI (OPRND (sr), OPRND (uimm16));
b8a9943d
DE		 131 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
132
8e420152
DE		 133#if WITH_PROFILE_MODEL_P
134 if (PROFILE_MODEL_P (current_cpu))
135 {
136 m32rx_model_mark_get_h_gr (current_cpu, abuf);
137 m32rx_model_mark_set_h_gr (current_cpu, abuf);
138 m32rx_model_profile_insn (current_cpu, abuf);
139 }
140#endif
b8a9943d 141
8e420152
DE		 142 return new_pc;
143#undef OPRND
8e420152
DE		 144}
145
146/* Perform or: or $dr,$sr. */
147CIA
148SEM_FN_NAME (m32rx,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
149{
b8a9943d 150 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 151#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
152 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 153 CIA new_pc = CPU (h_pc) + 2;
154 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
155 EXTRACT_FMT_0_ADD_CODE
156
8e420152 157 CPU (h_gr[f_r1]) = ORSI (OPRND (dr), OPRND (sr));
b8a9943d
DE		 158 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
159
8e420152
DE		 160#if WITH_PROFILE_MODEL_P
161 if (PROFILE_MODEL_P (current_cpu))
162 {
163 m32rx_model_mark_get_h_gr (current_cpu, abuf);
164 m32rx_model_mark_set_h_gr (current_cpu, abuf);
165 m32rx_model_profile_insn (current_cpu, abuf);
166 }
167#endif
b8a9943d 168
8e420152
DE		 169 return new_pc;
170#undef OPRND
8e420152
DE		 171}
172
173/* Perform or3: or3 $dr,$sr,#$ulo16. */
174CIA
175SEM_FN_NAME (m32rx,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
176{
b8a9943d 177 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 178#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_3_or3.f
179 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 180 CIA new_pc = CPU (h_pc) + 4;
181 EXTRACT_FMT_3_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
182 EXTRACT_FMT_3_OR3_CODE
183
8e420152 184 CPU (h_gr[f_r1]) = ORSI (OPRND (sr), OPRND (ulo16));
b8a9943d
DE		 185 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
186
8e420152
DE		 187#if WITH_PROFILE_MODEL_P
188 if (PROFILE_MODEL_P (current_cpu))
189 {
190 m32rx_model_mark_get_h_gr (current_cpu, abuf);
191 m32rx_model_mark_set_h_gr (current_cpu, abuf);
192 m32rx_model_profile_insn (current_cpu, abuf);
193 }
194#endif
b8a9943d 195
8e420152
DE		 196 return new_pc;
197#undef OPRND
8e420152
DE		 198}
199
200/* Perform xor: xor $dr,$sr. */
201CIA
202SEM_FN_NAME (m32rx,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
203{
b8a9943d 204 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 205#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
206 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 207 CIA new_pc = CPU (h_pc) + 2;
208 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
209 EXTRACT_FMT_0_ADD_CODE
210
8e420152 211 CPU (h_gr[f_r1]) = XORSI (OPRND (dr), OPRND (sr));
b8a9943d
DE		 212 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
213
8e420152
DE		 214#if WITH_PROFILE_MODEL_P
215 if (PROFILE_MODEL_P (current_cpu))
216 {
217 m32rx_model_mark_get_h_gr (current_cpu, abuf);
218 m32rx_model_mark_set_h_gr (current_cpu, abuf);
219 m32rx_model_profile_insn (current_cpu, abuf);
220 }
221#endif
b8a9943d 222
8e420152
DE		 223 return new_pc;
224#undef OPRND
8e420152
DE		 225}
226
227/* Perform xor3: xor3 $dr,$sr,#$uimm16. */
228CIA
229SEM_FN_NAME (m32rx,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
230{
b8a9943d 231 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 232#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_2_and3.f
233 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 234 CIA new_pc = CPU (h_pc) + 4;
235 EXTRACT_FMT_2_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
236 EXTRACT_FMT_2_AND3_CODE
237
8e420152 238 CPU (h_gr[f_r1]) = XORSI (OPRND (sr), OPRND (uimm16));
b8a9943d
DE		 239 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
240
8e420152
DE		 241#if WITH_PROFILE_MODEL_P
242 if (PROFILE_MODEL_P (current_cpu))
243 {
244 m32rx_model_mark_get_h_gr (current_cpu, abuf);
245 m32rx_model_mark_set_h_gr (current_cpu, abuf);
246 m32rx_model_profile_insn (current_cpu, abuf);
247 }
248#endif
b8a9943d 249
8e420152
DE		 250 return new_pc;
251#undef OPRND
8e420152
DE		 252}
253
254/* Perform addi: addi $dr,#$simm8. */
255CIA
256SEM_FN_NAME (m32rx,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
257{
b8a9943d 258 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 259#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_4_addi.f
260 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 261 CIA new_pc = CPU (h_pc) + 2;
262 EXTRACT_FMT_4_ADDI_VARS /* f-op1 f-r1 f-simm8 */
263 EXTRACT_FMT_4_ADDI_CODE
264
8e420152 265 CPU (h_gr[f_r1]) = ADDSI (OPRND (dr), OPRND (simm8));
b8a9943d
DE		 266 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
267
8e420152
DE		 268#if WITH_PROFILE_MODEL_P
269 if (PROFILE_MODEL_P (current_cpu))
270 {
271 m32rx_model_mark_get_h_gr (current_cpu, abuf);
272 m32rx_model_mark_set_h_gr (current_cpu, abuf);
273 m32rx_model_profile_insn (current_cpu, abuf);
274 }
275#endif
b8a9943d 276
8e420152
DE		 277 return new_pc;
278#undef OPRND
8e420152
DE		 279}
280
281/* Perform addv: addv $dr,$sr. */
282CIA
283SEM_FN_NAME (m32rx,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
284{
b8a9943d 285 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 286#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
287 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 288 CIA new_pc = CPU (h_pc) + 2;
289 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
290 EXTRACT_FMT_0_ADD_CODE
291
8e420152
DE		 292do {
293 BI temp1;SI temp0;
294 temp0 = ADDSI (OPRND (dr), OPRND (sr));
295 temp1 = ADDOFSI (OPRND (dr), OPRND (sr), 0);
296 CPU (h_gr[f_r1]) = temp0;
b8a9943d 297 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 298 CPU (h_cond) = temp1;
b8a9943d 299 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
8e420152 300} while (0);
b8a9943d 301
8e420152
DE		 302#if WITH_PROFILE_MODEL_P
303 if (PROFILE_MODEL_P (current_cpu))
304 {
305 m32rx_model_mark_get_h_gr (current_cpu, abuf);
306 m32rx_model_mark_set_h_gr (current_cpu, abuf);
307 m32rx_model_profile_insn (current_cpu, abuf);
308 }
309#endif
b8a9943d 310
8e420152
DE		 311 return new_pc;
312#undef OPRND
8e420152
DE		 313}
314
315/* Perform addv3: addv3 $dr,$sr,#$simm16. */
316CIA
317SEM_FN_NAME (m32rx,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
318{
b8a9943d 319 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 320#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_5_addv3.f
321 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 322 CIA new_pc = CPU (h_pc) + 4;
323 EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
324 EXTRACT_FMT_5_ADDV3_CODE
325
8e420152
DE		 326do {
327 BI temp1;SI temp0;
328 temp0 = ADDSI (OPRND (sr), OPRND (simm16));
329 temp1 = ADDOFSI (OPRND (sr), OPRND (simm16), 0);
330 CPU (h_gr[f_r1]) = temp0;
b8a9943d 331 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 332 CPU (h_cond) = temp1;
b8a9943d 333 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
8e420152 334} while (0);
b8a9943d 335
8e420152
DE		 336#if WITH_PROFILE_MODEL_P
337 if (PROFILE_MODEL_P (current_cpu))
338 {
339 m32rx_model_mark_get_h_gr (current_cpu, abuf);
340 m32rx_model_mark_set_h_gr (current_cpu, abuf);
341 m32rx_model_profile_insn (current_cpu, abuf);
342 }
343#endif
b8a9943d 344
8e420152
DE		 345 return new_pc;
346#undef OPRND
8e420152
DE		 347}
348
349/* Perform addx: addx $dr,$sr. */
350CIA
351SEM_FN_NAME (m32rx,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
352{
b8a9943d 353 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 354#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_6_addx.f
355 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 356 CIA new_pc = CPU (h_pc) + 2;
357 EXTRACT_FMT_6_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
358 EXTRACT_FMT_6_ADDX_CODE
359
8e420152
DE		 360do {
361 BI temp1;SI temp0;
362 temp0 = ADDCSI (OPRND (dr), OPRND (sr), OPRND (condbit));
363 temp1 = ADDCFSI (OPRND (dr), OPRND (sr), OPRND (condbit));
364 CPU (h_gr[f_r1]) = temp0;
b8a9943d 365 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 366 CPU (h_cond) = temp1;
b8a9943d 367 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
8e420152 368} while (0);
b8a9943d 369
8e420152
DE		 370#if WITH_PROFILE_MODEL_P
371 if (PROFILE_MODEL_P (current_cpu))
372 {
373 m32rx_model_mark_get_h_gr (current_cpu, abuf);
374 m32rx_model_mark_set_h_gr (current_cpu, abuf);
375 m32rx_model_profile_insn (current_cpu, abuf);
376 }
377#endif
b8a9943d 378
8e420152
DE		 379 return new_pc;
380#undef OPRND
8e420152
DE		 381}
382
383/* Perform bc8: bc $disp8. */
384CIA
385SEM_FN_NAME (m32rx,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
386{
b8a9943d 387 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 388#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_7_bc8.f
389 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 390 CIA new_pc = CPU (h_pc) + 2;
8e420152 391 int taken_p = 0;
b8a9943d
DE		 392 EXTRACT_FMT_7_BC8_VARS /* f-op1 f-r1 f-disp8 */
393 EXTRACT_FMT_7_BC8_CODE
394
8e420152
DE		 395if (OPRND (condbit)) {
396 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
397}
b8a9943d 398
8e420152
DE		 399#if WITH_PROFILE_MODEL_P
400 if (PROFILE_MODEL_P (current_cpu))
401 {
402 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
403 }
404#endif
b8a9943d 405
8e420152
DE		 406 return new_pc;
407#undef OPRND
8e420152
DE		 408}
409
410/* Perform bc24: bc $disp24. */
411CIA
412SEM_FN_NAME (m32rx,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
413{
b8a9943d 414 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 415#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_8_bc24.f
416 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 417 CIA new_pc = CPU (h_pc) + 4;
8e420152 418 int taken_p = 0;
b8a9943d
DE		 419 EXTRACT_FMT_8_BC24_VARS /* f-op1 f-r1 f-disp24 */
420 EXTRACT_FMT_8_BC24_CODE
421
8e420152
DE		 422if (OPRND (condbit)) {
423 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
424}
b8a9943d 425
8e420152
DE		 426#if WITH_PROFILE_MODEL_P
427 if (PROFILE_MODEL_P (current_cpu))
428 {
429 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
430 }
431#endif
b8a9943d 432
8e420152
DE		 433 return new_pc;
434#undef OPRND
8e420152
DE		 435}
436
437/* Perform beq: beq $src1,$src2,$disp16. */
438CIA
439SEM_FN_NAME (m32rx,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
440{
b8a9943d 441 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 442#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_9_beq.f
443 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 444 CIA new_pc = CPU (h_pc) + 4;
8e420152 445 int taken_p = 0;
b8a9943d
DE		 446 EXTRACT_FMT_9_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
447 EXTRACT_FMT_9_BEQ_CODE
448
8e420152
DE		 449if (EQSI (OPRND (src1), OPRND (src2))) {
450 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
451}
b8a9943d 452
8e420152
DE		 453#if WITH_PROFILE_MODEL_P
454 if (PROFILE_MODEL_P (current_cpu))
455 {
456 m32rx_model_mark_get_h_gr (current_cpu, abuf);
457 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
458 }
459#endif
b8a9943d 460
8e420152
DE		 461 return new_pc;
462#undef OPRND
8e420152
DE		 463}
464
465/* Perform beqz: beqz $src2,$disp16. */
466CIA
467SEM_FN_NAME (m32rx,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
468{
b8a9943d 469 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 470#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_10_beqz.f
471 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 472 CIA new_pc = CPU (h_pc) + 4;
8e420152 473 int taken_p = 0;
b8a9943d
DE		 474 EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
475 EXTRACT_FMT_10_BEQZ_CODE
476
8e420152
DE		 477if (EQSI (OPRND (src2), 0)) {
478 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
479}
b8a9943d 480
8e420152
DE		 481#if WITH_PROFILE_MODEL_P
482 if (PROFILE_MODEL_P (current_cpu))
483 {
484 m32rx_model_mark_get_h_gr (current_cpu, abuf);
485 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
486 }
487#endif
b8a9943d 488
8e420152
DE		 489 return new_pc;
490#undef OPRND
8e420152
DE		 491}
492
493/* Perform bgez: bgez $src2,$disp16. */
494CIA
495SEM_FN_NAME (m32rx,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
496{
b8a9943d 497 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 498#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_10_beqz.f
499 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 500 CIA new_pc = CPU (h_pc) + 4;
8e420152 501 int taken_p = 0;
b8a9943d
DE		 502 EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
503 EXTRACT_FMT_10_BEQZ_CODE
504
8e420152
DE		 505if (GESI (OPRND (src2), 0)) {
506 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
507}
b8a9943d 508
8e420152
DE		 509#if WITH_PROFILE_MODEL_P
510 if (PROFILE_MODEL_P (current_cpu))
511 {
512 m32rx_model_mark_get_h_gr (current_cpu, abuf);
513 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
514 }
515#endif
b8a9943d 516
8e420152
DE		 517 return new_pc;
518#undef OPRND
8e420152
DE		 519}
520
521/* Perform bgtz: bgtz $src2,$disp16. */
522CIA
523SEM_FN_NAME (m32rx,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
524{
b8a9943d 525 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 526#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_10_beqz.f
527 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 528 CIA new_pc = CPU (h_pc) + 4;
8e420152 529 int taken_p = 0;
b8a9943d
DE		 530 EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
531 EXTRACT_FMT_10_BEQZ_CODE
532
8e420152
DE		 533if (GTSI (OPRND (src2), 0)) {
534 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
535}
b8a9943d 536
8e420152
DE		 537#if WITH_PROFILE_MODEL_P
538 if (PROFILE_MODEL_P (current_cpu))
539 {
540 m32rx_model_mark_get_h_gr (current_cpu, abuf);
541 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
542 }
543#endif
b8a9943d 544
8e420152
DE		 545 return new_pc;
546#undef OPRND
8e420152
DE		 547}
548
549/* Perform blez: blez $src2,$disp16. */
550CIA
551SEM_FN_NAME (m32rx,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
552{
b8a9943d 553 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 554#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_10_beqz.f
555 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 556 CIA new_pc = CPU (h_pc) + 4;
8e420152 557 int taken_p = 0;
b8a9943d
DE		 558 EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
559 EXTRACT_FMT_10_BEQZ_CODE
560
8e420152
DE		 561if (LESI (OPRND (src2), 0)) {
562 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
563}
b8a9943d 564
8e420152
DE		 565#if WITH_PROFILE_MODEL_P
566 if (PROFILE_MODEL_P (current_cpu))
567 {
568 m32rx_model_mark_get_h_gr (current_cpu, abuf);
569 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
570 }
571#endif
b8a9943d 572
8e420152
DE		 573 return new_pc;
574#undef OPRND
8e420152
DE		 575}
576
577/* Perform bltz: bltz $src2,$disp16. */
578CIA
579SEM_FN_NAME (m32rx,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
580{
b8a9943d 581 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 582#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_10_beqz.f
583 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 584 CIA new_pc = CPU (h_pc) + 4;
8e420152 585 int taken_p = 0;
b8a9943d
DE		 586 EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
587 EXTRACT_FMT_10_BEQZ_CODE
588
8e420152
DE		 589if (LTSI (OPRND (src2), 0)) {
590 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
591}
b8a9943d 592
8e420152
DE		 593#if WITH_PROFILE_MODEL_P
594 if (PROFILE_MODEL_P (current_cpu))
595 {
596 m32rx_model_mark_get_h_gr (current_cpu, abuf);
597 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
598 }
599#endif
b8a9943d 600
8e420152
DE		 601 return new_pc;
602#undef OPRND
8e420152
DE		 603}
604
605/* Perform bnez: bnez $src2,$disp16. */
606CIA
607SEM_FN_NAME (m32rx,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
608{
b8a9943d 609 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 610#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_10_beqz.f
611 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 612 CIA new_pc = CPU (h_pc) + 4;
8e420152 613 int taken_p = 0;
b8a9943d
DE		 614 EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
615 EXTRACT_FMT_10_BEQZ_CODE
616
8e420152
DE		 617if (NESI (OPRND (src2), 0)) {
618 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
619}
b8a9943d 620
8e420152
DE		 621#if WITH_PROFILE_MODEL_P
622 if (PROFILE_MODEL_P (current_cpu))
623 {
624 m32rx_model_mark_get_h_gr (current_cpu, abuf);
625 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
626 }
627#endif
b8a9943d 628
8e420152
DE		 629 return new_pc;
630#undef OPRND
8e420152
DE		 631}
632
633/* Perform bl8: bl $disp8. */
634CIA
635SEM_FN_NAME (m32rx,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
636{
b8a9943d 637 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 638#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_11_bl8.f
639 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 640 CIA new_pc = CPU (h_pc) + 2;
8e420152 641 int taken_p = 0;
b8a9943d
DE		 642 EXTRACT_FMT_11_BL8_VARS /* f-op1 f-r1 f-disp8 */
643 EXTRACT_FMT_11_BL8_CODE
644
8e420152
DE		 645do {
646 CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
b8a9943d 647 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
8e420152
DE		 648 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
649} while (0);
b8a9943d 650
8e420152
DE		 651#if WITH_PROFILE_MODEL_P
652 if (PROFILE_MODEL_P (current_cpu))
653 {
b8a9943d 654 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 655 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
656 }
657#endif
b8a9943d 658
8e420152
DE		 659 return new_pc;
660#undef OPRND
8e420152
DE		 661}
662
663/* Perform bl24: bl $disp24. */
664CIA
665SEM_FN_NAME (m32rx,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
666{
b8a9943d 667 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 668#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_12_bl24.f
669 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 670 CIA new_pc = CPU (h_pc) + 4;
8e420152 671 int taken_p = 0;
b8a9943d
DE		 672 EXTRACT_FMT_12_BL24_VARS /* f-op1 f-r1 f-disp24 */
673 EXTRACT_FMT_12_BL24_CODE
674
8e420152
DE		 675do {
676 CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
b8a9943d 677 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
8e420152
DE		 678 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
679} while (0);
b8a9943d 680
8e420152
DE		 681#if WITH_PROFILE_MODEL_P
682 if (PROFILE_MODEL_P (current_cpu))
683 {
b8a9943d 684 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 685 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
686 }
687#endif
b8a9943d 688
8e420152
DE		 689 return new_pc;
690#undef OPRND
8e420152
DE		 691}
692
693/* Perform bcl8: bcl $disp8. */
694CIA
695SEM_FN_NAME (m32rx,bcl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
696{
b8a9943d 697 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 698#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_13_bcl8.f
699 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 700 CIA new_pc = CPU (h_pc) + 2;
8e420152 701 int taken_p = 0;
b8a9943d
DE		 702 EXTRACT_FMT_13_BCL8_VARS /* f-op1 f-r1 f-disp8 */
703 EXTRACT_FMT_13_BCL8_CODE
704
8e420152
DE		 705if (OPRND (condbit)) {
706do {
707 CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
b8a9943d 708 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
8e420152
DE		 709 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
710} while (0);
711}
b8a9943d 712
8e420152
DE		 713#if WITH_PROFILE_MODEL_P
714 if (PROFILE_MODEL_P (current_cpu))
715 {
716 m32rx_model_mark_set_h_gr (current_cpu, abuf);
717 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
718 }
719#endif
b8a9943d 720
8e420152
DE		 721 return new_pc;
722#undef OPRND
8e420152
DE		 723}
724
725/* Perform bcl24: bcl $disp24. */
726CIA
727SEM_FN_NAME (m32rx,bcl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
728{
b8a9943d 729 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 730#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_14_bcl24.f
731 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 732 CIA new_pc = CPU (h_pc) + 4;
8e420152 733 int taken_p = 0;
b8a9943d
DE		 734 EXTRACT_FMT_14_BCL24_VARS /* f-op1 f-r1 f-disp24 */
735 EXTRACT_FMT_14_BCL24_CODE
736
8e420152
DE		 737if (OPRND (condbit)) {
738do {
739 CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
b8a9943d 740 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
8e420152
DE		 741 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
742} while (0);
743}
b8a9943d 744
8e420152
DE		 745#if WITH_PROFILE_MODEL_P
746 if (PROFILE_MODEL_P (current_cpu))
747 {
748 m32rx_model_mark_set_h_gr (current_cpu, abuf);
749 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
750 }
751#endif
b8a9943d 752
8e420152
DE		 753 return new_pc;
754#undef OPRND
8e420152
DE		 755}
756
757/* Perform bnc8: bnc $disp8. */
758CIA
759SEM_FN_NAME (m32rx,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
760{
b8a9943d 761 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 762#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_7_bc8.f
763 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 764 CIA new_pc = CPU (h_pc) + 2;
8e420152 765 int taken_p = 0;
b8a9943d
DE		 766 EXTRACT_FMT_7_BC8_VARS /* f-op1 f-r1 f-disp8 */
767 EXTRACT_FMT_7_BC8_CODE
768
8e420152
DE		 769if (NOTBI (OPRND (condbit))) {
770 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
771}
b8a9943d 772
8e420152
DE		 773#if WITH_PROFILE_MODEL_P
774 if (PROFILE_MODEL_P (current_cpu))
775 {
776 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
777 }
778#endif
b8a9943d 779
8e420152
DE		 780 return new_pc;
781#undef OPRND
8e420152
DE		 782}
783
784/* Perform bnc24: bnc $disp24. */
785CIA
786SEM_FN_NAME (m32rx,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
787{
b8a9943d 788 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 789#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_8_bc24.f
790 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 791 CIA new_pc = CPU (h_pc) + 4;
8e420152 792 int taken_p = 0;
b8a9943d
DE		 793 EXTRACT_FMT_8_BC24_VARS /* f-op1 f-r1 f-disp24 */
794 EXTRACT_FMT_8_BC24_CODE
795
8e420152
DE		 796if (NOTBI (OPRND (condbit))) {
797 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
798}
b8a9943d 799
8e420152
DE		 800#if WITH_PROFILE_MODEL_P
801 if (PROFILE_MODEL_P (current_cpu))
802 {
803 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
804 }
805#endif
b8a9943d 806
8e420152
DE		 807 return new_pc;
808#undef OPRND
8e420152
DE		 809}
810
811/* Perform bne: bne $src1,$src2,$disp16. */
812CIA
813SEM_FN_NAME (m32rx,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
814{
b8a9943d 815 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 816#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_9_beq.f
817 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 818 CIA new_pc = CPU (h_pc) + 4;
8e420152 819 int taken_p = 0;
b8a9943d
DE		 820 EXTRACT_FMT_9_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
821 EXTRACT_FMT_9_BEQ_CODE
822
8e420152
DE		 823if (NESI (OPRND (src1), OPRND (src2))) {
824 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
825}
b8a9943d 826
8e420152
DE		 827#if WITH_PROFILE_MODEL_P
828 if (PROFILE_MODEL_P (current_cpu))
829 {
830 m32rx_model_mark_get_h_gr (current_cpu, abuf);
831 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
832 }
833#endif
b8a9943d 834
8e420152
DE		 835 return new_pc;
836#undef OPRND
8e420152
DE		 837}
838
839/* Perform bra8: bra $disp8. */
840CIA
841SEM_FN_NAME (m32rx,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
842{
b8a9943d 843 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 844#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_15_bra8.f
845 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 846 CIA new_pc = CPU (h_pc) + 2;
8e420152 847 int taken_p = 0;
b8a9943d
DE		 848 EXTRACT_FMT_15_BRA8_VARS /* f-op1 f-r1 f-disp8 */
849 EXTRACT_FMT_15_BRA8_CODE
850
8e420152 851 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
b8a9943d 852
8e420152
DE		 853#if WITH_PROFILE_MODEL_P
854 if (PROFILE_MODEL_P (current_cpu))
855 {
856 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
857 }
858#endif
b8a9943d 859
8e420152
DE		 860 return new_pc;
861#undef OPRND
8e420152
DE		 862}
863
864/* Perform bra24: bra $disp24. */
865CIA
866SEM_FN_NAME (m32rx,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
867{
b8a9943d 868 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 869#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_16_bra24.f
870 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 871 CIA new_pc = CPU (h_pc) + 4;
8e420152 872 int taken_p = 0;
b8a9943d
DE		 873 EXTRACT_FMT_16_BRA24_VARS /* f-op1 f-r1 f-disp24 */
874 EXTRACT_FMT_16_BRA24_CODE
875
8e420152 876 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
b8a9943d 877
8e420152
DE		 878#if WITH_PROFILE_MODEL_P
879 if (PROFILE_MODEL_P (current_cpu))
880 {
881 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
882 }
883#endif
b8a9943d 884
8e420152
DE		 885 return new_pc;
886#undef OPRND
8e420152
DE		 887}
888
889/* Perform bncl8: bncl $disp8. */
890CIA
891SEM_FN_NAME (m32rx,bncl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
892{
b8a9943d 893 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 894#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_13_bcl8.f
895 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 896 CIA new_pc = CPU (h_pc) + 2;
8e420152 897 int taken_p = 0;
b8a9943d
DE		 898 EXTRACT_FMT_13_BCL8_VARS /* f-op1 f-r1 f-disp8 */
899 EXTRACT_FMT_13_BCL8_CODE
900
8e420152
DE		 901if (NOTBI (OPRND (condbit))) {
902do {
903 CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
b8a9943d 904 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
8e420152
DE		 905 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
906} while (0);
907}
b8a9943d 908
8e420152
DE		 909#if WITH_PROFILE_MODEL_P
910 if (PROFILE_MODEL_P (current_cpu))
911 {
912 m32rx_model_mark_set_h_gr (current_cpu, abuf);
913 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
914 }
915#endif
b8a9943d 916
8e420152
DE		 917 return new_pc;
918#undef OPRND
8e420152
DE		 919}
920
921/* Perform bncl24: bncl $disp24. */
922CIA
923SEM_FN_NAME (m32rx,bncl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
924{
b8a9943d 925 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 926#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_14_bcl24.f
927 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 928 CIA new_pc = CPU (h_pc) + 4;
8e420152 929 int taken_p = 0;
b8a9943d
DE		 930 EXTRACT_FMT_14_BCL24_VARS /* f-op1 f-r1 f-disp24 */
931 EXTRACT_FMT_14_BCL24_CODE
932
8e420152
DE		 933if (NOTBI (OPRND (condbit))) {
934do {
935 CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
b8a9943d 936 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
8e420152
DE		 937 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
938} while (0);
939}
b8a9943d 940
8e420152
DE		 941#if WITH_PROFILE_MODEL_P
942 if (PROFILE_MODEL_P (current_cpu))
943 {
944 m32rx_model_mark_set_h_gr (current_cpu, abuf);
945 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
946 }
947#endif
b8a9943d 948
8e420152
DE		 949 return new_pc;
950#undef OPRND
8e420152
DE		 951}
952
953/* Perform cmp: cmp $src1,$src2. */
954CIA
955SEM_FN_NAME (m32rx,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
956{
b8a9943d 957 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 958#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_17_cmp.f
959 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 960 CIA new_pc = CPU (h_pc) + 2;
961 EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
962 EXTRACT_FMT_17_CMP_CODE
963
8e420152 964 CPU (h_cond) = LTSI (OPRND (src1), OPRND (src2));
b8a9943d
DE		 965 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
966
8e420152
DE		 967#if WITH_PROFILE_MODEL_P
968 if (PROFILE_MODEL_P (current_cpu))
969 {
970 m32rx_model_mark_get_h_gr (current_cpu, abuf);
971 m32rx_model_profile_insn (current_cpu, abuf);
972 }
973#endif
b8a9943d 974
8e420152
DE		 975 return new_pc;
976#undef OPRND
8e420152
DE		 977}
978
979/* Perform cmpi: cmpi $src2,#$simm16. */
980CIA
981SEM_FN_NAME (m32rx,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
982{
b8a9943d 983 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 984#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_18_cmpi.f
985 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 986 CIA new_pc = CPU (h_pc) + 4;
987 EXTRACT_FMT_18_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
988 EXTRACT_FMT_18_CMPI_CODE
989
8e420152 990 CPU (h_cond) = LTSI (OPRND (src2), OPRND (simm16));
b8a9943d
DE		 991 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
992
8e420152
DE		 993#if WITH_PROFILE_MODEL_P
994 if (PROFILE_MODEL_P (current_cpu))
995 {
996 m32rx_model_mark_get_h_gr (current_cpu, abuf);
997 m32rx_model_profile_insn (current_cpu, abuf);
998 }
999#endif
b8a9943d 1000
8e420152
DE		 1001 return new_pc;
1002#undef OPRND
8e420152
DE		 1003}
1004
1005/* Perform cmpu: cmpu $src1,$src2. */
1006CIA
1007SEM_FN_NAME (m32rx,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1008{
b8a9943d 1009 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1010#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_17_cmp.f
1011 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1012 CIA new_pc = CPU (h_pc) + 2;
1013 EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
1014 EXTRACT_FMT_17_CMP_CODE
1015
8e420152 1016 CPU (h_cond) = LTUSI (OPRND (src1), OPRND (src2));
b8a9943d
DE		 1017 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1018
8e420152
DE		 1019#if WITH_PROFILE_MODEL_P
1020 if (PROFILE_MODEL_P (current_cpu))
1021 {
1022 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1023 m32rx_model_profile_insn (current_cpu, abuf);
1024 }
1025#endif
b8a9943d 1026
8e420152
DE		 1027 return new_pc;
1028#undef OPRND
8e420152
DE		 1029}
1030
1031/* Perform cmpui: cmpui $src2,#$uimm16. */
1032CIA
1033SEM_FN_NAME (m32rx,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1034{
b8a9943d 1035 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1036#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_19_cmpui.f
1037 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1038 CIA new_pc = CPU (h_pc) + 4;
1039 EXTRACT_FMT_19_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
1040 EXTRACT_FMT_19_CMPUI_CODE
1041
8e420152 1042 CPU (h_cond) = LTUSI (OPRND (src2), OPRND (uimm16));
b8a9943d
DE		 1043 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1044
8e420152
DE		 1045#if WITH_PROFILE_MODEL_P
1046 if (PROFILE_MODEL_P (current_cpu))
1047 {
1048 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1049 m32rx_model_profile_insn (current_cpu, abuf);
1050 }
1051#endif
b8a9943d 1052
8e420152
DE		 1053 return new_pc;
1054#undef OPRND
8e420152
DE		 1055}
1056
1057/* Perform cmpeq: cmpeq $src1,$src2. */
1058CIA
1059SEM_FN_NAME (m32rx,cmpeq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1060{
b8a9943d 1061 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1062#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_17_cmp.f
1063 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1064 CIA new_pc = CPU (h_pc) + 2;
1065 EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
1066 EXTRACT_FMT_17_CMP_CODE
1067
8e420152 1068 CPU (h_cond) = EQSI (OPRND (src1), OPRND (src2));
b8a9943d
DE		 1069 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1070
8e420152
DE		 1071#if WITH_PROFILE_MODEL_P
1072 if (PROFILE_MODEL_P (current_cpu))
1073 {
1074 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1075 m32rx_model_profile_insn (current_cpu, abuf);
1076 }
1077#endif
b8a9943d 1078
8e420152
DE		 1079 return new_pc;
1080#undef OPRND
8e420152
DE		 1081}
1082
1083/* Perform cmpz: cmpz $src2. */
1084CIA
1085SEM_FN_NAME (m32rx,cmpz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1086{
b8a9943d 1087 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1088#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_20_cmpz.f
1089 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1090 CIA new_pc = CPU (h_pc) + 2;
1091 EXTRACT_FMT_20_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
1092 EXTRACT_FMT_20_CMPZ_CODE
1093
8e420152 1094 CPU (h_cond) = EQSI (OPRND (src2), 0);
b8a9943d
DE		 1095 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1096
8e420152
DE		 1097#if WITH_PROFILE_MODEL_P
1098 if (PROFILE_MODEL_P (current_cpu))
1099 {
1100 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1101 m32rx_model_profile_insn (current_cpu, abuf);
1102 }
1103#endif
b8a9943d 1104
8e420152
DE		 1105 return new_pc;
1106#undef OPRND
8e420152
DE		 1107}
1108
1109/* Perform div: div $dr,$sr. */
1110CIA
1111SEM_FN_NAME (m32rx,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1112{
b8a9943d 1113 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1114#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_21_div.f
1115 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1116 CIA new_pc = CPU (h_pc) + 4;
1117 EXTRACT_FMT_21_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1118 EXTRACT_FMT_21_DIV_CODE
1119
8e420152
DE		 1120if (NESI (OPRND (sr), 0)) {
1121 CPU (h_gr[f_r1]) = DIVSI (OPRND (dr), OPRND (sr));
b8a9943d 1122 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 1123}
b8a9943d 1124
8e420152
DE		 1125#if WITH_PROFILE_MODEL_P
1126 if (PROFILE_MODEL_P (current_cpu))
1127 {
1128 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1129 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1130 m32rx_model_profile_insn (current_cpu, abuf);
1131 }
1132#endif
b8a9943d 1133
8e420152
DE		 1134 return new_pc;
1135#undef OPRND
8e420152
DE		 1136}
1137
1138/* Perform divu: divu $dr,$sr. */
1139CIA
1140SEM_FN_NAME (m32rx,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1141{
b8a9943d 1142 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1143#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_21_div.f
1144 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1145 CIA new_pc = CPU (h_pc) + 4;
1146 EXTRACT_FMT_21_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1147 EXTRACT_FMT_21_DIV_CODE
1148
8e420152
DE		 1149if (NESI (OPRND (sr), 0)) {
1150 CPU (h_gr[f_r1]) = UDIVSI (OPRND (dr), OPRND (sr));
b8a9943d 1151 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 1152}
b8a9943d 1153
8e420152
DE		 1154#if WITH_PROFILE_MODEL_P
1155 if (PROFILE_MODEL_P (current_cpu))
1156 {
1157 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1158 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1159 m32rx_model_profile_insn (current_cpu, abuf);
1160 }
1161#endif
b8a9943d 1162
8e420152
DE		 1163 return new_pc;
1164#undef OPRND
8e420152
DE		 1165}
1166
1167/* Perform rem: rem $dr,$sr. */
1168CIA
1169SEM_FN_NAME (m32rx,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1170{
b8a9943d 1171 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1172#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_21_div.f
1173 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1174 CIA new_pc = CPU (h_pc) + 4;
1175 EXTRACT_FMT_21_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1176 EXTRACT_FMT_21_DIV_CODE
1177
8e420152
DE		 1178if (NESI (OPRND (sr), 0)) {
1179 CPU (h_gr[f_r1]) = MODSI (OPRND (dr), OPRND (sr));
b8a9943d 1180 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 1181}
b8a9943d 1182
8e420152
DE		 1183#if WITH_PROFILE_MODEL_P
1184 if (PROFILE_MODEL_P (current_cpu))
1185 {
1186 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1187 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1188 m32rx_model_profile_insn (current_cpu, abuf);
1189 }
1190#endif
b8a9943d 1191
8e420152
DE		 1192 return new_pc;
1193#undef OPRND
8e420152
DE		 1194}
1195
1196/* Perform remu: remu $dr,$sr. */
1197CIA
1198SEM_FN_NAME (m32rx,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1199{
b8a9943d 1200 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1201#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_21_div.f
1202 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1203 CIA new_pc = CPU (h_pc) + 4;
1204 EXTRACT_FMT_21_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1205 EXTRACT_FMT_21_DIV_CODE
1206
8e420152
DE		 1207if (NESI (OPRND (sr), 0)) {
1208 CPU (h_gr[f_r1]) = UMODSI (OPRND (dr), OPRND (sr));
b8a9943d 1209 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 1210}
b8a9943d 1211
8e420152
DE		 1212#if WITH_PROFILE_MODEL_P
1213 if (PROFILE_MODEL_P (current_cpu))
1214 {
1215 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1216 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1217 m32rx_model_profile_insn (current_cpu, abuf);
1218 }
1219#endif
b8a9943d 1220
8e420152
DE		 1221 return new_pc;
1222#undef OPRND
8e420152
DE		 1223}
1224
1225/* Perform jc: jc $sr. */
1226CIA
1227SEM_FN_NAME (m32rx,jc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1228{
b8a9943d 1229 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1230#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_22_jc.f
1231 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 1232 CIA new_pc = CPU (h_pc) + 2;
8e420152 1233 int taken_p = 0;
b8a9943d
DE		 1234 EXTRACT_FMT_22_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
1235 EXTRACT_FMT_22_JC_CODE
1236
8e420152
DE		 1237if (OPRND (condbit)) {
1238 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
1239}
b8a9943d 1240
8e420152
DE		 1241#if WITH_PROFILE_MODEL_P
1242 if (PROFILE_MODEL_P (current_cpu))
1243 {
1244 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1245 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1246 }
1247#endif
b8a9943d 1248
8e420152
DE		 1249 return new_pc;
1250#undef OPRND
8e420152
DE		 1251}
1252
1253/* Perform jnc: jnc $sr. */
1254CIA
1255SEM_FN_NAME (m32rx,jnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1256{
b8a9943d 1257 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1258#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_22_jc.f
1259 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 1260 CIA new_pc = CPU (h_pc) + 2;
8e420152 1261 int taken_p = 0;
b8a9943d
DE		 1262 EXTRACT_FMT_22_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
1263 EXTRACT_FMT_22_JC_CODE
1264
8e420152
DE		 1265if (NOTBI (OPRND (condbit))) {
1266 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
1267}
b8a9943d 1268
8e420152
DE		 1269#if WITH_PROFILE_MODEL_P
1270 if (PROFILE_MODEL_P (current_cpu))
1271 {
1272 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1273 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1274 }
1275#endif
b8a9943d 1276
8e420152
DE		 1277 return new_pc;
1278#undef OPRND
8e420152
DE		 1279}
1280
1281/* Perform jl: jl $sr. */
1282CIA
1283SEM_FN_NAME (m32rx,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1284{
b8a9943d 1285 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1286#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_23_jl.f
1287 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 1288 CIA new_pc = CPU (h_pc) + 2;
8e420152 1289 int taken_p = 0;
b8a9943d
DE		 1290 EXTRACT_FMT_23_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
1291 EXTRACT_FMT_23_JL_CODE
1292
8e420152
DE		 1293do {
1294 USI temp1;SI temp0;
1295 temp0 = ADDSI (ANDSI (OPRND (pc), -4), 4);
1296 temp1 = OPRND (sr);
1297 CPU (h_gr[14]) = temp0;
b8a9943d 1298 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
8e420152
DE		 1299 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, temp1));
1300} while (0);
b8a9943d 1301
8e420152
DE		 1302#if WITH_PROFILE_MODEL_P
1303 if (PROFILE_MODEL_P (current_cpu))
1304 {
1305 m32rx_model_mark_get_h_gr (current_cpu, abuf);
b8a9943d 1306 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 1307 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1308 }
1309#endif
b8a9943d 1310
8e420152
DE		 1311 return new_pc;
1312#undef OPRND
8e420152
DE		 1313}
1314
1315/* Perform jmp: jmp $sr. */
1316CIA
1317SEM_FN_NAME (m32rx,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1318{
b8a9943d 1319 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1320#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_24_jmp.f
1321 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 1322 CIA new_pc = CPU (h_pc) + 2;
8e420152 1323 int taken_p = 0;
b8a9943d
DE		 1324 EXTRACT_FMT_24_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
1325 EXTRACT_FMT_24_JMP_CODE
1326
8e420152 1327 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, OPRND (sr)));
b8a9943d 1328
8e420152
DE		 1329#if WITH_PROFILE_MODEL_P
1330 if (PROFILE_MODEL_P (current_cpu))
1331 {
1332 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1333 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1334 }
1335#endif
b8a9943d 1336
8e420152
DE		 1337 return new_pc;
1338#undef OPRND
8e420152
DE		 1339}
1340
1341/* Perform ld: ld $dr,@$sr. */
1342CIA
1343SEM_FN_NAME (m32rx,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1344{
b8a9943d 1345 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1346#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_25_ld.f
1347 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1348 CIA new_pc = CPU (h_pc) + 2;
1349 EXTRACT_FMT_25_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
1350 EXTRACT_FMT_25_LD_CODE
1351
1352 CPU (h_gr[f_r1]) = OPRND (h_memory_sr);
1353 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1354
8e420152
DE		 1355#if WITH_PROFILE_MODEL_P
1356 if (PROFILE_MODEL_P (current_cpu))
1357 {
1358 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1359 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1360 m32rx_model_profile_insn (current_cpu, abuf);
1361 }
1362#endif
b8a9943d 1363
8e420152
DE		 1364 return new_pc;
1365#undef OPRND
8e420152
DE		 1366}
1367
1368/* Perform ld-d: ld $dr,@($slo16,$sr). */
1369CIA
1370SEM_FN_NAME (m32rx,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1371{
b8a9943d 1372 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1373#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_26_ld_d.f
1374 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1375 CIA new_pc = CPU (h_pc) + 4;
1376 EXTRACT_FMT_26_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1377 EXTRACT_FMT_26_LD_D_CODE
1378
1379 CPU (h_gr[f_r1]) = OPRND (h_memory_add_WI_sr_slo16);
1380 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1381
8e420152
DE		 1382#if WITH_PROFILE_MODEL_P
1383 if (PROFILE_MODEL_P (current_cpu))
1384 {
1385 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1386 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1387 m32rx_model_profile_insn (current_cpu, abuf);
1388 }
1389#endif
b8a9943d 1390
8e420152
DE		 1391 return new_pc;
1392#undef OPRND
8e420152
DE		 1393}
1394
1395/* Perform ldb: ldb $dr,@$sr. */
1396CIA
1397SEM_FN_NAME (m32rx,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1398{
b8a9943d 1399 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1400#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_27_ldb.f
1401 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1402 CIA new_pc = CPU (h_pc) + 2;
1403 EXTRACT_FMT_27_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
1404 EXTRACT_FMT_27_LDB_CODE
1405
1406 CPU (h_gr[f_r1]) = EXTQISI (OPRND (h_memory_sr));
1407 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1408
8e420152
DE		 1409#if WITH_PROFILE_MODEL_P
1410 if (PROFILE_MODEL_P (current_cpu))
1411 {
1412 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1413 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1414 m32rx_model_profile_insn (current_cpu, abuf);
1415 }
1416#endif
b8a9943d 1417
8e420152
DE		 1418 return new_pc;
1419#undef OPRND
8e420152
DE		 1420}
1421
1422/* Perform ldb-d: ldb $dr,@($slo16,$sr). */
1423CIA
1424SEM_FN_NAME (m32rx,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1425{
b8a9943d 1426 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1427#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_28_ldb_d.f
1428 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1429 CIA new_pc = CPU (h_pc) + 4;
1430 EXTRACT_FMT_28_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1431 EXTRACT_FMT_28_LDB_D_CODE
1432
1433 CPU (h_gr[f_r1]) = EXTQISI (OPRND (h_memory_add_WI_sr_slo16));
1434 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1435
8e420152
DE		 1436#if WITH_PROFILE_MODEL_P
1437 if (PROFILE_MODEL_P (current_cpu))
1438 {
1439 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1440 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1441 m32rx_model_profile_insn (current_cpu, abuf);
1442 }
1443#endif
b8a9943d 1444
8e420152
DE		 1445 return new_pc;
1446#undef OPRND
8e420152
DE		 1447}
1448
1449/* Perform ldh: ldh $dr,@$sr. */
1450CIA
1451SEM_FN_NAME (m32rx,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1452{
b8a9943d 1453 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1454#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_29_ldh.f
1455 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1456 CIA new_pc = CPU (h_pc) + 2;
1457 EXTRACT_FMT_29_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
1458 EXTRACT_FMT_29_LDH_CODE
1459
1460 CPU (h_gr[f_r1]) = EXTHISI (OPRND (h_memory_sr));
1461 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1462
8e420152
DE		 1463#if WITH_PROFILE_MODEL_P
1464 if (PROFILE_MODEL_P (current_cpu))
1465 {
1466 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1467 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1468 m32rx_model_profile_insn (current_cpu, abuf);
1469 }
1470#endif
b8a9943d 1471
8e420152
DE		 1472 return new_pc;
1473#undef OPRND
8e420152
DE		 1474}
1475
1476/* Perform ldh-d: ldh $dr,@($slo16,$sr). */
1477CIA
1478SEM_FN_NAME (m32rx,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1479{
b8a9943d 1480 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1481#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_30_ldh_d.f
1482 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1483 CIA new_pc = CPU (h_pc) + 4;
1484 EXTRACT_FMT_30_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1485 EXTRACT_FMT_30_LDH_D_CODE
1486
1487 CPU (h_gr[f_r1]) = EXTHISI (OPRND (h_memory_add_WI_sr_slo16));
1488 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1489
8e420152
DE		 1490#if WITH_PROFILE_MODEL_P
1491 if (PROFILE_MODEL_P (current_cpu))
1492 {
1493 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1494 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1495 m32rx_model_profile_insn (current_cpu, abuf);
1496 }
1497#endif
b8a9943d 1498
8e420152
DE		 1499 return new_pc;
1500#undef OPRND
8e420152
DE		 1501}
1502
1503/* Perform ldub: ldub $dr,@$sr. */
1504CIA
1505SEM_FN_NAME (m32rx,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1506{
b8a9943d 1507 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1508#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_27_ldb.f
1509 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1510 CIA new_pc = CPU (h_pc) + 2;
1511 EXTRACT_FMT_27_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
1512 EXTRACT_FMT_27_LDB_CODE
1513
1514 CPU (h_gr[f_r1]) = ZEXTQISI (OPRND (h_memory_sr));
1515 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1516
8e420152
DE		 1517#if WITH_PROFILE_MODEL_P
1518 if (PROFILE_MODEL_P (current_cpu))
1519 {
1520 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1521 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1522 m32rx_model_profile_insn (current_cpu, abuf);
1523 }
1524#endif
b8a9943d 1525
8e420152
DE		 1526 return new_pc;
1527#undef OPRND
8e420152
DE		 1528}
1529
1530/* Perform ldub-d: ldub $dr,@($slo16,$sr). */
1531CIA
1532SEM_FN_NAME (m32rx,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1533{
b8a9943d 1534 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1535#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_28_ldb_d.f
1536 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1537 CIA new_pc = CPU (h_pc) + 4;
1538 EXTRACT_FMT_28_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1539 EXTRACT_FMT_28_LDB_D_CODE
1540
1541 CPU (h_gr[f_r1]) = ZEXTQISI (OPRND (h_memory_add_WI_sr_slo16));
1542 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1543
8e420152
DE		 1544#if WITH_PROFILE_MODEL_P
1545 if (PROFILE_MODEL_P (current_cpu))
1546 {
1547 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1548 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1549 m32rx_model_profile_insn (current_cpu, abuf);
1550 }
1551#endif
b8a9943d 1552
8e420152
DE		 1553 return new_pc;
1554#undef OPRND
8e420152
DE		 1555}
1556
1557/* Perform lduh: lduh $dr,@$sr. */
1558CIA
1559SEM_FN_NAME (m32rx,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1560{
b8a9943d 1561 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1562#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_29_ldh.f
1563 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1564 CIA new_pc = CPU (h_pc) + 2;
1565 EXTRACT_FMT_29_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
1566 EXTRACT_FMT_29_LDH_CODE
1567
1568 CPU (h_gr[f_r1]) = ZEXTHISI (OPRND (h_memory_sr));
1569 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1570
8e420152
DE		 1571#if WITH_PROFILE_MODEL_P
1572 if (PROFILE_MODEL_P (current_cpu))
1573 {
1574 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1575 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1576 m32rx_model_profile_insn (current_cpu, abuf);
1577 }
1578#endif
b8a9943d 1579
8e420152
DE		 1580 return new_pc;
1581#undef OPRND
8e420152
DE		 1582}
1583
1584/* Perform lduh-d: lduh $dr,@($slo16,$sr). */
1585CIA
1586SEM_FN_NAME (m32rx,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1587{
b8a9943d 1588 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1589#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_30_ldh_d.f
1590 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1591 CIA new_pc = CPU (h_pc) + 4;
1592 EXTRACT_FMT_30_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1593 EXTRACT_FMT_30_LDH_D_CODE
1594
1595 CPU (h_gr[f_r1]) = ZEXTHISI (OPRND (h_memory_add_WI_sr_slo16));
1596 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1597
8e420152
DE		 1598#if WITH_PROFILE_MODEL_P
1599 if (PROFILE_MODEL_P (current_cpu))
1600 {
1601 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1602 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1603 m32rx_model_profile_insn (current_cpu, abuf);
1604 }
1605#endif
b8a9943d 1606
8e420152
DE		 1607 return new_pc;
1608#undef OPRND
8e420152
DE		 1609}
1610
1611/* Perform ld-plus: ld $dr,@$sr+. */
1612CIA
1613SEM_FN_NAME (m32rx,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1614{
b8a9943d 1615 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1616#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_25_ld.f
1617 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1618 CIA new_pc = CPU (h_pc) + 2;
1619 EXTRACT_FMT_25_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
1620 EXTRACT_FMT_25_LD_CODE
1621
8e420152
DE		 1622do {
1623 SI temp1;SI temp0;
b8a9943d 1624 temp0 = OPRND (h_memory_sr);
8e420152
DE		 1625 temp1 = ADDSI (OPRND (sr), 4);
1626 CPU (h_gr[f_r1]) = temp0;
b8a9943d 1627 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 1628 CPU (h_gr[f_r2]) = temp1;
b8a9943d 1629 TRACE_RESULT (current_cpu, "sr", 'x', CPU (h_gr[f_r2]));
8e420152 1630} while (0);
b8a9943d 1631
8e420152
DE		 1632#if WITH_PROFILE_MODEL_P
1633 if (PROFILE_MODEL_P (current_cpu))
1634 {
1635 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1636 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1637 m32rx_model_profile_insn (current_cpu, abuf);
1638 }
1639#endif
b8a9943d 1640
8e420152
DE		 1641 return new_pc;
1642#undef OPRND
8e420152
DE		 1643}
1644
1645/* Perform ld24: ld24 $dr,#$uimm24. */
1646CIA
1647SEM_FN_NAME (m32rx,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1648{
b8a9943d 1649 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1650#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_31_ld24.f
1651 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1652 CIA new_pc = CPU (h_pc) + 4;
1653 EXTRACT_FMT_31_LD24_VARS /* f-op1 f-r1 f-uimm24 */
1654 EXTRACT_FMT_31_LD24_CODE
1655
8e420152 1656 CPU (h_gr[f_r1]) = OPRND (uimm24);
b8a9943d
DE		 1657 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1658
8e420152
DE		 1659#if WITH_PROFILE_MODEL_P
1660 if (PROFILE_MODEL_P (current_cpu))
1661 {
1662 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1663 m32rx_model_profile_insn (current_cpu, abuf);
1664 }
1665#endif
b8a9943d 1666
8e420152
DE		 1667 return new_pc;
1668#undef OPRND
8e420152
DE		 1669}
1670
1671/* Perform ldi8: ldi $dr,#$simm8. */
1672CIA
1673SEM_FN_NAME (m32rx,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1674{
b8a9943d 1675 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1676#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_32_ldi8.f
1677 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1678 CIA new_pc = CPU (h_pc) + 2;
1679 EXTRACT_FMT_32_LDI8_VARS /* f-op1 f-r1 f-simm8 */
1680 EXTRACT_FMT_32_LDI8_CODE
1681
8e420152 1682 CPU (h_gr[f_r1]) = OPRND (simm8);
b8a9943d
DE		 1683 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1684
8e420152
DE		 1685#if WITH_PROFILE_MODEL_P
1686 if (PROFILE_MODEL_P (current_cpu))
1687 {
1688 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1689 m32rx_model_profile_insn (current_cpu, abuf);
1690 }
1691#endif
b8a9943d 1692
8e420152
DE		 1693 return new_pc;
1694#undef OPRND
8e420152
DE		 1695}
1696
1697/* Perform ldi16: ldi $dr,$slo16. */
1698CIA
1699SEM_FN_NAME (m32rx,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1700{
b8a9943d 1701 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1702#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_33_ldi16.f
1703 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1704 CIA new_pc = CPU (h_pc) + 4;
1705 EXTRACT_FMT_33_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1706 EXTRACT_FMT_33_LDI16_CODE
1707
8e420152 1708 CPU (h_gr[f_r1]) = OPRND (slo16);
b8a9943d
DE		 1709 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1710
8e420152
DE		 1711#if WITH_PROFILE_MODEL_P
1712 if (PROFILE_MODEL_P (current_cpu))
1713 {
1714 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1715 m32rx_model_profile_insn (current_cpu, abuf);
1716 }
1717#endif
b8a9943d 1718
8e420152
DE		 1719 return new_pc;
1720#undef OPRND
8e420152
DE		 1721}
1722
1723/* Perform lock: lock $dr,@$sr. */
1724CIA
1725SEM_FN_NAME (m32rx,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1726{
b8a9943d 1727 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 1728#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
1729 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1730 CIA new_pc = CPU (h_pc) + 2;
1731 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
1732 EXTRACT_FMT_0_ADD_CODE
1733
8e420152 1734do_lock (current_cpu, OPRND (dr), OPRND (sr));
b8a9943d 1735
8e420152
DE		 1736#if WITH_PROFILE_MODEL_P
1737 if (PROFILE_MODEL_P (current_cpu))
1738 {
1739 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1740 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1741 m32rx_model_profile_insn (current_cpu, abuf);
1742 }
1743#endif
b8a9943d 1744
8e420152
DE		 1745 return new_pc;
1746#undef OPRND
8e420152
DE		 1747}
1748
b8a9943d 1749/* Perform machi-a: machi $src1,$src2,$acc. */
8e420152 1750CIA
b8a9943d 1751SEM_FN_NAME (m32rx,machi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
8e420152 1752{
b8a9943d
DE		 1753 insn_t insn = SEM_INSN (sem_arg);
1754#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_34_machi_a.f
8e420152 1755 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1756 CIA new_pc = CPU (h_pc) + 2;
1757 EXTRACT_FMT_34_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1758 EXTRACT_FMT_34_MACHI_A_CODE
1759
1760m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8));
1761 TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1762
8e420152
DE		 1763#if WITH_PROFILE_MODEL_P
1764 if (PROFILE_MODEL_P (current_cpu))
1765 {
1766 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1767 m32rx_model_profile_insn (current_cpu, abuf);
1768 }
1769#endif
b8a9943d 1770
8e420152
DE		 1771 return new_pc;
1772#undef OPRND
8e420152
DE		 1773}
1774
b8a9943d 1775/* Perform maclo-a: maclo $src1,$src2,$acc. */
8e420152 1776CIA
b8a9943d 1777SEM_FN_NAME (m32rx,maclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
8e420152 1778{
b8a9943d
DE		 1779 insn_t insn = SEM_INSN (sem_arg);
1780#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_34_machi_a.f
8e420152 1781 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1782 CIA new_pc = CPU (h_pc) + 2;
1783 EXTRACT_FMT_34_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1784 EXTRACT_FMT_34_MACHI_A_CODE
1785
1786m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8));
1787 TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1788
8e420152
DE		 1789#if WITH_PROFILE_MODEL_P
1790 if (PROFILE_MODEL_P (current_cpu))
1791 {
1792 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1793 m32rx_model_profile_insn (current_cpu, abuf);
1794 }
1795#endif
b8a9943d 1796
8e420152
DE		 1797 return new_pc;
1798#undef OPRND
8e420152
DE		 1799}
1800
b8a9943d 1801/* Perform mul: mul $dr,$sr. */
8e420152 1802CIA
b8a9943d 1803SEM_FN_NAME (m32rx,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
8e420152 1804{
b8a9943d
DE		 1805 insn_t insn = SEM_INSN (sem_arg);
1806#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
8e420152 1807 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1808 CIA new_pc = CPU (h_pc) + 2;
1809 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
1810 EXTRACT_FMT_0_ADD_CODE
1811
1812 CPU (h_gr[f_r1]) = MULSI (OPRND (dr), OPRND (sr));
1813 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1814
8e420152
DE		 1815#if WITH_PROFILE_MODEL_P
1816 if (PROFILE_MODEL_P (current_cpu))
1817 {
1818 m32rx_model_mark_get_h_gr (current_cpu, abuf);
b8a9943d 1819 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 1820 m32rx_model_profile_insn (current_cpu, abuf);
1821 }
1822#endif
b8a9943d 1823
8e420152
DE		 1824 return new_pc;
1825#undef OPRND
8e420152
DE		 1826}
1827
b8a9943d 1828/* Perform mulhi-a: mulhi $src1,$src2,$acc. */
8e420152 1829CIA
b8a9943d 1830SEM_FN_NAME (m32rx,mulhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
8e420152 1831{
b8a9943d
DE		 1832 insn_t insn = SEM_INSN (sem_arg);
1833#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_35_mulhi_a.f
8e420152 1834 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1835 CIA new_pc = CPU (h_pc) + 2;
1836 EXTRACT_FMT_35_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1837 EXTRACT_FMT_35_MULHI_A_CODE
1838
1839m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 16), 16));
1840 TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1841
8e420152
DE		 1842#if WITH_PROFILE_MODEL_P
1843 if (PROFILE_MODEL_P (current_cpu))
1844 {
1845 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1846 m32rx_model_profile_insn (current_cpu, abuf);
1847 }
1848#endif
b8a9943d 1849
8e420152
DE		 1850 return new_pc;
1851#undef OPRND
8e420152
DE		 1852}
1853
b8a9943d 1854/* Perform mullo-a: mullo $src1,$src2,$acc. */
8e420152 1855CIA
b8a9943d 1856SEM_FN_NAME (m32rx,mullo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
8e420152 1857{
b8a9943d
DE		 1858 insn_t insn = SEM_INSN (sem_arg);
1859#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_35_mulhi_a.f
8e420152 1860 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1861 CIA new_pc = CPU (h_pc) + 2;
1862 EXTRACT_FMT_35_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1863 EXTRACT_FMT_35_MULHI_A_CODE
1864
1865m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 16), 16));
1866 TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1867
8e420152
DE		 1868#if WITH_PROFILE_MODEL_P
1869 if (PROFILE_MODEL_P (current_cpu))
1870 {
1871 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1872 m32rx_model_profile_insn (current_cpu, abuf);
1873 }
1874#endif
b8a9943d 1875
8e420152
DE		 1876 return new_pc;
1877#undef OPRND
8e420152
DE		 1878}
1879
b8a9943d 1880/* Perform mv: mv $dr,$sr. */
8e420152 1881CIA
b8a9943d 1882SEM_FN_NAME (m32rx,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
8e420152 1883{
b8a9943d
DE		 1884 insn_t insn = SEM_INSN (sem_arg);
1885#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_36_mv.f
8e420152 1886 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1887 CIA new_pc = CPU (h_pc) + 2;
1888 EXTRACT_FMT_36_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
1889 EXTRACT_FMT_36_MV_CODE
1890
1891 CPU (h_gr[f_r1]) = OPRND (sr);
1892 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1893
8e420152
DE		 1894#if WITH_PROFILE_MODEL_P
1895 if (PROFILE_MODEL_P (current_cpu))
1896 {
1897 m32rx_model_mark_get_h_gr (current_cpu, abuf);
b8a9943d 1898 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 1899 m32rx_model_profile_insn (current_cpu, abuf);
1900 }
1901#endif
b8a9943d 1902
8e420152
DE		 1903 return new_pc;
1904#undef OPRND
8e420152
DE		 1905}
1906
b8a9943d 1907/* Perform mvfachi-a: mvfachi $dr,$accs. */
8e420152 1908CIA
b8a9943d 1909SEM_FN_NAME (m32rx,mvfachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
8e420152 1910{
b8a9943d
DE		 1911 insn_t insn = SEM_INSN (sem_arg);
1912#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_37_mvfachi_a.f
8e420152 1913 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1914 CIA new_pc = CPU (h_pc) + 2;
1915 EXTRACT_FMT_37_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
1916 EXTRACT_FMT_37_MVFACHI_A_CODE
1917
1918 CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 32));
1919 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1920
8e420152
DE		 1921#if WITH_PROFILE_MODEL_P
1922 if (PROFILE_MODEL_P (current_cpu))
1923 {
b8a9943d 1924 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 1925 m32rx_model_profile_insn (current_cpu, abuf);
1926 }
1927#endif
b8a9943d 1928
8e420152
DE		 1929 return new_pc;
1930#undef OPRND
8e420152
DE		 1931}
1932
b8a9943d 1933/* Perform mvfaclo-a: mvfaclo $dr,$accs. */
8e420152 1934CIA
b8a9943d 1935SEM_FN_NAME (m32rx,mvfaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
8e420152 1936{
b8a9943d
DE		 1937 insn_t insn = SEM_INSN (sem_arg);
1938#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_37_mvfachi_a.f
8e420152 1939 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1940 CIA new_pc = CPU (h_pc) + 2;
1941 EXTRACT_FMT_37_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
1942 EXTRACT_FMT_37_MVFACHI_A_CODE
1943
1944 CPU (h_gr[f_r1]) = TRUNCDISI (OPRND (accs));
1945 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1946
8e420152
DE		 1947#if WITH_PROFILE_MODEL_P
1948 if (PROFILE_MODEL_P (current_cpu))
1949 {
b8a9943d 1950 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 1951 m32rx_model_profile_insn (current_cpu, abuf);
1952 }
1953#endif
b8a9943d 1954
8e420152
DE		 1955 return new_pc;
1956#undef OPRND
8e420152
DE		 1957}
1958
b8a9943d 1959/* Perform mvfacmi-a: mvfacmi $dr,$accs. */
8e420152 1960CIA
b8a9943d 1961SEM_FN_NAME (m32rx,mvfacmi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
8e420152 1962{
b8a9943d
DE		 1963 insn_t insn = SEM_INSN (sem_arg);
1964#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_37_mvfachi_a.f
8e420152 1965 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1966 CIA new_pc = CPU (h_pc) + 2;
1967 EXTRACT_FMT_37_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
1968 EXTRACT_FMT_37_MVFACHI_A_CODE
8e420152 1969
b8a9943d
DE		 1970 CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 16));
1971 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 1972
8e420152
DE		 1973#if WITH_PROFILE_MODEL_P
1974 if (PROFILE_MODEL_P (current_cpu))
1975 {
1976 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1977 m32rx_model_profile_insn (current_cpu, abuf);
1978 }
1979#endif
8e420152 1980
8e420152
DE		 1981 return new_pc;
1982#undef OPRND
8e420152
DE		 1983}
1984
1985/* Perform mvfc: mvfc $dr,$scr. */
1986CIA
1987SEM_FN_NAME (m32rx,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1988{
b8a9943d
DE		 1989 insn_t insn = SEM_INSN (sem_arg);
1990#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_38_mvfc.f
8e420152 1991 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 1992 CIA new_pc = CPU (h_pc) + 2;
1993 EXTRACT_FMT_38_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
1994 EXTRACT_FMT_38_MVFC_CODE
1995
8e420152 1996 CPU (h_gr[f_r1]) = OPRND (scr);
b8a9943d
DE		 1997 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1998
8e420152
DE		 1999#if WITH_PROFILE_MODEL_P
2000 if (PROFILE_MODEL_P (current_cpu))
2001 {
2002 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2003 m32rx_model_profile_insn (current_cpu, abuf);
2004 }
2005#endif
8e420152 2006
8e420152
DE		 2007 return new_pc;
2008#undef OPRND
8e420152
DE		 2009}
2010
2011/* Perform mvtachi-a: mvtachi $src1,$accs. */
2012CIA
2013SEM_FN_NAME (m32rx,mvtachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2014{
b8a9943d
DE		 2015 insn_t insn = SEM_INSN (sem_arg);
2016#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_39_mvtachi_a.f
8e420152 2017 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2018 CIA new_pc = CPU (h_pc) + 2;
2019 EXTRACT_FMT_39_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2020 EXTRACT_FMT_39_MVTACHI_A_CODE
2021
8e420152 2022m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (OPRND (src1)), 32)));
b8a9943d 2023 TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
8e420152 2024
8e420152
DE		 2025#if WITH_PROFILE_MODEL_P
2026 if (PROFILE_MODEL_P (current_cpu))
2027 {
2028 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2029 m32rx_model_profile_insn (current_cpu, abuf);
2030 }
2031#endif
b8a9943d 2032
8e420152
DE		 2033 return new_pc;
2034#undef OPRND
8e420152
DE		 2035}
2036
2037/* Perform mvtaclo-a: mvtaclo $src1,$accs. */
2038CIA
2039SEM_FN_NAME (m32rx,mvtaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2040{
b8a9943d
DE		 2041 insn_t insn = SEM_INSN (sem_arg);
2042#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_39_mvtachi_a.f
8e420152 2043 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2044 CIA new_pc = CPU (h_pc) + 2;
2045 EXTRACT_FMT_39_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2046 EXTRACT_FMT_39_MVTACHI_A_CODE
2047
8e420152 2048m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0xffffffff, 0)), EXTSIDI (OPRND (src1))));
b8a9943d
DE		 2049 TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
2050
8e420152
DE		 2051#if WITH_PROFILE_MODEL_P
2052 if (PROFILE_MODEL_P (current_cpu))
2053 {
2054 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2055 m32rx_model_profile_insn (current_cpu, abuf);
2056 }
2057#endif
b8a9943d 2058
8e420152
DE		 2059 return new_pc;
2060#undef OPRND
8e420152
DE		 2061}
2062
2063/* Perform mvtc: mvtc $sr,$dcr. */
2064CIA
2065SEM_FN_NAME (m32rx,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2066{
b8a9943d
DE		 2067 insn_t insn = SEM_INSN (sem_arg);
2068#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_40_mvtc.f
8e420152 2069 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2070 CIA new_pc = CPU (h_pc) + 2;
2071 EXTRACT_FMT_40_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
2072 EXTRACT_FMT_40_MVTC_CODE
2073
8e420152 2074m32rx_h_cr_set (current_cpu, f_r1, OPRND (sr));
b8a9943d
DE		 2075 TRACE_RESULT (current_cpu, "dcr", 'x', m32rx_h_cr_get (current_cpu, f_r1));
2076
8e420152
DE		 2077#if WITH_PROFILE_MODEL_P
2078 if (PROFILE_MODEL_P (current_cpu))
2079 {
2080 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2081 m32rx_model_profile_insn (current_cpu, abuf);
2082 }
2083#endif
b8a9943d 2084
8e420152
DE		 2085 return new_pc;
2086#undef OPRND
8e420152
DE		 2087}
2088
2089/* Perform neg: neg $dr,$sr. */
2090CIA
2091SEM_FN_NAME (m32rx,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2092{
b8a9943d
DE		 2093 insn_t insn = SEM_INSN (sem_arg);
2094#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_36_mv.f
8e420152 2095 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2096 CIA new_pc = CPU (h_pc) + 2;
2097 EXTRACT_FMT_36_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
2098 EXTRACT_FMT_36_MV_CODE
2099
8e420152 2100 CPU (h_gr[f_r1]) = NEGSI (OPRND (sr));
b8a9943d
DE		 2101 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2102
8e420152
DE		 2103#if WITH_PROFILE_MODEL_P
2104 if (PROFILE_MODEL_P (current_cpu))
2105 {
2106 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2107 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2108 m32rx_model_profile_insn (current_cpu, abuf);
2109 }
2110#endif
b8a9943d 2111
8e420152
DE		 2112 return new_pc;
2113#undef OPRND
8e420152
DE		 2114}
2115
2116/* Perform nop: nop. */
2117CIA
2118SEM_FN_NAME (m32rx,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2119{
b8a9943d
DE		 2120 insn_t insn = SEM_INSN (sem_arg);
2121#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_41_nop.f
8e420152 2122 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2123 CIA new_pc = CPU (h_pc) + 2;
2124 EXTRACT_FMT_41_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
2125 EXTRACT_FMT_41_NOP_CODE
2126
8e420152 2127PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
b8a9943d 2128
8e420152
DE		 2129#if WITH_PROFILE_MODEL_P
2130 if (PROFILE_MODEL_P (current_cpu))
2131 {
2132 m32rx_model_profile_insn (current_cpu, abuf);
2133 }
2134#endif
b8a9943d 2135
8e420152
DE		 2136 return new_pc;
2137#undef OPRND
8e420152
DE		 2138}
2139
2140/* Perform not: not $dr,$sr. */
2141CIA
2142SEM_FN_NAME (m32rx,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2143{
b8a9943d
DE		 2144 insn_t insn = SEM_INSN (sem_arg);
2145#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_36_mv.f
8e420152 2146 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2147 CIA new_pc = CPU (h_pc) + 2;
2148 EXTRACT_FMT_36_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
2149 EXTRACT_FMT_36_MV_CODE
2150
8e420152 2151 CPU (h_gr[f_r1]) = INVSI (OPRND (sr));
b8a9943d
DE		 2152 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2153
8e420152
DE		 2154#if WITH_PROFILE_MODEL_P
2155 if (PROFILE_MODEL_P (current_cpu))
2156 {
2157 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2158 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2159 m32rx_model_profile_insn (current_cpu, abuf);
2160 }
2161#endif
8e420152 2162
8e420152
DE		 2163 return new_pc;
2164#undef OPRND
8e420152
DE		 2165}
2166
2167/* Perform rac-a: rac $accs. */
2168CIA
2169SEM_FN_NAME (m32rx,rac_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2170{
b8a9943d
DE		 2171 insn_t insn = SEM_INSN (sem_arg);
2172#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_42_rac_a.f
8e420152 2173 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2174 CIA new_pc = CPU (h_pc) + 2;
2175 EXTRACT_FMT_42_RAC_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2176 EXTRACT_FMT_42_RAC_A_CODE
2177
8e420152
DE		 2178do {
2179 DI tmp_tmp1;
2180 tmp_tmp1 = ANDDI (OPRND (accs), MAKEDI (16777215, 0xffffffff));
2181if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (16383, 0xffff8000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) {
2182 tmp_tmp1 = MAKEDI (16383, 0xffff8000);
2183} else {
2184if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) {
2185 tmp_tmp1 = MAKEDI (16760832, 0);
2186} else {
2187 tmp_tmp1 = ANDDI (ADDDI (OPRND (accs), MAKEDI (0, 16384)), MAKEDI (16777215, 0xffff8000));
2188}
2189}
2190 tmp_tmp1 = SLLDI (tmp_tmp1, 1);
2191m32rx_h_accums_set (current_cpu, f_accs, SRADI (SLLDI (tmp_tmp1, 7), 7));
b8a9943d 2192 TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
8e420152 2193} while (0);
8e420152 2194
8e420152
DE		 2195#if WITH_PROFILE_MODEL_P
2196 if (PROFILE_MODEL_P (current_cpu))
2197 {
2198 m32rx_model_profile_insn (current_cpu, abuf);
2199 }
2200#endif
b8a9943d 2201
8e420152
DE		 2202 return new_pc;
2203#undef OPRND
8e420152
DE		 2204}
2205
2206/* Perform rach-a: rach $accs. */
2207CIA
2208SEM_FN_NAME (m32rx,rach_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2209{
b8a9943d
DE		 2210 insn_t insn = SEM_INSN (sem_arg);
2211#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_42_rac_a.f
8e420152 2212 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2213 CIA new_pc = CPU (h_pc) + 2;
2214 EXTRACT_FMT_42_RAC_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2215 EXTRACT_FMT_42_RAC_A_CODE
2216
8e420152
DE		 2217do {
2218 DI tmp_tmp1;
2219 tmp_tmp1 = ANDDI (OPRND (accs), MAKEDI (16777215, 0xffffffff));
2220if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) {
2221 tmp_tmp1 = MAKEDI (16383, 0x80000000);
2222} else {
2223if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) {
2224 tmp_tmp1 = MAKEDI (16760832, 0);
2225} else {
2226 tmp_tmp1 = ANDDI (ADDDI (OPRND (accs), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000));
2227}
2228}
2229 tmp_tmp1 = SLLDI (tmp_tmp1, 1);
2230m32rx_h_accums_set (current_cpu, f_accs, SRADI (SLLDI (tmp_tmp1, 7), 7));
b8a9943d 2231 TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
8e420152 2232} while (0);
b8a9943d 2233
8e420152
DE		 2234#if WITH_PROFILE_MODEL_P
2235 if (PROFILE_MODEL_P (current_cpu))
2236 {
2237 m32rx_model_profile_insn (current_cpu, abuf);
2238 }
2239#endif
b8a9943d 2240
8e420152
DE		 2241 return new_pc;
2242#undef OPRND
8e420152
DE		 2243}
2244
2245/* Perform rte: rte. */
2246CIA
2247SEM_FN_NAME (m32rx,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2248{
b8a9943d
DE		 2249 insn_t insn = SEM_INSN (sem_arg);
2250#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_43_rte.f
8e420152 2251 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 2252 CIA new_pc = CPU (h_pc) + 2;
8e420152 2253 int taken_p = 0;
b8a9943d
DE		 2254 EXTRACT_FMT_43_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
2255 EXTRACT_FMT_43_RTE_CODE
2256
8e420152 2257do {
b8a9943d
DE		 2258 CPU (h_sm) = OPRND (h_bsm_0);
2259 TRACE_RESULT (current_cpu, "h-sm-0", 'x', CPU (h_sm));
2260 CPU (h_ie) = OPRND (h_bie_0);
2261 TRACE_RESULT (current_cpu, "h-ie-0", 'x', CPU (h_ie));
2262 CPU (h_cond) = OPRND (h_bcond_0);
2263 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
2264 BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, OPRND (h_bpc_0)));
2265 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 2266} while (0);
b8a9943d 2267
8e420152
DE		 2268#if WITH_PROFILE_MODEL_P
2269 if (PROFILE_MODEL_P (current_cpu))
2270 {
2271 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
2272 }
2273#endif
b8a9943d 2274
8e420152
DE		 2275 return new_pc;
2276#undef OPRND
8e420152
DE		 2277}
2278
b8a9943d 2279/* Perform seth: seth $dr,#$hi16. */
8e420152
DE		 2280CIA
2281SEM_FN_NAME (m32rx,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2282{
b8a9943d
DE		 2283 insn_t insn = SEM_INSN (sem_arg);
2284#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_44_seth.f
8e420152 2285 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2286 CIA new_pc = CPU (h_pc) + 4;
2287 EXTRACT_FMT_44_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
2288 EXTRACT_FMT_44_SETH_CODE
2289
8e420152 2290 CPU (h_gr[f_r1]) = SLLSI (OPRND (hi16), 16);
b8a9943d
DE		 2291 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2292
8e420152
DE		 2293#if WITH_PROFILE_MODEL_P
2294 if (PROFILE_MODEL_P (current_cpu))
2295 {
2296 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2297 m32rx_model_profile_insn (current_cpu, abuf);
2298 }
2299#endif
b8a9943d 2300
8e420152
DE		 2301 return new_pc;
2302#undef OPRND
8e420152
DE		 2303}
2304
2305/* Perform sll: sll $dr,$sr. */
2306CIA
2307SEM_FN_NAME (m32rx,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2308{
b8a9943d 2309 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2310#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
2311 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2312 CIA new_pc = CPU (h_pc) + 2;
2313 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2314 EXTRACT_FMT_0_ADD_CODE
2315
8e420152 2316 CPU (h_gr[f_r1]) = SLLSI (OPRND (dr), ANDSI (OPRND (sr), 31));
b8a9943d
DE		 2317 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2318
8e420152
DE		 2319#if WITH_PROFILE_MODEL_P
2320 if (PROFILE_MODEL_P (current_cpu))
2321 {
2322 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2323 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2324 m32rx_model_profile_insn (current_cpu, abuf);
2325 }
2326#endif
b8a9943d 2327
8e420152
DE		 2328 return new_pc;
2329#undef OPRND
8e420152
DE		 2330}
2331
2332/* Perform sll3: sll3 $dr,$sr,#$simm16. */
2333CIA
2334SEM_FN_NAME (m32rx,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2335{
b8a9943d 2336 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2337#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_5_addv3.f
2338 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2339 CIA new_pc = CPU (h_pc) + 4;
2340 EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2341 EXTRACT_FMT_5_ADDV3_CODE
2342
8e420152 2343 CPU (h_gr[f_r1]) = SLLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
b8a9943d
DE		 2344 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2345
8e420152
DE		 2346#if WITH_PROFILE_MODEL_P
2347 if (PROFILE_MODEL_P (current_cpu))
2348 {
2349 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2350 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2351 m32rx_model_profile_insn (current_cpu, abuf);
2352 }
2353#endif
b8a9943d 2354
8e420152
DE		 2355 return new_pc;
2356#undef OPRND
8e420152
DE		 2357}
2358
2359/* Perform slli: slli $dr,#$uimm5. */
2360CIA
2361SEM_FN_NAME (m32rx,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2362{
b8a9943d
DE		 2363 insn_t insn = SEM_INSN (sem_arg);
2364#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_45_slli.f
8e420152 2365 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2366 CIA new_pc = CPU (h_pc) + 2;
2367 EXTRACT_FMT_45_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
2368 EXTRACT_FMT_45_SLLI_CODE
2369
8e420152 2370 CPU (h_gr[f_r1]) = SLLSI (OPRND (dr), OPRND (uimm5));
b8a9943d
DE		 2371 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2372
8e420152
DE		 2373#if WITH_PROFILE_MODEL_P
2374 if (PROFILE_MODEL_P (current_cpu))
2375 {
2376 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2377 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2378 m32rx_model_profile_insn (current_cpu, abuf);
2379 }
2380#endif
b8a9943d 2381
8e420152
DE		 2382 return new_pc;
2383#undef OPRND
8e420152
DE		 2384}
2385
2386/* Perform sra: sra $dr,$sr. */
2387CIA
2388SEM_FN_NAME (m32rx,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2389{
b8a9943d 2390 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2391#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
2392 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2393 CIA new_pc = CPU (h_pc) + 2;
2394 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2395 EXTRACT_FMT_0_ADD_CODE
2396
8e420152 2397 CPU (h_gr[f_r1]) = SRASI (OPRND (dr), ANDSI (OPRND (sr), 31));
b8a9943d
DE		 2398 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2399
8e420152
DE		 2400#if WITH_PROFILE_MODEL_P
2401 if (PROFILE_MODEL_P (current_cpu))
2402 {
2403 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2404 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2405 m32rx_model_profile_insn (current_cpu, abuf);
2406 }
2407#endif
b8a9943d 2408
8e420152
DE		 2409 return new_pc;
2410#undef OPRND
8e420152
DE		 2411}
2412
2413/* Perform sra3: sra3 $dr,$sr,#$simm16. */
2414CIA
2415SEM_FN_NAME (m32rx,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2416{
b8a9943d 2417 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2418#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_5_addv3.f
2419 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2420 CIA new_pc = CPU (h_pc) + 4;
2421 EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2422 EXTRACT_FMT_5_ADDV3_CODE
2423
8e420152 2424 CPU (h_gr[f_r1]) = SRASI (OPRND (sr), ANDSI (OPRND (simm16), 31));
b8a9943d
DE		 2425 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2426
8e420152
DE		 2427#if WITH_PROFILE_MODEL_P
2428 if (PROFILE_MODEL_P (current_cpu))
2429 {
2430 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2431 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2432 m32rx_model_profile_insn (current_cpu, abuf);
2433 }
2434#endif
b8a9943d 2435
8e420152
DE		 2436 return new_pc;
2437#undef OPRND
8e420152
DE		 2438}
2439
2440/* Perform srai: srai $dr,#$uimm5. */
2441CIA
2442SEM_FN_NAME (m32rx,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2443{
b8a9943d
DE		 2444 insn_t insn = SEM_INSN (sem_arg);
2445#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_45_slli.f
8e420152 2446 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2447 CIA new_pc = CPU (h_pc) + 2;
2448 EXTRACT_FMT_45_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
2449 EXTRACT_FMT_45_SLLI_CODE
2450
8e420152 2451 CPU (h_gr[f_r1]) = SRASI (OPRND (dr), OPRND (uimm5));
b8a9943d
DE		 2452 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2453
8e420152
DE		 2454#if WITH_PROFILE_MODEL_P
2455 if (PROFILE_MODEL_P (current_cpu))
2456 {
2457 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2458 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2459 m32rx_model_profile_insn (current_cpu, abuf);
2460 }
2461#endif
b8a9943d 2462
8e420152
DE		 2463 return new_pc;
2464#undef OPRND
8e420152
DE		 2465}
2466
2467/* Perform srl: srl $dr,$sr. */
2468CIA
2469SEM_FN_NAME (m32rx,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2470{
b8a9943d 2471 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2472#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
2473 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2474 CIA new_pc = CPU (h_pc) + 2;
2475 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2476 EXTRACT_FMT_0_ADD_CODE
2477
8e420152 2478 CPU (h_gr[f_r1]) = SRLSI (OPRND (dr), ANDSI (OPRND (sr), 31));
b8a9943d
DE		 2479 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2480
8e420152
DE		 2481#if WITH_PROFILE_MODEL_P
2482 if (PROFILE_MODEL_P (current_cpu))
2483 {
2484 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2485 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2486 m32rx_model_profile_insn (current_cpu, abuf);
2487 }
2488#endif
b8a9943d 2489
8e420152
DE		 2490 return new_pc;
2491#undef OPRND
8e420152
DE		 2492}
2493
2494/* Perform srl3: srl3 $dr,$sr,#$simm16. */
2495CIA
2496SEM_FN_NAME (m32rx,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2497{
b8a9943d 2498 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2499#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_5_addv3.f
2500 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2501 CIA new_pc = CPU (h_pc) + 4;
2502 EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2503 EXTRACT_FMT_5_ADDV3_CODE
2504
8e420152 2505 CPU (h_gr[f_r1]) = SRLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
b8a9943d
DE		 2506 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2507
8e420152
DE		 2508#if WITH_PROFILE_MODEL_P
2509 if (PROFILE_MODEL_P (current_cpu))
2510 {
2511 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2512 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2513 m32rx_model_profile_insn (current_cpu, abuf);
2514 }
2515#endif
b8a9943d 2516
8e420152
DE		 2517 return new_pc;
2518#undef OPRND
8e420152
DE		 2519}
2520
2521/* Perform srli: srli $dr,#$uimm5. */
2522CIA
2523SEM_FN_NAME (m32rx,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2524{
b8a9943d
DE		 2525 insn_t insn = SEM_INSN (sem_arg);
2526#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_45_slli.f
8e420152 2527 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2528 CIA new_pc = CPU (h_pc) + 2;
2529 EXTRACT_FMT_45_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
2530 EXTRACT_FMT_45_SLLI_CODE
2531
8e420152 2532 CPU (h_gr[f_r1]) = SRLSI (OPRND (dr), OPRND (uimm5));
b8a9943d
DE		 2533 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2534
8e420152
DE		 2535#if WITH_PROFILE_MODEL_P
2536 if (PROFILE_MODEL_P (current_cpu))
2537 {
2538 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2539 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2540 m32rx_model_profile_insn (current_cpu, abuf);
2541 }
2542#endif
b8a9943d 2543
8e420152
DE		 2544 return new_pc;
2545#undef OPRND
8e420152
DE		 2546}
2547
2548/* Perform st: st $src1,@$src2. */
2549CIA
2550SEM_FN_NAME (m32rx,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2551{
b8a9943d 2552 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2553#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_17_cmp.f
2554 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2555 CIA new_pc = CPU (h_pc) + 2;
2556 EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
2557 EXTRACT_FMT_17_CMP_CODE
2558
8e420152 2559SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
b8a9943d
DE		 2560 TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
2561
8e420152
DE		 2562#if WITH_PROFILE_MODEL_P
2563 if (PROFILE_MODEL_P (current_cpu))
2564 {
2565 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2566 m32rx_model_profile_insn (current_cpu, abuf);
2567 }
2568#endif
b8a9943d 2569
8e420152
DE		 2570 return new_pc;
2571#undef OPRND
8e420152
DE		 2572}
2573
2574/* Perform st-d: st $src1,@($slo16,$src2). */
2575CIA
2576SEM_FN_NAME (m32rx,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2577{
b8a9943d
DE		 2578 insn_t insn = SEM_INSN (sem_arg);
2579#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_46_st_d.f
8e420152 2580 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2581 CIA new_pc = CPU (h_pc) + 4;
2582 EXTRACT_FMT_46_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2583 EXTRACT_FMT_46_ST_D_CODE
2584
8e420152 2585SETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
b8a9943d
DE		 2586 TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
2587
8e420152
DE		 2588#if WITH_PROFILE_MODEL_P
2589 if (PROFILE_MODEL_P (current_cpu))
2590 {
2591 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2592 m32rx_model_profile_insn (current_cpu, abuf);
2593 }
2594#endif
b8a9943d 2595
8e420152
DE		 2596 return new_pc;
2597#undef OPRND
8e420152
DE		 2598}
2599
2600/* Perform stb: stb $src1,@$src2. */
2601CIA
2602SEM_FN_NAME (m32rx,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2603{
b8a9943d 2604 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2605#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_17_cmp.f
2606 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2607 CIA new_pc = CPU (h_pc) + 2;
2608 EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
2609 EXTRACT_FMT_17_CMP_CODE
2610
8e420152 2611SETMEMQI (current_cpu, OPRND (src2), OPRND (src1));
b8a9943d
DE		 2612 TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMQI (current_cpu, OPRND (src2)));
2613
8e420152
DE		 2614#if WITH_PROFILE_MODEL_P
2615 if (PROFILE_MODEL_P (current_cpu))
2616 {
2617 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2618 m32rx_model_profile_insn (current_cpu, abuf);
2619 }
2620#endif
b8a9943d 2621
8e420152
DE		 2622 return new_pc;
2623#undef OPRND
8e420152
DE		 2624}
2625
2626/* Perform stb-d: stb $src1,@($slo16,$src2). */
2627CIA
2628SEM_FN_NAME (m32rx,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2629{
b8a9943d
DE		 2630 insn_t insn = SEM_INSN (sem_arg);
2631#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_46_st_d.f
8e420152 2632 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2633 CIA new_pc = CPU (h_pc) + 4;
2634 EXTRACT_FMT_46_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2635 EXTRACT_FMT_46_ST_D_CODE
2636
8e420152 2637SETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
b8a9943d
DE		 2638 TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
2639
8e420152
DE		 2640#if WITH_PROFILE_MODEL_P
2641 if (PROFILE_MODEL_P (current_cpu))
2642 {
2643 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2644 m32rx_model_profile_insn (current_cpu, abuf);
2645 }
2646#endif
b8a9943d 2647
8e420152
DE		 2648 return new_pc;
2649#undef OPRND
8e420152
DE		 2650}
2651
2652/* Perform sth: sth $src1,@$src2. */
2653CIA
2654SEM_FN_NAME (m32rx,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2655{
b8a9943d 2656 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2657#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_17_cmp.f
2658 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2659 CIA new_pc = CPU (h_pc) + 2;
2660 EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
2661 EXTRACT_FMT_17_CMP_CODE
2662
8e420152 2663SETMEMHI (current_cpu, OPRND (src2), OPRND (src1));
b8a9943d
DE		 2664 TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMHI (current_cpu, OPRND (src2)));
2665
8e420152
DE		 2666#if WITH_PROFILE_MODEL_P
2667 if (PROFILE_MODEL_P (current_cpu))
2668 {
2669 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2670 m32rx_model_profile_insn (current_cpu, abuf);
2671 }
2672#endif
b8a9943d 2673
8e420152
DE		 2674 return new_pc;
2675#undef OPRND
8e420152
DE		 2676}
2677
2678/* Perform sth-d: sth $src1,@($slo16,$src2). */
2679CIA
2680SEM_FN_NAME (m32rx,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2681{
b8a9943d
DE		 2682 insn_t insn = SEM_INSN (sem_arg);
2683#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_46_st_d.f
8e420152 2684 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2685 CIA new_pc = CPU (h_pc) + 4;
2686 EXTRACT_FMT_46_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2687 EXTRACT_FMT_46_ST_D_CODE
2688
8e420152 2689SETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
b8a9943d
DE		 2690 TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
2691
8e420152
DE		 2692#if WITH_PROFILE_MODEL_P
2693 if (PROFILE_MODEL_P (current_cpu))
2694 {
2695 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2696 m32rx_model_profile_insn (current_cpu, abuf);
2697 }
2698#endif
b8a9943d 2699
8e420152
DE		 2700 return new_pc;
2701#undef OPRND
8e420152
DE		 2702}
2703
2704/* Perform st-plus: st $src1,@+$src2. */
2705CIA
2706SEM_FN_NAME (m32rx,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2707{
b8a9943d 2708 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2709#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_17_cmp.f
2710 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2711 CIA new_pc = CPU (h_pc) + 2;
2712 EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
2713 EXTRACT_FMT_17_CMP_CODE
2714
8e420152
DE		 2715do {
2716 CPU (h_gr[f_r2]) = ADDSI (OPRND (src2), 4);
b8a9943d 2717 TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
8e420152 2718SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
b8a9943d 2719 TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
8e420152 2720} while (0);
b8a9943d 2721
8e420152
DE		 2722#if WITH_PROFILE_MODEL_P
2723 if (PROFILE_MODEL_P (current_cpu))
2724 {
2725 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2726 m32rx_model_profile_insn (current_cpu, abuf);
2727 }
2728#endif
b8a9943d 2729
8e420152
DE		 2730 return new_pc;
2731#undef OPRND
8e420152
DE		 2732}
2733
2734/* Perform st-minus: st $src1,@-$src2. */
2735CIA
2736SEM_FN_NAME (m32rx,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2737{
b8a9943d 2738 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2739#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_17_cmp.f
2740 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2741 CIA new_pc = CPU (h_pc) + 2;
2742 EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
2743 EXTRACT_FMT_17_CMP_CODE
2744
8e420152
DE		 2745do {
2746 CPU (h_gr[f_r2]) = SUBSI (OPRND (src2), 4);
b8a9943d 2747 TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
8e420152 2748SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
b8a9943d 2749 TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
8e420152 2750} while (0);
b8a9943d 2751
8e420152
DE		 2752#if WITH_PROFILE_MODEL_P
2753 if (PROFILE_MODEL_P (current_cpu))
2754 {
2755 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2756 m32rx_model_profile_insn (current_cpu, abuf);
2757 }
2758#endif
b8a9943d 2759
8e420152
DE		 2760 return new_pc;
2761#undef OPRND
8e420152
DE		 2762}
2763
2764/* Perform sub: sub $dr,$sr. */
2765CIA
2766SEM_FN_NAME (m32rx,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2767{
b8a9943d 2768 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2769#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
2770 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2771 CIA new_pc = CPU (h_pc) + 2;
2772 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2773 EXTRACT_FMT_0_ADD_CODE
2774
8e420152 2775 CPU (h_gr[f_r1]) = SUBSI (OPRND (dr), OPRND (sr));
b8a9943d
DE		 2776 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2777
8e420152
DE		 2778#if WITH_PROFILE_MODEL_P
2779 if (PROFILE_MODEL_P (current_cpu))
2780 {
2781 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2782 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2783 m32rx_model_profile_insn (current_cpu, abuf);
2784 }
2785#endif
b8a9943d 2786
8e420152
DE		 2787 return new_pc;
2788#undef OPRND
8e420152
DE		 2789}
2790
2791/* Perform subv: subv $dr,$sr. */
2792CIA
2793SEM_FN_NAME (m32rx,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2794{
b8a9943d 2795 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2796#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_0_add.f
2797 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2798 CIA new_pc = CPU (h_pc) + 2;
2799 EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2800 EXTRACT_FMT_0_ADD_CODE
2801
8e420152
DE		 2802do {
2803 BI temp1;SI temp0;
2804 temp0 = SUBSI (OPRND (dr), OPRND (sr));
2805 temp1 = SUBOFSI (OPRND (dr), OPRND (sr), 0);
2806 CPU (h_gr[f_r1]) = temp0;
b8a9943d 2807 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 2808 CPU (h_cond) = temp1;
b8a9943d 2809 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
8e420152 2810} while (0);
b8a9943d 2811
8e420152
DE		 2812#if WITH_PROFILE_MODEL_P
2813 if (PROFILE_MODEL_P (current_cpu))
2814 {
2815 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2816 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2817 m32rx_model_profile_insn (current_cpu, abuf);
2818 }
2819#endif
b8a9943d 2820
8e420152
DE		 2821 return new_pc;
2822#undef OPRND
8e420152
DE		 2823}
2824
2825/* Perform subx: subx $dr,$sr. */
2826CIA
2827SEM_FN_NAME (m32rx,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2828{
b8a9943d 2829 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2830#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_6_addx.f
2831 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2832 CIA new_pc = CPU (h_pc) + 2;
2833 EXTRACT_FMT_6_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
2834 EXTRACT_FMT_6_ADDX_CODE
2835
8e420152
DE		 2836do {
2837 BI temp1;SI temp0;
2838 temp0 = SUBCSI (OPRND (dr), OPRND (sr), OPRND (condbit));
2839 temp1 = SUBCFSI (OPRND (dr), OPRND (sr), OPRND (condbit));
2840 CPU (h_gr[f_r1]) = temp0;
b8a9943d 2841 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 2842 CPU (h_cond) = temp1;
b8a9943d 2843 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
8e420152 2844} while (0);
b8a9943d 2845
8e420152
DE		 2846#if WITH_PROFILE_MODEL_P
2847 if (PROFILE_MODEL_P (current_cpu))
2848 {
2849 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2850 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2851 m32rx_model_profile_insn (current_cpu, abuf);
2852 }
2853#endif
b8a9943d 2854
8e420152
DE		 2855 return new_pc;
2856#undef OPRND
8e420152
DE		 2857}
2858
2859/* Perform trap: trap #$uimm4. */
2860CIA
2861SEM_FN_NAME (m32rx,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2862{
b8a9943d
DE		 2863 insn_t insn = SEM_INSN (sem_arg);
2864#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_47_trap.f
8e420152 2865 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d 2866 CIA new_pc = CPU (h_pc) + 2;
8e420152 2867 int taken_p = 0;
b8a9943d
DE		 2868 EXTRACT_FMT_47_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
2869 EXTRACT_FMT_47_TRAP_CODE
2870
8e420152 2871do_trap (current_cpu, OPRND (uimm4));
b8a9943d 2872
8e420152
DE		 2873#if WITH_PROFILE_MODEL_P
2874 if (PROFILE_MODEL_P (current_cpu))
2875 {
2876 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
2877 }
2878#endif
b8a9943d 2879
8e420152
DE		 2880 return new_pc;
2881#undef OPRND
8e420152
DE		 2882}
2883
2884/* Perform unlock: unlock $src1,@$src2. */
2885CIA
2886SEM_FN_NAME (m32rx,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2887{
b8a9943d 2888 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 2889#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_17_cmp.f
2890 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2891 CIA new_pc = CPU (h_pc) + 2;
2892 EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
2893 EXTRACT_FMT_17_CMP_CODE
2894
8e420152 2895do_unlock (current_cpu, OPRND (src1), OPRND (src2));
b8a9943d 2896
8e420152
DE		 2897#if WITH_PROFILE_MODEL_P
2898 if (PROFILE_MODEL_P (current_cpu))
2899 {
2900 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2901 m32rx_model_profile_insn (current_cpu, abuf);
2902 }
2903#endif
b8a9943d 2904
8e420152
DE		 2905 return new_pc;
2906#undef OPRND
8e420152
DE		 2907}
2908
2909/* Perform satb: satb $dr,$src2. */
2910CIA
2911SEM_FN_NAME (m32rx,satb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2912{
b8a9943d
DE		 2913 insn_t insn = SEM_INSN (sem_arg);
2914#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_48_satb.f
8e420152 2915 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2916 CIA new_pc = CPU (h_pc) + 4;
2917 EXTRACT_FMT_48_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
2918 EXTRACT_FMT_48_SATB_CODE
2919
8e420152 2920 CPU (h_gr[f_r1]) = (GESI (OPRND (src2), 127)) ? (127) : (LESI (OPRND (src2), -128)) ? (-128) : (OPRND (src2));
b8a9943d
DE		 2921 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2922
8e420152
DE		 2923#if WITH_PROFILE_MODEL_P
2924 if (PROFILE_MODEL_P (current_cpu))
2925 {
b8a9943d 2926 m32rx_model_mark_get_h_gr (current_cpu, abuf);
8e420152
DE		 2927 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2928 m32rx_model_profile_insn (current_cpu, abuf);
2929 }
2930#endif
b8a9943d 2931
8e420152
DE		 2932 return new_pc;
2933#undef OPRND
8e420152
DE		 2934}
2935
2936/* Perform sath: sath $dr,$src2. */
2937CIA
2938SEM_FN_NAME (m32rx,sath) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2939{
b8a9943d
DE		 2940 insn_t insn = SEM_INSN (sem_arg);
2941#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_48_satb.f
8e420152 2942 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2943 CIA new_pc = CPU (h_pc) + 4;
2944 EXTRACT_FMT_48_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
2945 EXTRACT_FMT_48_SATB_CODE
2946
8e420152 2947 CPU (h_gr[f_r1]) = (GESI (OPRND (src2), 32767)) ? (32767) : (LESI (OPRND (src2), -32768)) ? (-32768) : (OPRND (src2));
b8a9943d
DE		 2948 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2949
8e420152
DE		 2950#if WITH_PROFILE_MODEL_P
2951 if (PROFILE_MODEL_P (current_cpu))
2952 {
b8a9943d 2953 m32rx_model_mark_get_h_gr (current_cpu, abuf);
8e420152
DE		 2954 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2955 m32rx_model_profile_insn (current_cpu, abuf);
2956 }
2957#endif
b8a9943d 2958
8e420152
DE		 2959 return new_pc;
2960#undef OPRND
8e420152
DE		 2961}
2962
2963/* Perform sat: sat $dr,$src2. */
2964CIA
2965SEM_FN_NAME (m32rx,sat) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2966{
b8a9943d
DE		 2967 insn_t insn = SEM_INSN (sem_arg);
2968#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_49_sat.f
8e420152 2969 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2970 CIA new_pc = CPU (h_pc) + 4;
2971 EXTRACT_FMT_49_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
2972 EXTRACT_FMT_49_SAT_CODE
2973
8e420152 2974 CPU (h_gr[f_r1]) = (OPRND (condbit)) ? ((LTSI (OPRND (src2), 0)) ? (2147483647) : (0x80000000)) : (OPRND (src2));
b8a9943d
DE		 2975 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2976
8e420152
DE		 2977#if WITH_PROFILE_MODEL_P
2978 if (PROFILE_MODEL_P (current_cpu))
2979 {
b8a9943d 2980 m32rx_model_mark_get_h_gr (current_cpu, abuf);
8e420152
DE		 2981 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2982 m32rx_model_profile_insn (current_cpu, abuf);
2983 }
2984#endif
b8a9943d 2985
8e420152
DE		 2986 return new_pc;
2987#undef OPRND
8e420152
DE		 2988}
2989
2990/* Perform pcmpbz: pcmpbz $src2. */
2991CIA
2992SEM_FN_NAME (m32rx,pcmpbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2993{
b8a9943d
DE		 2994 insn_t insn = SEM_INSN (sem_arg);
2995#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_20_cmpz.f
8e420152 2996 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 2997 CIA new_pc = CPU (h_pc) + 2;
2998 EXTRACT_FMT_20_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
2999 EXTRACT_FMT_20_CMPZ_CODE
3000
8e420152 3001 CPU (h_cond) = (EQSI (ANDSI (OPRND (src2), 255), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 65280), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 0xff000000), 0)) ? (1) : (0);
b8a9943d
DE		 3002 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
3003
8e420152
DE		 3004#if WITH_PROFILE_MODEL_P
3005 if (PROFILE_MODEL_P (current_cpu))
3006 {
b8a9943d 3007 m32rx_model_mark_get_h_gr (current_cpu, abuf);
8e420152
DE		 3008 m32rx_model_profile_insn (current_cpu, abuf);
3009 }
3010#endif
b8a9943d 3011
8e420152
DE		 3012 return new_pc;
3013#undef OPRND
8e420152
DE		 3014}
3015
3016/* Perform sadd: sadd. */
3017CIA
3018SEM_FN_NAME (m32rx,sadd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
3019{
b8a9943d
DE		 3020 insn_t insn = SEM_INSN (sem_arg);
3021#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_50_sadd.f
8e420152 3022 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 3023 CIA new_pc = CPU (h_pc) + 2;
3024 EXTRACT_FMT_50_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
3025 EXTRACT_FMT_50_SADD_CODE
3026
3027m32rx_h_accums_set (current_cpu, 0, ADDDI (SRADI (OPRND (h_accums_1), 16), OPRND (h_accums_0)));
3028 TRACE_RESULT (current_cpu, "h-accums-0", 'D', m32rx_h_accums_get (current_cpu, 0));
3029
8e420152
DE		 3030#if WITH_PROFILE_MODEL_P
3031 if (PROFILE_MODEL_P (current_cpu))
3032 {
3033 m32rx_model_profile_insn (current_cpu, abuf);
3034 }
3035#endif
b8a9943d 3036
8e420152
DE		 3037 return new_pc;
3038#undef OPRND
8e420152
DE		 3039}
3040
3041/* Perform macwu1: macwu1 $src1,$src2. */
3042CIA
3043SEM_FN_NAME (m32rx,macwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
3044{
b8a9943d
DE		 3045 insn_t insn = SEM_INSN (sem_arg);
3046#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_51_macwu1.f
8e420152 3047 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 3048 CIA new_pc = CPU (h_pc) + 2;
3049 EXTRACT_FMT_51_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
3050 EXTRACT_FMT_51_MACWU1_CODE
3051
3052m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535)))), 8), 8));
3053 TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
3054
8e420152
DE		 3055#if WITH_PROFILE_MODEL_P
3056 if (PROFILE_MODEL_P (current_cpu))
3057 {
3058 m32rx_model_mark_get_h_gr (current_cpu, abuf);
3059 m32rx_model_profile_insn (current_cpu, abuf);
3060 }
3061#endif
b8a9943d 3062
8e420152
DE		 3063 return new_pc;
3064#undef OPRND
8e420152
DE		 3065}
3066
3067/* Perform msblo: msblo $src1,$src2. */
3068CIA
3069SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
3070{
b8a9943d
DE		 3071 insn_t insn = SEM_INSN (sem_arg);
3072#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_52_msblo.f
8e420152 3073 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 3074 CIA new_pc = CPU (h_pc) + 2;
3075 EXTRACT_FMT_52_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
3076 EXTRACT_FMT_52_MSBLO_CODE
3077
8e420152 3078 CPU (h_accum) = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8);
b8a9943d
DE		 3079 TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
3080
8e420152
DE		 3081#if WITH_PROFILE_MODEL_P
3082 if (PROFILE_MODEL_P (current_cpu))
3083 {
3084 m32rx_model_mark_get_h_gr (current_cpu, abuf);
3085 m32rx_model_profile_insn (current_cpu, abuf);
3086 }
3087#endif
b8a9943d 3088
8e420152
DE		 3089 return new_pc;
3090#undef OPRND
8e420152
DE		 3091}
3092
3093/* Perform mulwu1: mulwu1 $src1,$src2. */
3094CIA
3095SEM_FN_NAME (m32rx,mulwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
3096{
b8a9943d 3097 insn_t insn = SEM_INSN (sem_arg);
8e420152
DE		 3098#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_17_cmp.f
3099 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 3100 CIA new_pc = CPU (h_pc) + 2;
3101 EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
3102 EXTRACT_FMT_17_CMP_CODE
3103
8e420152 3104m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535))), 16), 16));
b8a9943d
DE		 3105 TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
3106
8e420152
DE		 3107#if WITH_PROFILE_MODEL_P
3108 if (PROFILE_MODEL_P (current_cpu))
3109 {
3110 m32rx_model_mark_get_h_gr (current_cpu, abuf);
3111 m32rx_model_profile_insn (current_cpu, abuf);
3112 }
3113#endif
b8a9943d 3114
8e420152
DE		 3115 return new_pc;
3116#undef OPRND
8e420152
DE		 3117}
3118
3119/* Perform machl1: machl1 $src1,$src2. */
3120CIA
3121SEM_FN_NAME (m32rx,machl1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
3122{
b8a9943d
DE		 3123 insn_t insn = SEM_INSN (sem_arg);
3124#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_51_macwu1.f
8e420152 3125 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 3126 CIA new_pc = CPU (h_pc) + 2;
3127 EXTRACT_FMT_51_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
3128 EXTRACT_FMT_51_MACWU1_CODE
3129
3130m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), SRADI (SLLDI (MULDI (EXTSIDI (SRASI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8));
3131 TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
3132
8e420152
DE		 3133#if WITH_PROFILE_MODEL_P
3134 if (PROFILE_MODEL_P (current_cpu))
3135 {
3136 m32rx_model_mark_get_h_gr (current_cpu, abuf);
3137 m32rx_model_profile_insn (current_cpu, abuf);
3138 }
3139#endif
b8a9943d 3140
8e420152
DE		 3141 return new_pc;
3142#undef OPRND
8e420152
DE		 3143}
3144
3145/* Perform sc: sc. */
3146CIA
3147SEM_FN_NAME (m32rx,sc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
3148{
b8a9943d
DE		 3149 insn_t insn = SEM_INSN (sem_arg);
3150#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_53_sc.f
8e420152 3151 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 3152 CIA new_pc = CPU (h_pc) + 2;
3153 EXTRACT_FMT_53_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
3154 EXTRACT_FMT_53_SC_CODE
3155
8e420152
DE		 3156if (OPRND (condbit)) {
3157 CPU (h_abort) = 1;
b8a9943d 3158 TRACE_RESULT (current_cpu, "abort-parallel-execution", 'x', CPU (h_abort));
8e420152 3159}
b8a9943d 3160
8e420152
DE		 3161#if WITH_PROFILE_MODEL_P
3162 if (PROFILE_MODEL_P (current_cpu))
3163 {
3164 m32rx_model_profile_insn (current_cpu, abuf);
3165 }
3166#endif
b8a9943d 3167
8e420152
DE		 3168 return new_pc;
3169#undef OPRND
8e420152
DE		 3170}
3171
3172/* Perform snc: snc. */
3173CIA
3174SEM_FN_NAME (m32rx,snc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
3175{
b8a9943d
DE		 3176 insn_t insn = SEM_INSN (sem_arg);
3177#define OPRND(f) CPU_PAR_EXEC (current_cpu)->operands.fmt_53_sc.f
8e420152 3178 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
b8a9943d
DE		 3179 CIA new_pc = CPU (h_pc) + 2;
3180 EXTRACT_FMT_53_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
3181 EXTRACT_FMT_53_SC_CODE
3182
8e420152
DE		 3183if (NOTBI (OPRND (condbit))) {
3184 CPU (h_abort) = 1;
b8a9943d 3185 TRACE_RESULT (current_cpu, "abort-parallel-execution", 'x', CPU (h_abort));
8e420152 3186}
b8a9943d 3187
8e420152
DE		 3188#if WITH_PROFILE_MODEL_P
3189 if (PROFILE_MODEL_P (current_cpu))
3190 {
3191 m32rx_model_profile_insn (current_cpu, abuf);
3192 }
3193#endif
b8a9943d 3194
8e420152
DE		 3195 return new_pc;
3196#undef OPRND
8e420152
DE		 3197}
3198
3199/* FIXME: Add "no return" attribute to illegal insn handlers.
3200 They all call longjmp. */
3201
3202PCADDR
3203SEM_FN_NAME (m32rx,illegal) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
3204{
3205 sim_engine_illegal_insn (current_cpu, NULL_CIA /*FIXME*/);
3206 return 0;
3207}
3208
3209#endif /* ! defined (SCACHE_P) || (defined (SCACHE_P) && WITH_SCACHE) */
GDB Binutils - Deliverables
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