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* cpu.h,decode.c,decode.h,extract.c,sem.c,sem-switch.c: Regenerate.
[deliverable/binutils-gdb.git] / sim / m32r / semx.c
CommitLineData
8e420152
DE		 1/* Simulator instruction semantics for m32rx.
2
b8a9943d
DE		 3This file is machine generated with CGEN.
4
8e420152
DE		 5Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
6
7This file is part of the GNU Simulators.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23*/
24
25#define WANT_CPU
26#define WANT_CPU_M32RX
27
28#include "sim-main.h"
29#include "cgen-mem.h"
30#include "cgen-ops.h"
31#include "cpu-sim.h"
32
33#if ! defined (SCACHE_P) || (defined (SCACHE_P) && WITH_SCACHE)
34
35#undef GET_ATTR
36#define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->opcode, CGEN_INSN_##attr)
37
38/* Perform add: add $dr,$sr. */
39CIA
dc4e95ad 40SEM_FN_NAME (m32rx,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 41{
b8a9943d 42 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 43#define OPRND(f) par_exec->operands.fmt_add.f
8e420152 44 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 45 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 46 EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
47 EXTRACT_FMT_ADD_CODE
b8a9943d 48
8e420152 49 CPU (h_gr[f_r1]) = ADDSI (OPRND (dr), OPRND (sr));
b8a9943d
DE		 50 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
51
8e420152
DE		 52#if WITH_PROFILE_MODEL_P
53 if (PROFILE_MODEL_P (current_cpu))
54 {
55 m32rx_model_mark_get_h_gr (current_cpu, abuf);
56 m32rx_model_mark_set_h_gr (current_cpu, abuf);
57 m32rx_model_profile_insn (current_cpu, abuf);
58 }
59#endif
b8a9943d 60
8e420152
DE		 61 return new_pc;
62#undef OPRND
8e420152
DE		 63}
64
83d9ce00 65/* Perform add3: add3 $dr,$sr,$hash$slo16. */
8e420152 66CIA
dc4e95ad 67SEM_FN_NAME (m32rx,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 68{
b8a9943d 69 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 70#define OPRND(f) par_exec->operands.fmt_add3.f
8e420152 71 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 72 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 73 EXTRACT_FMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
74 EXTRACT_FMT_ADD3_CODE
b8a9943d 75
8e420152 76 CPU (h_gr[f_r1]) = ADDSI (OPRND (sr), OPRND (slo16));
b8a9943d
DE		 77 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
78
8e420152
DE		 79#if WITH_PROFILE_MODEL_P
80 if (PROFILE_MODEL_P (current_cpu))
81 {
82 m32rx_model_mark_get_h_gr (current_cpu, abuf);
83 m32rx_model_mark_set_h_gr (current_cpu, abuf);
84 m32rx_model_profile_insn (current_cpu, abuf);
85 }
86#endif
b8a9943d 87
8e420152
DE		 88 return new_pc;
89#undef OPRND
8e420152
DE		 90}
91
92/* Perform and: and $dr,$sr. */
93CIA
dc4e95ad 94SEM_FN_NAME (m32rx,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 95{
b8a9943d 96 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 97#define OPRND(f) par_exec->operands.fmt_add.f
8e420152 98 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 99 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 100 EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
101 EXTRACT_FMT_ADD_CODE
b8a9943d 102
8e420152 103 CPU (h_gr[f_r1]) = ANDSI (OPRND (dr), OPRND (sr));
b8a9943d
DE		 104 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
105
8e420152
DE		 106#if WITH_PROFILE_MODEL_P
107 if (PROFILE_MODEL_P (current_cpu))
108 {
109 m32rx_model_mark_get_h_gr (current_cpu, abuf);
110 m32rx_model_mark_set_h_gr (current_cpu, abuf);
111 m32rx_model_profile_insn (current_cpu, abuf);
112 }
113#endif
b8a9943d 114
8e420152
DE		 115 return new_pc;
116#undef OPRND
8e420152
DE		 117}
118
83d9ce00 119/* Perform and3: and3 $dr,$sr,$uimm16. */
8e420152 120CIA
dc4e95ad 121SEM_FN_NAME (m32rx,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 122{
b8a9943d 123 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 124#define OPRND(f) par_exec->operands.fmt_and3.f
8e420152 125 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 126 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 127 EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
128 EXTRACT_FMT_AND3_CODE
b8a9943d 129
8e420152 130 CPU (h_gr[f_r1]) = ANDSI (OPRND (sr), OPRND (uimm16));
b8a9943d
DE		 131 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
132
8e420152
DE		 133#if WITH_PROFILE_MODEL_P
134 if (PROFILE_MODEL_P (current_cpu))
135 {
136 m32rx_model_mark_get_h_gr (current_cpu, abuf);
137 m32rx_model_mark_set_h_gr (current_cpu, abuf);
138 m32rx_model_profile_insn (current_cpu, abuf);
139 }
140#endif
b8a9943d 141
8e420152
DE		 142 return new_pc;
143#undef OPRND
8e420152
DE		 144}
145
146/* Perform or: or $dr,$sr. */
147CIA
dc4e95ad 148SEM_FN_NAME (m32rx,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 149{
b8a9943d 150 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 151#define OPRND(f) par_exec->operands.fmt_add.f
8e420152 152 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 153 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 154 EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
155 EXTRACT_FMT_ADD_CODE
b8a9943d 156
8e420152 157 CPU (h_gr[f_r1]) = ORSI (OPRND (dr), OPRND (sr));
b8a9943d
DE		 158 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
159
8e420152
DE		 160#if WITH_PROFILE_MODEL_P
161 if (PROFILE_MODEL_P (current_cpu))
162 {
163 m32rx_model_mark_get_h_gr (current_cpu, abuf);
164 m32rx_model_mark_set_h_gr (current_cpu, abuf);
165 m32rx_model_profile_insn (current_cpu, abuf);
166 }
167#endif
b8a9943d 168
8e420152
DE		 169 return new_pc;
170#undef OPRND
8e420152
DE		 171}
172
83d9ce00 173/* Perform or3: or3 $dr,$sr,$hash$ulo16. */
8e420152 174CIA
dc4e95ad 175SEM_FN_NAME (m32rx,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 176{
b8a9943d 177 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 178#define OPRND(f) par_exec->operands.fmt_or3.f
8e420152 179 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 180 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 181 EXTRACT_FMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
182 EXTRACT_FMT_OR3_CODE
b8a9943d 183
8e420152 184 CPU (h_gr[f_r1]) = ORSI (OPRND (sr), OPRND (ulo16));
b8a9943d
DE		 185 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
186
8e420152
DE		 187#if WITH_PROFILE_MODEL_P
188 if (PROFILE_MODEL_P (current_cpu))
189 {
190 m32rx_model_mark_get_h_gr (current_cpu, abuf);
191 m32rx_model_mark_set_h_gr (current_cpu, abuf);
192 m32rx_model_profile_insn (current_cpu, abuf);
193 }
194#endif
b8a9943d 195
8e420152
DE		 196 return new_pc;
197#undef OPRND
8e420152
DE		 198}
199
200/* Perform xor: xor $dr,$sr. */
201CIA
dc4e95ad 202SEM_FN_NAME (m32rx,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 203{
b8a9943d 204 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 205#define OPRND(f) par_exec->operands.fmt_add.f
8e420152 206 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 207 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 208 EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
209 EXTRACT_FMT_ADD_CODE
b8a9943d 210
8e420152 211 CPU (h_gr[f_r1]) = XORSI (OPRND (dr), OPRND (sr));
b8a9943d
DE		 212 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
213
8e420152
DE		 214#if WITH_PROFILE_MODEL_P
215 if (PROFILE_MODEL_P (current_cpu))
216 {
217 m32rx_model_mark_get_h_gr (current_cpu, abuf);
218 m32rx_model_mark_set_h_gr (current_cpu, abuf);
219 m32rx_model_profile_insn (current_cpu, abuf);
220 }
221#endif
b8a9943d 222
8e420152
DE		 223 return new_pc;
224#undef OPRND
8e420152
DE		 225}
226
83d9ce00 227/* Perform xor3: xor3 $dr,$sr,$uimm16. */
8e420152 228CIA
dc4e95ad 229SEM_FN_NAME (m32rx,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 230{
b8a9943d 231 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 232#define OPRND(f) par_exec->operands.fmt_and3.f
8e420152 233 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 234 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 235 EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
236 EXTRACT_FMT_AND3_CODE
b8a9943d 237
8e420152 238 CPU (h_gr[f_r1]) = XORSI (OPRND (sr), OPRND (uimm16));
b8a9943d
DE		 239 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
240
8e420152
DE		 241#if WITH_PROFILE_MODEL_P
242 if (PROFILE_MODEL_P (current_cpu))
243 {
244 m32rx_model_mark_get_h_gr (current_cpu, abuf);
245 m32rx_model_mark_set_h_gr (current_cpu, abuf);
246 m32rx_model_profile_insn (current_cpu, abuf);
247 }
248#endif
b8a9943d 249
8e420152
DE		 250 return new_pc;
251#undef OPRND
8e420152
DE		 252}
253
83d9ce00 254/* Perform addi: addi $dr,$simm8. */
8e420152 255CIA
dc4e95ad 256SEM_FN_NAME (m32rx,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 257{
b8a9943d 258 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 259#define OPRND(f) par_exec->operands.fmt_addi.f
8e420152 260 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 261 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 262 EXTRACT_FMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */
263 EXTRACT_FMT_ADDI_CODE
b8a9943d 264
8e420152 265 CPU (h_gr[f_r1]) = ADDSI (OPRND (dr), OPRND (simm8));
b8a9943d
DE		 266 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
267
8e420152
DE		 268#if WITH_PROFILE_MODEL_P
269 if (PROFILE_MODEL_P (current_cpu))
270 {
271 m32rx_model_mark_get_h_gr (current_cpu, abuf);
272 m32rx_model_mark_set_h_gr (current_cpu, abuf);
273 m32rx_model_profile_insn (current_cpu, abuf);
274 }
275#endif
b8a9943d 276
8e420152
DE		 277 return new_pc;
278#undef OPRND
8e420152
DE		 279}
280
281/* Perform addv: addv $dr,$sr. */
282CIA
dc4e95ad 283SEM_FN_NAME (m32rx,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 284{
b8a9943d 285 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 286#define OPRND(f) par_exec->operands.fmt_addv.f
8e420152 287 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 288 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 289 EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
290 EXTRACT_FMT_ADDV_CODE
b8a9943d 291
8e420152
DE		 292do {
293 BI temp1;SI temp0;
294 temp0 = ADDSI (OPRND (dr), OPRND (sr));
295 temp1 = ADDOFSI (OPRND (dr), OPRND (sr), 0);
296 CPU (h_gr[f_r1]) = temp0;
b8a9943d 297 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 298 CPU (h_cond) = temp1;
b8a9943d 299 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
8e420152 300} while (0);
b8a9943d 301
8e420152
DE		 302#if WITH_PROFILE_MODEL_P
303 if (PROFILE_MODEL_P (current_cpu))
304 {
305 m32rx_model_mark_get_h_gr (current_cpu, abuf);
306 m32rx_model_mark_set_h_gr (current_cpu, abuf);
307 m32rx_model_profile_insn (current_cpu, abuf);
308 }
309#endif
b8a9943d 310
8e420152
DE		 311 return new_pc;
312#undef OPRND
8e420152
DE		 313}
314
83d9ce00 315/* Perform addv3: addv3 $dr,$sr,$simm16. */
8e420152 316CIA
dc4e95ad 317SEM_FN_NAME (m32rx,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 318{
b8a9943d 319 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 320#define OPRND(f) par_exec->operands.fmt_addv3.f
8e420152 321 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 322 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 323 EXTRACT_FMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
324 EXTRACT_FMT_ADDV3_CODE
b8a9943d 325
8e420152
DE		 326do {
327 BI temp1;SI temp0;
328 temp0 = ADDSI (OPRND (sr), OPRND (simm16));
329 temp1 = ADDOFSI (OPRND (sr), OPRND (simm16), 0);
330 CPU (h_gr[f_r1]) = temp0;
b8a9943d 331 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 332 CPU (h_cond) = temp1;
b8a9943d 333 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
8e420152 334} while (0);
b8a9943d 335
8e420152
DE		 336#if WITH_PROFILE_MODEL_P
337 if (PROFILE_MODEL_P (current_cpu))
338 {
339 m32rx_model_mark_get_h_gr (current_cpu, abuf);
340 m32rx_model_mark_set_h_gr (current_cpu, abuf);
341 m32rx_model_profile_insn (current_cpu, abuf);
342 }
343#endif
b8a9943d 344
8e420152
DE		 345 return new_pc;
346#undef OPRND
8e420152
DE		 347}
348
349/* Perform addx: addx $dr,$sr. */
350CIA
dc4e95ad 351SEM_FN_NAME (m32rx,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 352{
b8a9943d 353 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 354#define OPRND(f) par_exec->operands.fmt_addx.f
8e420152 355 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 356 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 357 EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
358 EXTRACT_FMT_ADDX_CODE
b8a9943d 359
8e420152
DE		 360do {
361 BI temp1;SI temp0;
362 temp0 = ADDCSI (OPRND (dr), OPRND (sr), OPRND (condbit));
363 temp1 = ADDCFSI (OPRND (dr), OPRND (sr), OPRND (condbit));
364 CPU (h_gr[f_r1]) = temp0;
b8a9943d 365 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 366 CPU (h_cond) = temp1;
b8a9943d 367 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
8e420152 368} while (0);
b8a9943d 369
8e420152
DE		 370#if WITH_PROFILE_MODEL_P
371 if (PROFILE_MODEL_P (current_cpu))
372 {
373 m32rx_model_mark_get_h_gr (current_cpu, abuf);
374 m32rx_model_mark_set_h_gr (current_cpu, abuf);
375 m32rx_model_profile_insn (current_cpu, abuf);
376 }
377#endif
b8a9943d 378
8e420152
DE		 379 return new_pc;
380#undef OPRND
8e420152
DE		 381}
382
383/* Perform bc8: bc $disp8. */
384CIA
dc4e95ad 385SEM_FN_NAME (m32rx,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 386{
b8a9943d 387 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 388#define OPRND(f) par_exec->operands.fmt_bc8.f
8e420152 389 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 390 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 391 int taken_p = 0;
e0a85af6
DE		 392 EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
393 EXTRACT_FMT_BC8_CODE
b8a9943d 394
8e420152 395if (OPRND (condbit)) {
02310b01 396 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
cab58155 397 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 398}
b8a9943d 399
8e420152
DE		 400#if WITH_PROFILE_MODEL_P
401 if (PROFILE_MODEL_P (current_cpu))
402 {
403 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
404 }
405#endif
b8a9943d 406
8e420152
DE		 407 return new_pc;
408#undef OPRND
8e420152
DE		 409}
410
411/* Perform bc24: bc $disp24. */
412CIA
dc4e95ad 413SEM_FN_NAME (m32rx,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 414{
b8a9943d 415 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 416#define OPRND(f) par_exec->operands.fmt_bc24.f
8e420152 417 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 418 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 419 int taken_p = 0;
e0a85af6
DE		 420 EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
421 EXTRACT_FMT_BC24_CODE
b8a9943d 422
8e420152 423if (OPRND (condbit)) {
02310b01 424 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
cab58155 425 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 426}
b8a9943d 427
8e420152
DE		 428#if WITH_PROFILE_MODEL_P
429 if (PROFILE_MODEL_P (current_cpu))
430 {
431 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
432 }
433#endif
b8a9943d 434
8e420152
DE		 435 return new_pc;
436#undef OPRND
8e420152
DE		 437}
438
439/* Perform beq: beq $src1,$src2,$disp16. */
440CIA
dc4e95ad 441SEM_FN_NAME (m32rx,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 442{
b8a9943d 443 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 444#define OPRND(f) par_exec->operands.fmt_beq.f
8e420152 445 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 446 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 447 int taken_p = 0;
e0a85af6
DE		 448 EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
449 EXTRACT_FMT_BEQ_CODE
b8a9943d 450
8e420152 451if (EQSI (OPRND (src1), OPRND (src2))) {
02310b01 452 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
cab58155 453 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 454}
b8a9943d 455
8e420152
DE		 456#if WITH_PROFILE_MODEL_P
457 if (PROFILE_MODEL_P (current_cpu))
458 {
459 m32rx_model_mark_get_h_gr (current_cpu, abuf);
460 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
461 }
462#endif
b8a9943d 463
8e420152
DE		 464 return new_pc;
465#undef OPRND
8e420152
DE		 466}
467
468/* Perform beqz: beqz $src2,$disp16. */
469CIA
dc4e95ad 470SEM_FN_NAME (m32rx,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 471{
b8a9943d 472 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 473#define OPRND(f) par_exec->operands.fmt_beqz.f
8e420152 474 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 475 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 476 int taken_p = 0;
e0a85af6
DE		 477 EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
478 EXTRACT_FMT_BEQZ_CODE
b8a9943d 479
8e420152 480if (EQSI (OPRND (src2), 0)) {
02310b01 481 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
cab58155 482 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 483}
b8a9943d 484
8e420152
DE		 485#if WITH_PROFILE_MODEL_P
486 if (PROFILE_MODEL_P (current_cpu))
487 {
488 m32rx_model_mark_get_h_gr (current_cpu, abuf);
489 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
490 }
491#endif
b8a9943d 492
8e420152
DE		 493 return new_pc;
494#undef OPRND
8e420152
DE		 495}
496
497/* Perform bgez: bgez $src2,$disp16. */
498CIA
dc4e95ad 499SEM_FN_NAME (m32rx,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 500{
b8a9943d 501 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 502#define OPRND(f) par_exec->operands.fmt_beqz.f
8e420152 503 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 504 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 505 int taken_p = 0;
e0a85af6
DE		 506 EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
507 EXTRACT_FMT_BEQZ_CODE
b8a9943d 508
8e420152 509if (GESI (OPRND (src2), 0)) {
02310b01 510 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
cab58155 511 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 512}
b8a9943d 513
8e420152
DE		 514#if WITH_PROFILE_MODEL_P
515 if (PROFILE_MODEL_P (current_cpu))
516 {
517 m32rx_model_mark_get_h_gr (current_cpu, abuf);
518 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
519 }
520#endif
b8a9943d 521
8e420152
DE		 522 return new_pc;
523#undef OPRND
8e420152
DE		 524}
525
526/* Perform bgtz: bgtz $src2,$disp16. */
527CIA
dc4e95ad 528SEM_FN_NAME (m32rx,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 529{
b8a9943d 530 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 531#define OPRND(f) par_exec->operands.fmt_beqz.f
8e420152 532 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 533 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 534 int taken_p = 0;
e0a85af6
DE		 535 EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
536 EXTRACT_FMT_BEQZ_CODE
b8a9943d 537
8e420152 538if (GTSI (OPRND (src2), 0)) {
02310b01 539 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
cab58155 540 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 541}
b8a9943d 542
8e420152
DE		 543#if WITH_PROFILE_MODEL_P
544 if (PROFILE_MODEL_P (current_cpu))
545 {
546 m32rx_model_mark_get_h_gr (current_cpu, abuf);
547 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
548 }
549#endif
b8a9943d 550
8e420152
DE		 551 return new_pc;
552#undef OPRND
8e420152
DE		 553}
554
555/* Perform blez: blez $src2,$disp16. */
556CIA
dc4e95ad 557SEM_FN_NAME (m32rx,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 558{
b8a9943d 559 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 560#define OPRND(f) par_exec->operands.fmt_beqz.f
8e420152 561 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 562 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 563 int taken_p = 0;
e0a85af6
DE		 564 EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
565 EXTRACT_FMT_BEQZ_CODE
b8a9943d 566
8e420152 567if (LESI (OPRND (src2), 0)) {
02310b01 568 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
cab58155 569 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 570}
b8a9943d 571
8e420152
DE		 572#if WITH_PROFILE_MODEL_P
573 if (PROFILE_MODEL_P (current_cpu))
574 {
575 m32rx_model_mark_get_h_gr (current_cpu, abuf);
576 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
577 }
578#endif
b8a9943d 579
8e420152
DE		 580 return new_pc;
581#undef OPRND
8e420152
DE		 582}
583
584/* Perform bltz: bltz $src2,$disp16. */
585CIA
dc4e95ad 586SEM_FN_NAME (m32rx,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 587{
b8a9943d 588 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 589#define OPRND(f) par_exec->operands.fmt_beqz.f
8e420152 590 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 591 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 592 int taken_p = 0;
e0a85af6
DE		 593 EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
594 EXTRACT_FMT_BEQZ_CODE
b8a9943d 595
8e420152 596if (LTSI (OPRND (src2), 0)) {
02310b01 597 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
cab58155 598 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 599}
b8a9943d 600
8e420152
DE		 601#if WITH_PROFILE_MODEL_P
602 if (PROFILE_MODEL_P (current_cpu))
603 {
604 m32rx_model_mark_get_h_gr (current_cpu, abuf);
605 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
606 }
607#endif
b8a9943d 608
8e420152
DE		 609 return new_pc;
610#undef OPRND
8e420152
DE		 611}
612
613/* Perform bnez: bnez $src2,$disp16. */
614CIA
dc4e95ad 615SEM_FN_NAME (m32rx,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 616{
b8a9943d 617 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 618#define OPRND(f) par_exec->operands.fmt_beqz.f
8e420152 619 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 620 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 621 int taken_p = 0;
e0a85af6
DE		 622 EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
623 EXTRACT_FMT_BEQZ_CODE
b8a9943d 624
8e420152 625if (NESI (OPRND (src2), 0)) {
02310b01 626 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
cab58155 627 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 628}
b8a9943d 629
8e420152
DE		 630#if WITH_PROFILE_MODEL_P
631 if (PROFILE_MODEL_P (current_cpu))
632 {
633 m32rx_model_mark_get_h_gr (current_cpu, abuf);
634 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
635 }
636#endif
b8a9943d 637
8e420152
DE		 638 return new_pc;
639#undef OPRND
8e420152
DE		 640}
641
642/* Perform bl8: bl $disp8. */
643CIA
dc4e95ad 644SEM_FN_NAME (m32rx,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 645{
b8a9943d 646 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 647#define OPRND(f) par_exec->operands.fmt_bl8.f
8e420152 648 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 649 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 650 int taken_p = 0;
e0a85af6
DE		 651 EXTRACT_FMT_BL8_VARS /* f-op1 f-r1 f-disp8 */
652 EXTRACT_FMT_BL8_CODE
b8a9943d 653
8e420152
DE		 654do {
655 CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
b8a9943d 656 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
02310b01 657 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
cab58155 658 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 659} while (0);
b8a9943d 660
8e420152
DE		 661#if WITH_PROFILE_MODEL_P
662 if (PROFILE_MODEL_P (current_cpu))
663 {
b8a9943d 664 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 665 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
666 }
667#endif
b8a9943d 668
8e420152
DE		 669 return new_pc;
670#undef OPRND
8e420152
DE		 671}
672
673/* Perform bl24: bl $disp24. */
674CIA
dc4e95ad 675SEM_FN_NAME (m32rx,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 676{
b8a9943d 677 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 678#define OPRND(f) par_exec->operands.fmt_bl24.f
8e420152 679 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 680 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 681 int taken_p = 0;
e0a85af6
DE		 682 EXTRACT_FMT_BL24_VARS /* f-op1 f-r1 f-disp24 */
683 EXTRACT_FMT_BL24_CODE
b8a9943d 684
8e420152
DE		 685do {
686 CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
b8a9943d 687 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
02310b01 688 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
cab58155 689 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 690} while (0);
b8a9943d 691
8e420152
DE		 692#if WITH_PROFILE_MODEL_P
693 if (PROFILE_MODEL_P (current_cpu))
694 {
b8a9943d 695 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 696 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
697 }
698#endif
b8a9943d 699
8e420152
DE		 700 return new_pc;
701#undef OPRND
8e420152
DE		 702}
703
704/* Perform bcl8: bcl $disp8. */
705CIA
dc4e95ad 706SEM_FN_NAME (m32rx,bcl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 707{
b8a9943d 708 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 709#define OPRND(f) par_exec->operands.fmt_bcl8.f
8e420152 710 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 711 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 712 int taken_p = 0;
e0a85af6
DE		 713 EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
714 EXTRACT_FMT_BCL8_CODE
b8a9943d 715
8e420152
DE		 716if (OPRND (condbit)) {
717do {
718 CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
b8a9943d 719 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
02310b01 720 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
cab58155 721 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152
DE		 722} while (0);
723}
b8a9943d 724
8e420152
DE		 725#if WITH_PROFILE_MODEL_P
726 if (PROFILE_MODEL_P (current_cpu))
727 {
728 m32rx_model_mark_set_h_gr (current_cpu, abuf);
729 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
730 }
731#endif
b8a9943d 732
8e420152
DE		 733 return new_pc;
734#undef OPRND
8e420152
DE		 735}
736
737/* Perform bcl24: bcl $disp24. */
738CIA
dc4e95ad 739SEM_FN_NAME (m32rx,bcl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 740{
b8a9943d 741 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 742#define OPRND(f) par_exec->operands.fmt_bcl24.f
8e420152 743 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 744 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 745 int taken_p = 0;
e0a85af6
DE		 746 EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
747 EXTRACT_FMT_BCL24_CODE
b8a9943d 748
8e420152
DE		 749if (OPRND (condbit)) {
750do {
751 CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
b8a9943d 752 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
02310b01 753 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
cab58155 754 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152
DE		 755} while (0);
756}
b8a9943d 757
8e420152
DE		 758#if WITH_PROFILE_MODEL_P
759 if (PROFILE_MODEL_P (current_cpu))
760 {
761 m32rx_model_mark_set_h_gr (current_cpu, abuf);
762 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
763 }
764#endif
b8a9943d 765
8e420152
DE		 766 return new_pc;
767#undef OPRND
8e420152
DE		 768}
769
770/* Perform bnc8: bnc $disp8. */
771CIA
dc4e95ad 772SEM_FN_NAME (m32rx,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 773{
b8a9943d 774 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 775#define OPRND(f) par_exec->operands.fmt_bc8.f
8e420152 776 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 777 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 778 int taken_p = 0;
e0a85af6
DE		 779 EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
780 EXTRACT_FMT_BC8_CODE
b8a9943d 781
8e420152 782if (NOTBI (OPRND (condbit))) {
02310b01 783 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
cab58155 784 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 785}
b8a9943d 786
8e420152
DE		 787#if WITH_PROFILE_MODEL_P
788 if (PROFILE_MODEL_P (current_cpu))
789 {
790 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
791 }
792#endif
b8a9943d 793
8e420152
DE		 794 return new_pc;
795#undef OPRND
8e420152
DE		 796}
797
798/* Perform bnc24: bnc $disp24. */
799CIA
dc4e95ad 800SEM_FN_NAME (m32rx,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 801{
b8a9943d 802 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 803#define OPRND(f) par_exec->operands.fmt_bc24.f
8e420152 804 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 805 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 806 int taken_p = 0;
e0a85af6
DE		 807 EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
808 EXTRACT_FMT_BC24_CODE
b8a9943d 809
8e420152 810if (NOTBI (OPRND (condbit))) {
02310b01 811 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
cab58155 812 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 813}
b8a9943d 814
8e420152
DE		 815#if WITH_PROFILE_MODEL_P
816 if (PROFILE_MODEL_P (current_cpu))
817 {
818 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
819 }
820#endif
b8a9943d 821
8e420152
DE		 822 return new_pc;
823#undef OPRND
8e420152
DE		 824}
825
826/* Perform bne: bne $src1,$src2,$disp16. */
827CIA
dc4e95ad 828SEM_FN_NAME (m32rx,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 829{
b8a9943d 830 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 831#define OPRND(f) par_exec->operands.fmt_beq.f
8e420152 832 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 833 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 834 int taken_p = 0;
e0a85af6
DE		 835 EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
836 EXTRACT_FMT_BEQ_CODE
b8a9943d 837
8e420152 838if (NESI (OPRND (src1), OPRND (src2))) {
02310b01 839 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
cab58155 840 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 841}
b8a9943d 842
8e420152
DE		 843#if WITH_PROFILE_MODEL_P
844 if (PROFILE_MODEL_P (current_cpu))
845 {
846 m32rx_model_mark_get_h_gr (current_cpu, abuf);
847 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
848 }
849#endif
b8a9943d 850
8e420152
DE		 851 return new_pc;
852#undef OPRND
8e420152
DE		 853}
854
855/* Perform bra8: bra $disp8. */
856CIA
dc4e95ad 857SEM_FN_NAME (m32rx,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 858{
b8a9943d 859 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 860#define OPRND(f) par_exec->operands.fmt_bra8.f
8e420152 861 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 862 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 863 int taken_p = 0;
e0a85af6
DE		 864 EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */
865 EXTRACT_FMT_BRA8_CODE
b8a9943d 866
02310b01 867 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
cab58155 868 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
b8a9943d 869
8e420152
DE		 870#if WITH_PROFILE_MODEL_P
871 if (PROFILE_MODEL_P (current_cpu))
872 {
873 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
874 }
875#endif
b8a9943d 876
8e420152
DE		 877 return new_pc;
878#undef OPRND
8e420152
DE		 879}
880
881/* Perform bra24: bra $disp24. */
882CIA
dc4e95ad 883SEM_FN_NAME (m32rx,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 884{
b8a9943d 885 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 886#define OPRND(f) par_exec->operands.fmt_bra24.f
8e420152 887 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 888 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 889 int taken_p = 0;
e0a85af6
DE		 890 EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */
891 EXTRACT_FMT_BRA24_CODE
b8a9943d 892
02310b01 893 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
cab58155 894 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
b8a9943d 895
8e420152
DE		 896#if WITH_PROFILE_MODEL_P
897 if (PROFILE_MODEL_P (current_cpu))
898 {
899 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
900 }
901#endif
b8a9943d 902
8e420152
DE		 903 return new_pc;
904#undef OPRND
8e420152
DE		 905}
906
907/* Perform bncl8: bncl $disp8. */
908CIA
dc4e95ad 909SEM_FN_NAME (m32rx,bncl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 910{
b8a9943d 911 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 912#define OPRND(f) par_exec->operands.fmt_bcl8.f
8e420152 913 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 914 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 915 int taken_p = 0;
e0a85af6
DE		 916 EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
917 EXTRACT_FMT_BCL8_CODE
b8a9943d 918
8e420152
DE		 919if (NOTBI (OPRND (condbit))) {
920do {
921 CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
b8a9943d 922 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
02310b01 923 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
cab58155 924 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152
DE		 925} while (0);
926}
b8a9943d 927
8e420152
DE		 928#if WITH_PROFILE_MODEL_P
929 if (PROFILE_MODEL_P (current_cpu))
930 {
931 m32rx_model_mark_set_h_gr (current_cpu, abuf);
932 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
933 }
934#endif
b8a9943d 935
8e420152
DE		 936 return new_pc;
937#undef OPRND
8e420152
DE		 938}
939
940/* Perform bncl24: bncl $disp24. */
941CIA
dc4e95ad 942SEM_FN_NAME (m32rx,bncl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 943{
b8a9943d 944 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 945#define OPRND(f) par_exec->operands.fmt_bcl24.f
8e420152 946 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 947 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
8e420152 948 int taken_p = 0;
e0a85af6
DE		 949 EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
950 EXTRACT_FMT_BCL24_CODE
b8a9943d 951
8e420152
DE		 952if (NOTBI (OPRND (condbit))) {
953do {
954 CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
b8a9943d 955 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
02310b01 956 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
cab58155 957 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152
DE		 958} while (0);
959}
b8a9943d 960
8e420152
DE		 961#if WITH_PROFILE_MODEL_P
962 if (PROFILE_MODEL_P (current_cpu))
963 {
964 m32rx_model_mark_set_h_gr (current_cpu, abuf);
965 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
966 }
967#endif
b8a9943d 968
8e420152
DE		 969 return new_pc;
970#undef OPRND
8e420152
DE		 971}
972
973/* Perform cmp: cmp $src1,$src2. */
974CIA
dc4e95ad 975SEM_FN_NAME (m32rx,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 976{
b8a9943d 977 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 978#define OPRND(f) par_exec->operands.fmt_cmp.f
8e420152 979 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 980 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 981 EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
982 EXTRACT_FMT_CMP_CODE
b8a9943d 983
8e420152 984 CPU (h_cond) = LTSI (OPRND (src1), OPRND (src2));
b8a9943d
DE		 985 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
986
8e420152
DE		 987#if WITH_PROFILE_MODEL_P
988 if (PROFILE_MODEL_P (current_cpu))
989 {
990 m32rx_model_mark_get_h_gr (current_cpu, abuf);
991 m32rx_model_profile_insn (current_cpu, abuf);
992 }
993#endif
b8a9943d 994
8e420152
DE		 995 return new_pc;
996#undef OPRND
8e420152
DE		 997}
998
83d9ce00 999/* Perform cmpi: cmpi $src2,$simm16. */
8e420152 1000CIA
dc4e95ad 1001SEM_FN_NAME (m32rx,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1002{
b8a9943d 1003 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1004#define OPRND(f) par_exec->operands.fmt_cmpi.f
8e420152 1005 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1006 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1007 EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1008 EXTRACT_FMT_CMPI_CODE
b8a9943d 1009
8e420152 1010 CPU (h_cond) = LTSI (OPRND (src2), OPRND (simm16));
b8a9943d
DE		 1011 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1012
8e420152
DE		 1013#if WITH_PROFILE_MODEL_P
1014 if (PROFILE_MODEL_P (current_cpu))
1015 {
1016 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1017 m32rx_model_profile_insn (current_cpu, abuf);
1018 }
1019#endif
b8a9943d 1020
8e420152
DE		 1021 return new_pc;
1022#undef OPRND
8e420152
DE		 1023}
1024
1025/* Perform cmpu: cmpu $src1,$src2. */
1026CIA
dc4e95ad 1027SEM_FN_NAME (m32rx,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1028{
b8a9943d 1029 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1030#define OPRND(f) par_exec->operands.fmt_cmp.f
8e420152 1031 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1032 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1033 EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
1034 EXTRACT_FMT_CMP_CODE
b8a9943d 1035
8e420152 1036 CPU (h_cond) = LTUSI (OPRND (src1), OPRND (src2));
b8a9943d
DE		 1037 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1038
8e420152
DE		 1039#if WITH_PROFILE_MODEL_P
1040 if (PROFILE_MODEL_P (current_cpu))
1041 {
1042 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1043 m32rx_model_profile_insn (current_cpu, abuf);
1044 }
1045#endif
b8a9943d 1046
8e420152
DE		 1047 return new_pc;
1048#undef OPRND
8e420152
DE		 1049}
1050
e0a85af6 1051/* Perform cmpui: cmpui $src2,$simm16. */
8e420152 1052CIA
dc4e95ad 1053SEM_FN_NAME (m32rx,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1054{
b8a9943d 1055 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1056#define OPRND(f) par_exec->operands.fmt_cmpi.f
8e420152 1057 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1058 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1059 EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1060 EXTRACT_FMT_CMPI_CODE
b8a9943d 1061
e0a85af6 1062 CPU (h_cond) = LTUSI (OPRND (src2), OPRND (simm16));
b8a9943d
DE		 1063 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1064
8e420152
DE		 1065#if WITH_PROFILE_MODEL_P
1066 if (PROFILE_MODEL_P (current_cpu))
1067 {
1068 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1069 m32rx_model_profile_insn (current_cpu, abuf);
1070 }
1071#endif
b8a9943d 1072
8e420152
DE		 1073 return new_pc;
1074#undef OPRND
8e420152
DE		 1075}
1076
1077/* Perform cmpeq: cmpeq $src1,$src2. */
1078CIA
dc4e95ad 1079SEM_FN_NAME (m32rx,cmpeq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1080{
b8a9943d 1081 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1082#define OPRND(f) par_exec->operands.fmt_cmp.f
8e420152 1083 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1084 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1085 EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
1086 EXTRACT_FMT_CMP_CODE
b8a9943d 1087
8e420152 1088 CPU (h_cond) = EQSI (OPRND (src1), OPRND (src2));
b8a9943d
DE		 1089 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1090
8e420152
DE		 1091#if WITH_PROFILE_MODEL_P
1092 if (PROFILE_MODEL_P (current_cpu))
1093 {
1094 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1095 m32rx_model_profile_insn (current_cpu, abuf);
1096 }
1097#endif
b8a9943d 1098
8e420152
DE		 1099 return new_pc;
1100#undef OPRND
8e420152
DE		 1101}
1102
1103/* Perform cmpz: cmpz $src2. */
1104CIA
dc4e95ad 1105SEM_FN_NAME (m32rx,cmpz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1106{
b8a9943d 1107 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1108#define OPRND(f) par_exec->operands.fmt_cmpz.f
8e420152 1109 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1110 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1111 EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
1112 EXTRACT_FMT_CMPZ_CODE
b8a9943d 1113
8e420152 1114 CPU (h_cond) = EQSI (OPRND (src2), 0);
b8a9943d
DE		 1115 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1116
8e420152
DE		 1117#if WITH_PROFILE_MODEL_P
1118 if (PROFILE_MODEL_P (current_cpu))
1119 {
1120 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1121 m32rx_model_profile_insn (current_cpu, abuf);
1122 }
1123#endif
b8a9943d 1124
8e420152
DE		 1125 return new_pc;
1126#undef OPRND
8e420152
DE		 1127}
1128
1129/* Perform div: div $dr,$sr. */
1130CIA
dc4e95ad 1131SEM_FN_NAME (m32rx,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1132{
b8a9943d 1133 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1134#define OPRND(f) par_exec->operands.fmt_div.f
8e420152 1135 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1136 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1137 EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1138 EXTRACT_FMT_DIV_CODE
b8a9943d 1139
8e420152
DE		 1140if (NESI (OPRND (sr), 0)) {
1141 CPU (h_gr[f_r1]) = DIVSI (OPRND (dr), OPRND (sr));
b8a9943d 1142 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 1143}
b8a9943d 1144
8e420152
DE		 1145#if WITH_PROFILE_MODEL_P
1146 if (PROFILE_MODEL_P (current_cpu))
1147 {
1148 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1149 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1150 m32rx_model_profile_insn (current_cpu, abuf);
1151 }
1152#endif
b8a9943d 1153
8e420152
DE		 1154 return new_pc;
1155#undef OPRND
8e420152
DE		 1156}
1157
1158/* Perform divu: divu $dr,$sr. */
1159CIA
dc4e95ad 1160SEM_FN_NAME (m32rx,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1161{
b8a9943d 1162 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1163#define OPRND(f) par_exec->operands.fmt_div.f
8e420152 1164 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1165 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1166 EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1167 EXTRACT_FMT_DIV_CODE
b8a9943d 1168
8e420152
DE		 1169if (NESI (OPRND (sr), 0)) {
1170 CPU (h_gr[f_r1]) = UDIVSI (OPRND (dr), OPRND (sr));
b8a9943d 1171 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 1172}
b8a9943d 1173
8e420152
DE		 1174#if WITH_PROFILE_MODEL_P
1175 if (PROFILE_MODEL_P (current_cpu))
1176 {
1177 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1178 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1179 m32rx_model_profile_insn (current_cpu, abuf);
1180 }
1181#endif
b8a9943d 1182
8e420152
DE		 1183 return new_pc;
1184#undef OPRND
8e420152
DE		 1185}
1186
1187/* Perform rem: rem $dr,$sr. */
1188CIA
dc4e95ad 1189SEM_FN_NAME (m32rx,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1190{
b8a9943d 1191 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1192#define OPRND(f) par_exec->operands.fmt_div.f
8e420152 1193 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1194 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1195 EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1196 EXTRACT_FMT_DIV_CODE
b8a9943d 1197
8e420152
DE		 1198if (NESI (OPRND (sr), 0)) {
1199 CPU (h_gr[f_r1]) = MODSI (OPRND (dr), OPRND (sr));
b8a9943d 1200 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 1201}
b8a9943d 1202
8e420152
DE		 1203#if WITH_PROFILE_MODEL_P
1204 if (PROFILE_MODEL_P (current_cpu))
1205 {
1206 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1207 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1208 m32rx_model_profile_insn (current_cpu, abuf);
1209 }
1210#endif
b8a9943d 1211
8e420152
DE		 1212 return new_pc;
1213#undef OPRND
8e420152
DE		 1214}
1215
1216/* Perform remu: remu $dr,$sr. */
1217CIA
dc4e95ad 1218SEM_FN_NAME (m32rx,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1219{
b8a9943d 1220 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1221#define OPRND(f) par_exec->operands.fmt_div.f
8e420152 1222 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1223 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1224 EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1225 EXTRACT_FMT_DIV_CODE
b8a9943d 1226
8e420152
DE		 1227if (NESI (OPRND (sr), 0)) {
1228 CPU (h_gr[f_r1]) = UMODSI (OPRND (dr), OPRND (sr));
b8a9943d 1229 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 1230}
b8a9943d 1231
8e420152
DE		 1232#if WITH_PROFILE_MODEL_P
1233 if (PROFILE_MODEL_P (current_cpu))
1234 {
1235 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1236 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1237 m32rx_model_profile_insn (current_cpu, abuf);
1238 }
1239#endif
b8a9943d 1240
8e420152
DE		 1241 return new_pc;
1242#undef OPRND
8e420152
DE		 1243}
1244
e0bd6e18
DE		 1245/* Perform divh: divh $dr,$sr. */
1246CIA
1247SEM_FN_NAME (m32rx,divh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1248{
1249 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1250#define OPRND(f) par_exec->operands.fmt_div.f
e0bd6e18 1251 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1252 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1253 EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1254 EXTRACT_FMT_DIV_CODE
e0bd6e18
DE		 1255
1256if (NESI (OPRND (sr), 0)) {
1257 CPU (h_gr[f_r1]) = DIVSI (EXTHISI (TRUNCSIHI (OPRND (dr))), OPRND (sr));
1258 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1259}
1260
1261#if WITH_PROFILE_MODEL_P
1262 if (PROFILE_MODEL_P (current_cpu))
1263 {
1264 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1265 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1266 m32rx_model_profile_insn (current_cpu, abuf);
1267 }
1268#endif
1269
1270 return new_pc;
1271#undef OPRND
1272}
1273
8e420152
DE		 1274/* Perform jc: jc $sr. */
1275CIA
dc4e95ad 1276SEM_FN_NAME (m32rx,jc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1277{
b8a9943d 1278 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1279#define OPRND(f) par_exec->operands.fmt_jc.f
8e420152 1280 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1281 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 1282 int taken_p = 0;
e0a85af6
DE		 1283 EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
1284 EXTRACT_FMT_JC_CODE
b8a9943d 1285
8e420152 1286if (OPRND (condbit)) {
02310b01 1287 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
cab58155 1288 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 1289}
b8a9943d 1290
8e420152
DE		 1291#if WITH_PROFILE_MODEL_P
1292 if (PROFILE_MODEL_P (current_cpu))
1293 {
1294 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1295 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1296 }
1297#endif
b8a9943d 1298
8e420152
DE		 1299 return new_pc;
1300#undef OPRND
8e420152
DE		 1301}
1302
1303/* Perform jnc: jnc $sr. */
1304CIA
dc4e95ad 1305SEM_FN_NAME (m32rx,jnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1306{
b8a9943d 1307 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1308#define OPRND(f) par_exec->operands.fmt_jc.f
8e420152 1309 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1310 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 1311 int taken_p = 0;
e0a85af6
DE		 1312 EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
1313 EXTRACT_FMT_JC_CODE
b8a9943d 1314
8e420152 1315if (NOTBI (OPRND (condbit))) {
02310b01 1316 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
cab58155 1317 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 1318}
b8a9943d 1319
8e420152
DE		 1320#if WITH_PROFILE_MODEL_P
1321 if (PROFILE_MODEL_P (current_cpu))
1322 {
1323 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1324 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1325 }
1326#endif
b8a9943d 1327
8e420152
DE		 1328 return new_pc;
1329#undef OPRND
8e420152
DE		 1330}
1331
1332/* Perform jl: jl $sr. */
1333CIA
dc4e95ad 1334SEM_FN_NAME (m32rx,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1335{
b8a9943d 1336 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1337#define OPRND(f) par_exec->operands.fmt_jl.f
8e420152 1338 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1339 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 1340 int taken_p = 0;
e0a85af6
DE		 1341 EXTRACT_FMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
1342 EXTRACT_FMT_JL_CODE
b8a9943d 1343
8e420152 1344do {
e0bd6e18 1345 SI temp1;SI temp0;
8e420152
DE		 1346 temp0 = ADDSI (ANDSI (OPRND (pc), -4), 4);
1347 temp1 = OPRND (sr);
1348 CPU (h_gr[14]) = temp0;
b8a9943d 1349 TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
02310b01 1350 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, temp1));
cab58155 1351 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 1352} while (0);
b8a9943d 1353
8e420152
DE		 1354#if WITH_PROFILE_MODEL_P
1355 if (PROFILE_MODEL_P (current_cpu))
1356 {
1357 m32rx_model_mark_get_h_gr (current_cpu, abuf);
b8a9943d 1358 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 1359 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1360 }
1361#endif
b8a9943d 1362
8e420152
DE		 1363 return new_pc;
1364#undef OPRND
8e420152
DE		 1365}
1366
1367/* Perform jmp: jmp $sr. */
1368CIA
dc4e95ad 1369SEM_FN_NAME (m32rx,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1370{
b8a9943d 1371 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1372#define OPRND(f) par_exec->operands.fmt_jmp.f
8e420152 1373 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1374 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 1375 int taken_p = 0;
e0a85af6
DE		 1376 EXTRACT_FMT_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
1377 EXTRACT_FMT_JMP_CODE
b8a9943d 1378
02310b01 1379 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, OPRND (sr)));
cab58155 1380 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
b8a9943d 1381
8e420152
DE		 1382#if WITH_PROFILE_MODEL_P
1383 if (PROFILE_MODEL_P (current_cpu))
1384 {
1385 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1386 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1387 }
1388#endif
b8a9943d 1389
8e420152
DE		 1390 return new_pc;
1391#undef OPRND
8e420152
DE		 1392}
1393
1394/* Perform ld: ld $dr,@$sr. */
1395CIA
dc4e95ad 1396SEM_FN_NAME (m32rx,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1397{
b8a9943d 1398 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1399#define OPRND(f) par_exec->operands.fmt_ld.f
8e420152 1400 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1401 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1402 EXTRACT_FMT_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
1403 EXTRACT_FMT_LD_CODE
b8a9943d
DE		 1404
1405 CPU (h_gr[f_r1]) = OPRND (h_memory_sr);
1406 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1407
8e420152
DE		 1408#if WITH_PROFILE_MODEL_P
1409 if (PROFILE_MODEL_P (current_cpu))
1410 {
1411 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1412 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1413 m32rx_model_profile_insn (current_cpu, abuf);
1414 }
1415#endif
b8a9943d 1416
8e420152
DE		 1417 return new_pc;
1418#undef OPRND
8e420152
DE		 1419}
1420
1421/* Perform ld-d: ld $dr,@($slo16,$sr). */
1422CIA
dc4e95ad 1423SEM_FN_NAME (m32rx,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1424{
b8a9943d 1425 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1426#define OPRND(f) par_exec->operands.fmt_ld_d.f
8e420152 1427 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1428 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1429 EXTRACT_FMT_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1430 EXTRACT_FMT_LD_D_CODE
b8a9943d
DE		 1431
1432 CPU (h_gr[f_r1]) = OPRND (h_memory_add_WI_sr_slo16);
1433 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1434
8e420152
DE		 1435#if WITH_PROFILE_MODEL_P
1436 if (PROFILE_MODEL_P (current_cpu))
1437 {
1438 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1439 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1440 m32rx_model_profile_insn (current_cpu, abuf);
1441 }
1442#endif
b8a9943d 1443
8e420152
DE		 1444 return new_pc;
1445#undef OPRND
8e420152
DE		 1446}
1447
1448/* Perform ldb: ldb $dr,@$sr. */
1449CIA
dc4e95ad 1450SEM_FN_NAME (m32rx,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1451{
b8a9943d 1452 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1453#define OPRND(f) par_exec->operands.fmt_ldb.f
8e420152 1454 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1455 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1456 EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
1457 EXTRACT_FMT_LDB_CODE
b8a9943d
DE		 1458
1459 CPU (h_gr[f_r1]) = EXTQISI (OPRND (h_memory_sr));
1460 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1461
8e420152
DE		 1462#if WITH_PROFILE_MODEL_P
1463 if (PROFILE_MODEL_P (current_cpu))
1464 {
1465 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1466 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1467 m32rx_model_profile_insn (current_cpu, abuf);
1468 }
1469#endif
b8a9943d 1470
8e420152
DE		 1471 return new_pc;
1472#undef OPRND
8e420152
DE		 1473}
1474
1475/* Perform ldb-d: ldb $dr,@($slo16,$sr). */
1476CIA
dc4e95ad 1477SEM_FN_NAME (m32rx,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1478{
b8a9943d 1479 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1480#define OPRND(f) par_exec->operands.fmt_ldb_d.f
8e420152 1481 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1482 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1483 EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1484 EXTRACT_FMT_LDB_D_CODE
b8a9943d
DE		 1485
1486 CPU (h_gr[f_r1]) = EXTQISI (OPRND (h_memory_add_WI_sr_slo16));
1487 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1488
8e420152
DE		 1489#if WITH_PROFILE_MODEL_P
1490 if (PROFILE_MODEL_P (current_cpu))
1491 {
1492 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1493 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1494 m32rx_model_profile_insn (current_cpu, abuf);
1495 }
1496#endif
b8a9943d 1497
8e420152
DE		 1498 return new_pc;
1499#undef OPRND
8e420152
DE		 1500}
1501
1502/* Perform ldh: ldh $dr,@$sr. */
1503CIA
dc4e95ad 1504SEM_FN_NAME (m32rx,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1505{
b8a9943d 1506 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1507#define OPRND(f) par_exec->operands.fmt_ldh.f
8e420152 1508 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1509 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1510 EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
1511 EXTRACT_FMT_LDH_CODE
b8a9943d
DE		 1512
1513 CPU (h_gr[f_r1]) = EXTHISI (OPRND (h_memory_sr));
1514 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1515
8e420152
DE		 1516#if WITH_PROFILE_MODEL_P
1517 if (PROFILE_MODEL_P (current_cpu))
1518 {
1519 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1520 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1521 m32rx_model_profile_insn (current_cpu, abuf);
1522 }
1523#endif
b8a9943d 1524
8e420152
DE		 1525 return new_pc;
1526#undef OPRND
8e420152
DE		 1527}
1528
1529/* Perform ldh-d: ldh $dr,@($slo16,$sr). */
1530CIA
dc4e95ad 1531SEM_FN_NAME (m32rx,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1532{
b8a9943d 1533 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1534#define OPRND(f) par_exec->operands.fmt_ldh_d.f
8e420152 1535 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1536 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1537 EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1538 EXTRACT_FMT_LDH_D_CODE
b8a9943d
DE		 1539
1540 CPU (h_gr[f_r1]) = EXTHISI (OPRND (h_memory_add_WI_sr_slo16));
1541 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1542
8e420152
DE		 1543#if WITH_PROFILE_MODEL_P
1544 if (PROFILE_MODEL_P (current_cpu))
1545 {
1546 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1547 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1548 m32rx_model_profile_insn (current_cpu, abuf);
1549 }
1550#endif
b8a9943d 1551
8e420152
DE		 1552 return new_pc;
1553#undef OPRND
8e420152
DE		 1554}
1555
1556/* Perform ldub: ldub $dr,@$sr. */
1557CIA
dc4e95ad 1558SEM_FN_NAME (m32rx,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1559{
b8a9943d 1560 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1561#define OPRND(f) par_exec->operands.fmt_ldb.f
8e420152 1562 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1563 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1564 EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
1565 EXTRACT_FMT_LDB_CODE
b8a9943d
DE		 1566
1567 CPU (h_gr[f_r1]) = ZEXTQISI (OPRND (h_memory_sr));
1568 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1569
8e420152
DE		 1570#if WITH_PROFILE_MODEL_P
1571 if (PROFILE_MODEL_P (current_cpu))
1572 {
1573 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1574 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1575 m32rx_model_profile_insn (current_cpu, abuf);
1576 }
1577#endif
b8a9943d 1578
8e420152
DE		 1579 return new_pc;
1580#undef OPRND
8e420152
DE		 1581}
1582
1583/* Perform ldub-d: ldub $dr,@($slo16,$sr). */
1584CIA
dc4e95ad 1585SEM_FN_NAME (m32rx,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1586{
b8a9943d 1587 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1588#define OPRND(f) par_exec->operands.fmt_ldb_d.f
8e420152 1589 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1590 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1591 EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1592 EXTRACT_FMT_LDB_D_CODE
b8a9943d
DE		 1593
1594 CPU (h_gr[f_r1]) = ZEXTQISI (OPRND (h_memory_add_WI_sr_slo16));
1595 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1596
8e420152
DE		 1597#if WITH_PROFILE_MODEL_P
1598 if (PROFILE_MODEL_P (current_cpu))
1599 {
1600 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1601 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1602 m32rx_model_profile_insn (current_cpu, abuf);
1603 }
1604#endif
b8a9943d 1605
8e420152
DE		 1606 return new_pc;
1607#undef OPRND
8e420152
DE		 1608}
1609
1610/* Perform lduh: lduh $dr,@$sr. */
1611CIA
dc4e95ad 1612SEM_FN_NAME (m32rx,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1613{
b8a9943d 1614 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1615#define OPRND(f) par_exec->operands.fmt_ldh.f
8e420152 1616 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1617 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1618 EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
1619 EXTRACT_FMT_LDH_CODE
b8a9943d
DE		 1620
1621 CPU (h_gr[f_r1]) = ZEXTHISI (OPRND (h_memory_sr));
1622 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1623
8e420152
DE		 1624#if WITH_PROFILE_MODEL_P
1625 if (PROFILE_MODEL_P (current_cpu))
1626 {
1627 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1628 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1629 m32rx_model_profile_insn (current_cpu, abuf);
1630 }
1631#endif
b8a9943d 1632
8e420152
DE		 1633 return new_pc;
1634#undef OPRND
8e420152
DE		 1635}
1636
1637/* Perform lduh-d: lduh $dr,@($slo16,$sr). */
1638CIA
dc4e95ad 1639SEM_FN_NAME (m32rx,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1640{
b8a9943d 1641 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1642#define OPRND(f) par_exec->operands.fmt_ldh_d.f
8e420152 1643 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1644 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1645 EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1646 EXTRACT_FMT_LDH_D_CODE
b8a9943d
DE		 1647
1648 CPU (h_gr[f_r1]) = ZEXTHISI (OPRND (h_memory_add_WI_sr_slo16));
1649 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1650
8e420152
DE		 1651#if WITH_PROFILE_MODEL_P
1652 if (PROFILE_MODEL_P (current_cpu))
1653 {
1654 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1655 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1656 m32rx_model_profile_insn (current_cpu, abuf);
1657 }
1658#endif
b8a9943d 1659
8e420152
DE		 1660 return new_pc;
1661#undef OPRND
8e420152
DE		 1662}
1663
1664/* Perform ld-plus: ld $dr,@$sr+. */
1665CIA
dc4e95ad 1666SEM_FN_NAME (m32rx,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1667{
b8a9943d 1668 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1669#define OPRND(f) par_exec->operands.fmt_ld_plus.f
8e420152 1670 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1671 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1672 EXTRACT_FMT_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
1673 EXTRACT_FMT_LD_PLUS_CODE
b8a9943d 1674
8e420152
DE		 1675do {
1676 SI temp1;SI temp0;
b8a9943d 1677 temp0 = OPRND (h_memory_sr);
8e420152
DE		 1678 temp1 = ADDSI (OPRND (sr), 4);
1679 CPU (h_gr[f_r1]) = temp0;
b8a9943d 1680 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 1681 CPU (h_gr[f_r2]) = temp1;
b8a9943d 1682 TRACE_RESULT (current_cpu, "sr", 'x', CPU (h_gr[f_r2]));
8e420152 1683} while (0);
b8a9943d 1684
8e420152
DE		 1685#if WITH_PROFILE_MODEL_P
1686 if (PROFILE_MODEL_P (current_cpu))
1687 {
1688 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1689 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1690 m32rx_model_profile_insn (current_cpu, abuf);
1691 }
1692#endif
b8a9943d 1693
8e420152
DE		 1694 return new_pc;
1695#undef OPRND
8e420152
DE		 1696}
1697
83d9ce00 1698/* Perform ld24: ld24 $dr,$uimm24. */
8e420152 1699CIA
dc4e95ad 1700SEM_FN_NAME (m32rx,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1701{
b8a9943d 1702 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1703#define OPRND(f) par_exec->operands.fmt_ld24.f
8e420152 1704 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1705 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1706 EXTRACT_FMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */
1707 EXTRACT_FMT_LD24_CODE
b8a9943d 1708
8e420152 1709 CPU (h_gr[f_r1]) = OPRND (uimm24);
b8a9943d
DE		 1710 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1711
8e420152
DE		 1712#if WITH_PROFILE_MODEL_P
1713 if (PROFILE_MODEL_P (current_cpu))
1714 {
1715 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1716 m32rx_model_profile_insn (current_cpu, abuf);
1717 }
1718#endif
b8a9943d 1719
8e420152
DE		 1720 return new_pc;
1721#undef OPRND
8e420152
DE		 1722}
1723
83d9ce00 1724/* Perform ldi8: ldi $dr,$simm8. */
8e420152 1725CIA
dc4e95ad 1726SEM_FN_NAME (m32rx,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1727{
b8a9943d 1728 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1729#define OPRND(f) par_exec->operands.fmt_ldi8.f
8e420152 1730 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1731 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1732 EXTRACT_FMT_LDI8_VARS /* f-op1 f-r1 f-simm8 */
1733 EXTRACT_FMT_LDI8_CODE
b8a9943d 1734
8e420152 1735 CPU (h_gr[f_r1]) = OPRND (simm8);
b8a9943d
DE		 1736 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1737
8e420152
DE		 1738#if WITH_PROFILE_MODEL_P
1739 if (PROFILE_MODEL_P (current_cpu))
1740 {
1741 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1742 m32rx_model_profile_insn (current_cpu, abuf);
1743 }
1744#endif
b8a9943d 1745
8e420152
DE		 1746 return new_pc;
1747#undef OPRND
8e420152
DE		 1748}
1749
83d9ce00 1750/* Perform ldi16: ldi $dr,$hash$slo16. */
8e420152 1751CIA
dc4e95ad 1752SEM_FN_NAME (m32rx,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1753{
b8a9943d 1754 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1755#define OPRND(f) par_exec->operands.fmt_ldi16.f
8e420152 1756 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1757 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 1758 EXTRACT_FMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1759 EXTRACT_FMT_LDI16_CODE
b8a9943d 1760
8e420152 1761 CPU (h_gr[f_r1]) = OPRND (slo16);
b8a9943d
DE		 1762 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1763
8e420152
DE		 1764#if WITH_PROFILE_MODEL_P
1765 if (PROFILE_MODEL_P (current_cpu))
1766 {
1767 m32rx_model_mark_set_h_gr (current_cpu, abuf);
1768 m32rx_model_profile_insn (current_cpu, abuf);
1769 }
1770#endif
b8a9943d 1771
8e420152
DE		 1772 return new_pc;
1773#undef OPRND
8e420152
DE		 1774}
1775
1776/* Perform lock: lock $dr,@$sr. */
1777CIA
dc4e95ad 1778SEM_FN_NAME (m32rx,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1779{
b8a9943d 1780 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1781#define OPRND(f) par_exec->operands.fmt_lock.f
8e420152 1782 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1783 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1784 EXTRACT_FMT_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
1785 EXTRACT_FMT_LOCK_CODE
b8a9943d 1786
cab58155
DE		 1787do {
1788 CPU (h_lock) = 1;
1789 TRACE_RESULT (current_cpu, "h-lock-0", 'x', CPU (h_lock));
1790 CPU (h_gr[f_r1]) = OPRND (h_memory_sr);
1791 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1792} while (0);
b8a9943d 1793
8e420152
DE		 1794#if WITH_PROFILE_MODEL_P
1795 if (PROFILE_MODEL_P (current_cpu))
1796 {
1797 m32rx_model_mark_get_h_gr (current_cpu, abuf);
cab58155 1798 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 1799 m32rx_model_profile_insn (current_cpu, abuf);
1800 }
1801#endif
b8a9943d 1802
8e420152
DE		 1803 return new_pc;
1804#undef OPRND
8e420152
DE		 1805}
1806
b8a9943d 1807/* Perform machi-a: machi $src1,$src2,$acc. */
8e420152 1808CIA
dc4e95ad 1809SEM_FN_NAME (m32rx,machi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1810{
b8a9943d 1811 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1812#define OPRND(f) par_exec->operands.fmt_machi_a.f
8e420152 1813 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1814 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1815 EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1816 EXTRACT_FMT_MACHI_A_CODE
b8a9943d
DE		 1817
1818m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8));
1819 TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1820
8e420152
DE		 1821#if WITH_PROFILE_MODEL_P
1822 if (PROFILE_MODEL_P (current_cpu))
1823 {
1824 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1825 m32rx_model_profile_insn (current_cpu, abuf);
1826 }
1827#endif
b8a9943d 1828
8e420152
DE		 1829 return new_pc;
1830#undef OPRND
8e420152
DE		 1831}
1832
b8a9943d 1833/* Perform maclo-a: maclo $src1,$src2,$acc. */
8e420152 1834CIA
dc4e95ad 1835SEM_FN_NAME (m32rx,maclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1836{
b8a9943d 1837 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1838#define OPRND(f) par_exec->operands.fmt_machi_a.f
8e420152 1839 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1840 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1841 EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1842 EXTRACT_FMT_MACHI_A_CODE
b8a9943d
DE		 1843
1844m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8));
1845 TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1846
8e420152
DE		 1847#if WITH_PROFILE_MODEL_P
1848 if (PROFILE_MODEL_P (current_cpu))
1849 {
1850 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1851 m32rx_model_profile_insn (current_cpu, abuf);
1852 }
1853#endif
b8a9943d 1854
8e420152
DE		 1855 return new_pc;
1856#undef OPRND
8e420152
DE		 1857}
1858
83d9ce00
DE		 1859/* Perform macwhi: macwhi $src1,$src2. */
1860CIA
1861SEM_FN_NAME (m32rx,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1862{
1863 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1864#define OPRND(f) par_exec->operands.fmt_macwhi.f
83d9ce00
DE		 1865 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1866 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1867 EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
1868 EXTRACT_FMT_MACWHI_CODE
83d9ce00
DE		 1869
1870 CPU (h_accum) = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8);
1871 TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
1872
1873#if WITH_PROFILE_MODEL_P
1874 if (PROFILE_MODEL_P (current_cpu))
1875 {
1876 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1877 m32rx_model_profile_insn (current_cpu, abuf);
1878 }
1879#endif
1880
1881 return new_pc;
1882#undef OPRND
1883}
1884
1885/* Perform macwlo: macwlo $src1,$src2. */
1886CIA
1887SEM_FN_NAME (m32rx,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1888{
1889 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1890#define OPRND(f) par_exec->operands.fmt_macwhi.f
83d9ce00
DE		 1891 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1892 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1893 EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
1894 EXTRACT_FMT_MACWHI_CODE
83d9ce00
DE		 1895
1896 CPU (h_accum) = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8);
1897 TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
1898
1899#if WITH_PROFILE_MODEL_P
1900 if (PROFILE_MODEL_P (current_cpu))
1901 {
1902 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1903 m32rx_model_profile_insn (current_cpu, abuf);
1904 }
1905#endif
1906
1907 return new_pc;
1908#undef OPRND
1909}
1910
b8a9943d 1911/* Perform mul: mul $dr,$sr. */
8e420152 1912CIA
dc4e95ad 1913SEM_FN_NAME (m32rx,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1914{
b8a9943d 1915 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1916#define OPRND(f) par_exec->operands.fmt_add.f
8e420152 1917 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1918 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1919 EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
1920 EXTRACT_FMT_ADD_CODE
b8a9943d
DE		 1921
1922 CPU (h_gr[f_r1]) = MULSI (OPRND (dr), OPRND (sr));
1923 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1924
8e420152
DE		 1925#if WITH_PROFILE_MODEL_P
1926 if (PROFILE_MODEL_P (current_cpu))
1927 {
1928 m32rx_model_mark_get_h_gr (current_cpu, abuf);
b8a9943d 1929 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 1930 m32rx_model_profile_insn (current_cpu, abuf);
1931 }
1932#endif
b8a9943d 1933
8e420152
DE		 1934 return new_pc;
1935#undef OPRND
8e420152
DE		 1936}
1937
b8a9943d 1938/* Perform mulhi-a: mulhi $src1,$src2,$acc. */
8e420152 1939CIA
dc4e95ad 1940SEM_FN_NAME (m32rx,mulhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1941{
b8a9943d 1942 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1943#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
8e420152 1944 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1945 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1946 EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1947 EXTRACT_FMT_MULHI_A_CODE
b8a9943d
DE		 1948
1949m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 16), 16));
1950 TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1951
8e420152
DE		 1952#if WITH_PROFILE_MODEL_P
1953 if (PROFILE_MODEL_P (current_cpu))
1954 {
1955 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1956 m32rx_model_profile_insn (current_cpu, abuf);
1957 }
1958#endif
b8a9943d 1959
8e420152
DE		 1960 return new_pc;
1961#undef OPRND
8e420152
DE		 1962}
1963
b8a9943d 1964/* Perform mullo-a: mullo $src1,$src2,$acc. */
8e420152 1965CIA
dc4e95ad 1966SEM_FN_NAME (m32rx,mullo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 1967{
b8a9943d 1968 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1969#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
8e420152 1970 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 1971 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1972 EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1973 EXTRACT_FMT_MULHI_A_CODE
b8a9943d
DE		 1974
1975m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 16), 16));
1976 TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1977
8e420152
DE		 1978#if WITH_PROFILE_MODEL_P
1979 if (PROFILE_MODEL_P (current_cpu))
1980 {
1981 m32rx_model_mark_get_h_gr (current_cpu, abuf);
1982 m32rx_model_profile_insn (current_cpu, abuf);
1983 }
1984#endif
b8a9943d 1985
8e420152
DE		 1986 return new_pc;
1987#undef OPRND
8e420152
DE		 1988}
1989
83d9ce00
DE		 1990/* Perform mulwhi: mulwhi $src1,$src2. */
1991CIA
1992SEM_FN_NAME (m32rx,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1993{
1994 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 1995#define OPRND(f) par_exec->operands.fmt_mulwhi.f
83d9ce00
DE		 1996 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1997 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 1998 EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
1999 EXTRACT_FMT_MULWHI_CODE
83d9ce00
DE		 2000
2001 CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 8), 8);
2002 TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
2003
2004#if WITH_PROFILE_MODEL_P
2005 if (PROFILE_MODEL_P (current_cpu))
2006 {
2007 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2008 m32rx_model_profile_insn (current_cpu, abuf);
2009 }
2010#endif
2011
2012 return new_pc;
2013#undef OPRND
2014}
2015
2016/* Perform mulwlo: mulwlo $src1,$src2. */
2017CIA
2018SEM_FN_NAME (m32rx,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2019{
2020 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2021#define OPRND(f) par_exec->operands.fmt_mulwhi.f
83d9ce00
DE		 2022 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2023 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2024 EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
2025 EXTRACT_FMT_MULWHI_CODE
83d9ce00
DE		 2026
2027 CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 8), 8);
2028 TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
2029
2030#if WITH_PROFILE_MODEL_P
2031 if (PROFILE_MODEL_P (current_cpu))
2032 {
2033 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2034 m32rx_model_profile_insn (current_cpu, abuf);
2035 }
2036#endif
2037
2038 return new_pc;
2039#undef OPRND
2040}
2041
b8a9943d 2042/* Perform mv: mv $dr,$sr. */
8e420152 2043CIA
dc4e95ad 2044SEM_FN_NAME (m32rx,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2045{
b8a9943d 2046 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2047#define OPRND(f) par_exec->operands.fmt_mv.f
8e420152 2048 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2049 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2050 EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
2051 EXTRACT_FMT_MV_CODE
b8a9943d
DE		 2052
2053 CPU (h_gr[f_r1]) = OPRND (sr);
2054 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2055
8e420152
DE		 2056#if WITH_PROFILE_MODEL_P
2057 if (PROFILE_MODEL_P (current_cpu))
2058 {
2059 m32rx_model_mark_get_h_gr (current_cpu, abuf);
b8a9943d 2060 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 2061 m32rx_model_profile_insn (current_cpu, abuf);
2062 }
2063#endif
b8a9943d 2064
8e420152
DE		 2065 return new_pc;
2066#undef OPRND
8e420152
DE		 2067}
2068
b8a9943d 2069/* Perform mvfachi-a: mvfachi $dr,$accs. */
8e420152 2070CIA
dc4e95ad 2071SEM_FN_NAME (m32rx,mvfachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2072{
b8a9943d 2073 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2074#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
8e420152 2075 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2076 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2077 EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2078 EXTRACT_FMT_MVFACHI_A_CODE
b8a9943d
DE		 2079
2080 CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 32));
2081 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2082
8e420152
DE		 2083#if WITH_PROFILE_MODEL_P
2084 if (PROFILE_MODEL_P (current_cpu))
2085 {
b8a9943d 2086 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 2087 m32rx_model_profile_insn (current_cpu, abuf);
2088 }
2089#endif
b8a9943d 2090
8e420152
DE		 2091 return new_pc;
2092#undef OPRND
8e420152
DE		 2093}
2094
b8a9943d 2095/* Perform mvfaclo-a: mvfaclo $dr,$accs. */
8e420152 2096CIA
dc4e95ad 2097SEM_FN_NAME (m32rx,mvfaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2098{
b8a9943d 2099 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2100#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
8e420152 2101 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2102 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2103 EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2104 EXTRACT_FMT_MVFACHI_A_CODE
b8a9943d
DE		 2105
2106 CPU (h_gr[f_r1]) = TRUNCDISI (OPRND (accs));
2107 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2108
8e420152
DE		 2109#if WITH_PROFILE_MODEL_P
2110 if (PROFILE_MODEL_P (current_cpu))
2111 {
b8a9943d 2112 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 2113 m32rx_model_profile_insn (current_cpu, abuf);
2114 }
2115#endif
b8a9943d 2116
8e420152
DE		 2117 return new_pc;
2118#undef OPRND
8e420152
DE		 2119}
2120
b8a9943d 2121/* Perform mvfacmi-a: mvfacmi $dr,$accs. */
8e420152 2122CIA
dc4e95ad 2123SEM_FN_NAME (m32rx,mvfacmi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2124{
b8a9943d 2125 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2126#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
8e420152 2127 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2128 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2129 EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2130 EXTRACT_FMT_MVFACHI_A_CODE
8e420152 2131
b8a9943d
DE		 2132 CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 16));
2133 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 2134
8e420152
DE		 2135#if WITH_PROFILE_MODEL_P
2136 if (PROFILE_MODEL_P (current_cpu))
2137 {
2138 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2139 m32rx_model_profile_insn (current_cpu, abuf);
2140 }
2141#endif
8e420152 2142
8e420152
DE		 2143 return new_pc;
2144#undef OPRND
8e420152
DE		 2145}
2146
2147/* Perform mvfc: mvfc $dr,$scr. */
2148CIA
dc4e95ad 2149SEM_FN_NAME (m32rx,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2150{
b8a9943d 2151 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2152#define OPRND(f) par_exec->operands.fmt_mvfc.f
8e420152 2153 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2154 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2155 EXTRACT_FMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
2156 EXTRACT_FMT_MVFC_CODE
b8a9943d 2157
8e420152 2158 CPU (h_gr[f_r1]) = OPRND (scr);
b8a9943d
DE		 2159 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2160
8e420152
DE		 2161#if WITH_PROFILE_MODEL_P
2162 if (PROFILE_MODEL_P (current_cpu))
2163 {
2164 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2165 m32rx_model_profile_insn (current_cpu, abuf);
2166 }
2167#endif
8e420152 2168
8e420152
DE		 2169 return new_pc;
2170#undef OPRND
8e420152
DE		 2171}
2172
2173/* Perform mvtachi-a: mvtachi $src1,$accs. */
2174CIA
dc4e95ad 2175SEM_FN_NAME (m32rx,mvtachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2176{
b8a9943d 2177 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2178#define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
8e420152 2179 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2180 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2181 EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2182 EXTRACT_FMT_MVTACHI_A_CODE
b8a9943d 2183
8e420152 2184m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (OPRND (src1)), 32)));
b8a9943d 2185 TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
8e420152 2186
8e420152
DE		 2187#if WITH_PROFILE_MODEL_P
2188 if (PROFILE_MODEL_P (current_cpu))
2189 {
2190 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2191 m32rx_model_profile_insn (current_cpu, abuf);
2192 }
2193#endif
b8a9943d 2194
8e420152
DE		 2195 return new_pc;
2196#undef OPRND
8e420152
DE		 2197}
2198
2199/* Perform mvtaclo-a: mvtaclo $src1,$accs. */
2200CIA
dc4e95ad 2201SEM_FN_NAME (m32rx,mvtaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2202{
b8a9943d 2203 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2204#define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
8e420152 2205 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2206 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2207 EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2208 EXTRACT_FMT_MVTACHI_A_CODE
b8a9943d 2209
b8641a4d 2210m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0xffffffff, 0)), ZEXTSIDI (OPRND (src1))));
b8a9943d
DE		 2211 TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
2212
8e420152
DE		 2213#if WITH_PROFILE_MODEL_P
2214 if (PROFILE_MODEL_P (current_cpu))
2215 {
2216 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2217 m32rx_model_profile_insn (current_cpu, abuf);
2218 }
2219#endif
b8a9943d 2220
8e420152
DE		 2221 return new_pc;
2222#undef OPRND
8e420152
DE		 2223}
2224
2225/* Perform mvtc: mvtc $sr,$dcr. */
2226CIA
dc4e95ad 2227SEM_FN_NAME (m32rx,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2228{
b8a9943d 2229 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2230#define OPRND(f) par_exec->operands.fmt_mvtc.f
8e420152 2231 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2232 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2233 EXTRACT_FMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
2234 EXTRACT_FMT_MVTC_CODE
b8a9943d 2235
8e420152 2236m32rx_h_cr_set (current_cpu, f_r1, OPRND (sr));
b8a9943d
DE		 2237 TRACE_RESULT (current_cpu, "dcr", 'x', m32rx_h_cr_get (current_cpu, f_r1));
2238
8e420152
DE		 2239#if WITH_PROFILE_MODEL_P
2240 if (PROFILE_MODEL_P (current_cpu))
2241 {
2242 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2243 m32rx_model_profile_insn (current_cpu, abuf);
2244 }
2245#endif
b8a9943d 2246
8e420152
DE		 2247 return new_pc;
2248#undef OPRND
8e420152
DE		 2249}
2250
2251/* Perform neg: neg $dr,$sr. */
2252CIA
dc4e95ad 2253SEM_FN_NAME (m32rx,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2254{
b8a9943d 2255 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2256#define OPRND(f) par_exec->operands.fmt_mv.f
8e420152 2257 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2258 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2259 EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
2260 EXTRACT_FMT_MV_CODE
b8a9943d 2261
8e420152 2262 CPU (h_gr[f_r1]) = NEGSI (OPRND (sr));
b8a9943d
DE		 2263 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2264
8e420152
DE		 2265#if WITH_PROFILE_MODEL_P
2266 if (PROFILE_MODEL_P (current_cpu))
2267 {
2268 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2269 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2270 m32rx_model_profile_insn (current_cpu, abuf);
2271 }
2272#endif
b8a9943d 2273
8e420152
DE		 2274 return new_pc;
2275#undef OPRND
8e420152
DE		 2276}
2277
2278/* Perform nop: nop. */
2279CIA
dc4e95ad 2280SEM_FN_NAME (m32rx,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2281{
b8a9943d 2282 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2283#define OPRND(f) par_exec->operands.fmt_nop.f
8e420152 2284 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2285 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2286 EXTRACT_FMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
2287 EXTRACT_FMT_NOP_CODE
b8a9943d 2288
8e420152 2289PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
b8a9943d 2290
8e420152
DE		 2291#if WITH_PROFILE_MODEL_P
2292 if (PROFILE_MODEL_P (current_cpu))
2293 {
2294 m32rx_model_profile_insn (current_cpu, abuf);
2295 }
2296#endif
b8a9943d 2297
8e420152
DE		 2298 return new_pc;
2299#undef OPRND
8e420152
DE		 2300}
2301
2302/* Perform not: not $dr,$sr. */
2303CIA
dc4e95ad 2304SEM_FN_NAME (m32rx,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2305{
b8a9943d 2306 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2307#define OPRND(f) par_exec->operands.fmt_mv.f
8e420152 2308 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2309 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2310 EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
2311 EXTRACT_FMT_MV_CODE
b8a9943d 2312
8e420152 2313 CPU (h_gr[f_r1]) = INVSI (OPRND (sr));
b8a9943d
DE		 2314 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2315
8e420152
DE		 2316#if WITH_PROFILE_MODEL_P
2317 if (PROFILE_MODEL_P (current_cpu))
2318 {
2319 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2320 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2321 m32rx_model_profile_insn (current_cpu, abuf);
2322 }
2323#endif
8e420152 2324
8e420152
DE		 2325 return new_pc;
2326#undef OPRND
8e420152
DE		 2327}
2328
83d9ce00 2329/* Perform rac-dsi: rac $accd,$accs,$imm1. */
e0bd6e18
DE		 2330CIA
2331SEM_FN_NAME (m32rx,rac_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2332{
2333 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2334#define OPRND(f) par_exec->operands.fmt_rac_dsi.f
e0bd6e18 2335 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2336 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2337 EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
2338 EXTRACT_FMT_RAC_DSI_CODE
e0bd6e18
DE		 2339
2340do {
2341 DI tmp_tmp1;
2342 tmp_tmp1 = SLLDI (OPRND (accs), OPRND (imm1));
2343 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
2344m32rx_h_accums_set (current_cpu, f_accd, (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))));
2345 TRACE_RESULT (current_cpu, "accd", 'D', m32rx_h_accums_get (current_cpu, f_accd));
2346} while (0);
2347
2348#if WITH_PROFILE_MODEL_P
2349 if (PROFILE_MODEL_P (current_cpu))
2350 {
2351 m32rx_model_profile_insn (current_cpu, abuf);
2352 }
2353#endif
2354
2355 return new_pc;
2356#undef OPRND
2357}
2358
83d9ce00 2359/* Perform rach-dsi: rach $accd,$accs,$imm1. */
e0bd6e18
DE		 2360CIA
2361SEM_FN_NAME (m32rx,rach_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2362{
2363 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2364#define OPRND(f) par_exec->operands.fmt_rac_dsi.f
e0bd6e18 2365 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2366 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2367 EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
2368 EXTRACT_FMT_RAC_DSI_CODE
e0bd6e18
DE		 2369
2370do {
2371 DI tmp_tmp1;
2372 tmp_tmp1 = SLLDI (OPRND (accs), OPRND (imm1));
2373 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
2374m32rx_h_accums_set (current_cpu, f_accd, (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0))));
2375 TRACE_RESULT (current_cpu, "accd", 'D', m32rx_h_accums_get (current_cpu, f_accd));
8e420152 2376} while (0);
b8a9943d 2377
8e420152
DE		 2378#if WITH_PROFILE_MODEL_P
2379 if (PROFILE_MODEL_P (current_cpu))
2380 {
2381 m32rx_model_profile_insn (current_cpu, abuf);
2382 }
2383#endif
b8a9943d 2384
8e420152
DE		 2385 return new_pc;
2386#undef OPRND
8e420152
DE		 2387}
2388
2389/* Perform rte: rte. */
2390CIA
dc4e95ad 2391SEM_FN_NAME (m32rx,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2392{
b8a9943d 2393 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2394#define OPRND(f) par_exec->operands.fmt_rte.f
8e420152 2395 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2396 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 2397 int taken_p = 0;
e0a85af6
DE		 2398 EXTRACT_FMT_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
2399 EXTRACT_FMT_RTE_CODE
b8a9943d 2400
8e420152 2401do {
b8a9943d
DE		 2402 CPU (h_sm) = OPRND (h_bsm_0);
2403 TRACE_RESULT (current_cpu, "h-sm-0", 'x', CPU (h_sm));
2404 CPU (h_ie) = OPRND (h_bie_0);
2405 TRACE_RESULT (current_cpu, "h-ie-0", 'x', CPU (h_ie));
2406 CPU (h_cond) = OPRND (h_bcond_0);
2407 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
b01a8697 2408 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (h_bpc_0), -4)));
b8a9943d 2409 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
8e420152 2410} while (0);
b8a9943d 2411
8e420152
DE		 2412#if WITH_PROFILE_MODEL_P
2413 if (PROFILE_MODEL_P (current_cpu))
2414 {
2415 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
2416 }
2417#endif
b8a9943d 2418
8e420152
DE		 2419 return new_pc;
2420#undef OPRND
8e420152
DE		 2421}
2422
83d9ce00 2423/* Perform seth: seth $dr,$hash$hi16. */
8e420152 2424CIA
dc4e95ad 2425SEM_FN_NAME (m32rx,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2426{
b8a9943d 2427 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2428#define OPRND(f) par_exec->operands.fmt_seth.f
8e420152 2429 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2430 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 2431 EXTRACT_FMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
2432 EXTRACT_FMT_SETH_CODE
b8a9943d 2433
8e420152 2434 CPU (h_gr[f_r1]) = SLLSI (OPRND (hi16), 16);
b8a9943d
DE		 2435 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2436
8e420152
DE		 2437#if WITH_PROFILE_MODEL_P
2438 if (PROFILE_MODEL_P (current_cpu))
2439 {
2440 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2441 m32rx_model_profile_insn (current_cpu, abuf);
2442 }
2443#endif
b8a9943d 2444
8e420152
DE		 2445 return new_pc;
2446#undef OPRND
8e420152
DE		 2447}
2448
2449/* Perform sll: sll $dr,$sr. */
2450CIA
dc4e95ad 2451SEM_FN_NAME (m32rx,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2452{
b8a9943d 2453 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2454#define OPRND(f) par_exec->operands.fmt_add.f
8e420152 2455 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2456 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2457 EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2458 EXTRACT_FMT_ADD_CODE
b8a9943d 2459
8e420152 2460 CPU (h_gr[f_r1]) = SLLSI (OPRND (dr), ANDSI (OPRND (sr), 31));
b8a9943d
DE		 2461 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2462
8e420152
DE		 2463#if WITH_PROFILE_MODEL_P
2464 if (PROFILE_MODEL_P (current_cpu))
2465 {
2466 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2467 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2468 m32rx_model_profile_insn (current_cpu, abuf);
2469 }
2470#endif
b8a9943d 2471
8e420152
DE		 2472 return new_pc;
2473#undef OPRND
8e420152
DE		 2474}
2475
83d9ce00 2476/* Perform sll3: sll3 $dr,$sr,$simm16. */
8e420152 2477CIA
dc4e95ad 2478SEM_FN_NAME (m32rx,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2479{
b8a9943d 2480 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2481#define OPRND(f) par_exec->operands.fmt_sll3.f
8e420152 2482 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2483 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 2484 EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2485 EXTRACT_FMT_SLL3_CODE
b8a9943d 2486
8e420152 2487 CPU (h_gr[f_r1]) = SLLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
b8a9943d
DE		 2488 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2489
8e420152
DE		 2490#if WITH_PROFILE_MODEL_P
2491 if (PROFILE_MODEL_P (current_cpu))
2492 {
2493 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2494 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2495 m32rx_model_profile_insn (current_cpu, abuf);
2496 }
2497#endif
b8a9943d 2498
8e420152
DE		 2499 return new_pc;
2500#undef OPRND
8e420152
DE		 2501}
2502
83d9ce00 2503/* Perform slli: slli $dr,$uimm5. */
8e420152 2504CIA
dc4e95ad 2505SEM_FN_NAME (m32rx,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2506{
b8a9943d 2507 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2508#define OPRND(f) par_exec->operands.fmt_slli.f
8e420152 2509 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2510 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2511 EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
2512 EXTRACT_FMT_SLLI_CODE
b8a9943d 2513
8e420152 2514 CPU (h_gr[f_r1]) = SLLSI (OPRND (dr), OPRND (uimm5));
b8a9943d
DE		 2515 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2516
8e420152
DE		 2517#if WITH_PROFILE_MODEL_P
2518 if (PROFILE_MODEL_P (current_cpu))
2519 {
2520 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2521 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2522 m32rx_model_profile_insn (current_cpu, abuf);
2523 }
2524#endif
b8a9943d 2525
8e420152
DE		 2526 return new_pc;
2527#undef OPRND
8e420152
DE		 2528}
2529
2530/* Perform sra: sra $dr,$sr. */
2531CIA
dc4e95ad 2532SEM_FN_NAME (m32rx,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2533{
b8a9943d 2534 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2535#define OPRND(f) par_exec->operands.fmt_add.f
8e420152 2536 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2537 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2538 EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2539 EXTRACT_FMT_ADD_CODE
b8a9943d 2540
8e420152 2541 CPU (h_gr[f_r1]) = SRASI (OPRND (dr), ANDSI (OPRND (sr), 31));
b8a9943d
DE		 2542 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2543
8e420152
DE		 2544#if WITH_PROFILE_MODEL_P
2545 if (PROFILE_MODEL_P (current_cpu))
2546 {
2547 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2548 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2549 m32rx_model_profile_insn (current_cpu, abuf);
2550 }
2551#endif
b8a9943d 2552
8e420152
DE		 2553 return new_pc;
2554#undef OPRND
8e420152
DE		 2555}
2556
83d9ce00 2557/* Perform sra3: sra3 $dr,$sr,$simm16. */
8e420152 2558CIA
dc4e95ad 2559SEM_FN_NAME (m32rx,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2560{
b8a9943d 2561 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2562#define OPRND(f) par_exec->operands.fmt_sll3.f
8e420152 2563 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2564 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 2565 EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2566 EXTRACT_FMT_SLL3_CODE
b8a9943d 2567
8e420152 2568 CPU (h_gr[f_r1]) = SRASI (OPRND (sr), ANDSI (OPRND (simm16), 31));
b8a9943d
DE		 2569 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2570
8e420152
DE		 2571#if WITH_PROFILE_MODEL_P
2572 if (PROFILE_MODEL_P (current_cpu))
2573 {
2574 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2575 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2576 m32rx_model_profile_insn (current_cpu, abuf);
2577 }
2578#endif
b8a9943d 2579
8e420152
DE		 2580 return new_pc;
2581#undef OPRND
8e420152
DE		 2582}
2583
83d9ce00 2584/* Perform srai: srai $dr,$uimm5. */
8e420152 2585CIA
dc4e95ad 2586SEM_FN_NAME (m32rx,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2587{
b8a9943d 2588 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2589#define OPRND(f) par_exec->operands.fmt_slli.f
8e420152 2590 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2591 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2592 EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
2593 EXTRACT_FMT_SLLI_CODE
b8a9943d 2594
8e420152 2595 CPU (h_gr[f_r1]) = SRASI (OPRND (dr), OPRND (uimm5));
b8a9943d
DE		 2596 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2597
8e420152
DE		 2598#if WITH_PROFILE_MODEL_P
2599 if (PROFILE_MODEL_P (current_cpu))
2600 {
2601 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2602 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2603 m32rx_model_profile_insn (current_cpu, abuf);
2604 }
2605#endif
b8a9943d 2606
8e420152
DE		 2607 return new_pc;
2608#undef OPRND
8e420152
DE		 2609}
2610
2611/* Perform srl: srl $dr,$sr. */
2612CIA
dc4e95ad 2613SEM_FN_NAME (m32rx,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2614{
b8a9943d 2615 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2616#define OPRND(f) par_exec->operands.fmt_add.f
8e420152 2617 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2618 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2619 EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2620 EXTRACT_FMT_ADD_CODE
b8a9943d 2621
8e420152 2622 CPU (h_gr[f_r1]) = SRLSI (OPRND (dr), ANDSI (OPRND (sr), 31));
b8a9943d
DE		 2623 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2624
8e420152
DE		 2625#if WITH_PROFILE_MODEL_P
2626 if (PROFILE_MODEL_P (current_cpu))
2627 {
2628 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2629 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2630 m32rx_model_profile_insn (current_cpu, abuf);
2631 }
2632#endif
b8a9943d 2633
8e420152
DE		 2634 return new_pc;
2635#undef OPRND
8e420152
DE		 2636}
2637
83d9ce00 2638/* Perform srl3: srl3 $dr,$sr,$simm16. */
8e420152 2639CIA
dc4e95ad 2640SEM_FN_NAME (m32rx,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2641{
b8a9943d 2642 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2643#define OPRND(f) par_exec->operands.fmt_sll3.f
8e420152 2644 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2645 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 2646 EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2647 EXTRACT_FMT_SLL3_CODE
b8a9943d 2648
8e420152 2649 CPU (h_gr[f_r1]) = SRLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
b8a9943d
DE		 2650 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2651
8e420152
DE		 2652#if WITH_PROFILE_MODEL_P
2653 if (PROFILE_MODEL_P (current_cpu))
2654 {
2655 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2656 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2657 m32rx_model_profile_insn (current_cpu, abuf);
2658 }
2659#endif
b8a9943d 2660
8e420152
DE		 2661 return new_pc;
2662#undef OPRND
8e420152
DE		 2663}
2664
83d9ce00 2665/* Perform srli: srli $dr,$uimm5. */
8e420152 2666CIA
dc4e95ad 2667SEM_FN_NAME (m32rx,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2668{
b8a9943d 2669 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2670#define OPRND(f) par_exec->operands.fmt_slli.f
8e420152 2671 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2672 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2673 EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
2674 EXTRACT_FMT_SLLI_CODE
b8a9943d 2675
8e420152 2676 CPU (h_gr[f_r1]) = SRLSI (OPRND (dr), OPRND (uimm5));
b8a9943d
DE		 2677 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2678
8e420152
DE		 2679#if WITH_PROFILE_MODEL_P
2680 if (PROFILE_MODEL_P (current_cpu))
2681 {
2682 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2683 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2684 m32rx_model_profile_insn (current_cpu, abuf);
2685 }
2686#endif
b8a9943d 2687
8e420152
DE		 2688 return new_pc;
2689#undef OPRND
8e420152
DE		 2690}
2691
2692/* Perform st: st $src1,@$src2. */
2693CIA
dc4e95ad 2694SEM_FN_NAME (m32rx,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2695{
b8a9943d 2696 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2697#define OPRND(f) par_exec->operands.fmt_st.f
8e420152 2698 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2699 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2700 EXTRACT_FMT_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
2701 EXTRACT_FMT_ST_CODE
b8a9943d 2702
8e420152 2703SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
b8a9943d
DE		 2704 TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
2705
8e420152
DE		 2706#if WITH_PROFILE_MODEL_P
2707 if (PROFILE_MODEL_P (current_cpu))
2708 {
2709 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2710 m32rx_model_profile_insn (current_cpu, abuf);
2711 }
2712#endif
b8a9943d 2713
8e420152
DE		 2714 return new_pc;
2715#undef OPRND
8e420152
DE		 2716}
2717
2718/* Perform st-d: st $src1,@($slo16,$src2). */
2719CIA
dc4e95ad 2720SEM_FN_NAME (m32rx,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2721{
b8a9943d 2722 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2723#define OPRND(f) par_exec->operands.fmt_st_d.f
8e420152 2724 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2725 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 2726 EXTRACT_FMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2727 EXTRACT_FMT_ST_D_CODE
b8a9943d 2728
8e420152 2729SETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
b8a9943d
DE		 2730 TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
2731
8e420152
DE		 2732#if WITH_PROFILE_MODEL_P
2733 if (PROFILE_MODEL_P (current_cpu))
2734 {
2735 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2736 m32rx_model_profile_insn (current_cpu, abuf);
2737 }
2738#endif
b8a9943d 2739
8e420152
DE		 2740 return new_pc;
2741#undef OPRND
8e420152
DE		 2742}
2743
2744/* Perform stb: stb $src1,@$src2. */
2745CIA
dc4e95ad 2746SEM_FN_NAME (m32rx,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2747{
b8a9943d 2748 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2749#define OPRND(f) par_exec->operands.fmt_stb.f
8e420152 2750 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2751 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2752 EXTRACT_FMT_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
2753 EXTRACT_FMT_STB_CODE
b8a9943d 2754
8e420152 2755SETMEMQI (current_cpu, OPRND (src2), OPRND (src1));
b8a9943d
DE		 2756 TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMQI (current_cpu, OPRND (src2)));
2757
8e420152
DE		 2758#if WITH_PROFILE_MODEL_P
2759 if (PROFILE_MODEL_P (current_cpu))
2760 {
2761 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2762 m32rx_model_profile_insn (current_cpu, abuf);
2763 }
2764#endif
b8a9943d 2765
8e420152
DE		 2766 return new_pc;
2767#undef OPRND
8e420152
DE		 2768}
2769
2770/* Perform stb-d: stb $src1,@($slo16,$src2). */
2771CIA
dc4e95ad 2772SEM_FN_NAME (m32rx,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2773{
b8a9943d 2774 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2775#define OPRND(f) par_exec->operands.fmt_stb_d.f
8e420152 2776 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2777 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 2778 EXTRACT_FMT_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2779 EXTRACT_FMT_STB_D_CODE
b8a9943d 2780
8e420152 2781SETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
b8a9943d
DE		 2782 TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
2783
8e420152
DE		 2784#if WITH_PROFILE_MODEL_P
2785 if (PROFILE_MODEL_P (current_cpu))
2786 {
2787 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2788 m32rx_model_profile_insn (current_cpu, abuf);
2789 }
2790#endif
b8a9943d 2791
8e420152
DE		 2792 return new_pc;
2793#undef OPRND
8e420152
DE		 2794}
2795
2796/* Perform sth: sth $src1,@$src2. */
2797CIA
dc4e95ad 2798SEM_FN_NAME (m32rx,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2799{
b8a9943d 2800 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2801#define OPRND(f) par_exec->operands.fmt_sth.f
8e420152 2802 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2803 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2804 EXTRACT_FMT_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
2805 EXTRACT_FMT_STH_CODE
b8a9943d 2806
8e420152 2807SETMEMHI (current_cpu, OPRND (src2), OPRND (src1));
b8a9943d
DE		 2808 TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMHI (current_cpu, OPRND (src2)));
2809
8e420152
DE		 2810#if WITH_PROFILE_MODEL_P
2811 if (PROFILE_MODEL_P (current_cpu))
2812 {
2813 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2814 m32rx_model_profile_insn (current_cpu, abuf);
2815 }
2816#endif
b8a9943d 2817
8e420152
DE		 2818 return new_pc;
2819#undef OPRND
8e420152
DE		 2820}
2821
2822/* Perform sth-d: sth $src1,@($slo16,$src2). */
2823CIA
dc4e95ad 2824SEM_FN_NAME (m32rx,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2825{
b8a9943d 2826 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2827#define OPRND(f) par_exec->operands.fmt_sth_d.f
8e420152 2828 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2829 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 2830 EXTRACT_FMT_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2831 EXTRACT_FMT_STH_D_CODE
b8a9943d 2832
8e420152 2833SETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
b8a9943d
DE		 2834 TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
2835
8e420152
DE		 2836#if WITH_PROFILE_MODEL_P
2837 if (PROFILE_MODEL_P (current_cpu))
2838 {
2839 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2840 m32rx_model_profile_insn (current_cpu, abuf);
2841 }
2842#endif
b8a9943d 2843
8e420152
DE		 2844 return new_pc;
2845#undef OPRND
8e420152
DE		 2846}
2847
2848/* Perform st-plus: st $src1,@+$src2. */
2849CIA
dc4e95ad 2850SEM_FN_NAME (m32rx,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2851{
b8a9943d 2852 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2853#define OPRND(f) par_exec->operands.fmt_st_plus.f
8e420152 2854 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2855 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2856 EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
2857 EXTRACT_FMT_ST_PLUS_CODE
b8a9943d 2858
8e420152 2859do {
02310b01
DE		 2860 SI tmp_new_src2;
2861 tmp_new_src2 = ADDSI (OPRND (src2), 4);
2862SETMEMSI (current_cpu, tmp_new_src2, OPRND (src1));
2863 TRACE_RESULT (current_cpu, "h-memory-new-src2", 'x', GETMEMSI (current_cpu, tmp_new_src2));
2864 CPU (h_gr[f_r2]) = tmp_new_src2;
b8a9943d 2865 TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
8e420152 2866} while (0);
b8a9943d 2867
8e420152
DE		 2868#if WITH_PROFILE_MODEL_P
2869 if (PROFILE_MODEL_P (current_cpu))
2870 {
2871 m32rx_model_mark_get_h_gr (current_cpu, abuf);
b8641a4d 2872 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 2873 m32rx_model_profile_insn (current_cpu, abuf);
2874 }
2875#endif
b8a9943d 2876
8e420152
DE		 2877 return new_pc;
2878#undef OPRND
8e420152
DE		 2879}
2880
2881/* Perform st-minus: st $src1,@-$src2. */
2882CIA
dc4e95ad 2883SEM_FN_NAME (m32rx,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2884{
b8a9943d 2885 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2886#define OPRND(f) par_exec->operands.fmt_st_plus.f
8e420152 2887 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2888 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2889 EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
2890 EXTRACT_FMT_ST_PLUS_CODE
b8a9943d 2891
8e420152 2892do {
02310b01
DE		 2893 SI tmp_new_src2;
2894 tmp_new_src2 = SUBSI (OPRND (src2), 4);
2895SETMEMSI (current_cpu, tmp_new_src2, OPRND (src1));
2896 TRACE_RESULT (current_cpu, "h-memory-new-src2", 'x', GETMEMSI (current_cpu, tmp_new_src2));
2897 CPU (h_gr[f_r2]) = tmp_new_src2;
b8a9943d 2898 TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
8e420152 2899} while (0);
b8a9943d 2900
8e420152
DE		 2901#if WITH_PROFILE_MODEL_P
2902 if (PROFILE_MODEL_P (current_cpu))
2903 {
2904 m32rx_model_mark_get_h_gr (current_cpu, abuf);
b8641a4d 2905 m32rx_model_mark_set_h_gr (current_cpu, abuf);
8e420152
DE		 2906 m32rx_model_profile_insn (current_cpu, abuf);
2907 }
2908#endif
b8a9943d 2909
8e420152
DE		 2910 return new_pc;
2911#undef OPRND
8e420152
DE		 2912}
2913
2914/* Perform sub: sub $dr,$sr. */
2915CIA
dc4e95ad 2916SEM_FN_NAME (m32rx,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2917{
b8a9943d 2918 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2919#define OPRND(f) par_exec->operands.fmt_add.f
8e420152 2920 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2921 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2922 EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2923 EXTRACT_FMT_ADD_CODE
b8a9943d 2924
8e420152 2925 CPU (h_gr[f_r1]) = SUBSI (OPRND (dr), OPRND (sr));
b8a9943d
DE		 2926 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2927
8e420152
DE		 2928#if WITH_PROFILE_MODEL_P
2929 if (PROFILE_MODEL_P (current_cpu))
2930 {
2931 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2932 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2933 m32rx_model_profile_insn (current_cpu, abuf);
2934 }
2935#endif
b8a9943d 2936
8e420152
DE		 2937 return new_pc;
2938#undef OPRND
8e420152
DE		 2939}
2940
2941/* Perform subv: subv $dr,$sr. */
2942CIA
dc4e95ad 2943SEM_FN_NAME (m32rx,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2944{
b8a9943d 2945 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2946#define OPRND(f) par_exec->operands.fmt_addv.f
8e420152 2947 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2948 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2949 EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
2950 EXTRACT_FMT_ADDV_CODE
b8a9943d 2951
8e420152
DE		 2952do {
2953 BI temp1;SI temp0;
2954 temp0 = SUBSI (OPRND (dr), OPRND (sr));
2955 temp1 = SUBOFSI (OPRND (dr), OPRND (sr), 0);
2956 CPU (h_gr[f_r1]) = temp0;
b8a9943d 2957 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 2958 CPU (h_cond) = temp1;
b8a9943d 2959 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
8e420152 2960} while (0);
b8a9943d 2961
8e420152
DE		 2962#if WITH_PROFILE_MODEL_P
2963 if (PROFILE_MODEL_P (current_cpu))
2964 {
2965 m32rx_model_mark_get_h_gr (current_cpu, abuf);
2966 m32rx_model_mark_set_h_gr (current_cpu, abuf);
2967 m32rx_model_profile_insn (current_cpu, abuf);
2968 }
2969#endif
b8a9943d 2970
8e420152
DE		 2971 return new_pc;
2972#undef OPRND
8e420152
DE		 2973}
2974
2975/* Perform subx: subx $dr,$sr. */
2976CIA
dc4e95ad 2977SEM_FN_NAME (m32rx,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 2978{
b8a9943d 2979 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 2980#define OPRND(f) par_exec->operands.fmt_addx.f
8e420152 2981 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 2982 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 2983 EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
2984 EXTRACT_FMT_ADDX_CODE
b8a9943d 2985
8e420152
DE		 2986do {
2987 BI temp1;SI temp0;
2988 temp0 = SUBCSI (OPRND (dr), OPRND (sr), OPRND (condbit));
2989 temp1 = SUBCFSI (OPRND (dr), OPRND (sr), OPRND (condbit));
2990 CPU (h_gr[f_r1]) = temp0;
b8a9943d 2991 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
8e420152 2992 CPU (h_cond) = temp1;
b8a9943d 2993 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
8e420152 2994} while (0);
b8a9943d 2995
8e420152
DE		 2996#if WITH_PROFILE_MODEL_P
2997 if (PROFILE_MODEL_P (current_cpu))
2998 {
2999 m32rx_model_mark_get_h_gr (current_cpu, abuf);
3000 m32rx_model_mark_set_h_gr (current_cpu, abuf);
3001 m32rx_model_profile_insn (current_cpu, abuf);
3002 }
3003#endif
b8a9943d 3004
8e420152
DE		 3005 return new_pc;
3006#undef OPRND
8e420152
DE		 3007}
3008
83d9ce00 3009/* Perform trap: trap $uimm4. */
8e420152 3010CIA
dc4e95ad 3011SEM_FN_NAME (m32rx,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3012{
b8a9943d 3013 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3014#define OPRND(f) par_exec->operands.fmt_trap.f
8e420152 3015 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3016 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
8e420152 3017 int taken_p = 0;
e0a85af6
DE		 3018 EXTRACT_FMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
3019 EXTRACT_FMT_TRAP_CODE
b8a9943d 3020
cab58155
DE		 3021do {
3022m32rx_h_cr_set (current_cpu, 6, ADDSI (OPRND (pc), 4));
3023 TRACE_RESULT (current_cpu, "h-cr-6", 'x', m32rx_h_cr_get (current_cpu, 6));
b01a8697 3024m32rx_h_cr_set (current_cpu, 0, ANDSI (SLLSI (OPRND (h_cr_0), 8), 65408));
cab58155 3025 TRACE_RESULT (current_cpu, "h-cr-0", 'x', m32rx_h_cr_get (current_cpu, 0));
b01a8697
DE		 3026 BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, do_trap (current_cpu, OPRND (uimm4))));
3027 TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
cab58155 3028} while (0);
b8a9943d 3029
8e420152
DE		 3030#if WITH_PROFILE_MODEL_P
3031 if (PROFILE_MODEL_P (current_cpu))
3032 {
3033 m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
3034 }
3035#endif
b8a9943d 3036
8e420152
DE		 3037 return new_pc;
3038#undef OPRND
8e420152
DE		 3039}
3040
3041/* Perform unlock: unlock $src1,@$src2. */
3042CIA
dc4e95ad 3043SEM_FN_NAME (m32rx,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3044{
b8a9943d 3045 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3046#define OPRND(f) par_exec->operands.fmt_unlock.f
8e420152 3047 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3048 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 3049 EXTRACT_FMT_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
3050 EXTRACT_FMT_UNLOCK_CODE
b8a9943d 3051
cab58155
DE		 3052do {
3053if (OPRND (h_lock_0)) {
3054SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
3055 TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
3056}
3057 CPU (h_lock) = 0;
3058 TRACE_RESULT (current_cpu, "h-lock-0", 'x', CPU (h_lock));
3059} while (0);
b8a9943d 3060
8e420152
DE		 3061#if WITH_PROFILE_MODEL_P
3062 if (PROFILE_MODEL_P (current_cpu))
3063 {
3064 m32rx_model_mark_get_h_gr (current_cpu, abuf);
3065 m32rx_model_profile_insn (current_cpu, abuf);
3066 }
3067#endif
b8a9943d 3068
8e420152
DE		 3069 return new_pc;
3070#undef OPRND
8e420152
DE		 3071}
3072
b8641a4d 3073/* Perform satb: satb $dr,$sr. */
8e420152 3074CIA
dc4e95ad 3075SEM_FN_NAME (m32rx,satb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3076{
b8a9943d 3077 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3078#define OPRND(f) par_exec->operands.fmt_satb.f
8e420152 3079 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3080 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 3081 EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
3082 EXTRACT_FMT_SATB_CODE
b8a9943d 3083
b8641a4d 3084 CPU (h_gr[f_r1]) = (GESI (OPRND (sr), 127)) ? (127) : (LESI (OPRND (sr), -128)) ? (-128) : (OPRND (sr));
b8a9943d
DE		 3085 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
3086
8e420152
DE		 3087#if WITH_PROFILE_MODEL_P
3088 if (PROFILE_MODEL_P (current_cpu))
3089 {
b8a9943d 3090 m32rx_model_mark_get_h_gr (current_cpu, abuf);
8e420152
DE		 3091 m32rx_model_mark_set_h_gr (current_cpu, abuf);
3092 m32rx_model_profile_insn (current_cpu, abuf);
3093 }
3094#endif
b8a9943d 3095
8e420152
DE		 3096 return new_pc;
3097#undef OPRND
8e420152
DE		 3098}
3099
b8641a4d 3100/* Perform sath: sath $dr,$sr. */
8e420152 3101CIA
dc4e95ad 3102SEM_FN_NAME (m32rx,sath) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3103{
b8a9943d 3104 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3105#define OPRND(f) par_exec->operands.fmt_satb.f
8e420152 3106 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3107 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 3108 EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
3109 EXTRACT_FMT_SATB_CODE
b8a9943d 3110
b8641a4d 3111 CPU (h_gr[f_r1]) = (GESI (OPRND (sr), 32767)) ? (32767) : (LESI (OPRND (sr), -32768)) ? (-32768) : (OPRND (sr));
b8a9943d
DE		 3112 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
3113
8e420152
DE		 3114#if WITH_PROFILE_MODEL_P
3115 if (PROFILE_MODEL_P (current_cpu))
3116 {
b8a9943d 3117 m32rx_model_mark_get_h_gr (current_cpu, abuf);
8e420152
DE		 3118 m32rx_model_mark_set_h_gr (current_cpu, abuf);
3119 m32rx_model_profile_insn (current_cpu, abuf);
3120 }
3121#endif
b8a9943d 3122
8e420152
DE		 3123 return new_pc;
3124#undef OPRND
8e420152
DE		 3125}
3126
b8641a4d 3127/* Perform sat: sat $dr,$sr. */
8e420152 3128CIA
dc4e95ad 3129SEM_FN_NAME (m32rx,sat) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3130{
b8a9943d 3131 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3132#define OPRND(f) par_exec->operands.fmt_sat.f
8e420152 3133 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3134 CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
e0a85af6
DE		 3135 EXTRACT_FMT_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
3136 EXTRACT_FMT_SAT_CODE
b8a9943d 3137
2e723678 3138 CPU (h_gr[f_r1]) = ((OPRND (condbit)) ? (((LTSI (OPRND (sr), 0)) ? (2147483647) : (0x80000000))) : (OPRND (sr)));
b8a9943d
DE		 3139 TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
3140
8e420152
DE		 3141#if WITH_PROFILE_MODEL_P
3142 if (PROFILE_MODEL_P (current_cpu))
3143 {
b8a9943d 3144 m32rx_model_mark_get_h_gr (current_cpu, abuf);
8e420152
DE		 3145 m32rx_model_mark_set_h_gr (current_cpu, abuf);
3146 m32rx_model_profile_insn (current_cpu, abuf);
3147 }
3148#endif
b8a9943d 3149
8e420152
DE		 3150 return new_pc;
3151#undef OPRND
8e420152
DE		 3152}
3153
3154/* Perform pcmpbz: pcmpbz $src2. */
3155CIA
dc4e95ad 3156SEM_FN_NAME (m32rx,pcmpbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3157{
b8a9943d 3158 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3159#define OPRND(f) par_exec->operands.fmt_cmpz.f
8e420152 3160 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3161 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 3162 EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
3163 EXTRACT_FMT_CMPZ_CODE
b8a9943d 3164
8e420152 3165 CPU (h_cond) = (EQSI (ANDSI (OPRND (src2), 255), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 65280), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 0xff000000), 0)) ? (1) : (0);
b8a9943d
DE		 3166 TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
3167
8e420152
DE		 3168#if WITH_PROFILE_MODEL_P
3169 if (PROFILE_MODEL_P (current_cpu))
3170 {
b8a9943d 3171 m32rx_model_mark_get_h_gr (current_cpu, abuf);
8e420152
DE		 3172 m32rx_model_profile_insn (current_cpu, abuf);
3173 }
3174#endif
b8a9943d 3175
8e420152
DE		 3176 return new_pc;
3177#undef OPRND
8e420152
DE		 3178}
3179
3180/* Perform sadd: sadd. */
3181CIA
dc4e95ad 3182SEM_FN_NAME (m32rx,sadd) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3183{
b8a9943d 3184 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3185#define OPRND(f) par_exec->operands.fmt_sadd.f
8e420152 3186 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3187 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 3188 EXTRACT_FMT_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
3189 EXTRACT_FMT_SADD_CODE
b8a9943d
DE		 3190
3191m32rx_h_accums_set (current_cpu, 0, ADDDI (SRADI (OPRND (h_accums_1), 16), OPRND (h_accums_0)));
3192 TRACE_RESULT (current_cpu, "h-accums-0", 'D', m32rx_h_accums_get (current_cpu, 0));
3193
8e420152
DE		 3194#if WITH_PROFILE_MODEL_P
3195 if (PROFILE_MODEL_P (current_cpu))
3196 {
3197 m32rx_model_profile_insn (current_cpu, abuf);
3198 }
3199#endif
b8a9943d 3200
8e420152
DE		 3201 return new_pc;
3202#undef OPRND
8e420152
DE		 3203}
3204
3205/* Perform macwu1: macwu1 $src1,$src2. */
3206CIA
dc4e95ad 3207SEM_FN_NAME (m32rx,macwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3208{
b8a9943d 3209 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3210#define OPRND(f) par_exec->operands.fmt_macwu1.f
8e420152 3211 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3212 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 3213 EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
3214 EXTRACT_FMT_MACWU1_CODE
b8a9943d
DE		 3215
3216m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535)))), 8), 8));
3217 TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
3218
8e420152
DE		 3219#if WITH_PROFILE_MODEL_P
3220 if (PROFILE_MODEL_P (current_cpu))
3221 {
3222 m32rx_model_mark_get_h_gr (current_cpu, abuf);
3223 m32rx_model_profile_insn (current_cpu, abuf);
3224 }
3225#endif
b8a9943d 3226
8e420152
DE		 3227 return new_pc;
3228#undef OPRND
8e420152
DE		 3229}
3230
3231/* Perform msblo: msblo $src1,$src2. */
3232CIA
dc4e95ad 3233SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3234{
b8a9943d 3235 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3236#define OPRND(f) par_exec->operands.fmt_macwhi.f
8e420152 3237 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3238 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 3239 EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
3240 EXTRACT_FMT_MACWHI_CODE
b8a9943d 3241
8e420152 3242 CPU (h_accum) = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8);
b8a9943d
DE		 3243 TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
3244
8e420152
DE		 3245#if WITH_PROFILE_MODEL_P
3246 if (PROFILE_MODEL_P (current_cpu))
3247 {
3248 m32rx_model_mark_get_h_gr (current_cpu, abuf);
3249 m32rx_model_profile_insn (current_cpu, abuf);
3250 }
3251#endif
b8a9943d 3252
8e420152
DE		 3253 return new_pc;
3254#undef OPRND
8e420152
DE		 3255}
3256
3257/* Perform mulwu1: mulwu1 $src1,$src2. */
3258CIA
dc4e95ad 3259SEM_FN_NAME (m32rx,mulwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3260{
b8a9943d 3261 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3262#define OPRND(f) par_exec->operands.fmt_mulwu1.f
8e420152 3263 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3264 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 3265 EXTRACT_FMT_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
3266 EXTRACT_FMT_MULWU1_CODE
b8a9943d 3267
8e420152 3268m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535))), 16), 16));
b8a9943d
DE		 3269 TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
3270
8e420152
DE		 3271#if WITH_PROFILE_MODEL_P
3272 if (PROFILE_MODEL_P (current_cpu))
3273 {
3274 m32rx_model_mark_get_h_gr (current_cpu, abuf);
3275 m32rx_model_profile_insn (current_cpu, abuf);
3276 }
3277#endif
b8a9943d 3278
8e420152
DE		 3279 return new_pc;
3280#undef OPRND
8e420152
DE		 3281}
3282
e0bd6e18 3283/* Perform maclh1: maclh1 $src1,$src2. */
8e420152 3284CIA
e0bd6e18 3285SEM_FN_NAME (m32rx,maclh1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3286{
b8a9943d 3287 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3288#define OPRND(f) par_exec->operands.fmt_macwu1.f
8e420152 3289 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3290 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 3291 EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
3292 EXTRACT_FMT_MACWU1_CODE
b8a9943d
DE		 3293
3294m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), SRADI (SLLDI (MULDI (EXTSIDI (SRASI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8));
3295 TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
3296
8e420152
DE		 3297#if WITH_PROFILE_MODEL_P
3298 if (PROFILE_MODEL_P (current_cpu))
3299 {
3300 m32rx_model_mark_get_h_gr (current_cpu, abuf);
3301 m32rx_model_profile_insn (current_cpu, abuf);
3302 }
3303#endif
b8a9943d 3304
8e420152
DE		 3305 return new_pc;
3306#undef OPRND
8e420152
DE		 3307}
3308
3309/* Perform sc: sc. */
3310CIA
dc4e95ad 3311SEM_FN_NAME (m32rx,sc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3312{
b8a9943d 3313 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3314#define OPRND(f) par_exec->operands.fmt_sc.f
8e420152 3315 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3316 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 3317 EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
3318 EXTRACT_FMT_SC_CODE
b8a9943d 3319
8e420152 3320if (OPRND (condbit)) {
02310b01 3321BRANCH_NEW_PC (new_pc, NEW_PC_SKIP);
8e420152 3322}
b8a9943d 3323
8e420152
DE		 3324#if WITH_PROFILE_MODEL_P
3325 if (PROFILE_MODEL_P (current_cpu))
3326 {
3327 m32rx_model_profile_insn (current_cpu, abuf);
3328 }
3329#endif
b8a9943d 3330
8e420152
DE		 3331 return new_pc;
3332#undef OPRND
8e420152
DE		 3333}
3334
3335/* Perform snc: snc. */
3336CIA
dc4e95ad 3337SEM_FN_NAME (m32rx,snc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152 3338{
b8a9943d 3339 insn_t insn = SEM_INSN (sem_arg);
e0a85af6 3340#define OPRND(f) par_exec->operands.fmt_sc.f
8e420152 3341 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
02310b01 3342 CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
e0a85af6
DE		 3343 EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
3344 EXTRACT_FMT_SC_CODE
b8a9943d 3345
8e420152 3346if (NOTBI (OPRND (condbit))) {
02310b01 3347BRANCH_NEW_PC (new_pc, NEW_PC_SKIP);
8e420152 3348}
b8a9943d 3349
8e420152
DE		 3350#if WITH_PROFILE_MODEL_P
3351 if (PROFILE_MODEL_P (current_cpu))
3352 {
3353 m32rx_model_profile_insn (current_cpu, abuf);
3354 }
3355#endif
b8a9943d 3356
8e420152
DE		 3357 return new_pc;
3358#undef OPRND
8e420152
DE		 3359}
3360
dc4e95ad
DE		 3361CIA
3362SEM_FN_NAME (m32rx,illegal) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
8e420152
DE		 3363{
3364 sim_engine_illegal_insn (current_cpu, NULL_CIA /*FIXME*/);
3365 return 0;
3366}
3367
3368#endif /* ! defined (SCACHE_P) || (defined (SCACHE_P) && WITH_SCACHE) */
GDB Binutils - Deliverables
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