Do not mark .reloc sections as containing debug info.
[deliverable/binutils-gdb.git] / sim / m32r / sim-if.c
CommitLineData
c906108c 1/* Main simulator entry points specific to the M32R.
16b47b25 2 Copyright (C) 1996, 1997, 1998, 1999, 2003 Free Software Foundation, Inc.
c906108c
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3 Contributed by Cygnus Support.
4
16b47b25 5 This file is part of GDB, the GNU debugger.
c906108c 6
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7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
c906108c 11
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12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License along
18 with this program; if not, write to the Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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20
21#include "sim-main.h"
22#include "sim-options.h"
23#include "libiberty.h"
24#include "bfd.h"
25
26#ifdef HAVE_STRING_H
27#include <string.h>
28#else
29#ifdef HAVE_STRINGS_H
30#include <strings.h>
31#endif
32#endif
33#ifdef HAVE_STDLIB_H
34#include <stdlib.h>
35#endif
36
37static void free_state (SIM_DESC);
38static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
39
40/* Records simulator descriptor so utilities like m32r_dump_regs can be
41 called from gdb. */
42SIM_DESC current_state;
43\f
44/* Cover function of sim_state_free to free the cpu buffers as well. */
45
46static void
47free_state (SIM_DESC sd)
48{
49 if (STATE_MODULES (sd) != NULL)
50 sim_module_uninstall (sd);
51 sim_cpu_free_all (sd);
52 sim_state_free (sd);
53}
54
55/* Create an instance of the simulator. */
56
57SIM_DESC
58sim_open (kind, callback, abfd, argv)
59 SIM_OPEN_KIND kind;
60 host_callback *callback;
6b4a8935 61 struct bfd *abfd;
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62 char **argv;
63{
64 SIM_DESC sd = sim_state_alloc (kind, callback);
65 char c;
66 int i;
67
68 /* The cpu data is kept in a separately allocated chunk of memory. */
69 if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
70 {
71 free_state (sd);
72 return 0;
73 }
74
75#if 0 /* FIXME: pc is in mach-specific struct */
76 /* FIXME: watchpoints code shouldn't need this */
77 {
78 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
79 STATE_WATCHPOINTS (sd)->pc = &(PC);
80 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
81 }
82#endif
83
84 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
85 {
86 free_state (sd);
87 return 0;
88 }
89
90#ifdef HAVE_DV_SOCKSER /* FIXME: was done differently before */
91 if (dv_sockser_install (sd) != SIM_RC_OK)
92 {
93 free_state (sd);
94 return 0;
95 }
96#endif
97
98#if 0 /* FIXME: 'twould be nice if we could do this */
99 /* These options override any module options.
100 Obviously ambiguity should be avoided, however the caller may wish to
101 augment the meaning of an option. */
102 if (extra_options != NULL)
103 sim_add_option_table (sd, extra_options);
104#endif
105
106 /* getopt will print the error message so we just have to exit if this fails.
107 FIXME: Hmmm... in the case of gdb we need getopt to call
108 print_filtered. */
109 if (sim_parse_args (sd, argv) != SIM_RC_OK)
110 {
111 free_state (sd);
112 return 0;
113 }
114
115 /* Allocate a handler for the control registers and other devices
116 if no memory for that range has been allocated by the user.
117 All are allocated in one chunk to keep things from being
118 unnecessarily complicated. */
119 if (sim_core_read_buffer (sd, NULL, read_map, &c, M32R_DEVICE_ADDR, 1) == 0)
120 sim_core_attach (sd, NULL,
121 0 /*level*/,
122 access_read_write,
123 0 /*space ???*/,
124 M32R_DEVICE_ADDR, M32R_DEVICE_LEN /*nr_bytes*/,
125 0 /*modulo*/,
126 &m32r_devices,
127 NULL /*buffer*/);
128
129 /* Allocate core managed memory if none specified by user.
130 Use address 4 here in case the user wanted address 0 unmapped. */
131 if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
132 sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
133
134 /* check for/establish the reference program image */
135 if (sim_analyze_program (sd,
136 (STATE_PROG_ARGV (sd) != NULL
137 ? *STATE_PROG_ARGV (sd)
138 : NULL),
139 abfd) != SIM_RC_OK)
140 {
141 free_state (sd);
142 return 0;
143 }
144
145 /* Establish any remaining configuration options. */
146 if (sim_config (sd) != SIM_RC_OK)
147 {
148 free_state (sd);
149 return 0;
150 }
151
152 if (sim_post_argv_init (sd) != SIM_RC_OK)
153 {
154 free_state (sd);
155 return 0;
156 }
157
158 /* Open a copy of the cpu descriptor table. */
159 {
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160 CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
161 CGEN_ENDIAN_BIG);
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162 for (i = 0; i < MAX_NR_PROCESSORS; ++i)
163 {
164 SIM_CPU *cpu = STATE_CPU (sd, i);
165 CPU_CPU_DESC (cpu) = cd;
166 CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
167 }
168 m32r_cgen_init_dis (cd);
169 }
170
171 /* Initialize various cgen things not done by common framework.
172 Must be done after m32r_cgen_cpu_open. */
173 cgen_init (sd);
174
175 for (c = 0; c < MAX_NR_PROCESSORS; ++c)
176 {
177 /* Only needed for profiling, but the structure member is small. */
178 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
179 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
180 /* Hook in callback for reporting these stats */
181 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
182 = print_m32r_misc_cpu;
183 }
184
185 /* Store in a global so things like sparc32_dump_regs can be invoked
186 from the gdb command line. */
187 current_state = sd;
188
189 return sd;
190}
191
192void
193sim_close (sd, quitting)
194 SIM_DESC sd;
195 int quitting;
196{
197 m32r_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0)));
198 sim_module_uninstall (sd);
199}
200\f
201SIM_RC
202sim_create_inferior (sd, abfd, argv, envp)
203 SIM_DESC sd;
6b4a8935 204 struct bfd *abfd;
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205 char **argv;
206 char **envp;
207{
208 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
209 SIM_ADDR addr;
210
211 if (abfd != NULL)
212 addr = bfd_get_start_address (abfd);
213 else
214 addr = 0;
215 sim_pc_set (current_cpu, addr);
216
217#if 0
218 STATE_ARGV (sd) = sim_copy_argv (argv);
219 STATE_ENVP (sd) = sim_copy_argv (envp);
220#endif
221
222 return SIM_RC_OK;
223}
224
225/* PROFILE_CPU_CALLBACK */
226
227static void
228print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
229{
230 SIM_DESC sd = CPU_STATE (cpu);
231 char buf[20];
232
233 if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
234 {
235 sim_io_printf (sd, "Miscellaneous Statistics\n\n");
236 sim_io_printf (sd, " %-*s %s\n\n",
237 PROFILE_LABEL_WIDTH, "Fill nops:",
238 sim_add_commas (buf, sizeof (buf),
239 CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
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240 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
241 sim_io_printf (sd, " %-*s %s\n\n",
242 PROFILE_LABEL_WIDTH, "Parallel insns:",
243 sim_add_commas (buf, sizeof (buf),
244 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
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245 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
246 sim_io_printf (sd, " %-*s %s\n\n",
247 PROFILE_LABEL_WIDTH, "Parallel insns:",
248 sim_add_commas (buf, sizeof (buf),
249 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
c906108c
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250 }
251}
252
253void
254sim_do_command (sd, cmd)
255 SIM_DESC sd;
256 char *cmd;
257{
258 char **argv;
259
260 if (cmd == NULL)
261 return;
262
263 argv = buildargv (cmd);
264
265 if (argv[0] != NULL
266 && strcasecmp (argv[0], "info") == 0
267 && argv[1] != NULL
268 && strncasecmp (argv[1], "reg", 3) == 0)
269 {
270 SI val;
271
272 /* We only support printing bbpsw,bbpc here as there is no equivalent
273 functionality in gdb. */
274 if (argv[2] == NULL)
275 sim_io_eprintf (sd, "Missing register in `%s'\n", cmd);
276 else if (argv[3] != NULL)
277 sim_io_eprintf (sd, "Too many arguments in `%s'\n", cmd);
278 else if (strcasecmp (argv[2], "bbpsw") == 0)
279 {
16b47b25 280 val = m32rbf_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPSW);
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281 sim_io_printf (sd, "bbpsw 0x%x %d\n", val, val);
282 }
283 else if (strcasecmp (argv[2], "bbpc") == 0)
284 {
16b47b25 285 val = m32rbf_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPC);
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286 sim_io_printf (sd, "bbpc 0x%x %d\n", val, val);
287 }
288 else
289 sim_io_eprintf (sd, "Printing of register `%s' not supported with `sim info'\n",
290 argv[2]);
291 }
292 else
293 {
294 if (sim_args_command (sd, cmd) != SIM_RC_OK)
295 sim_io_eprintf (sd, "Unknown sim command `%s'\n", cmd);
296 }
297
298 freeargv (argv);
299}
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