Commit | Line | Data |
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369fba30 DE |
1 | /* Main header for the m32r. */ |
2 | ||
0a18a6b8 DE |
3 | #ifndef SIM_MAIN_H |
4 | #define SIM_MAIN_H | |
5 | ||
369fba30 DE |
6 | #define USING_SIM_BASE_H /* FIXME: quick hack */ |
7 | ||
8 | struct _sim_cpu; /* FIXME: should be in sim-basics.h */ | |
9 | typedef struct _sim_cpu SIM_CPU; | |
10 | ||
b8a9943d | 11 | #include "ansidecl.h" |
7e927218 | 12 | #include "symcat.h" |
0a18a6b8 | 13 | #include "sim-basics.h" |
369fba30 | 14 | #include "cgen-types.h" |
0a18a6b8 | 15 | #include "cpu-opc.h" |
ea32bce7 | 16 | #include "arch.h" |
369fba30 DE |
17 | |
18 | /* These must be defined before sim-base.h. */ | |
7e927218 | 19 | typedef USI sim_cia; |
369fba30 | 20 | |
48ffd442 DE |
21 | #define CIA_GET(cpu) CPU_PC_GET (cpu) |
22 | #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) | |
7e927218 | 23 | |
369fba30 DE |
24 | #include "sim-base.h" |
25 | #include "cgen-sim.h" | |
369fba30 | 26 | #include "cpu-sim.h" |
7e927218 DE |
27 | \f |
28 | /* The _sim_cpu struct. */ | |
369fba30 DE |
29 | |
30 | struct _sim_cpu { | |
48ffd442 | 31 | /* sim/common cpu base. */ |
369fba30 DE |
32 | sim_cpu_base base; |
33 | ||
ea32bce7 | 34 | /* Static parts of cgen. */ |
369fba30 DE |
35 | CGEN_CPU cgen_cpu; |
36 | ||
7e927218 | 37 | M32R_MISC_PROFILE m32r_misc_profile; |
48ffd442 | 38 | #define CPU_M32R_MISC_PROFILE(cpu) (& (cpu)->m32r_misc_profile) |
7e927218 | 39 | |
ea32bce7 | 40 | /* CPU specific parts go here. |
369fba30 | 41 | Note that in files that don't need to access these pieces WANT_CPU_FOO |
48ffd442 DE |
42 | won't be defined and thus these parts won't appear. This is ok in the |
43 | sense that things work. It is a source of bugs though. | |
369fba30 | 44 | One has to of course be careful to not take the size of this |
7e927218 | 45 | struct and no structure members accessed in non-cpu specific files can |
48ffd442 DE |
46 | go after here. Oh for a better language. */ |
47 | #if defined (WANT_CPU_M32RBF) | |
48 | M32RBF_CPU_DATA cpu_data; | |
ea32bce7 | 49 | /* start-sanitize-m32rx */ |
48ffd442 DE |
50 | #elif defined (WANT_CPU_M32RXF) |
51 | M32RXF_CPU_DATA cpu_data; | |
ea32bce7 | 52 | /* end-sanitize-m32rx */ |
369fba30 | 53 | #endif |
369fba30 | 54 | }; |
7e927218 DE |
55 | \f |
56 | /* The sim_state struct. */ | |
369fba30 DE |
57 | |
58 | struct sim_state { | |
59 | sim_cpu *cpu; | |
60 | #define STATE_CPU(sd, n) (/*&*/ (sd)->cpu) | |
61 | ||
62 | CGEN_STATE cgen_state; | |
63 | ||
64 | sim_state_base base; | |
65 | }; | |
7e927218 DE |
66 | \f |
67 | /* Misc. */ | |
369fba30 | 68 | |
48ffd442 DE |
69 | /* Catch address exceptions. */ |
70 | extern SIM_CORE_SIGNAL_FN m32r_core_signal; | |
71 | #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ | |
72 | m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ | |
73 | (TRANSFER), (ERROR)) | |
74 | ||
369fba30 DE |
75 | /* Default memory size. */ |
76 | #define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */ | |
0a18a6b8 DE |
77 | |
78 | #endif /* SIM_MAIN_H */ |