projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| c906108c SS |
1 | /* M32R target configuration file. -*- C -*- */ |
| 2 | ||
| 3 | #ifndef M32R_TCONFIG_H | |
| 4 | #define M32R_TCONFIG_H | |
| 5 | ||
| 6 | /* Define this if the simulator can vary the size of memory. | |
| 7 | See the xxx simulator for an example. | |
| 8 | This enables the `-m size' option. | |
| 9 | The memory size is stored in STATE_MEM_SIZE. */ | |
| 10 | /* Not used for M32R since we use the memory module. */ | |
| 11 | /* #define SIM_HAVE_MEM_SIZE */ | |
| 12 | ||
| 13 | /* See sim-hload.c. We properly handle LMA. */ | |
| 14 | #define SIM_HANDLES_LMA 1 | |
| 15 | ||
| 16 | /* For MSPR support. FIXME: revisit. */ | |
| 17 | #define WITH_DEVICES 1 | |
| 18 | ||
| 19 | /* FIXME: Revisit. */ | |
| 20 | #ifdef HAVE_DV_SOCKSER | |
| 21 | MODULE_INSTALL_FN dv_sockser_install; | |
| 22 | #define MODULE_LIST dv_sockser_install, | |
| 23 | #endif | |
| 24 | ||
| 25 | #if 0 | |
| 26 | /* Enable watchpoints. */ | |
| 27 | #define WITH_WATCHPOINTS 1 | |
| 28 | #endif | |
| 29 | ||
| 30 | /* Define this to enable the intrinsic breakpoint mechanism. */ | |
| 31 | /* FIXME: may be able to remove SIM_HAVE_BREAKPOINT since it essentially | |
| 32 | duplicates ifdef SIM_BREAKPOINT (right?) */ | |
| 33 | #if 0 | |
| 34 | #define SIM_HAVE_BREAKPOINTS | |
| 35 | #define SIM_BREAKPOINT { 0x10, 0xf1 } | |
| 36 | #define SIM_BREAKPOINT_SIZE 2 | |
| 37 | #endif | |
| 38 | #if 0 | |
| 39 | #define HAVE_DV_SOCKSER | |
| 40 | #endif | |
| 41 | ||
| 42 | /* This is a global setting. Different cpu families can't mix-n-match -scache | |
| 43 | and -pbb. However some cpu families may use -simple while others use | |
| 44 | one of -scache/-pbb. */ | |
| 45 | #define WITH_SCACHE_PBB 1 | |
| 46 | ||
| 47 | #endif /* M32R_TCONFIG_H */ |