projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Delete profile support from MIPS simulator, use sim/common/sim-profile
[deliverable/binutils-gdb.git] / sim / mips / ChangeLog
CommitLineData
e2f8ffb7
AC		 1Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
4
5 * sim-main.h (WITH_PROFILE): Do not define, defined in
6 common/sim-config.h. Use sim-profile module.
7 (simPROFILE): Delete defintion.
8
9 * interp.c (PROFILE): Delete definition.
10 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
11 (sim_close): Delete code writing profile histogram.
12 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
13 Delete.
14 (sim_engine_run): Delete code profiling the PC.
15
fb5a2a3e
AC		 16Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
17
18 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
19
20 * interp.c (sim_monitor): Make register pointers of type
21 unsigned_word*.
22
23 * sim-main.h: Make registers of type unsigned_word not
24 signed_word.
25
ea985d24
AC		 26Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
27
28start-sanitize-r5900
29 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
30 ...): Move to sim-main.h
31
32end-sanitize-r5900
33 * interp.c (sync_operation): Rename from SyncOperation, make
34 global, add SD argument.
35 (prefetch): Rename from Prefetch, make global, add SD argument.
36 (decode_coproc): Make global.
37
38 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
39
40 * gencode.c (build_instruction): Generate DecodeCoproc not
41 decode_coproc calls.
42
43 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
44 (SizeFGR): Move to sim-main.h
45 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
46 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
47 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
48 sim-main.h.
49 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
50 FP_RM_TOMINF, GETRM): Move to sim-main.h.
51 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
52 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
53 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
54 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
55
56 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
57 exception.
58 (sim-alu.h): Include.
59 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
60 (sim_cia): Typedef to instruction_address.
61
284e759d
AC		 62Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
63
64 * Makefile.in (interp.o): Rename generated file engine.c to
65 oengine.c.
66
67 * interp.c: Update.
68
339fb149
AC		 69Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
70
71 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
72
8b70f837
AC		 73Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
74
75 * gencode.c (build_instruction): For "FPSQRT", output correct
76 number of arguments to Recip.
77
0c2c5f61
AC		 78Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
79
80 * Makefile.in (interp.o): Depends on sim-main.h
81
82 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
83
84 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
85 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
86 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
87 STATE, DSSTATE): Define
88 (GPR, FGRIDX, ..): Define.
89
90 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
91 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
92 (GPR, FGRIDX, ...): Delete macros.
93
94 * interp.c: Update names to match defines from sim-main.h
95
18c64df6
AC		 96Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
97
98 * interp.c (sim_monitor): Add SD argument.
99 (sim_warning): Delete. Replace calls with calls to
100 sim_io_eprintf.
101 (sim_error): Delete. Replace calls with sim_io_error.
102 (open_trace, writeout32, writeout16, getnum): Add SD argument.
103 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
104 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
105 argument.
106 (mips_size): Rename from sim_size. Add SD argument.
107
108 * interp.c (simulator): Delete global variable.
109 (callback): Delete global variable.
110 (mips_option_handler, sim_open, sim_write, sim_read,
111 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
112 sim_size,sim_monitor): Use sim_io_* not callback->*.
113 (sim_open): ZALLOC simulator struct.
114 (PROFILE): Do not define.
115
116Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
117
118 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
119 support.h with corresponding code.
120
121 * sim-main.h (word64, uword64), support.h: Move definition to
122 sim-main.h.
123 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
124
125 * support.h: Delete
126 * Makefile.in: Update dependencies
127 * interp.c: Do not include.
128
129Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
130
131 * interp.c (address_translation, load_memory, store_memory,
132 cache_op): Rename to from AddressTranslation et.al., make global,
133 add SD argument
134
135 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
136 CacheOp): Define.
137
138 * interp.c (SignalException): Rename to signal_exception, make
139 global.
140
141 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
142
143 * sim-main.h (SignalException, SignalExceptionInterrupt,
144 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
145 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
146 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
147 Define.
148
149 * interp.c, support.h: Use.
150
151Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
152
153 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
154 to value_fpr / store_fpr. Add SD argument.
155 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
156 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
157
158 * sim-main.h (ValueFPR, StoreFPR): Define.
159
160Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
161
162 * interp.c (sim_engine_run): Check consistency between configure
163 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
164 and HASFPU.
165
166 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
167 (mips_fpu): Configure WITH_FLOATING_POINT.
168 (mips_endian): Configure WITH_TARGET_ENDIAN.
169 * configure: Update.
170
171Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
172
173 * configure: Regenerated to track ../common/aclocal.m4 changes.
174
adf4739e
AC		 175start-sanitize-r5900
176Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
177
178 * interp.c (MAX_REG): Allow up-to 128 registers.
179 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
180 (REGISTER_SA): Ditto.
181 (sim_open): Initialize register_widths for r5900 specific
182 registers.
183 (sim_fetch_register, sim_store_register): Check for request of
184 r5900 specific SA register. Check for request for hi 64 bits of
185 r5900 specific registers.
186
187end-sanitize-r5900
26b20b0a
BM		 188Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
189
190 * configure: Regenerated.
191
6eedf3f4
MA		 192Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
193
194 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
195
e63bc706
AC		 196Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
197
6eedf3f4
MA		 198 * gencode.c (print_igen_insn_models): Assume certain architectures
199 include all mips* instructions.
200 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
201 instruction.
202
e63bc706
AC		 203 * Makefile.in (tmp.igen): Add target. Generate igen input from
204 gencode file.
205
206 * gencode.c (FEATURE_IGEN): Define.
207 (main): Add --igen option. Generate output in igen format.
208 (process_instructions): Format output according to igen option.
209 (print_igen_insn_format): New function.
210 (print_igen_insn_models): New function.
211 (process_instructions): Only issue warnings and ignore
212 instructions when no FEATURE_IGEN.
213
eb2e3c85
AC		 214Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
215
216 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
217 MIPS targets.
218
92f91d1f
AC		 219Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
220
221 * configure: Regenerated to track ../common/aclocal.m4 changes.
222
223Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
224
225 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
226 SIM_RESERVED_BITS): Delete, moved to common.
227 (SIM_EXTRA_CFLAGS): Update.
228
794e9ac9
AC		 229Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
230
76a6247f 231 * configure.in: Configure non-strict memory alignment.
794e9ac9
AC		 232 * configure: Regenerated to track ../common/aclocal.m4 changes.
233
b45caf05
AC		 234Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
235
236 * configure: Regenerated to track ../common/aclocal.m4 changes.
237
238Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
239
240 * gencode.c (SDBBP,DERET): Added (3900) insns.
241 (RFE): Turn on for 3900.
242 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
243 (dsstate): Made global.
244 (SUBTARGET_R3900): Added.
245 (CANCELDELAYSLOT): New.
246 (SignalException): Ignore SystemCall rather than ignore and
247 terminate. Add DebugBreakPoint handling.
248 (decode_coproc): New insns RFE, DERET; and new registers Debug
249 and DEPC protected by SUBTARGET_R3900.
250 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
251 bits explicitly.
252 * Makefile.in,configure.in: Add mips subtarget option.
253 * configure: Update.
254
7afa8d4e
GRK		 255Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
256
257 * gencode.c: Add r3900 (tx39).
258
259start-sanitize-tx19
260 * gencode.c: Fix some configuration problems by improving
261 the relationship between tx19 and tx39.
262end-sanitize-tx19
263
667065d0
GRK		 264Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
265
266 * gencode.c (build_instruction): Don't need to subtract 4 for
267 JALR, just 2.
268
9cb8397f
GRK		 269Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
270
271 * interp.c: Correct some HASFPU problems.
272
a2ab5e65
AC		 273Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
274
275 * configure: Regenerated to track ../common/aclocal.m4 changes.
276
11ac69e0
AC		 277Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
278
279 * interp.c (mips_options): Fix samples option short form, should
280 be `x'.
281
972f3a34
AC		 282Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
283
284 * interp.c (sim_info): Enable info code. Was just returning.
285
9eeaaefa
AC		 286Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
287
288 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
289 MFC0.
290
c31c13b4
AC		 291Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
292
293 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
294 constants.
295 (build_instruction): Ditto for LL.
296
b637f306
GRK		 297start-sanitize-tx19
298Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
299
300 * mips/configure.in, mips/gencode: Add tx19/r1900.
301
302end-sanitize-tx19
6fea4763
DE		 303Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
304
305 * configure: Regenerated to track ../common/aclocal.m4 changes.
306
52352d38
AC		 307start-sanitize-r5900
308Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
309
310 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
311 for overflow due to ABS of MININT, set result to MAXINT.
312 (build_instruction): For "psrlvw", signextend bit 31.
313
314end-sanitize-r5900
88117054
AC		 315Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
316
317 * configure: Regenerated to track ../common/aclocal.m4 changes.
318 * config.in: Ditto.
319
fafce69a
AC		 320Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
321
322 * interp.c (sim_open): Add call to sim_analyze_program, update
323 call to sim_config.
324
7230ff0f
AC		 325Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
326
327 * interp.c (sim_kill): Delete.
fafce69a
AC		 328 (sim_create_inferior): Add ABFD argument. Set PC from same.
329 (sim_load): Move code initializing trap handlers from here.
330 (sim_open): To here.
331 (sim_load): Delete, use sim-hload.c.
332
333 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
7230ff0f 334
247fccde
AC		 335Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
336
337 * configure: Regenerated to track ../common/aclocal.m4 changes.
338 * config.in: Ditto.
339
340Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
341
342 * interp.c (sim_open): Add ABFD argument.
343 (sim_load): Move call to sim_config from here.
344 (sim_open): To here. Check return status.
345
346start-sanitize-r5900
347 * gencode.c (build_instruction): Do not define x8000000000000000,
348 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
349
350end-sanitize-r5900
351start-sanitize-r5900
352Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
353
354 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
355 "pdivuw" check for overflow due to signed divide by -1.
356
357end-sanitize-r5900
c12e2e4c
GRK		 358Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
359
360 * gencode.c (build_instruction): Two arg MADD should
361 not assign result to $0.
362
1e851d2c
AC		 363start-sanitize-r5900
364Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
365
366 * gencode.c (build_instruction): For "ppac5" use unsigned
367 arrithmetic so that the sign bit doesn't smear when right shifted.
368 (build_instruction): For "pdiv" perform sign extension when
369 storing results in HI and LO.
370 (build_instructions): For "pdiv" and "pdivbw" check for
371 divide-by-zero.
372 (build_instruction): For "pmfhl.slw" update hi part of dest
373 register as well as low part.
374 (build_instruction): For "pmfhl" portably handle long long values.
375 (build_instruction): For "pmfhl.sh" correctly negative values.
376 Store half words 2 and three in the correct place.
377 (build_instruction): For "psllvw", sign extend value after shift.
378
379end-sanitize-r5900
380Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
381
382 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
383 * sim/mips/configure.in: Regenerate.
384
385Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
386
387 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
388 signed8, unsigned8 et.al. types.
389
390start-sanitize-r5900
391 * gencode.c (build_instruction): For PMULTU* do not sign extend
392 registers. Make generated code easier to debug.
393
394end-sanitize-r5900
395 * interp.c (SUB_REG_FETCH): Handle both little and big endian
396 hosts when selecting subreg.
397
398start-sanitize-r5900
399Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
400
401 * gencode.c (type_for_data_len): For 32bit operations concerned
402 with overflow, perform op using 64bits.
403 (build_instruction): For PADD, always compute operation using type
404 returned by type_for_data_len.
405 (build_instruction): For PSUBU, when overflow, saturate to zero as
406 actually underflow.
407
408end-sanitize-r5900
ae19b07b
JL		 409Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
410
649625bb 411start-sanitize-r5900
64435234
JL		 412 * gencode.c (build_instruction): Handle "pext5" according to
413 version 1.95 of the r5900 ISA.
414
649625bb
JL		 415 * gencode.c (build_instruction): Handle "ppac5" according to
416 version 1.95 of the r5900 ISA.
649625bb 417
1e851d2c 418end-sanitize-r5900
05d1322f
JL		 419 * interp.c (sim_engine_run): Reset the ZERO register to zero
420 regardless of FEATURE_WARN_ZERO.
ae19b07b
JL		 421 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
422
423Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
424
425 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
426 (SignalException): For BreakPoints ignore any mode bits and just
427 save the PC.
428 (SignalException): Always set the CAUSE register.
429
56e7c849
AC		 430Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
431
432 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
433 exception has been taken.
434
435 * interp.c: Implement the ERET and mt/f sr instructions.
436
ae19b07b 437start-sanitize-r5900
56e7c849
AC		 438Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
439
440 * gencode.c (build_instruction): For paddu, extract unsigned
441 sub-fields.
442
443 * gencode.c (build_instruction): Saturate padds instead of padd
444 instructions.
445
446end-sanitize-r5900
447Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
448
449 * interp.c (SignalException): Don't bother restarting an
450 interrupt.
451
452Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
453
454 * interp.c (SignalException): Really take an interrupt.
455 (interrupt_event): Only deliver interrupts when enabled.
456
457Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
458
459 * interp.c (sim_info): Only print info when verbose.
460 (sim_info) Use sim_io_printf for output.
461
2f2e6c5d
AC		 462Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
463
464 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
465 mips architectures.
466
467Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
468
469 * interp.c (sim_do_command): Check for common commands if a
470 simulator specific command fails.
471
d3d2a9f7
GRK		 472Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
473
474 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
475 and simBE when DEBUG is defined.
476
50a2a691
AC		 477Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
478
479 * interp.c (interrupt_event): New function. Pass exception event
480 onto exception handler.
481
482 * configure.in: Check for stdlib.h.
483 * configure: Regenerate.
484
485 * gencode.c (build_instruction): Add UNUSED attribute to tempS
486 variable declaration.
487 (build_instruction): Initialize memval1.
488 (build_instruction): Add UNUSED attribute to byte, bigend,
489 reverse.
490 (build_operands): Ditto.
491
492 * interp.c: Fix GCC warnings.
493 (sim_get_quit_code): Delete.
494
495 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
496 * Makefile.in: Ditto.
497 * configure: Re-generate.
498
499 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
500
501Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
502
503 * interp.c (mips_option_handler): New function parse argumes using
504 sim-options.
505 (myname): Replace with STATE_MY_NAME.
506 (sim_open): Delete check for host endianness - performed by
507 sim_config.
508 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
509 (sim_open): Move much of the initialization from here.
510 (sim_load): To here. After the image has been loaded and
511 endianness set.
512 (sim_open): Move ColdReset from here.
513 (sim_create_inferior): To here.
514 (sim_open): Make FP check less dependant on host endianness.
515
516 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
517 run.
518 * interp.c (sim_set_callbacks): Delete.
519
520 * interp.c (membank, membank_base, membank_size): Replace with
521 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
522 (sim_open): Remove call to callback->init. gdb/run do this.
523
524 * interp.c: Update
525
526 * sim-main.h (SIM_HAVE_FLATMEM): Define.
527
528 * interp.c (big_endian_p): Delete, replaced by
529 current_target_byte_order.
530
531Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
532
533 * interp.c (host_read_long, host_read_word, host_swap_word,
534 host_swap_long): Delete. Using common sim-endian.
535 (sim_fetch_register, sim_store_register): Use H2T.
536 (pipeline_ticks): Delete. Handled by sim-events.
537 (sim_info): Update.
538 (sim_engine_run): Update.
539
540Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
541
542 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
543 reason from here.
544 (SignalException): To here. Signal using sim_engine_halt.
545 (sim_stop_reason): Delete, moved to common.
546
547Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
548
549 * interp.c (sim_open): Add callback argument.
550 (sim_set_callbacks): Delete SIM_DESC argument.
551 (sim_size): Ditto.
552
2e61a3ad
AC		 553Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
554
555 * Makefile.in (SIM_OBJS): Add common modules.
556
557 * interp.c (sim_set_callbacks): Also set SD callback.
558 (set_endianness, xfer_*, swap_*): Delete.
559 (host_read_word, host_read_long, host_swap_word, host_swap_long):
560 Change to functions using sim-endian macros.
561 (control_c, sim_stop): Delete, use common version.
562 (simulate): Convert into.
563 (sim_engine_run): This function.
564 (sim_resume): Delete.
565
566 * interp.c (simulation): New variable - the simulator object.
567 (sim_kind): Delete global - merged into simulation.
568 (sim_load): Cleanup. Move PC assignment from here.
569 (sim_create_inferior): To here.
570
571 * sim-main.h: New file.
572 * interp.c (sim-main.h): Include.
573
574Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
575
576 * configure: Regenerated to track ../common/aclocal.m4 changes.
577
3be0e228
DE		 578Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
579
580 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
581
d654ba0a
GRK		 582Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
583
584 * gencode.c (build_instruction): DIV instructions: check
585 for division by zero and integer overflow before using
586 host's division operation.
587
9d52bcb7
DE		 588Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
589
590 * Makefile.in (SIM_OBJS): Add sim-load.o.
591 * interp.c: #include bfd.h.
592 (target_byte_order): Delete.
593 (sim_kind, myname, big_endian_p): New static locals.
594 (sim_open): Set sim_kind, myname. Move call to set_endianness to
595 after argument parsing. Recognize -E arg, set endianness accordingly.
596 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
597 load file into simulator. Set PC from bfd.
598 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
599 (set_endianness): Use big_endian_p instead of target_byte_order.
600
87e43259
AC		 601Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
602
603 * interp.c (sim_size): Delete prototype - conflicts with
604 definition in remote-sim.h. Correct definition.
605
606Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
607
608 * configure: Regenerated to track ../common/aclocal.m4 changes.
609 * config.in: Ditto.
610
fbda74b1
DE		 611Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
612
8a7c3105
DE		 613 * interp.c (sim_open): New arg `kind'.
614
fbda74b1
DE		 615 * configure: Regenerated to track ../common/aclocal.m4 changes.
616
a35e91c3
AC		 617Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
618
619 * configure: Regenerated to track ../common/aclocal.m4 changes.
620
621Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
622
623 * interp.c (sim_open): Set optind to 0 before calling getopt.
624
625Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
626
627 * configure: Regenerated to track ../common/aclocal.m4 changes.
628
6efa34d8
GRK		 629Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
630
631 * interp.c : Replace uses of pr_addr with pr_uword64
632 where the bit length is always 64 independent of SIM_ADDR.
633 (pr_uword64) : added.
634
a77aa7ec
AC		 635Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
636
637 * configure: Re-generate.
638
601fb8ae
MM		 639Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
640
641 * configure: Regenerate to track ../common/aclocal.m4 changes.
642
53b9417e
DE		 643Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
644
645 * interp.c (sim_open): New SIM_DESC result. Argument is now
646 in argv form.
647 (other sim_*): New SIM_DESC argument.
648
649start-sanitize-r5900
650Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
651
652 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
653 Change values to avoid overloading DOUBLEWORD which is tested
654 for all insns.
655 * gencode.c: reinstate "offending code".
53b9417e 656
56e7c849 657end-sanitize-r5900
53b9417e
DE		 658Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
659
660 * interp.c: Fix printing of addresses for non-64-bit targets.
661 (pr_addr): Add function to print address based on size.
662start-sanitize-r5900
663 * gencode.c: #ifdef out offending code until a permanent fix
664 can be added. Code is causing build errors for non-5900 mips targets.
665end-sanitize-r5900
666
667start-sanitize-r5900
668Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
669
670 * gencode.c (process_instructions): Correct test for ISA dependent
671 architecture bits in isa field of MIPS_DECODE.
672
673end-sanitize-r5900
7e05106d
MA		 674Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
675
676 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
677
2d18fbc6 678start-sanitize-r5900
53b9417e 679Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
2d18fbc6
GRK		 680
681 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
682 PMADDUW.
683
684end-sanitize-r5900
685Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
686
687 * gencode.c (build_mips16_operands): Correct computation of base
688 address for extended PC relative instruction.
689
276c2d7d
GRK		 690start-sanitize-r5900
691Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
2d18fbc6
GRK		 692
693 * Makefile.in, configure, configure.in, gencode.c,
694 interp.c, support.h: add r5900.
695
276c2d7d 696end-sanitize-r5900
da0bce9c
ILT		 697Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
698
699 * interp.c (mips16_entry): Add support for floating point cases.
700 (SignalException): Pass floating point cases to mips16_entry.
701 (ValueFPR): Don't restrict fmt_single and fmt_word to even
702 registers.
703 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
704 or fmt_word.
705 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
706 and then set the state to fmt_uninterpreted.
707 (COP_SW): Temporarily set the state to fmt_word while calling
708 ValueFPR.
709
6389d856
ILT		 710Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
711
712 * gencode.c (build_instruction): The high order may be set in the
713 comparison flags at any ISA level, not just ISA 4.
714
19c5af72
DE		 715Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
716
717 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
718 COMMON_{PRE,POST}_CONFIG_FRAG instead.
719 * configure.in: sinclude ../common/aclocal.m4.
720 * configure: Regenerated.
721
736a306c
ILT		 722Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
723
724 * configure: Rebuild after change to aclocal.m4.
725
295dbbe4
SG		 726Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
727
728 * configure configure.in Makefile.in: Update to new configure
729 scheme which is more compatible with WinGDB builds.
730 * configure.in: Improve comment on how to run autoconf.
731 * configure: Re-run autoconf to get new ../common/aclocal.m4.
732 * Makefile.in: Use autoconf substitution to install common
733 makefile fragment.
734
735Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
736
737 * gencode.c (build_instruction): Use BigEndianCPU instead of
738 ByteSwapMem.
739
e1db0d47
MA		 740Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
741
742 * interp.c (sim_monitor): Make output to stdout visible in
743 wingdb's I/O log window.
744
2902e8ab
MA		 745Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
746
747 * support.h: Undo previous change to SIGTRAP
748 and SIGQUIT values.
749
7e6c297e
ILT		 750Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
751
752 * interp.c (store_word, load_word): New static functions.
753 (mips16_entry): New static function.
754 (SignalException): Look for mips16 entry and exit instructions.
755 (simulate): Use the correct index when setting fpr_state after
756 doing a pending move.
757
0049ba7a
MA		 758Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
759
760 * interp.c: Fix byte-swapping code throughout to work on
761 both little- and big-endian hosts.
762
2510786b
MA		 763Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
764
765 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
766 with gdb/config/i386/xm-windows.h.
767
39bf0ef4
MA		 768Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
769
770 * gencode.c (build_instruction): Work around MSVC++ code gen bug
771 that messes up arithmetic shifts.
772
dbeec768
SG		 773Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
774
775 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
776 SIGTRAP and SIGQUIT for _WIN32.
777
deffd638
ILT		 778Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
779
780 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
781 force a 64 bit multiplication.
782 (build_instruction) [OR]: In mips16 mode, don't do anything if the
783 destination register is 0, since that is the default mips16 nop
784 instruction.
785
aaff8437
ILT		 786Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
787
063443cf
ILT		 788 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
789 (build_endian_shift): Don't check proc64.
790 (build_instruction): Always set memval to uword64. Cast op2 to
791 uword64 when shifting it left in memory instructions. Always use
792 the same code for stores--don't special case proc64.
793
aaff8437
ILT		 794 * gencode.c (build_mips16_operands): Fix base PC value for PC
795 relative operands.
796 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
797 jal instruction.
798 * interp.c (simJALDELAYSLOT): Define.
799 (JALDELAYSLOT): Define.
800 (INDELAYSLOT, INJALDELAYSLOT): Define.
801 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
802
280f90e1
AMT		 803Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
804
805 * interp.c (sim_open): add flush_cache as a PMON routine
806 (sim_monitor): handle flush_cache by ignoring it
807
aaff8437
ILT		 808Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
809
810 * gencode.c (build_instruction): Use !ByteSwapMem instead of
811 BigEndianMem.
812 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
813 (BigEndianMem): Rename to ByteSwapMem and change sense.
814 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
815 BigEndianMem references to !ByteSwapMem.
816 (set_endianness): New function, with prototype.
817 (sim_open): Call set_endianness.
818 (sim_info): Use simBE instead of BigEndianMem.
819 (xfer_direct_word, xfer_direct_long, swap_direct_word,
820 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
821 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
822 ifdefs, keeping the prototype declaration.
823 (swap_word): Rewrite correctly.
824 (ColdReset): Delete references to CONFIG. Delete endianness related
825 code; moved to set_endianness.
826
6429b296
JW		 827Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
828
829 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
830 * interp.c (CHECKHILO): Define away.
831 (simSIGINT): New macro.
832 (membank_size): Increase from 1MB to 2MB.
833 (control_c): New function.
834 (sim_resume): Rename parameter signal to signal_number. Add local
835 variable prev. Call signal before and after simulate.
836 (sim_stop_reason): Add simSIGINT support.
837 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
838 functions always.
839 (sim_warning): Delete call to SignalException. Do call printf_filtered
840 if logfh is NULL.
841 (AddressTranslation): Add #ifdef DEBUG around debugging message and
842 a call to sim_warning.
843
844Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
845
846 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
847 16 bit instructions.
848
831f59a2
ILT		 849Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
850
851 Add support for mips16 (16 bit MIPS implementation):
852 * gencode.c (inst_type): Add mips16 instruction encoding types.
853 (GETDATASIZEINSN): Define.
854 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
855 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
856 mtlo.
857 (MIPS16_DECODE): New table, for mips16 instructions.
858 (bitmap_val): New static function.
859 (struct mips16_op): Define.
860 (mips16_op_table): New table, for mips16 operands.
861 (build_mips16_operands): New static function.
862 (process_instructions): If PC is odd, decode a mips16
863 instruction. Break out instruction handling into new
864 build_instruction function.
865 (build_instruction): New static function, broken out of
866 process_instructions. Check modifiers rather than flags for SHIFT
867 bit count and m[ft]{hi,lo} direction.
868 (usage): Pass program name to fprintf.
869 (main): Remove unused variable this_option_optind. Change
870 ``*loptarg++'' to ``loptarg++''.
871 (my_strtoul): Parenthesize && within ||.
350d33b8 872 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
831f59a2
ILT		 873 (simulate): If PC is odd, fetch a 16 bit instruction, and
874 increment PC by 2 rather than 4.
875 * configure.in: Add case for mips16*-*-*.
876 * configure: Rebuild.
877
878Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
879
880 * interp.c: Allow -t to enable tracing in standalone simulator.
881 Fix garbage output in trace file and error messages.
882
e3d12c65
DE		 883Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
884
885 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
886 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
887 * configure.in: Simplify using macros in ../common/aclocal.m4.
888 * configure: Regenerated.
889 * tconfig.in: New file.
890
891Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
892
893 * interp.c: Fix bugs in 64-bit port.
894 Use ansi function declarations for msvc compiler.
895 Initialize and test file pointer in trace code.
896 Prevent duplicate definition of LAST_EMED_REGNUM.
897
898Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
899
900 * interp.c (xfer_big_long): Prevent unwanted sign extension.
901
902Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
903
904 * interp.c (SignalException): Check for explicit terminating
905 breakpoint value.
906 * gencode.c: Pass instruction value through SignalException()
907 calls for Trap, Breakpoint and Syscall.
908
909Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
910
911 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
912 only used on those hosts that provide it.
913 * configure.in: Add sqrt() to list of functions to be checked for.
914 * config.in: Re-generated.
915 * configure: Re-generated.
916
917Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
918
919 * gencode.c (process_instructions): Call build_endian_shift when
920 expanding STORE RIGHT, to fix swr.
921 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
922 clear the high bits.
923 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
924 Fix float to int conversions to produce signed values.
925
cc5201d7
ILT		 926Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
927
458e1f58
ILT		 928 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
929 (process_instructions): Correct handling of nor instruction.
930 Correct shift count for 32 bit shift instructions. Correct sign
931 extension for arithmetic shifts to not shift the number of bits in
932 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
933 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
934 Fix madd.
c05d1721
ILT		 935 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
936 It's OK to have a mult follow a mult. What's not OK is to have a
937 mult follow an mfhi.
458e1f58 938 (Convert): Comment out incorrect rounding code.
cc5201d7 939
f24b7b69
JSC		 940Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
941
942 * interp.c (sim_monitor): Improved monitor printf
943 simulation. Tidied up simulator warnings, and added "--log" option
944 for directing warning message output.
945 * gencode.c: Use sim_warning() rather than WARNING macro.
946
947Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
948
949 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
950 getopt1.o, rather than on gencode.c. Link objects together.
951 Don't link against -liberty.
952 (gencode.o, getopt.o, getopt1.o): New targets.
953 * gencode.c: Include <ctype.h> and "ansidecl.h".
954 (AND): Undefine after including "ansidecl.h".
955 (ULONG_MAX): Define if not defined.
956 (OP_*): Don't define macros; now defined in opcode/mips.h.
957 (main): Call my_strtoul rather than strtoul.
958 (my_strtoul): New static function.
959
960Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
961
962 * gencode.c (process_instructions): Generate word64 and uword64
963 instead of `long long' and `unsigned long long' data types.
964 * interp.c: #include sysdep.h to get signals, and define default
965 for SIGBUS.
966 * (Convert): Work around for Visual-C++ compiler bug with type
967 conversion.
968 * support.h: Make things compile under Visual-C++ by using
969 __int64 instead of `long long'. Change many refs to long long
970 into word64/uword64 typedefs.
971
a271d1d9
JM		 972Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
973
974 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
975 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
976 (docdir): Removed.
977 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
978 (AC_PROG_INSTALL): Added.
979 (AC_PROG_CC): Moved to before configure.host call.
980 * configure: Rebuilt.
981
982Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
983
984 * configure.in: Define @SIMCONF@ depending on mips target.
985 * configure: Rebuild.
986 * Makefile.in (run): Add @SIMCONF@ to control simulator
987 construction.
988 * gencode.c: Change LOADDRMASK to 64bit memory model only.
989 * interp.c: Remove some debugging, provide more detailed error
990 messages, update memory accesses to use LOADDRMASK.
991
4fa134be
ILT		 992Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
993
994 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
995 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
996 stamp-h.
997 * configure: Rebuild.
998 * config.in: New file, generated by autoheader.
999 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1000 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1001 HAVE_ANINT and HAVE_AINT, as appropriate.
1002 * Makefile.in (run): Use @LIBS@ rather than -lm.
1003 (interp.o): Depend upon config.h.
1004 (Makefile): Just rebuild Makefile.
1005 (clean): Remove stamp-h.
1006 (mostlyclean): Make the same as clean, not as distclean.
1007 (config.h, stamp-h): New targets.
1008
1009Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1010
1011 * interp.c (ColdReset): Fix boolean test. Make all simulator
1012 globals static.
1013
f7481d45
JSC		 1014Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1015
1016 * interp.c (xfer_direct_word, xfer_direct_long,
1017 swap_direct_word, swap_direct_long, xfer_big_word,
1018 xfer_big_long, xfer_little_word, xfer_little_long,
1019 swap_word,swap_long): Added.
1020 * interp.c (ColdReset): Provide function indirection to
1021 host<->simulated_target transfer routines.
1022 * interp.c (sim_store_register, sim_fetch_register): Updated to
1023 make use of indirected transfer routines.
1024
1025Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1026
1027 * gencode.c (process_instructions): Ensure FP ABS instruction
1028 recognised.
1029 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1030 system call support.
1031
8b554809
JSC		 1032Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1033
1034 * interp.c (sim_do_command): Complain if callback structure not
1035 initialised.
1036
d0757082
JSC		 1037Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1038
1039 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1040 support for Sun hosts.
1041 * Makefile.in (gencode): Ensure the host compiler and libraries
1042 used for cross-hosted build.
1043
e871dd18
JSC		 1044Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1045
1046 * interp.c, gencode.c: Some more (TODO) tidying.
1047
1048Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1049
1050 * gencode.c, interp.c: Replaced explicit long long references with
1051 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1052 * support.h (SET64LO, SET64HI): Macros added.
1053
5c59ec43
ILT		 1054Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1055
1056 * configure: Regenerate with autoconf 2.7.
1057
1058Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1059
1060 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1061 * support.h: Remove superfluous "1" from #if.
1062 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1063
1064Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1065
1066 * interp.c (StoreFPR): Control UndefinedResult() call on
1067 WARN_RESULT manifest.
1068
8bae0a0c
JSC		 1069Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1070
1071 * gencode.c: Tidied instruction decoding, and added FP instruction
1072 support.
1073
1074 * interp.c: Added dineroIII, and BSD profiling support. Also
1075 run-time FP handling.
1076
1077Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1078
1079 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1080 gencode.c, interp.c, support.h: created.
GDB Binutils - Deliverables
This page took 0.121617 seconds and 4 git commands to generate.