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Delete sim_io_syscalls and sim_io_getstring
[deliverable/binutils-gdb.git] / sim / mips / ChangeLog
CommitLineData
35c246c9
AC		 1Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
4
5start-sanitize-vr5400
0d5d0d10
AC		 6 * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
7
35c246c9
AC		 8 * sim-main.h: Add 8*3*8 bit accumulator.
9
10 * vr5400.igen: Move mdmx instructins from here
11 * mdmx.igen: To here - new file. Add/fix missing instructions.
12 * mips.igen: Include mdmx.igen.
13
14start-sanitize-vr5400
58fb5d0a
AC		 15Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
16
17 * sim-main.h (sim-fpu.h): Include.
18
19 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
20 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
21 using host independant sim_fpu module.
22
a09a30d2
AC		 23Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
24
232156de
AC		 25 * interp.c (signal_exception): Report internal errors with SIGABRT
26 not SIGQUIT.
a09a30d2 27
232156de
AC		 28 * sim-main.h (C0_CONFIG): New register.
29 (signal.h): No longer include.
30
31 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
a09a30d2 32
486740ce
DE		 33Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
34
35 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
36
f23e93da
AC		 37Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
38
39 * mips.igen: Tag vr5000 instructions.
40 (ANDI): Was missing mipsIV model, fix assembler syntax.
41 (do_c_cond_fmt): New function.
42 (C.cond.fmt): Handle mips I-III which do not support CC field
43 separatly.
44 (bc1): Handle mips IV which do not have a delaed FCC separatly.
45 (SDR): Mask paddr when BigEndianMem, not the converse as specified
46 in IV3.2 spec.
47 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
48 vr5000 which saves LO in a GPR separatly.
49
50 * configure.in (enable-sim-igen): For vr5000, select vr5000
51 specific instructions.
52 * configure: Re-generate.
53
54Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
55
56 * Makefile.in (SIM_OBJS): Add sim-fpu module.
57
58 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
59 fmt_uninterpreted_64 bit cases to switch. Convert to
60 fmt_formatted,
61
62 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
63
64 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
65 as specified in IV3.2 spec.
66 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
67
030843d7
AC		 68Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
69
70 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
71 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
72 (start-sanitize-r5900):
73 (LWXC1, SWXC1): Delete from r5900 instruction set.
74 (end-sanitize-r5900):
75 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
a94c5493 76 PENDING_FILL versions of instructions. Simplify.
030843d7
AC		 77 (X): New function.
78 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
79 instructions.
a94c5493
AC		 80 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
81 a signed value.
030843d7
AC		 82 (MTHI, MFHI): Disable code checking HI-LO.
83
84 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
85 global.
86 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
87
7ce8b917
AC		 88Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
89
95469ceb
AC		 90 * gencode.c (build_mips16_operands): Replace IPC with cia.
91
92 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
93 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
94 IPC to `cia'.
95 (UndefinedResult): Replace function with macro/function
96 combination.
97 (sim_engine_run): Don't save PC in IPC.
98
99 * sim-main.h (IPC): Delete.
100
101 start-sanitize-vr5400
102 * vr5400.igen (vr): Add missing cia argument to value_fpr.
103 (do_select): Rename function select.
104 end-sanitize-vr5400
105
7ce8b917
AC		 106 * interp.c (signal_exception, store_word, load_word,
107 address_translation, load_memory, store_memory, cache_op,
108 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
95469ceb
AC		 109 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
110 current instruction address - cia - argument.
7ce8b917
AC		 111 (sim_read, sim_write): Call address_translation directly.
112 (sim_engine_run): Rename variable vaddr to cia.
95469ceb
AC		 113 (signal_exception): Pass cia to sim_monitor
114
7ce8b917
AC		 115 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
116 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
117 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
118
119 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
120 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
121 SIM_ASSERT.
122
123 * interp.c (signal_exception): Pass restart address to
124 sim_engine_restart.
125
126 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
127 idecode.o): Add dependency.
128
129 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
130 Delete definitions
131 (DELAY_SLOT): Update NIA not PC with branch address.
132 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
133
134 * mips.igen: Use CIA not PC in branch calculations.
135 (illegal): Call SignalException.
136 (BEQ, ADDIU): Fix assembler.
137
63be8feb
AC		 138Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
139
44b8585a
AC		 140 * m16.igen (JALX): Was missing.
141
142 * configure.in (enable-sim-igen): New configuration option.
143 * configure: Re-generate.
144
63be8feb
AC		 145 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
146
147 * interp.c (load_memory, store_memory): Delete parameter RAW.
148 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
149 bypassing {load,store}_memory.
150
151 * sim-main.h (ByteSwapMem): Delete definition.
152
153 * Makefile.in (SIM_OBJS): Add sim-memopt module.
154
155 * interp.c (sim_do_command, sim_commands): Delete mips specific
156 commands. Handled by module sim-options.
157
158 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
159 (WITH_MODULO_MEMORY): Define.
160
161 * interp.c (sim_info): Delete code printing memory size.
162
163 * interp.c (mips_size): Nee sim_size, delete function.
164 (power2): Delete.
165 (monitor, monitor_base, monitor_size): Delete global variables.
166 (sim_open, sim_close): Delete code creating monitor and other
167 memory regions. Use sim-memopts module, via sim_do_commandf, to
168 manage memory regions.
169 (load_memory, store_memory): Use sim-core for memory model.
170
171 * interp.c (address_translation): Delete all memory map code
172 except line forcing 32 bit addresses.
173
22de994d
AC		 174Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
175
176 * sim-main.h (WITH_TRACE): Delete definition. Enables common
177 trace options.
178
179 * interp.c (logfh, logfile): Delete globals.
180 (sim_open, sim_close): Delete code opening & closing log file.
181 (mips_option_handler): Delete -l and -n options.
182 (OPTION mips_options): Ditto.
183
184 * interp.c (OPTION mips_options): Rename option trace to dinero.
185 (mips_option_handler): Update.
186
525d929e
AC		 187Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
188
189 * interp.c (fetch_str): New function.
190 (sim_monitor): Rewrite using sim_read & sim_write.
191 (sim_open): Check magic number.
192 (sim_open): Write monitor vectors into memory using sim_write.
193 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
194 (sim_read, sim_write): Simplify - transfer data one byte at a
195 time.
196 (load_memory, store_memory): Clarify meaning of parameter RAW.
197
198 * sim-main.h (isHOST): Defete definition.
199 (isTARGET): Mark as depreciated.
200 (address_translation): Delete parameter HOST.
201
202 * interp.c (address_translation): Delete parameter HOST.
203
6205f379
GRK		 204start-sanitize-tx49
205Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
206
207 * gencode.c: Add tx49 configury and insns.
208 * configure.in: Add tx49 configury.
209 * configure: Update.
210
211end-sanitize-tx49
01b9cd49
AC		 212Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
213
214 * mips.igen:
215
216 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
217 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
218
89d09738
AC		 219Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
220
221 * mips.igen: Add model filter field to records.
222
16bd5d6e
AC		 223Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
224
225 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
226
227 interp.c (sim_engine_run): Do not compile function sim_engine_run
228 when WITH_IGEN == 1.
229
230 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
231 target architecture.
232
233 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
234 igen. Replace with configuration variables sim_igen_flags /
235 sim_m16_flags.
236
16bd5d6e 237 start-sanitize-r5900
8c31916d
AC		 238 * r5900.igen: New file. Copy r5900 insns here.
239 end-sanitize-r5900
16bd5d6e 240 start-sanitize-vr5400
58fb5d0a
AC		 241 * vr5400.igen: New file.
242 end-sanitize-v5400
16bd5d6e
AC		 243 * m16.igen: New file. Copy mips16 insns here.
244 * mips.igen: From here.
245
90ad43b2
AC		 246Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
247
248 start-sanitize-vr5400
249 * mips.igen: Tag all mipsIV instructions with vr5400 model.
250
251 * configure.in: Add mips64vr5400 target.
252 * configure: Re-generate.
253
254 end-sanitize-vr5400
255 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
256 to top.
257 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
258
635ae9cb
GRK		 259Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
260
261 * gencode.c (build_instruction): Follow sim_write's lead in using
262 BigEndianMem instead of !ByteSwapMem.
263
122edc03
AC		 264Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
265
266 * configure.in (sim_gen): Dependent on target, select type of
267 generator. Always select old style generator.
268
269 configure: Re-generate.
270
271 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
272 targets.
273 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
274 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
275 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
276 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
277 SIM_@sim_gen@_*, set by autoconf.
278
dad6f1f3
AC		 279Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
280
281 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
282
283 * interp.c (ColdReset): Remove #ifdef HASFPU, check
284 CURRENT_FLOATING_POINT instead.
285
286 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
287 (address_translation): Raise exception InstructionFetch when
288 translation fails and isINSTRUCTION.
289
290 * interp.c (sim_open, sim_write, sim_monitor, store_word,
291 sim_engine_run): Change type of of vaddr and paddr to
292 address_word.
293 (address_translation, prefetch, load_memory, store_memory,
294 cache_op): Change type of vAddr and pAddr to address_word.
295
296 * gencode.c (build_instruction): Change type of vaddr and paddr to
297 address_word.
298
92ad193b
AC		 299Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
300
301 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
302 macro to obtain result of ALU op.
303
aa324b9b
AC		 304Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
305
306 * interp.c (sim_info): Call profile_print.
307
e2f8ffb7
AC		 308Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
309
310 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
311
312 * sim-main.h (WITH_PROFILE): Do not define, defined in
313 common/sim-config.h. Use sim-profile module.
314 (simPROFILE): Delete defintion.
315
316 * interp.c (PROFILE): Delete definition.
317 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
318 (sim_close): Delete code writing profile histogram.
319 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
320 Delete.
321 (sim_engine_run): Delete code profiling the PC.
322
fb5a2a3e
AC		 323Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
324
325 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
326
327 * interp.c (sim_monitor): Make register pointers of type
328 unsigned_word*.
329
330 * sim-main.h: Make registers of type unsigned_word not
331 signed_word.
332
ea985d24
AC		 333Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
334
335start-sanitize-r5900
336 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
337 ...): Move to sim-main.h
338
339end-sanitize-r5900
340 * interp.c (sync_operation): Rename from SyncOperation, make
341 global, add SD argument.
342 (prefetch): Rename from Prefetch, make global, add SD argument.
343 (decode_coproc): Make global.
344
345 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
346
347 * gencode.c (build_instruction): Generate DecodeCoproc not
348 decode_coproc calls.
349
350 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
351 (SizeFGR): Move to sim-main.h
352 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
353 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
354 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
355 sim-main.h.
356 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
357 FP_RM_TOMINF, GETRM): Move to sim-main.h.
358 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
359 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
360 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
361 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
362
363 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
364 exception.
365 (sim-alu.h): Include.
366 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
367 (sim_cia): Typedef to instruction_address.
368
284e759d
AC		 369Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
370
371 * Makefile.in (interp.o): Rename generated file engine.c to
372 oengine.c.
373
374 * interp.c: Update.
375
339fb149
AC		 376Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
377
378 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
379
8b70f837
AC		 380Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
381
382 * gencode.c (build_instruction): For "FPSQRT", output correct
383 number of arguments to Recip.
384
0c2c5f61
AC		 385Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
386
387 * Makefile.in (interp.o): Depends on sim-main.h
388
389 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
390
391 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
392 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
393 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
394 STATE, DSSTATE): Define
395 (GPR, FGRIDX, ..): Define.
396
397 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
398 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
399 (GPR, FGRIDX, ...): Delete macros.
400
401 * interp.c: Update names to match defines from sim-main.h
402
18c64df6
AC		 403Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
404
405 * interp.c (sim_monitor): Add SD argument.
406 (sim_warning): Delete. Replace calls with calls to
407 sim_io_eprintf.
408 (sim_error): Delete. Replace calls with sim_io_error.
409 (open_trace, writeout32, writeout16, getnum): Add SD argument.
410 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
411 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
412 argument.
413 (mips_size): Rename from sim_size. Add SD argument.
414
415 * interp.c (simulator): Delete global variable.
416 (callback): Delete global variable.
417 (mips_option_handler, sim_open, sim_write, sim_read,
418 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
419 sim_size,sim_monitor): Use sim_io_* not callback->*.
420 (sim_open): ZALLOC simulator struct.
421 (PROFILE): Do not define.
422
423Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
424
425 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
426 support.h with corresponding code.
427
428 * sim-main.h (word64, uword64), support.h: Move definition to
429 sim-main.h.
430 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
431
432 * support.h: Delete
433 * Makefile.in: Update dependencies
434 * interp.c: Do not include.
435
436Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
437
438 * interp.c (address_translation, load_memory, store_memory,
439 cache_op): Rename to from AddressTranslation et.al., make global,
440 add SD argument
441
442 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
443 CacheOp): Define.
444
445 * interp.c (SignalException): Rename to signal_exception, make
446 global.
447
448 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
449
450 * sim-main.h (SignalException, SignalExceptionInterrupt,
451 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
452 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
453 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
454 Define.
455
456 * interp.c, support.h: Use.
457
458Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
459
460 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
461 to value_fpr / store_fpr. Add SD argument.
462 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
463 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
464
465 * sim-main.h (ValueFPR, StoreFPR): Define.
466
467Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
468
469 * interp.c (sim_engine_run): Check consistency between configure
470 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
471 and HASFPU.
472
473 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
474 (mips_fpu): Configure WITH_FLOATING_POINT.
475 (mips_endian): Configure WITH_TARGET_ENDIAN.
476 * configure: Update.
477
478Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
479
480 * configure: Regenerated to track ../common/aclocal.m4 changes.
481
adf4739e
AC		 482start-sanitize-r5900
483Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
484
485 * interp.c (MAX_REG): Allow up-to 128 registers.
486 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
487 (REGISTER_SA): Ditto.
488 (sim_open): Initialize register_widths for r5900 specific
489 registers.
490 (sim_fetch_register, sim_store_register): Check for request of
491 r5900 specific SA register. Check for request for hi 64 bits of
492 r5900 specific registers.
493
494end-sanitize-r5900
26b20b0a
BM		 495Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
496
497 * configure: Regenerated.
498
6eedf3f4
MA		 499Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
500
501 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
502
e63bc706
AC		 503Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
504
6eedf3f4
MA		 505 * gencode.c (print_igen_insn_models): Assume certain architectures
506 include all mips* instructions.
507 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
508 instruction.
509
e63bc706
AC		 510 * Makefile.in (tmp.igen): Add target. Generate igen input from
511 gencode file.
512
513 * gencode.c (FEATURE_IGEN): Define.
514 (main): Add --igen option. Generate output in igen format.
515 (process_instructions): Format output according to igen option.
516 (print_igen_insn_format): New function.
517 (print_igen_insn_models): New function.
518 (process_instructions): Only issue warnings and ignore
519 instructions when no FEATURE_IGEN.
520
eb2e3c85
AC		 521Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
522
523 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
524 MIPS targets.
525
92f91d1f
AC		 526Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
527
528 * configure: Regenerated to track ../common/aclocal.m4 changes.
529
530Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
531
532 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
533 SIM_RESERVED_BITS): Delete, moved to common.
534 (SIM_EXTRA_CFLAGS): Update.
535
794e9ac9
AC		 536Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
537
76a6247f 538 * configure.in: Configure non-strict memory alignment.
794e9ac9
AC		 539 * configure: Regenerated to track ../common/aclocal.m4 changes.
540
b45caf05
AC		 541Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
542
543 * configure: Regenerated to track ../common/aclocal.m4 changes.
544
545Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
546
547 * gencode.c (SDBBP,DERET): Added (3900) insns.
548 (RFE): Turn on for 3900.
549 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
550 (dsstate): Made global.
551 (SUBTARGET_R3900): Added.
552 (CANCELDELAYSLOT): New.
553 (SignalException): Ignore SystemCall rather than ignore and
554 terminate. Add DebugBreakPoint handling.
555 (decode_coproc): New insns RFE, DERET; and new registers Debug
556 and DEPC protected by SUBTARGET_R3900.
557 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
558 bits explicitly.
559 * Makefile.in,configure.in: Add mips subtarget option.
560 * configure: Update.
561
7afa8d4e
GRK		 562Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
563
564 * gencode.c: Add r3900 (tx39).
565
566start-sanitize-tx19
567 * gencode.c: Fix some configuration problems by improving
568 the relationship between tx19 and tx39.
569end-sanitize-tx19
570
667065d0
GRK		 571Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
572
573 * gencode.c (build_instruction): Don't need to subtract 4 for
574 JALR, just 2.
575
9cb8397f
GRK		 576Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
577
578 * interp.c: Correct some HASFPU problems.
579
a2ab5e65
AC		 580Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
581
582 * configure: Regenerated to track ../common/aclocal.m4 changes.
583
11ac69e0
AC		 584Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
585
586 * interp.c (mips_options): Fix samples option short form, should
587 be `x'.
588
972f3a34
AC		 589Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
590
591 * interp.c (sim_info): Enable info code. Was just returning.
592
9eeaaefa
AC		 593Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
594
595 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
596 MFC0.
597
c31c13b4
AC		 598Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
599
600 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
601 constants.
602 (build_instruction): Ditto for LL.
603
b637f306
GRK		 604start-sanitize-tx19
605Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
606
607 * mips/configure.in, mips/gencode: Add tx19/r1900.
608
609end-sanitize-tx19
6fea4763
DE		 610Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
611
612 * configure: Regenerated to track ../common/aclocal.m4 changes.
613
52352d38
AC		 614start-sanitize-r5900
615Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
616
617 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
618 for overflow due to ABS of MININT, set result to MAXINT.
619 (build_instruction): For "psrlvw", signextend bit 31.
620
621end-sanitize-r5900
88117054
AC		 622Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
623
624 * configure: Regenerated to track ../common/aclocal.m4 changes.
625 * config.in: Ditto.
626
fafce69a
AC		 627Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
628
629 * interp.c (sim_open): Add call to sim_analyze_program, update
630 call to sim_config.
631
7230ff0f
AC		 632Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
633
634 * interp.c (sim_kill): Delete.
fafce69a
AC		 635 (sim_create_inferior): Add ABFD argument. Set PC from same.
636 (sim_load): Move code initializing trap handlers from here.
637 (sim_open): To here.
638 (sim_load): Delete, use sim-hload.c.
639
640 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
7230ff0f 641
247fccde
AC		 642Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
643
644 * configure: Regenerated to track ../common/aclocal.m4 changes.
645 * config.in: Ditto.
646
647Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
648
649 * interp.c (sim_open): Add ABFD argument.
650 (sim_load): Move call to sim_config from here.
651 (sim_open): To here. Check return status.
652
653start-sanitize-r5900
654 * gencode.c (build_instruction): Do not define x8000000000000000,
655 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
656
657end-sanitize-r5900
658start-sanitize-r5900
659Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
660
661 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
662 "pdivuw" check for overflow due to signed divide by -1.
663
664end-sanitize-r5900
c12e2e4c
GRK		 665Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
666
667 * gencode.c (build_instruction): Two arg MADD should
668 not assign result to $0.
669
1e851d2c
AC		 670start-sanitize-r5900
671Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
672
673 * gencode.c (build_instruction): For "ppac5" use unsigned
674 arrithmetic so that the sign bit doesn't smear when right shifted.
675 (build_instruction): For "pdiv" perform sign extension when
676 storing results in HI and LO.
677 (build_instructions): For "pdiv" and "pdivbw" check for
678 divide-by-zero.
679 (build_instruction): For "pmfhl.slw" update hi part of dest
680 register as well as low part.
681 (build_instruction): For "pmfhl" portably handle long long values.
682 (build_instruction): For "pmfhl.sh" correctly negative values.
683 Store half words 2 and three in the correct place.
684 (build_instruction): For "psllvw", sign extend value after shift.
685
686end-sanitize-r5900
687Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
688
689 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
690 * sim/mips/configure.in: Regenerate.
691
692Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
693
694 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
695 signed8, unsigned8 et.al. types.
696
697start-sanitize-r5900
698 * gencode.c (build_instruction): For PMULTU* do not sign extend
699 registers. Make generated code easier to debug.
700
701end-sanitize-r5900
702 * interp.c (SUB_REG_FETCH): Handle both little and big endian
703 hosts when selecting subreg.
704
705start-sanitize-r5900
706Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
707
708 * gencode.c (type_for_data_len): For 32bit operations concerned
709 with overflow, perform op using 64bits.
710 (build_instruction): For PADD, always compute operation using type
711 returned by type_for_data_len.
712 (build_instruction): For PSUBU, when overflow, saturate to zero as
713 actually underflow.
714
715end-sanitize-r5900
ae19b07b
JL		 716Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
717
649625bb 718start-sanitize-r5900
64435234
JL		 719 * gencode.c (build_instruction): Handle "pext5" according to
720 version 1.95 of the r5900 ISA.
721
649625bb
JL		 722 * gencode.c (build_instruction): Handle "ppac5" according to
723 version 1.95 of the r5900 ISA.
649625bb 724
1e851d2c 725end-sanitize-r5900
05d1322f
JL		 726 * interp.c (sim_engine_run): Reset the ZERO register to zero
727 regardless of FEATURE_WARN_ZERO.
ae19b07b
JL		 728 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
729
730Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
731
732 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
733 (SignalException): For BreakPoints ignore any mode bits and just
734 save the PC.
735 (SignalException): Always set the CAUSE register.
736
56e7c849
AC		 737Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
738
739 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
740 exception has been taken.
741
742 * interp.c: Implement the ERET and mt/f sr instructions.
743
ae19b07b 744start-sanitize-r5900
56e7c849
AC		 745Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
746
747 * gencode.c (build_instruction): For paddu, extract unsigned
748 sub-fields.
749
750 * gencode.c (build_instruction): Saturate padds instead of padd
751 instructions.
752
753end-sanitize-r5900
754Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
755
756 * interp.c (SignalException): Don't bother restarting an
757 interrupt.
758
759Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
760
761 * interp.c (SignalException): Really take an interrupt.
762 (interrupt_event): Only deliver interrupts when enabled.
763
764Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
765
766 * interp.c (sim_info): Only print info when verbose.
767 (sim_info) Use sim_io_printf for output.
768
2f2e6c5d
AC		 769Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
770
771 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
772 mips architectures.
773
774Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
775
776 * interp.c (sim_do_command): Check for common commands if a
777 simulator specific command fails.
778
d3d2a9f7
GRK		 779Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
780
781 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
782 and simBE when DEBUG is defined.
783
50a2a691
AC		 784Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
785
786 * interp.c (interrupt_event): New function. Pass exception event
787 onto exception handler.
788
789 * configure.in: Check for stdlib.h.
790 * configure: Regenerate.
791
792 * gencode.c (build_instruction): Add UNUSED attribute to tempS
793 variable declaration.
794 (build_instruction): Initialize memval1.
795 (build_instruction): Add UNUSED attribute to byte, bigend,
796 reverse.
797 (build_operands): Ditto.
798
799 * interp.c: Fix GCC warnings.
800 (sim_get_quit_code): Delete.
801
802 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
803 * Makefile.in: Ditto.
804 * configure: Re-generate.
805
806 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
807
808Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
809
810 * interp.c (mips_option_handler): New function parse argumes using
811 sim-options.
812 (myname): Replace with STATE_MY_NAME.
813 (sim_open): Delete check for host endianness - performed by
814 sim_config.
815 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
816 (sim_open): Move much of the initialization from here.
817 (sim_load): To here. After the image has been loaded and
818 endianness set.
819 (sim_open): Move ColdReset from here.
820 (sim_create_inferior): To here.
821 (sim_open): Make FP check less dependant on host endianness.
822
823 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
824 run.
825 * interp.c (sim_set_callbacks): Delete.
826
827 * interp.c (membank, membank_base, membank_size): Replace with
828 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
829 (sim_open): Remove call to callback->init. gdb/run do this.
830
831 * interp.c: Update
832
833 * sim-main.h (SIM_HAVE_FLATMEM): Define.
834
835 * interp.c (big_endian_p): Delete, replaced by
836 current_target_byte_order.
837
838Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
839
840 * interp.c (host_read_long, host_read_word, host_swap_word,
841 host_swap_long): Delete. Using common sim-endian.
842 (sim_fetch_register, sim_store_register): Use H2T.
843 (pipeline_ticks): Delete. Handled by sim-events.
844 (sim_info): Update.
845 (sim_engine_run): Update.
846
847Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
848
849 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
850 reason from here.
851 (SignalException): To here. Signal using sim_engine_halt.
852 (sim_stop_reason): Delete, moved to common.
853
854Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
855
856 * interp.c (sim_open): Add callback argument.
857 (sim_set_callbacks): Delete SIM_DESC argument.
858 (sim_size): Ditto.
859
2e61a3ad
AC		 860Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
861
862 * Makefile.in (SIM_OBJS): Add common modules.
863
864 * interp.c (sim_set_callbacks): Also set SD callback.
865 (set_endianness, xfer_*, swap_*): Delete.
866 (host_read_word, host_read_long, host_swap_word, host_swap_long):
867 Change to functions using sim-endian macros.
868 (control_c, sim_stop): Delete, use common version.
869 (simulate): Convert into.
870 (sim_engine_run): This function.
871 (sim_resume): Delete.
872
873 * interp.c (simulation): New variable - the simulator object.
874 (sim_kind): Delete global - merged into simulation.
875 (sim_load): Cleanup. Move PC assignment from here.
876 (sim_create_inferior): To here.
877
878 * sim-main.h: New file.
879 * interp.c (sim-main.h): Include.
880
881Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
882
883 * configure: Regenerated to track ../common/aclocal.m4 changes.
884
3be0e228
DE		 885Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
886
887 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
888
d654ba0a
GRK		 889Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
890
891 * gencode.c (build_instruction): DIV instructions: check
892 for division by zero and integer overflow before using
893 host's division operation.
894
9d52bcb7
DE		 895Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
896
897 * Makefile.in (SIM_OBJS): Add sim-load.o.
898 * interp.c: #include bfd.h.
899 (target_byte_order): Delete.
900 (sim_kind, myname, big_endian_p): New static locals.
901 (sim_open): Set sim_kind, myname. Move call to set_endianness to
902 after argument parsing. Recognize -E arg, set endianness accordingly.
903 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
904 load file into simulator. Set PC from bfd.
905 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
906 (set_endianness): Use big_endian_p instead of target_byte_order.
907
87e43259
AC		 908Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
909
910 * interp.c (sim_size): Delete prototype - conflicts with
911 definition in remote-sim.h. Correct definition.
912
913Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
914
915 * configure: Regenerated to track ../common/aclocal.m4 changes.
916 * config.in: Ditto.
917
fbda74b1
DE		 918Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
919
8a7c3105
DE		 920 * interp.c (sim_open): New arg `kind'.
921
fbda74b1
DE		 922 * configure: Regenerated to track ../common/aclocal.m4 changes.
923
a35e91c3
AC		 924Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
925
926 * configure: Regenerated to track ../common/aclocal.m4 changes.
927
928Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
929
930 * interp.c (sim_open): Set optind to 0 before calling getopt.
931
932Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
933
934 * configure: Regenerated to track ../common/aclocal.m4 changes.
935
6efa34d8
GRK		 936Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
937
938 * interp.c : Replace uses of pr_addr with pr_uword64
939 where the bit length is always 64 independent of SIM_ADDR.
940 (pr_uword64) : added.
941
a77aa7ec
AC		 942Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
943
944 * configure: Re-generate.
945
601fb8ae
MM		 946Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
947
948 * configure: Regenerate to track ../common/aclocal.m4 changes.
949
53b9417e
DE		 950Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
951
952 * interp.c (sim_open): New SIM_DESC result. Argument is now
953 in argv form.
954 (other sim_*): New SIM_DESC argument.
955
956start-sanitize-r5900
957Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
958
959 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
960 Change values to avoid overloading DOUBLEWORD which is tested
961 for all insns.
962 * gencode.c: reinstate "offending code".
53b9417e 963
56e7c849 964end-sanitize-r5900
53b9417e
DE		 965Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
966
967 * interp.c: Fix printing of addresses for non-64-bit targets.
968 (pr_addr): Add function to print address based on size.
969start-sanitize-r5900
970 * gencode.c: #ifdef out offending code until a permanent fix
971 can be added. Code is causing build errors for non-5900 mips targets.
972end-sanitize-r5900
973
974start-sanitize-r5900
975Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
976
977 * gencode.c (process_instructions): Correct test for ISA dependent
978 architecture bits in isa field of MIPS_DECODE.
979
980end-sanitize-r5900
7e05106d
MA		 981Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
982
983 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
984
2d18fbc6 985start-sanitize-r5900
53b9417e 986Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
2d18fbc6
GRK		 987
988 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
989 PMADDUW.
990
991end-sanitize-r5900
992Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
993
994 * gencode.c (build_mips16_operands): Correct computation of base
995 address for extended PC relative instruction.
996
276c2d7d
GRK		 997start-sanitize-r5900
998Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
2d18fbc6
GRK		 999
1000 * Makefile.in, configure, configure.in, gencode.c,
1001 interp.c, support.h: add r5900.
1002
276c2d7d 1003end-sanitize-r5900
da0bce9c
ILT		 1004Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1005
1006 * interp.c (mips16_entry): Add support for floating point cases.
1007 (SignalException): Pass floating point cases to mips16_entry.
1008 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1009 registers.
1010 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1011 or fmt_word.
1012 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1013 and then set the state to fmt_uninterpreted.
1014 (COP_SW): Temporarily set the state to fmt_word while calling
1015 ValueFPR.
1016
6389d856
ILT		 1017Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1018
1019 * gencode.c (build_instruction): The high order may be set in the
1020 comparison flags at any ISA level, not just ISA 4.
1021
19c5af72
DE		 1022Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1023
1024 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1025 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1026 * configure.in: sinclude ../common/aclocal.m4.
1027 * configure: Regenerated.
1028
736a306c
ILT		 1029Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1030
1031 * configure: Rebuild after change to aclocal.m4.
1032
295dbbe4
SG		 1033Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1034
1035 * configure configure.in Makefile.in: Update to new configure
1036 scheme which is more compatible with WinGDB builds.
1037 * configure.in: Improve comment on how to run autoconf.
1038 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1039 * Makefile.in: Use autoconf substitution to install common
1040 makefile fragment.
1041
1042Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1043
1044 * gencode.c (build_instruction): Use BigEndianCPU instead of
1045 ByteSwapMem.
1046
e1db0d47
MA		 1047Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1048
1049 * interp.c (sim_monitor): Make output to stdout visible in
1050 wingdb's I/O log window.
1051
2902e8ab
MA		 1052Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1053
1054 * support.h: Undo previous change to SIGTRAP
1055 and SIGQUIT values.
1056
7e6c297e
ILT		 1057Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1058
1059 * interp.c (store_word, load_word): New static functions.
1060 (mips16_entry): New static function.
1061 (SignalException): Look for mips16 entry and exit instructions.
1062 (simulate): Use the correct index when setting fpr_state after
1063 doing a pending move.
1064
0049ba7a
MA		 1065Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1066
1067 * interp.c: Fix byte-swapping code throughout to work on
1068 both little- and big-endian hosts.
1069
2510786b
MA		 1070Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1071
1072 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1073 with gdb/config/i386/xm-windows.h.
1074
39bf0ef4
MA		 1075Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1076
1077 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1078 that messes up arithmetic shifts.
1079
dbeec768
SG		 1080Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1081
1082 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1083 SIGTRAP and SIGQUIT for _WIN32.
1084
deffd638
ILT		 1085Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1086
1087 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1088 force a 64 bit multiplication.
1089 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1090 destination register is 0, since that is the default mips16 nop
1091 instruction.
1092
aaff8437
ILT		 1093Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1094
063443cf
ILT		 1095 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1096 (build_endian_shift): Don't check proc64.
1097 (build_instruction): Always set memval to uword64. Cast op2 to
1098 uword64 when shifting it left in memory instructions. Always use
1099 the same code for stores--don't special case proc64.
1100
aaff8437
ILT		 1101 * gencode.c (build_mips16_operands): Fix base PC value for PC
1102 relative operands.
1103 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1104 jal instruction.
1105 * interp.c (simJALDELAYSLOT): Define.
1106 (JALDELAYSLOT): Define.
1107 (INDELAYSLOT, INJALDELAYSLOT): Define.
1108 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1109
280f90e1
AMT		 1110Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1111
1112 * interp.c (sim_open): add flush_cache as a PMON routine
1113 (sim_monitor): handle flush_cache by ignoring it
1114
aaff8437
ILT		 1115Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1116
1117 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1118 BigEndianMem.
1119 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1120 (BigEndianMem): Rename to ByteSwapMem and change sense.
1121 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1122 BigEndianMem references to !ByteSwapMem.
1123 (set_endianness): New function, with prototype.
1124 (sim_open): Call set_endianness.
1125 (sim_info): Use simBE instead of BigEndianMem.
1126 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1127 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1128 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1129 ifdefs, keeping the prototype declaration.
1130 (swap_word): Rewrite correctly.
1131 (ColdReset): Delete references to CONFIG. Delete endianness related
1132 code; moved to set_endianness.
1133
6429b296
JW		 1134Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1135
1136 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1137 * interp.c (CHECKHILO): Define away.
1138 (simSIGINT): New macro.
1139 (membank_size): Increase from 1MB to 2MB.
1140 (control_c): New function.
1141 (sim_resume): Rename parameter signal to signal_number. Add local
1142 variable prev. Call signal before and after simulate.
1143 (sim_stop_reason): Add simSIGINT support.
1144 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1145 functions always.
1146 (sim_warning): Delete call to SignalException. Do call printf_filtered
1147 if logfh is NULL.
1148 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1149 a call to sim_warning.
1150
1151Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1152
1153 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1154 16 bit instructions.
1155
831f59a2
ILT		 1156Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1157
1158 Add support for mips16 (16 bit MIPS implementation):
1159 * gencode.c (inst_type): Add mips16 instruction encoding types.
1160 (GETDATASIZEINSN): Define.
1161 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1162 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1163 mtlo.
1164 (MIPS16_DECODE): New table, for mips16 instructions.
1165 (bitmap_val): New static function.
1166 (struct mips16_op): Define.
1167 (mips16_op_table): New table, for mips16 operands.
1168 (build_mips16_operands): New static function.
1169 (process_instructions): If PC is odd, decode a mips16
1170 instruction. Break out instruction handling into new
1171 build_instruction function.
1172 (build_instruction): New static function, broken out of
1173 process_instructions. Check modifiers rather than flags for SHIFT
1174 bit count and m[ft]{hi,lo} direction.
1175 (usage): Pass program name to fprintf.
1176 (main): Remove unused variable this_option_optind. Change
1177 ``*loptarg++'' to ``loptarg++''.
1178 (my_strtoul): Parenthesize && within ||.
350d33b8 1179 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
831f59a2
ILT		 1180 (simulate): If PC is odd, fetch a 16 bit instruction, and
1181 increment PC by 2 rather than 4.
1182 * configure.in: Add case for mips16*-*-*.
1183 * configure: Rebuild.
1184
1185Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1186
1187 * interp.c: Allow -t to enable tracing in standalone simulator.
1188 Fix garbage output in trace file and error messages.
1189
e3d12c65
DE		 1190Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1191
1192 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1193 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1194 * configure.in: Simplify using macros in ../common/aclocal.m4.
1195 * configure: Regenerated.
1196 * tconfig.in: New file.
1197
1198Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1199
1200 * interp.c: Fix bugs in 64-bit port.
1201 Use ansi function declarations for msvc compiler.
1202 Initialize and test file pointer in trace code.
1203 Prevent duplicate definition of LAST_EMED_REGNUM.
1204
1205Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1206
1207 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1208
1209Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1210
1211 * interp.c (SignalException): Check for explicit terminating
1212 breakpoint value.
1213 * gencode.c: Pass instruction value through SignalException()
1214 calls for Trap, Breakpoint and Syscall.
1215
1216Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1217
1218 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1219 only used on those hosts that provide it.
1220 * configure.in: Add sqrt() to list of functions to be checked for.
1221 * config.in: Re-generated.
1222 * configure: Re-generated.
1223
1224Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1225
1226 * gencode.c (process_instructions): Call build_endian_shift when
1227 expanding STORE RIGHT, to fix swr.
1228 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1229 clear the high bits.
1230 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1231 Fix float to int conversions to produce signed values.
1232
cc5201d7
ILT		 1233Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1234
458e1f58
ILT		 1235 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1236 (process_instructions): Correct handling of nor instruction.
1237 Correct shift count for 32 bit shift instructions. Correct sign
1238 extension for arithmetic shifts to not shift the number of bits in
1239 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1240 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1241 Fix madd.
c05d1721
ILT		 1242 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1243 It's OK to have a mult follow a mult. What's not OK is to have a
1244 mult follow an mfhi.
458e1f58 1245 (Convert): Comment out incorrect rounding code.
cc5201d7 1246
f24b7b69
JSC		 1247Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1248
1249 * interp.c (sim_monitor): Improved monitor printf
1250 simulation. Tidied up simulator warnings, and added "--log" option
1251 for directing warning message output.
1252 * gencode.c: Use sim_warning() rather than WARNING macro.
1253
1254Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1255
1256 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1257 getopt1.o, rather than on gencode.c. Link objects together.
1258 Don't link against -liberty.
1259 (gencode.o, getopt.o, getopt1.o): New targets.
1260 * gencode.c: Include <ctype.h> and "ansidecl.h".
1261 (AND): Undefine after including "ansidecl.h".
1262 (ULONG_MAX): Define if not defined.
1263 (OP_*): Don't define macros; now defined in opcode/mips.h.
1264 (main): Call my_strtoul rather than strtoul.
1265 (my_strtoul): New static function.
1266
1267Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1268
1269 * gencode.c (process_instructions): Generate word64 and uword64
1270 instead of `long long' and `unsigned long long' data types.
1271 * interp.c: #include sysdep.h to get signals, and define default
1272 for SIGBUS.
1273 * (Convert): Work around for Visual-C++ compiler bug with type
1274 conversion.
1275 * support.h: Make things compile under Visual-C++ by using
1276 __int64 instead of `long long'. Change many refs to long long
1277 into word64/uword64 typedefs.
1278
a271d1d9
JM		 1279Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1280
1281 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1282 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1283 (docdir): Removed.
1284 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1285 (AC_PROG_INSTALL): Added.
1286 (AC_PROG_CC): Moved to before configure.host call.
1287 * configure: Rebuilt.
1288
1289Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1290
1291 * configure.in: Define @SIMCONF@ depending on mips target.
1292 * configure: Rebuild.
1293 * Makefile.in (run): Add @SIMCONF@ to control simulator
1294 construction.
1295 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1296 * interp.c: Remove some debugging, provide more detailed error
1297 messages, update memory accesses to use LOADDRMASK.
1298
4fa134be
ILT		 1299Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1300
1301 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1302 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1303 stamp-h.
1304 * configure: Rebuild.
1305 * config.in: New file, generated by autoheader.
1306 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1307 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1308 HAVE_ANINT and HAVE_AINT, as appropriate.
1309 * Makefile.in (run): Use @LIBS@ rather than -lm.
1310 (interp.o): Depend upon config.h.
1311 (Makefile): Just rebuild Makefile.
1312 (clean): Remove stamp-h.
1313 (mostlyclean): Make the same as clean, not as distclean.
1314 (config.h, stamp-h): New targets.
1315
1316Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1317
1318 * interp.c (ColdReset): Fix boolean test. Make all simulator
1319 globals static.
1320
f7481d45
JSC		 1321Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1322
1323 * interp.c (xfer_direct_word, xfer_direct_long,
1324 swap_direct_word, swap_direct_long, xfer_big_word,
1325 xfer_big_long, xfer_little_word, xfer_little_long,
1326 swap_word,swap_long): Added.
1327 * interp.c (ColdReset): Provide function indirection to
1328 host<->simulated_target transfer routines.
1329 * interp.c (sim_store_register, sim_fetch_register): Updated to
1330 make use of indirected transfer routines.
1331
1332Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1333
1334 * gencode.c (process_instructions): Ensure FP ABS instruction
1335 recognised.
1336 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1337 system call support.
1338
8b554809
JSC		 1339Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1340
1341 * interp.c (sim_do_command): Complain if callback structure not
1342 initialised.
1343
d0757082
JSC		 1344Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1345
1346 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1347 support for Sun hosts.
1348 * Makefile.in (gencode): Ensure the host compiler and libraries
1349 used for cross-hosted build.
1350
e871dd18
JSC		 1351Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1352
1353 * interp.c, gencode.c: Some more (TODO) tidying.
1354
1355Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1356
1357 * gencode.c, interp.c: Replaced explicit long long references with
1358 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1359 * support.h (SET64LO, SET64HI): Macros added.
1360
5c59ec43
ILT		 1361Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1362
1363 * configure: Regenerate with autoconf 2.7.
1364
1365Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1366
1367 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1368 * support.h: Remove superfluous "1" from #if.
1369 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1370
1371Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1372
1373 * interp.c (StoreFPR): Control UndefinedResult() call on
1374 WARN_RESULT manifest.
1375
8bae0a0c
JSC		 1376Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1377
1378 * gencode.c: Tidied instruction decoding, and added FP instruction
1379 support.
1380
1381 * interp.c: Added dineroIII, and BSD profiling support. Also
1382 run-time FP handling.
1383
1384Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1385
1386 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1387 gencode.c, interp.c, support.h: created.
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