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Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,
[deliverable/binutils-gdb.git] / sim / mips / ChangeLog
CommitLineData
030843d7
AC		 1Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
4 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
5 (start-sanitize-r5900):
6 (LWXC1, SWXC1): Delete from r5900 instruction set.
7 (end-sanitize-r5900):
8 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
9 PENDING_FILL versions of instructions.
10 (X): New function.
11 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
12 instructions.
13 (BEQZ, ...): Explicitly cast GPR to a signed value.
14 (MTHI, MFHI): Disable code checking HI-LO.
15
16 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
17 global.
18 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
19
7ce8b917
AC		 20Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
21
95469ceb
AC		 22 * gencode.c (build_mips16_operands): Replace IPC with cia.
23
24 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
25 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
26 IPC to `cia'.
27 (UndefinedResult): Replace function with macro/function
28 combination.
29 (sim_engine_run): Don't save PC in IPC.
30
31 * sim-main.h (IPC): Delete.
32
33 start-sanitize-vr5400
34 * vr5400.igen (vr): Add missing cia argument to value_fpr.
35 (do_select): Rename function select.
36 end-sanitize-vr5400
37
7ce8b917
AC		 38 * interp.c (signal_exception, store_word, load_word,
39 address_translation, load_memory, store_memory, cache_op,
40 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
95469ceb
AC		 41 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
42 current instruction address - cia - argument.
7ce8b917
AC		 43 (sim_read, sim_write): Call address_translation directly.
44 (sim_engine_run): Rename variable vaddr to cia.
95469ceb
AC		 45 (signal_exception): Pass cia to sim_monitor
46
7ce8b917
AC		 47 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
48 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
49 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
50
51 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
52 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
53 SIM_ASSERT.
54
55 * interp.c (signal_exception): Pass restart address to
56 sim_engine_restart.
57
58 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
59 idecode.o): Add dependency.
60
61 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
62 Delete definitions
63 (DELAY_SLOT): Update NIA not PC with branch address.
64 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
65
66 * mips.igen: Use CIA not PC in branch calculations.
67 (illegal): Call SignalException.
68 (BEQ, ADDIU): Fix assembler.
69
63be8feb
AC		 70Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
71
44b8585a
AC		 72 * m16.igen (JALX): Was missing.
73
74 * configure.in (enable-sim-igen): New configuration option.
75 * configure: Re-generate.
76
63be8feb
AC		 77 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
78
79 * interp.c (load_memory, store_memory): Delete parameter RAW.
80 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
81 bypassing {load,store}_memory.
82
83 * sim-main.h (ByteSwapMem): Delete definition.
84
85 * Makefile.in (SIM_OBJS): Add sim-memopt module.
86
87 * interp.c (sim_do_command, sim_commands): Delete mips specific
88 commands. Handled by module sim-options.
89
90 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
91 (WITH_MODULO_MEMORY): Define.
92
93 * interp.c (sim_info): Delete code printing memory size.
94
95 * interp.c (mips_size): Nee sim_size, delete function.
96 (power2): Delete.
97 (monitor, monitor_base, monitor_size): Delete global variables.
98 (sim_open, sim_close): Delete code creating monitor and other
99 memory regions. Use sim-memopts module, via sim_do_commandf, to
100 manage memory regions.
101 (load_memory, store_memory): Use sim-core for memory model.
102
103 * interp.c (address_translation): Delete all memory map code
104 except line forcing 32 bit addresses.
105
22de994d
AC		 106Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
107
108 * sim-main.h (WITH_TRACE): Delete definition. Enables common
109 trace options.
110
111 * interp.c (logfh, logfile): Delete globals.
112 (sim_open, sim_close): Delete code opening & closing log file.
113 (mips_option_handler): Delete -l and -n options.
114 (OPTION mips_options): Ditto.
115
116 * interp.c (OPTION mips_options): Rename option trace to dinero.
117 (mips_option_handler): Update.
118
525d929e
AC		 119Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
120
121 * interp.c (fetch_str): New function.
122 (sim_monitor): Rewrite using sim_read & sim_write.
123 (sim_open): Check magic number.
124 (sim_open): Write monitor vectors into memory using sim_write.
125 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
126 (sim_read, sim_write): Simplify - transfer data one byte at a
127 time.
128 (load_memory, store_memory): Clarify meaning of parameter RAW.
129
130 * sim-main.h (isHOST): Defete definition.
131 (isTARGET): Mark as depreciated.
132 (address_translation): Delete parameter HOST.
133
134 * interp.c (address_translation): Delete parameter HOST.
135
6205f379
GRK		 136start-sanitize-tx49
137Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
138
139 * gencode.c: Add tx49 configury and insns.
140 * configure.in: Add tx49 configury.
141 * configure: Update.
142
143end-sanitize-tx49
01b9cd49
AC		 144Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
145
146 * mips.igen:
147
148 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
149 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
150
89d09738
AC		 151Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
152
153 * mips.igen: Add model filter field to records.
154
16bd5d6e
AC		 155Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
156
157 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
158
159 interp.c (sim_engine_run): Do not compile function sim_engine_run
160 when WITH_IGEN == 1.
161
162 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
163 target architecture.
164
165 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
166 igen. Replace with configuration variables sim_igen_flags /
167 sim_m16_flags.
168
169 end-sanitize-v5900
170 * r5900.igen: New file. Copy v5900 insns here.
171 start-sanitize-r5900
172 end-sanitize-v5400
173 * vr5400.igen: New file.
174 start-sanitize-vr5400
175 * m16.igen: New file. Copy mips16 insns here.
176 * mips.igen: From here.
177
90ad43b2
AC		 178Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
179
180 start-sanitize-vr5400
181 * mips.igen: Tag all mipsIV instructions with vr5400 model.
182
183 * configure.in: Add mips64vr5400 target.
184 * configure: Re-generate.
185
186 end-sanitize-vr5400
187 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
188 to top.
189 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
190
635ae9cb
GRK		 191Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
192
193 * gencode.c (build_instruction): Follow sim_write's lead in using
194 BigEndianMem instead of !ByteSwapMem.
195
122edc03
AC		 196Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
197
198 * configure.in (sim_gen): Dependent on target, select type of
199 generator. Always select old style generator.
200
201 configure: Re-generate.
202
203 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
204 targets.
205 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
206 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
207 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
208 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
209 SIM_@sim_gen@_*, set by autoconf.
210
dad6f1f3
AC		 211Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
212
213 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
214
215 * interp.c (ColdReset): Remove #ifdef HASFPU, check
216 CURRENT_FLOATING_POINT instead.
217
218 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
219 (address_translation): Raise exception InstructionFetch when
220 translation fails and isINSTRUCTION.
221
222 * interp.c (sim_open, sim_write, sim_monitor, store_word,
223 sim_engine_run): Change type of of vaddr and paddr to
224 address_word.
225 (address_translation, prefetch, load_memory, store_memory,
226 cache_op): Change type of vAddr and pAddr to address_word.
227
228 * gencode.c (build_instruction): Change type of vaddr and paddr to
229 address_word.
230
92ad193b
AC		 231Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
232
233 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
234 macro to obtain result of ALU op.
235
aa324b9b
AC		 236Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
237
238 * interp.c (sim_info): Call profile_print.
239
e2f8ffb7
AC		 240Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
241
242 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
243
244 * sim-main.h (WITH_PROFILE): Do not define, defined in
245 common/sim-config.h. Use sim-profile module.
246 (simPROFILE): Delete defintion.
247
248 * interp.c (PROFILE): Delete definition.
249 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
250 (sim_close): Delete code writing profile histogram.
251 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
252 Delete.
253 (sim_engine_run): Delete code profiling the PC.
254
fb5a2a3e
AC		 255Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
256
257 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
258
259 * interp.c (sim_monitor): Make register pointers of type
260 unsigned_word*.
261
262 * sim-main.h: Make registers of type unsigned_word not
263 signed_word.
264
ea985d24
AC		 265Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
266
267start-sanitize-r5900
268 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
269 ...): Move to sim-main.h
270
271end-sanitize-r5900
272 * interp.c (sync_operation): Rename from SyncOperation, make
273 global, add SD argument.
274 (prefetch): Rename from Prefetch, make global, add SD argument.
275 (decode_coproc): Make global.
276
277 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
278
279 * gencode.c (build_instruction): Generate DecodeCoproc not
280 decode_coproc calls.
281
282 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
283 (SizeFGR): Move to sim-main.h
284 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
285 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
286 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
287 sim-main.h.
288 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
289 FP_RM_TOMINF, GETRM): Move to sim-main.h.
290 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
291 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
292 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
293 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
294
295 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
296 exception.
297 (sim-alu.h): Include.
298 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
299 (sim_cia): Typedef to instruction_address.
300
284e759d
AC		 301Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
302
303 * Makefile.in (interp.o): Rename generated file engine.c to
304 oengine.c.
305
306 * interp.c: Update.
307
339fb149
AC		 308Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
309
310 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
311
8b70f837
AC		 312Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
313
314 * gencode.c (build_instruction): For "FPSQRT", output correct
315 number of arguments to Recip.
316
0c2c5f61
AC		 317Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
318
319 * Makefile.in (interp.o): Depends on sim-main.h
320
321 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
322
323 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
324 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
325 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
326 STATE, DSSTATE): Define
327 (GPR, FGRIDX, ..): Define.
328
329 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
330 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
331 (GPR, FGRIDX, ...): Delete macros.
332
333 * interp.c: Update names to match defines from sim-main.h
334
18c64df6
AC		 335Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
336
337 * interp.c (sim_monitor): Add SD argument.
338 (sim_warning): Delete. Replace calls with calls to
339 sim_io_eprintf.
340 (sim_error): Delete. Replace calls with sim_io_error.
341 (open_trace, writeout32, writeout16, getnum): Add SD argument.
342 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
343 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
344 argument.
345 (mips_size): Rename from sim_size. Add SD argument.
346
347 * interp.c (simulator): Delete global variable.
348 (callback): Delete global variable.
349 (mips_option_handler, sim_open, sim_write, sim_read,
350 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
351 sim_size,sim_monitor): Use sim_io_* not callback->*.
352 (sim_open): ZALLOC simulator struct.
353 (PROFILE): Do not define.
354
355Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
356
357 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
358 support.h with corresponding code.
359
360 * sim-main.h (word64, uword64), support.h: Move definition to
361 sim-main.h.
362 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
363
364 * support.h: Delete
365 * Makefile.in: Update dependencies
366 * interp.c: Do not include.
367
368Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
369
370 * interp.c (address_translation, load_memory, store_memory,
371 cache_op): Rename to from AddressTranslation et.al., make global,
372 add SD argument
373
374 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
375 CacheOp): Define.
376
377 * interp.c (SignalException): Rename to signal_exception, make
378 global.
379
380 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
381
382 * sim-main.h (SignalException, SignalExceptionInterrupt,
383 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
384 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
385 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
386 Define.
387
388 * interp.c, support.h: Use.
389
390Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
391
392 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
393 to value_fpr / store_fpr. Add SD argument.
394 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
395 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
396
397 * sim-main.h (ValueFPR, StoreFPR): Define.
398
399Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
400
401 * interp.c (sim_engine_run): Check consistency between configure
402 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
403 and HASFPU.
404
405 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
406 (mips_fpu): Configure WITH_FLOATING_POINT.
407 (mips_endian): Configure WITH_TARGET_ENDIAN.
408 * configure: Update.
409
410Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
411
412 * configure: Regenerated to track ../common/aclocal.m4 changes.
413
adf4739e
AC		 414start-sanitize-r5900
415Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
416
417 * interp.c (MAX_REG): Allow up-to 128 registers.
418 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
419 (REGISTER_SA): Ditto.
420 (sim_open): Initialize register_widths for r5900 specific
421 registers.
422 (sim_fetch_register, sim_store_register): Check for request of
423 r5900 specific SA register. Check for request for hi 64 bits of
424 r5900 specific registers.
425
426end-sanitize-r5900
26b20b0a
BM		 427Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
428
429 * configure: Regenerated.
430
6eedf3f4
MA		 431Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
432
433 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
434
e63bc706
AC		 435Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
436
6eedf3f4
MA		 437 * gencode.c (print_igen_insn_models): Assume certain architectures
438 include all mips* instructions.
439 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
440 instruction.
441
e63bc706
AC		 442 * Makefile.in (tmp.igen): Add target. Generate igen input from
443 gencode file.
444
445 * gencode.c (FEATURE_IGEN): Define.
446 (main): Add --igen option. Generate output in igen format.
447 (process_instructions): Format output according to igen option.
448 (print_igen_insn_format): New function.
449 (print_igen_insn_models): New function.
450 (process_instructions): Only issue warnings and ignore
451 instructions when no FEATURE_IGEN.
452
eb2e3c85
AC		 453Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
454
455 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
456 MIPS targets.
457
92f91d1f
AC		 458Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
459
460 * configure: Regenerated to track ../common/aclocal.m4 changes.
461
462Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
463
464 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
465 SIM_RESERVED_BITS): Delete, moved to common.
466 (SIM_EXTRA_CFLAGS): Update.
467
794e9ac9
AC		 468Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
469
76a6247f 470 * configure.in: Configure non-strict memory alignment.
794e9ac9
AC		 471 * configure: Regenerated to track ../common/aclocal.m4 changes.
472
b45caf05
AC		 473Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
474
475 * configure: Regenerated to track ../common/aclocal.m4 changes.
476
477Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
478
479 * gencode.c (SDBBP,DERET): Added (3900) insns.
480 (RFE): Turn on for 3900.
481 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
482 (dsstate): Made global.
483 (SUBTARGET_R3900): Added.
484 (CANCELDELAYSLOT): New.
485 (SignalException): Ignore SystemCall rather than ignore and
486 terminate. Add DebugBreakPoint handling.
487 (decode_coproc): New insns RFE, DERET; and new registers Debug
488 and DEPC protected by SUBTARGET_R3900.
489 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
490 bits explicitly.
491 * Makefile.in,configure.in: Add mips subtarget option.
492 * configure: Update.
493
7afa8d4e
GRK		 494Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
495
496 * gencode.c: Add r3900 (tx39).
497
498start-sanitize-tx19
499 * gencode.c: Fix some configuration problems by improving
500 the relationship between tx19 and tx39.
501end-sanitize-tx19
502
667065d0
GRK		 503Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
504
505 * gencode.c (build_instruction): Don't need to subtract 4 for
506 JALR, just 2.
507
9cb8397f
GRK		 508Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
509
510 * interp.c: Correct some HASFPU problems.
511
a2ab5e65
AC		 512Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
513
514 * configure: Regenerated to track ../common/aclocal.m4 changes.
515
11ac69e0
AC		 516Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
517
518 * interp.c (mips_options): Fix samples option short form, should
519 be `x'.
520
972f3a34
AC		 521Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
522
523 * interp.c (sim_info): Enable info code. Was just returning.
524
9eeaaefa
AC		 525Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
526
527 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
528 MFC0.
529
c31c13b4
AC		 530Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
531
532 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
533 constants.
534 (build_instruction): Ditto for LL.
535
b637f306
GRK		 536start-sanitize-tx19
537Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
538
539 * mips/configure.in, mips/gencode: Add tx19/r1900.
540
541end-sanitize-tx19
6fea4763
DE		 542Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
543
544 * configure: Regenerated to track ../common/aclocal.m4 changes.
545
52352d38
AC		 546start-sanitize-r5900
547Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
548
549 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
550 for overflow due to ABS of MININT, set result to MAXINT.
551 (build_instruction): For "psrlvw", signextend bit 31.
552
553end-sanitize-r5900
88117054
AC		 554Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
555
556 * configure: Regenerated to track ../common/aclocal.m4 changes.
557 * config.in: Ditto.
558
fafce69a
AC		 559Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
560
561 * interp.c (sim_open): Add call to sim_analyze_program, update
562 call to sim_config.
563
7230ff0f
AC		 564Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
565
566 * interp.c (sim_kill): Delete.
fafce69a
AC		 567 (sim_create_inferior): Add ABFD argument. Set PC from same.
568 (sim_load): Move code initializing trap handlers from here.
569 (sim_open): To here.
570 (sim_load): Delete, use sim-hload.c.
571
572 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
7230ff0f 573
247fccde
AC		 574Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
575
576 * configure: Regenerated to track ../common/aclocal.m4 changes.
577 * config.in: Ditto.
578
579Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
580
581 * interp.c (sim_open): Add ABFD argument.
582 (sim_load): Move call to sim_config from here.
583 (sim_open): To here. Check return status.
584
585start-sanitize-r5900
586 * gencode.c (build_instruction): Do not define x8000000000000000,
587 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
588
589end-sanitize-r5900
590start-sanitize-r5900
591Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
592
593 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
594 "pdivuw" check for overflow due to signed divide by -1.
595
596end-sanitize-r5900
c12e2e4c
GRK		 597Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
598
599 * gencode.c (build_instruction): Two arg MADD should
600 not assign result to $0.
601
1e851d2c
AC		 602start-sanitize-r5900
603Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
604
605 * gencode.c (build_instruction): For "ppac5" use unsigned
606 arrithmetic so that the sign bit doesn't smear when right shifted.
607 (build_instruction): For "pdiv" perform sign extension when
608 storing results in HI and LO.
609 (build_instructions): For "pdiv" and "pdivbw" check for
610 divide-by-zero.
611 (build_instruction): For "pmfhl.slw" update hi part of dest
612 register as well as low part.
613 (build_instruction): For "pmfhl" portably handle long long values.
614 (build_instruction): For "pmfhl.sh" correctly negative values.
615 Store half words 2 and three in the correct place.
616 (build_instruction): For "psllvw", sign extend value after shift.
617
618end-sanitize-r5900
619Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
620
621 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
622 * sim/mips/configure.in: Regenerate.
623
624Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
625
626 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
627 signed8, unsigned8 et.al. types.
628
629start-sanitize-r5900
630 * gencode.c (build_instruction): For PMULTU* do not sign extend
631 registers. Make generated code easier to debug.
632
633end-sanitize-r5900
634 * interp.c (SUB_REG_FETCH): Handle both little and big endian
635 hosts when selecting subreg.
636
637start-sanitize-r5900
638Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
639
640 * gencode.c (type_for_data_len): For 32bit operations concerned
641 with overflow, perform op using 64bits.
642 (build_instruction): For PADD, always compute operation using type
643 returned by type_for_data_len.
644 (build_instruction): For PSUBU, when overflow, saturate to zero as
645 actually underflow.
646
647end-sanitize-r5900
ae19b07b
JL		 648Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
649
649625bb 650start-sanitize-r5900
64435234
JL		 651 * gencode.c (build_instruction): Handle "pext5" according to
652 version 1.95 of the r5900 ISA.
653
649625bb
JL		 654 * gencode.c (build_instruction): Handle "ppac5" according to
655 version 1.95 of the r5900 ISA.
649625bb 656
1e851d2c 657end-sanitize-r5900
05d1322f
JL		 658 * interp.c (sim_engine_run): Reset the ZERO register to zero
659 regardless of FEATURE_WARN_ZERO.
ae19b07b
JL		 660 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
661
662Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
663
664 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
665 (SignalException): For BreakPoints ignore any mode bits and just
666 save the PC.
667 (SignalException): Always set the CAUSE register.
668
56e7c849
AC		 669Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
670
671 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
672 exception has been taken.
673
674 * interp.c: Implement the ERET and mt/f sr instructions.
675
ae19b07b 676start-sanitize-r5900
56e7c849
AC		 677Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
678
679 * gencode.c (build_instruction): For paddu, extract unsigned
680 sub-fields.
681
682 * gencode.c (build_instruction): Saturate padds instead of padd
683 instructions.
684
685end-sanitize-r5900
686Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
687
688 * interp.c (SignalException): Don't bother restarting an
689 interrupt.
690
691Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
692
693 * interp.c (SignalException): Really take an interrupt.
694 (interrupt_event): Only deliver interrupts when enabled.
695
696Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
697
698 * interp.c (sim_info): Only print info when verbose.
699 (sim_info) Use sim_io_printf for output.
700
2f2e6c5d
AC		 701Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
702
703 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
704 mips architectures.
705
706Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
707
708 * interp.c (sim_do_command): Check for common commands if a
709 simulator specific command fails.
710
d3d2a9f7
GRK		 711Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
712
713 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
714 and simBE when DEBUG is defined.
715
50a2a691
AC		 716Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
717
718 * interp.c (interrupt_event): New function. Pass exception event
719 onto exception handler.
720
721 * configure.in: Check for stdlib.h.
722 * configure: Regenerate.
723
724 * gencode.c (build_instruction): Add UNUSED attribute to tempS
725 variable declaration.
726 (build_instruction): Initialize memval1.
727 (build_instruction): Add UNUSED attribute to byte, bigend,
728 reverse.
729 (build_operands): Ditto.
730
731 * interp.c: Fix GCC warnings.
732 (sim_get_quit_code): Delete.
733
734 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
735 * Makefile.in: Ditto.
736 * configure: Re-generate.
737
738 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
739
740Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
741
742 * interp.c (mips_option_handler): New function parse argumes using
743 sim-options.
744 (myname): Replace with STATE_MY_NAME.
745 (sim_open): Delete check for host endianness - performed by
746 sim_config.
747 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
748 (sim_open): Move much of the initialization from here.
749 (sim_load): To here. After the image has been loaded and
750 endianness set.
751 (sim_open): Move ColdReset from here.
752 (sim_create_inferior): To here.
753 (sim_open): Make FP check less dependant on host endianness.
754
755 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
756 run.
757 * interp.c (sim_set_callbacks): Delete.
758
759 * interp.c (membank, membank_base, membank_size): Replace with
760 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
761 (sim_open): Remove call to callback->init. gdb/run do this.
762
763 * interp.c: Update
764
765 * sim-main.h (SIM_HAVE_FLATMEM): Define.
766
767 * interp.c (big_endian_p): Delete, replaced by
768 current_target_byte_order.
769
770Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
771
772 * interp.c (host_read_long, host_read_word, host_swap_word,
773 host_swap_long): Delete. Using common sim-endian.
774 (sim_fetch_register, sim_store_register): Use H2T.
775 (pipeline_ticks): Delete. Handled by sim-events.
776 (sim_info): Update.
777 (sim_engine_run): Update.
778
779Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
780
781 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
782 reason from here.
783 (SignalException): To here. Signal using sim_engine_halt.
784 (sim_stop_reason): Delete, moved to common.
785
786Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
787
788 * interp.c (sim_open): Add callback argument.
789 (sim_set_callbacks): Delete SIM_DESC argument.
790 (sim_size): Ditto.
791
2e61a3ad
AC		 792Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
793
794 * Makefile.in (SIM_OBJS): Add common modules.
795
796 * interp.c (sim_set_callbacks): Also set SD callback.
797 (set_endianness, xfer_*, swap_*): Delete.
798 (host_read_word, host_read_long, host_swap_word, host_swap_long):
799 Change to functions using sim-endian macros.
800 (control_c, sim_stop): Delete, use common version.
801 (simulate): Convert into.
802 (sim_engine_run): This function.
803 (sim_resume): Delete.
804
805 * interp.c (simulation): New variable - the simulator object.
806 (sim_kind): Delete global - merged into simulation.
807 (sim_load): Cleanup. Move PC assignment from here.
808 (sim_create_inferior): To here.
809
810 * sim-main.h: New file.
811 * interp.c (sim-main.h): Include.
812
813Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
814
815 * configure: Regenerated to track ../common/aclocal.m4 changes.
816
3be0e228
DE		 817Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
818
819 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
820
d654ba0a
GRK		 821Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
822
823 * gencode.c (build_instruction): DIV instructions: check
824 for division by zero and integer overflow before using
825 host's division operation.
826
9d52bcb7
DE		 827Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
828
829 * Makefile.in (SIM_OBJS): Add sim-load.o.
830 * interp.c: #include bfd.h.
831 (target_byte_order): Delete.
832 (sim_kind, myname, big_endian_p): New static locals.
833 (sim_open): Set sim_kind, myname. Move call to set_endianness to
834 after argument parsing. Recognize -E arg, set endianness accordingly.
835 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
836 load file into simulator. Set PC from bfd.
837 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
838 (set_endianness): Use big_endian_p instead of target_byte_order.
839
87e43259
AC		 840Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
841
842 * interp.c (sim_size): Delete prototype - conflicts with
843 definition in remote-sim.h. Correct definition.
844
845Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
846
847 * configure: Regenerated to track ../common/aclocal.m4 changes.
848 * config.in: Ditto.
849
fbda74b1
DE		 850Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
851
8a7c3105
DE		 852 * interp.c (sim_open): New arg `kind'.
853
fbda74b1
DE		 854 * configure: Regenerated to track ../common/aclocal.m4 changes.
855
a35e91c3
AC		 856Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
857
858 * configure: Regenerated to track ../common/aclocal.m4 changes.
859
860Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
861
862 * interp.c (sim_open): Set optind to 0 before calling getopt.
863
864Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
865
866 * configure: Regenerated to track ../common/aclocal.m4 changes.
867
6efa34d8
GRK		 868Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
869
870 * interp.c : Replace uses of pr_addr with pr_uword64
871 where the bit length is always 64 independent of SIM_ADDR.
872 (pr_uword64) : added.
873
a77aa7ec
AC		 874Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
875
876 * configure: Re-generate.
877
601fb8ae
MM		 878Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
879
880 * configure: Regenerate to track ../common/aclocal.m4 changes.
881
53b9417e
DE		 882Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
883
884 * interp.c (sim_open): New SIM_DESC result. Argument is now
885 in argv form.
886 (other sim_*): New SIM_DESC argument.
887
888start-sanitize-r5900
889Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
890
891 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
892 Change values to avoid overloading DOUBLEWORD which is tested
893 for all insns.
894 * gencode.c: reinstate "offending code".
53b9417e 895
56e7c849 896end-sanitize-r5900
53b9417e
DE		 897Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
898
899 * interp.c: Fix printing of addresses for non-64-bit targets.
900 (pr_addr): Add function to print address based on size.
901start-sanitize-r5900
902 * gencode.c: #ifdef out offending code until a permanent fix
903 can be added. Code is causing build errors for non-5900 mips targets.
904end-sanitize-r5900
905
906start-sanitize-r5900
907Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
908
909 * gencode.c (process_instructions): Correct test for ISA dependent
910 architecture bits in isa field of MIPS_DECODE.
911
912end-sanitize-r5900
7e05106d
MA		 913Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
914
915 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
916
2d18fbc6 917start-sanitize-r5900
53b9417e 918Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
2d18fbc6
GRK		 919
920 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
921 PMADDUW.
922
923end-sanitize-r5900
924Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
925
926 * gencode.c (build_mips16_operands): Correct computation of base
927 address for extended PC relative instruction.
928
276c2d7d
GRK		 929start-sanitize-r5900
930Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
2d18fbc6
GRK		 931
932 * Makefile.in, configure, configure.in, gencode.c,
933 interp.c, support.h: add r5900.
934
276c2d7d 935end-sanitize-r5900
da0bce9c
ILT		 936Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
937
938 * interp.c (mips16_entry): Add support for floating point cases.
939 (SignalException): Pass floating point cases to mips16_entry.
940 (ValueFPR): Don't restrict fmt_single and fmt_word to even
941 registers.
942 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
943 or fmt_word.
944 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
945 and then set the state to fmt_uninterpreted.
946 (COP_SW): Temporarily set the state to fmt_word while calling
947 ValueFPR.
948
6389d856
ILT		 949Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
950
951 * gencode.c (build_instruction): The high order may be set in the
952 comparison flags at any ISA level, not just ISA 4.
953
19c5af72
DE		 954Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
955
956 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
957 COMMON_{PRE,POST}_CONFIG_FRAG instead.
958 * configure.in: sinclude ../common/aclocal.m4.
959 * configure: Regenerated.
960
736a306c
ILT		 961Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
962
963 * configure: Rebuild after change to aclocal.m4.
964
295dbbe4
SG		 965Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
966
967 * configure configure.in Makefile.in: Update to new configure
968 scheme which is more compatible with WinGDB builds.
969 * configure.in: Improve comment on how to run autoconf.
970 * configure: Re-run autoconf to get new ../common/aclocal.m4.
971 * Makefile.in: Use autoconf substitution to install common
972 makefile fragment.
973
974Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
975
976 * gencode.c (build_instruction): Use BigEndianCPU instead of
977 ByteSwapMem.
978
e1db0d47
MA		 979Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
980
981 * interp.c (sim_monitor): Make output to stdout visible in
982 wingdb's I/O log window.
983
2902e8ab
MA		 984Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
985
986 * support.h: Undo previous change to SIGTRAP
987 and SIGQUIT values.
988
7e6c297e
ILT		 989Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
990
991 * interp.c (store_word, load_word): New static functions.
992 (mips16_entry): New static function.
993 (SignalException): Look for mips16 entry and exit instructions.
994 (simulate): Use the correct index when setting fpr_state after
995 doing a pending move.
996
0049ba7a
MA		 997Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
998
999 * interp.c: Fix byte-swapping code throughout to work on
1000 both little- and big-endian hosts.
1001
2510786b
MA		 1002Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1003
1004 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1005 with gdb/config/i386/xm-windows.h.
1006
39bf0ef4
MA		 1007Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1008
1009 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1010 that messes up arithmetic shifts.
1011
dbeec768
SG		 1012Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1013
1014 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1015 SIGTRAP and SIGQUIT for _WIN32.
1016
deffd638
ILT		 1017Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1018
1019 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1020 force a 64 bit multiplication.
1021 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1022 destination register is 0, since that is the default mips16 nop
1023 instruction.
1024
aaff8437
ILT		 1025Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1026
063443cf
ILT		 1027 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1028 (build_endian_shift): Don't check proc64.
1029 (build_instruction): Always set memval to uword64. Cast op2 to
1030 uword64 when shifting it left in memory instructions. Always use
1031 the same code for stores--don't special case proc64.
1032
aaff8437
ILT		 1033 * gencode.c (build_mips16_operands): Fix base PC value for PC
1034 relative operands.
1035 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1036 jal instruction.
1037 * interp.c (simJALDELAYSLOT): Define.
1038 (JALDELAYSLOT): Define.
1039 (INDELAYSLOT, INJALDELAYSLOT): Define.
1040 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1041
280f90e1
AMT		 1042Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1043
1044 * interp.c (sim_open): add flush_cache as a PMON routine
1045 (sim_monitor): handle flush_cache by ignoring it
1046
aaff8437
ILT		 1047Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1048
1049 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1050 BigEndianMem.
1051 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1052 (BigEndianMem): Rename to ByteSwapMem and change sense.
1053 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1054 BigEndianMem references to !ByteSwapMem.
1055 (set_endianness): New function, with prototype.
1056 (sim_open): Call set_endianness.
1057 (sim_info): Use simBE instead of BigEndianMem.
1058 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1059 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1060 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1061 ifdefs, keeping the prototype declaration.
1062 (swap_word): Rewrite correctly.
1063 (ColdReset): Delete references to CONFIG. Delete endianness related
1064 code; moved to set_endianness.
1065
6429b296
JW		 1066Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1067
1068 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1069 * interp.c (CHECKHILO): Define away.
1070 (simSIGINT): New macro.
1071 (membank_size): Increase from 1MB to 2MB.
1072 (control_c): New function.
1073 (sim_resume): Rename parameter signal to signal_number. Add local
1074 variable prev. Call signal before and after simulate.
1075 (sim_stop_reason): Add simSIGINT support.
1076 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1077 functions always.
1078 (sim_warning): Delete call to SignalException. Do call printf_filtered
1079 if logfh is NULL.
1080 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1081 a call to sim_warning.
1082
1083Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1084
1085 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1086 16 bit instructions.
1087
831f59a2
ILT		 1088Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1089
1090 Add support for mips16 (16 bit MIPS implementation):
1091 * gencode.c (inst_type): Add mips16 instruction encoding types.
1092 (GETDATASIZEINSN): Define.
1093 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1094 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1095 mtlo.
1096 (MIPS16_DECODE): New table, for mips16 instructions.
1097 (bitmap_val): New static function.
1098 (struct mips16_op): Define.
1099 (mips16_op_table): New table, for mips16 operands.
1100 (build_mips16_operands): New static function.
1101 (process_instructions): If PC is odd, decode a mips16
1102 instruction. Break out instruction handling into new
1103 build_instruction function.
1104 (build_instruction): New static function, broken out of
1105 process_instructions. Check modifiers rather than flags for SHIFT
1106 bit count and m[ft]{hi,lo} direction.
1107 (usage): Pass program name to fprintf.
1108 (main): Remove unused variable this_option_optind. Change
1109 ``*loptarg++'' to ``loptarg++''.
1110 (my_strtoul): Parenthesize && within ||.
350d33b8 1111 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
831f59a2
ILT		 1112 (simulate): If PC is odd, fetch a 16 bit instruction, and
1113 increment PC by 2 rather than 4.
1114 * configure.in: Add case for mips16*-*-*.
1115 * configure: Rebuild.
1116
1117Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1118
1119 * interp.c: Allow -t to enable tracing in standalone simulator.
1120 Fix garbage output in trace file and error messages.
1121
e3d12c65
DE		 1122Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1123
1124 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1125 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1126 * configure.in: Simplify using macros in ../common/aclocal.m4.
1127 * configure: Regenerated.
1128 * tconfig.in: New file.
1129
1130Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1131
1132 * interp.c: Fix bugs in 64-bit port.
1133 Use ansi function declarations for msvc compiler.
1134 Initialize and test file pointer in trace code.
1135 Prevent duplicate definition of LAST_EMED_REGNUM.
1136
1137Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1138
1139 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1140
1141Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1142
1143 * interp.c (SignalException): Check for explicit terminating
1144 breakpoint value.
1145 * gencode.c: Pass instruction value through SignalException()
1146 calls for Trap, Breakpoint and Syscall.
1147
1148Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1149
1150 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1151 only used on those hosts that provide it.
1152 * configure.in: Add sqrt() to list of functions to be checked for.
1153 * config.in: Re-generated.
1154 * configure: Re-generated.
1155
1156Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1157
1158 * gencode.c (process_instructions): Call build_endian_shift when
1159 expanding STORE RIGHT, to fix swr.
1160 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1161 clear the high bits.
1162 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1163 Fix float to int conversions to produce signed values.
1164
cc5201d7
ILT		 1165Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1166
458e1f58
ILT		 1167 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1168 (process_instructions): Correct handling of nor instruction.
1169 Correct shift count for 32 bit shift instructions. Correct sign
1170 extension for arithmetic shifts to not shift the number of bits in
1171 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1172 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1173 Fix madd.
c05d1721
ILT		 1174 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1175 It's OK to have a mult follow a mult. What's not OK is to have a
1176 mult follow an mfhi.
458e1f58 1177 (Convert): Comment out incorrect rounding code.
cc5201d7 1178
f24b7b69
JSC		 1179Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1180
1181 * interp.c (sim_monitor): Improved monitor printf
1182 simulation. Tidied up simulator warnings, and added "--log" option
1183 for directing warning message output.
1184 * gencode.c: Use sim_warning() rather than WARNING macro.
1185
1186Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1187
1188 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1189 getopt1.o, rather than on gencode.c. Link objects together.
1190 Don't link against -liberty.
1191 (gencode.o, getopt.o, getopt1.o): New targets.
1192 * gencode.c: Include <ctype.h> and "ansidecl.h".
1193 (AND): Undefine after including "ansidecl.h".
1194 (ULONG_MAX): Define if not defined.
1195 (OP_*): Don't define macros; now defined in opcode/mips.h.
1196 (main): Call my_strtoul rather than strtoul.
1197 (my_strtoul): New static function.
1198
1199Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1200
1201 * gencode.c (process_instructions): Generate word64 and uword64
1202 instead of `long long' and `unsigned long long' data types.
1203 * interp.c: #include sysdep.h to get signals, and define default
1204 for SIGBUS.
1205 * (Convert): Work around for Visual-C++ compiler bug with type
1206 conversion.
1207 * support.h: Make things compile under Visual-C++ by using
1208 __int64 instead of `long long'. Change many refs to long long
1209 into word64/uword64 typedefs.
1210
a271d1d9
JM		 1211Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1212
1213 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1214 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1215 (docdir): Removed.
1216 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1217 (AC_PROG_INSTALL): Added.
1218 (AC_PROG_CC): Moved to before configure.host call.
1219 * configure: Rebuilt.
1220
1221Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1222
1223 * configure.in: Define @SIMCONF@ depending on mips target.
1224 * configure: Rebuild.
1225 * Makefile.in (run): Add @SIMCONF@ to control simulator
1226 construction.
1227 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1228 * interp.c: Remove some debugging, provide more detailed error
1229 messages, update memory accesses to use LOADDRMASK.
1230
4fa134be
ILT		 1231Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1232
1233 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1234 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1235 stamp-h.
1236 * configure: Rebuild.
1237 * config.in: New file, generated by autoheader.
1238 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1239 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1240 HAVE_ANINT and HAVE_AINT, as appropriate.
1241 * Makefile.in (run): Use @LIBS@ rather than -lm.
1242 (interp.o): Depend upon config.h.
1243 (Makefile): Just rebuild Makefile.
1244 (clean): Remove stamp-h.
1245 (mostlyclean): Make the same as clean, not as distclean.
1246 (config.h, stamp-h): New targets.
1247
1248Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1249
1250 * interp.c (ColdReset): Fix boolean test. Make all simulator
1251 globals static.
1252
f7481d45
JSC		 1253Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1254
1255 * interp.c (xfer_direct_word, xfer_direct_long,
1256 swap_direct_word, swap_direct_long, xfer_big_word,
1257 xfer_big_long, xfer_little_word, xfer_little_long,
1258 swap_word,swap_long): Added.
1259 * interp.c (ColdReset): Provide function indirection to
1260 host<->simulated_target transfer routines.
1261 * interp.c (sim_store_register, sim_fetch_register): Updated to
1262 make use of indirected transfer routines.
1263
1264Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1265
1266 * gencode.c (process_instructions): Ensure FP ABS instruction
1267 recognised.
1268 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1269 system call support.
1270
8b554809
JSC		 1271Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1272
1273 * interp.c (sim_do_command): Complain if callback structure not
1274 initialised.
1275
d0757082
JSC		 1276Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1277
1278 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1279 support for Sun hosts.
1280 * Makefile.in (gencode): Ensure the host compiler and libraries
1281 used for cross-hosted build.
1282
e871dd18
JSC		 1283Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1284
1285 * interp.c, gencode.c: Some more (TODO) tidying.
1286
1287Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1288
1289 * gencode.c, interp.c: Replaced explicit long long references with
1290 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1291 * support.h (SET64LO, SET64HI): Macros added.
1292
5c59ec43
ILT		 1293Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1294
1295 * configure: Regenerate with autoconf 2.7.
1296
1297Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1298
1299 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1300 * support.h: Remove superfluous "1" from #if.
1301 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1302
1303Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1304
1305 * interp.c (StoreFPR): Control UndefinedResult() call on
1306 WARN_RESULT manifest.
1307
8bae0a0c
JSC		 1308Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1309
1310 * gencode.c: Tidied instruction decoding, and added FP instruction
1311 support.
1312
1313 * interp.c: Added dineroIII, and BSD profiling support. Also
1314 run-time FP handling.
1315
1316Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1317
1318 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1319 gencode.c, interp.c, support.h: created.
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