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Checkpoint IGEN version of mips sim
[deliverable/binutils-gdb.git] / sim / mips / ChangeLog
CommitLineData
92ad193b
AC		 1Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
4 macro to obtain result of ALU op.
5
aa324b9b
AC		 6Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
7
8 * interp.c (sim_info): Call profile_print.
9
e2f8ffb7
AC		 10Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
11
12 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
13
14 * sim-main.h (WITH_PROFILE): Do not define, defined in
15 common/sim-config.h. Use sim-profile module.
16 (simPROFILE): Delete defintion.
17
18 * interp.c (PROFILE): Delete definition.
19 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
20 (sim_close): Delete code writing profile histogram.
21 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
22 Delete.
23 (sim_engine_run): Delete code profiling the PC.
24
fb5a2a3e
AC		 25Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
26
27 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
28
29 * interp.c (sim_monitor): Make register pointers of type
30 unsigned_word*.
31
32 * sim-main.h: Make registers of type unsigned_word not
33 signed_word.
34
ea985d24
AC		 35Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
36
37start-sanitize-r5900
38 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
39 ...): Move to sim-main.h
40
41end-sanitize-r5900
42 * interp.c (sync_operation): Rename from SyncOperation, make
43 global, add SD argument.
44 (prefetch): Rename from Prefetch, make global, add SD argument.
45 (decode_coproc): Make global.
46
47 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
48
49 * gencode.c (build_instruction): Generate DecodeCoproc not
50 decode_coproc calls.
51
52 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
53 (SizeFGR): Move to sim-main.h
54 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
55 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
56 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
57 sim-main.h.
58 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
59 FP_RM_TOMINF, GETRM): Move to sim-main.h.
60 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
61 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
62 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
63 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
64
65 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
66 exception.
67 (sim-alu.h): Include.
68 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
69 (sim_cia): Typedef to instruction_address.
70
284e759d
AC		 71Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
72
73 * Makefile.in (interp.o): Rename generated file engine.c to
74 oengine.c.
75
76 * interp.c: Update.
77
339fb149
AC		 78Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
79
80 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
81
8b70f837
AC		 82Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
83
84 * gencode.c (build_instruction): For "FPSQRT", output correct
85 number of arguments to Recip.
86
0c2c5f61
AC		 87Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
88
89 * Makefile.in (interp.o): Depends on sim-main.h
90
91 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
92
93 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
94 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
95 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
96 STATE, DSSTATE): Define
97 (GPR, FGRIDX, ..): Define.
98
99 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
100 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
101 (GPR, FGRIDX, ...): Delete macros.
102
103 * interp.c: Update names to match defines from sim-main.h
104
18c64df6
AC		 105Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
106
107 * interp.c (sim_monitor): Add SD argument.
108 (sim_warning): Delete. Replace calls with calls to
109 sim_io_eprintf.
110 (sim_error): Delete. Replace calls with sim_io_error.
111 (open_trace, writeout32, writeout16, getnum): Add SD argument.
112 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
113 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
114 argument.
115 (mips_size): Rename from sim_size. Add SD argument.
116
117 * interp.c (simulator): Delete global variable.
118 (callback): Delete global variable.
119 (mips_option_handler, sim_open, sim_write, sim_read,
120 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
121 sim_size,sim_monitor): Use sim_io_* not callback->*.
122 (sim_open): ZALLOC simulator struct.
123 (PROFILE): Do not define.
124
125Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
126
127 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
128 support.h with corresponding code.
129
130 * sim-main.h (word64, uword64), support.h: Move definition to
131 sim-main.h.
132 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
133
134 * support.h: Delete
135 * Makefile.in: Update dependencies
136 * interp.c: Do not include.
137
138Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
139
140 * interp.c (address_translation, load_memory, store_memory,
141 cache_op): Rename to from AddressTranslation et.al., make global,
142 add SD argument
143
144 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
145 CacheOp): Define.
146
147 * interp.c (SignalException): Rename to signal_exception, make
148 global.
149
150 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
151
152 * sim-main.h (SignalException, SignalExceptionInterrupt,
153 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
154 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
155 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
156 Define.
157
158 * interp.c, support.h: Use.
159
160Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
161
162 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
163 to value_fpr / store_fpr. Add SD argument.
164 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
165 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
166
167 * sim-main.h (ValueFPR, StoreFPR): Define.
168
169Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
170
171 * interp.c (sim_engine_run): Check consistency between configure
172 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
173 and HASFPU.
174
175 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
176 (mips_fpu): Configure WITH_FLOATING_POINT.
177 (mips_endian): Configure WITH_TARGET_ENDIAN.
178 * configure: Update.
179
180Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
181
182 * configure: Regenerated to track ../common/aclocal.m4 changes.
183
adf4739e
AC		 184start-sanitize-r5900
185Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
186
187 * interp.c (MAX_REG): Allow up-to 128 registers.
188 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
189 (REGISTER_SA): Ditto.
190 (sim_open): Initialize register_widths for r5900 specific
191 registers.
192 (sim_fetch_register, sim_store_register): Check for request of
193 r5900 specific SA register. Check for request for hi 64 bits of
194 r5900 specific registers.
195
196end-sanitize-r5900
26b20b0a
BM		 197Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
198
199 * configure: Regenerated.
200
6eedf3f4
MA		 201Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
202
203 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
204
e63bc706
AC		 205Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
206
6eedf3f4
MA		 207 * gencode.c (print_igen_insn_models): Assume certain architectures
208 include all mips* instructions.
209 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
210 instruction.
211
e63bc706
AC		 212 * Makefile.in (tmp.igen): Add target. Generate igen input from
213 gencode file.
214
215 * gencode.c (FEATURE_IGEN): Define.
216 (main): Add --igen option. Generate output in igen format.
217 (process_instructions): Format output according to igen option.
218 (print_igen_insn_format): New function.
219 (print_igen_insn_models): New function.
220 (process_instructions): Only issue warnings and ignore
221 instructions when no FEATURE_IGEN.
222
eb2e3c85
AC		 223Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
224
225 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
226 MIPS targets.
227
92f91d1f
AC		 228Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
229
230 * configure: Regenerated to track ../common/aclocal.m4 changes.
231
232Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
233
234 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
235 SIM_RESERVED_BITS): Delete, moved to common.
236 (SIM_EXTRA_CFLAGS): Update.
237
794e9ac9
AC		 238Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
239
76a6247f 240 * configure.in: Configure non-strict memory alignment.
794e9ac9
AC		 241 * configure: Regenerated to track ../common/aclocal.m4 changes.
242
b45caf05
AC		 243Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
244
245 * configure: Regenerated to track ../common/aclocal.m4 changes.
246
247Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
248
249 * gencode.c (SDBBP,DERET): Added (3900) insns.
250 (RFE): Turn on for 3900.
251 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
252 (dsstate): Made global.
253 (SUBTARGET_R3900): Added.
254 (CANCELDELAYSLOT): New.
255 (SignalException): Ignore SystemCall rather than ignore and
256 terminate. Add DebugBreakPoint handling.
257 (decode_coproc): New insns RFE, DERET; and new registers Debug
258 and DEPC protected by SUBTARGET_R3900.
259 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
260 bits explicitly.
261 * Makefile.in,configure.in: Add mips subtarget option.
262 * configure: Update.
263
7afa8d4e
GRK		 264Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
265
266 * gencode.c: Add r3900 (tx39).
267
268start-sanitize-tx19
269 * gencode.c: Fix some configuration problems by improving
270 the relationship between tx19 and tx39.
271end-sanitize-tx19
272
667065d0
GRK		 273Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
274
275 * gencode.c (build_instruction): Don't need to subtract 4 for
276 JALR, just 2.
277
9cb8397f
GRK		 278Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
279
280 * interp.c: Correct some HASFPU problems.
281
a2ab5e65
AC		 282Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
283
284 * configure: Regenerated to track ../common/aclocal.m4 changes.
285
11ac69e0
AC		 286Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
287
288 * interp.c (mips_options): Fix samples option short form, should
289 be `x'.
290
972f3a34
AC		 291Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
292
293 * interp.c (sim_info): Enable info code. Was just returning.
294
9eeaaefa
AC		 295Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
296
297 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
298 MFC0.
299
c31c13b4
AC		 300Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
301
302 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
303 constants.
304 (build_instruction): Ditto for LL.
305
b637f306
GRK		 306start-sanitize-tx19
307Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
308
309 * mips/configure.in, mips/gencode: Add tx19/r1900.
310
311end-sanitize-tx19
6fea4763
DE		 312Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
313
314 * configure: Regenerated to track ../common/aclocal.m4 changes.
315
52352d38
AC		 316start-sanitize-r5900
317Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
318
319 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
320 for overflow due to ABS of MININT, set result to MAXINT.
321 (build_instruction): For "psrlvw", signextend bit 31.
322
323end-sanitize-r5900
88117054
AC		 324Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
325
326 * configure: Regenerated to track ../common/aclocal.m4 changes.
327 * config.in: Ditto.
328
fafce69a
AC		 329Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
330
331 * interp.c (sim_open): Add call to sim_analyze_program, update
332 call to sim_config.
333
7230ff0f
AC		 334Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
335
336 * interp.c (sim_kill): Delete.
fafce69a
AC		 337 (sim_create_inferior): Add ABFD argument. Set PC from same.
338 (sim_load): Move code initializing trap handlers from here.
339 (sim_open): To here.
340 (sim_load): Delete, use sim-hload.c.
341
342 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
7230ff0f 343
247fccde
AC		 344Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
345
346 * configure: Regenerated to track ../common/aclocal.m4 changes.
347 * config.in: Ditto.
348
349Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
350
351 * interp.c (sim_open): Add ABFD argument.
352 (sim_load): Move call to sim_config from here.
353 (sim_open): To here. Check return status.
354
355start-sanitize-r5900
356 * gencode.c (build_instruction): Do not define x8000000000000000,
357 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
358
359end-sanitize-r5900
360start-sanitize-r5900
361Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
362
363 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
364 "pdivuw" check for overflow due to signed divide by -1.
365
366end-sanitize-r5900
c12e2e4c
GRK		 367Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
368
369 * gencode.c (build_instruction): Two arg MADD should
370 not assign result to $0.
371
1e851d2c
AC		 372start-sanitize-r5900
373Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
374
375 * gencode.c (build_instruction): For "ppac5" use unsigned
376 arrithmetic so that the sign bit doesn't smear when right shifted.
377 (build_instruction): For "pdiv" perform sign extension when
378 storing results in HI and LO.
379 (build_instructions): For "pdiv" and "pdivbw" check for
380 divide-by-zero.
381 (build_instruction): For "pmfhl.slw" update hi part of dest
382 register as well as low part.
383 (build_instruction): For "pmfhl" portably handle long long values.
384 (build_instruction): For "pmfhl.sh" correctly negative values.
385 Store half words 2 and three in the correct place.
386 (build_instruction): For "psllvw", sign extend value after shift.
387
388end-sanitize-r5900
389Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
390
391 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
392 * sim/mips/configure.in: Regenerate.
393
394Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
395
396 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
397 signed8, unsigned8 et.al. types.
398
399start-sanitize-r5900
400 * gencode.c (build_instruction): For PMULTU* do not sign extend
401 registers. Make generated code easier to debug.
402
403end-sanitize-r5900
404 * interp.c (SUB_REG_FETCH): Handle both little and big endian
405 hosts when selecting subreg.
406
407start-sanitize-r5900
408Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
409
410 * gencode.c (type_for_data_len): For 32bit operations concerned
411 with overflow, perform op using 64bits.
412 (build_instruction): For PADD, always compute operation using type
413 returned by type_for_data_len.
414 (build_instruction): For PSUBU, when overflow, saturate to zero as
415 actually underflow.
416
417end-sanitize-r5900
ae19b07b
JL		 418Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
419
649625bb 420start-sanitize-r5900
64435234
JL		 421 * gencode.c (build_instruction): Handle "pext5" according to
422 version 1.95 of the r5900 ISA.
423
649625bb
JL		 424 * gencode.c (build_instruction): Handle "ppac5" according to
425 version 1.95 of the r5900 ISA.
649625bb 426
1e851d2c 427end-sanitize-r5900
05d1322f
JL		 428 * interp.c (sim_engine_run): Reset the ZERO register to zero
429 regardless of FEATURE_WARN_ZERO.
ae19b07b
JL		 430 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
431
432Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
433
434 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
435 (SignalException): For BreakPoints ignore any mode bits and just
436 save the PC.
437 (SignalException): Always set the CAUSE register.
438
56e7c849
AC		 439Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
440
441 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
442 exception has been taken.
443
444 * interp.c: Implement the ERET and mt/f sr instructions.
445
ae19b07b 446start-sanitize-r5900
56e7c849
AC		 447Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
448
449 * gencode.c (build_instruction): For paddu, extract unsigned
450 sub-fields.
451
452 * gencode.c (build_instruction): Saturate padds instead of padd
453 instructions.
454
455end-sanitize-r5900
456Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
457
458 * interp.c (SignalException): Don't bother restarting an
459 interrupt.
460
461Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
462
463 * interp.c (SignalException): Really take an interrupt.
464 (interrupt_event): Only deliver interrupts when enabled.
465
466Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
467
468 * interp.c (sim_info): Only print info when verbose.
469 (sim_info) Use sim_io_printf for output.
470
2f2e6c5d
AC		 471Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
472
473 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
474 mips architectures.
475
476Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
477
478 * interp.c (sim_do_command): Check for common commands if a
479 simulator specific command fails.
480
d3d2a9f7
GRK		 481Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
482
483 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
484 and simBE when DEBUG is defined.
485
50a2a691
AC		 486Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
487
488 * interp.c (interrupt_event): New function. Pass exception event
489 onto exception handler.
490
491 * configure.in: Check for stdlib.h.
492 * configure: Regenerate.
493
494 * gencode.c (build_instruction): Add UNUSED attribute to tempS
495 variable declaration.
496 (build_instruction): Initialize memval1.
497 (build_instruction): Add UNUSED attribute to byte, bigend,
498 reverse.
499 (build_operands): Ditto.
500
501 * interp.c: Fix GCC warnings.
502 (sim_get_quit_code): Delete.
503
504 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
505 * Makefile.in: Ditto.
506 * configure: Re-generate.
507
508 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
509
510Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
511
512 * interp.c (mips_option_handler): New function parse argumes using
513 sim-options.
514 (myname): Replace with STATE_MY_NAME.
515 (sim_open): Delete check for host endianness - performed by
516 sim_config.
517 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
518 (sim_open): Move much of the initialization from here.
519 (sim_load): To here. After the image has been loaded and
520 endianness set.
521 (sim_open): Move ColdReset from here.
522 (sim_create_inferior): To here.
523 (sim_open): Make FP check less dependant on host endianness.
524
525 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
526 run.
527 * interp.c (sim_set_callbacks): Delete.
528
529 * interp.c (membank, membank_base, membank_size): Replace with
530 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
531 (sim_open): Remove call to callback->init. gdb/run do this.
532
533 * interp.c: Update
534
535 * sim-main.h (SIM_HAVE_FLATMEM): Define.
536
537 * interp.c (big_endian_p): Delete, replaced by
538 current_target_byte_order.
539
540Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
541
542 * interp.c (host_read_long, host_read_word, host_swap_word,
543 host_swap_long): Delete. Using common sim-endian.
544 (sim_fetch_register, sim_store_register): Use H2T.
545 (pipeline_ticks): Delete. Handled by sim-events.
546 (sim_info): Update.
547 (sim_engine_run): Update.
548
549Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
550
551 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
552 reason from here.
553 (SignalException): To here. Signal using sim_engine_halt.
554 (sim_stop_reason): Delete, moved to common.
555
556Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
557
558 * interp.c (sim_open): Add callback argument.
559 (sim_set_callbacks): Delete SIM_DESC argument.
560 (sim_size): Ditto.
561
2e61a3ad
AC		 562Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
563
564 * Makefile.in (SIM_OBJS): Add common modules.
565
566 * interp.c (sim_set_callbacks): Also set SD callback.
567 (set_endianness, xfer_*, swap_*): Delete.
568 (host_read_word, host_read_long, host_swap_word, host_swap_long):
569 Change to functions using sim-endian macros.
570 (control_c, sim_stop): Delete, use common version.
571 (simulate): Convert into.
572 (sim_engine_run): This function.
573 (sim_resume): Delete.
574
575 * interp.c (simulation): New variable - the simulator object.
576 (sim_kind): Delete global - merged into simulation.
577 (sim_load): Cleanup. Move PC assignment from here.
578 (sim_create_inferior): To here.
579
580 * sim-main.h: New file.
581 * interp.c (sim-main.h): Include.
582
583Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
584
585 * configure: Regenerated to track ../common/aclocal.m4 changes.
586
3be0e228
DE		 587Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
588
589 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
590
d654ba0a
GRK		 591Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
592
593 * gencode.c (build_instruction): DIV instructions: check
594 for division by zero and integer overflow before using
595 host's division operation.
596
9d52bcb7
DE		 597Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
598
599 * Makefile.in (SIM_OBJS): Add sim-load.o.
600 * interp.c: #include bfd.h.
601 (target_byte_order): Delete.
602 (sim_kind, myname, big_endian_p): New static locals.
603 (sim_open): Set sim_kind, myname. Move call to set_endianness to
604 after argument parsing. Recognize -E arg, set endianness accordingly.
605 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
606 load file into simulator. Set PC from bfd.
607 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
608 (set_endianness): Use big_endian_p instead of target_byte_order.
609
87e43259
AC		 610Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
611
612 * interp.c (sim_size): Delete prototype - conflicts with
613 definition in remote-sim.h. Correct definition.
614
615Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
616
617 * configure: Regenerated to track ../common/aclocal.m4 changes.
618 * config.in: Ditto.
619
fbda74b1
DE		 620Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
621
8a7c3105
DE		 622 * interp.c (sim_open): New arg `kind'.
623
fbda74b1
DE		 624 * configure: Regenerated to track ../common/aclocal.m4 changes.
625
a35e91c3
AC		 626Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
627
628 * configure: Regenerated to track ../common/aclocal.m4 changes.
629
630Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
631
632 * interp.c (sim_open): Set optind to 0 before calling getopt.
633
634Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
635
636 * configure: Regenerated to track ../common/aclocal.m4 changes.
637
6efa34d8
GRK		 638Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
639
640 * interp.c : Replace uses of pr_addr with pr_uword64
641 where the bit length is always 64 independent of SIM_ADDR.
642 (pr_uword64) : added.
643
a77aa7ec
AC		 644Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
645
646 * configure: Re-generate.
647
601fb8ae
MM		 648Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
649
650 * configure: Regenerate to track ../common/aclocal.m4 changes.
651
53b9417e
DE		 652Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
653
654 * interp.c (sim_open): New SIM_DESC result. Argument is now
655 in argv form.
656 (other sim_*): New SIM_DESC argument.
657
658start-sanitize-r5900
659Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
660
661 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
662 Change values to avoid overloading DOUBLEWORD which is tested
663 for all insns.
664 * gencode.c: reinstate "offending code".
53b9417e 665
56e7c849 666end-sanitize-r5900
53b9417e
DE		 667Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
668
669 * interp.c: Fix printing of addresses for non-64-bit targets.
670 (pr_addr): Add function to print address based on size.
671start-sanitize-r5900
672 * gencode.c: #ifdef out offending code until a permanent fix
673 can be added. Code is causing build errors for non-5900 mips targets.
674end-sanitize-r5900
675
676start-sanitize-r5900
677Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
678
679 * gencode.c (process_instructions): Correct test for ISA dependent
680 architecture bits in isa field of MIPS_DECODE.
681
682end-sanitize-r5900
7e05106d
MA		 683Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
684
685 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
686
2d18fbc6 687start-sanitize-r5900
53b9417e 688Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
2d18fbc6
GRK		 689
690 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
691 PMADDUW.
692
693end-sanitize-r5900
694Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
695
696 * gencode.c (build_mips16_operands): Correct computation of base
697 address for extended PC relative instruction.
698
276c2d7d
GRK		 699start-sanitize-r5900
700Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
2d18fbc6
GRK		 701
702 * Makefile.in, configure, configure.in, gencode.c,
703 interp.c, support.h: add r5900.
704
276c2d7d 705end-sanitize-r5900
da0bce9c
ILT		 706Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
707
708 * interp.c (mips16_entry): Add support for floating point cases.
709 (SignalException): Pass floating point cases to mips16_entry.
710 (ValueFPR): Don't restrict fmt_single and fmt_word to even
711 registers.
712 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
713 or fmt_word.
714 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
715 and then set the state to fmt_uninterpreted.
716 (COP_SW): Temporarily set the state to fmt_word while calling
717 ValueFPR.
718
6389d856
ILT		 719Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
720
721 * gencode.c (build_instruction): The high order may be set in the
722 comparison flags at any ISA level, not just ISA 4.
723
19c5af72
DE		 724Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
725
726 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
727 COMMON_{PRE,POST}_CONFIG_FRAG instead.
728 * configure.in: sinclude ../common/aclocal.m4.
729 * configure: Regenerated.
730
736a306c
ILT		 731Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
732
733 * configure: Rebuild after change to aclocal.m4.
734
295dbbe4
SG		 735Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
736
737 * configure configure.in Makefile.in: Update to new configure
738 scheme which is more compatible with WinGDB builds.
739 * configure.in: Improve comment on how to run autoconf.
740 * configure: Re-run autoconf to get new ../common/aclocal.m4.
741 * Makefile.in: Use autoconf substitution to install common
742 makefile fragment.
743
744Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
745
746 * gencode.c (build_instruction): Use BigEndianCPU instead of
747 ByteSwapMem.
748
e1db0d47
MA		 749Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
750
751 * interp.c (sim_monitor): Make output to stdout visible in
752 wingdb's I/O log window.
753
2902e8ab
MA		 754Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
755
756 * support.h: Undo previous change to SIGTRAP
757 and SIGQUIT values.
758
7e6c297e
ILT		 759Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
760
761 * interp.c (store_word, load_word): New static functions.
762 (mips16_entry): New static function.
763 (SignalException): Look for mips16 entry and exit instructions.
764 (simulate): Use the correct index when setting fpr_state after
765 doing a pending move.
766
0049ba7a
MA		 767Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
768
769 * interp.c: Fix byte-swapping code throughout to work on
770 both little- and big-endian hosts.
771
2510786b
MA		 772Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
773
774 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
775 with gdb/config/i386/xm-windows.h.
776
39bf0ef4
MA		 777Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
778
779 * gencode.c (build_instruction): Work around MSVC++ code gen bug
780 that messes up arithmetic shifts.
781
dbeec768
SG		 782Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
783
784 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
785 SIGTRAP and SIGQUIT for _WIN32.
786
deffd638
ILT		 787Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
788
789 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
790 force a 64 bit multiplication.
791 (build_instruction) [OR]: In mips16 mode, don't do anything if the
792 destination register is 0, since that is the default mips16 nop
793 instruction.
794
aaff8437
ILT		 795Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
796
063443cf
ILT		 797 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
798 (build_endian_shift): Don't check proc64.
799 (build_instruction): Always set memval to uword64. Cast op2 to
800 uword64 when shifting it left in memory instructions. Always use
801 the same code for stores--don't special case proc64.
802
aaff8437
ILT		 803 * gencode.c (build_mips16_operands): Fix base PC value for PC
804 relative operands.
805 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
806 jal instruction.
807 * interp.c (simJALDELAYSLOT): Define.
808 (JALDELAYSLOT): Define.
809 (INDELAYSLOT, INJALDELAYSLOT): Define.
810 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
811
280f90e1
AMT		 812Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
813
814 * interp.c (sim_open): add flush_cache as a PMON routine
815 (sim_monitor): handle flush_cache by ignoring it
816
aaff8437
ILT		 817Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
818
819 * gencode.c (build_instruction): Use !ByteSwapMem instead of
820 BigEndianMem.
821 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
822 (BigEndianMem): Rename to ByteSwapMem and change sense.
823 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
824 BigEndianMem references to !ByteSwapMem.
825 (set_endianness): New function, with prototype.
826 (sim_open): Call set_endianness.
827 (sim_info): Use simBE instead of BigEndianMem.
828 (xfer_direct_word, xfer_direct_long, swap_direct_word,
829 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
830 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
831 ifdefs, keeping the prototype declaration.
832 (swap_word): Rewrite correctly.
833 (ColdReset): Delete references to CONFIG. Delete endianness related
834 code; moved to set_endianness.
835
6429b296
JW		 836Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
837
838 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
839 * interp.c (CHECKHILO): Define away.
840 (simSIGINT): New macro.
841 (membank_size): Increase from 1MB to 2MB.
842 (control_c): New function.
843 (sim_resume): Rename parameter signal to signal_number. Add local
844 variable prev. Call signal before and after simulate.
845 (sim_stop_reason): Add simSIGINT support.
846 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
847 functions always.
848 (sim_warning): Delete call to SignalException. Do call printf_filtered
849 if logfh is NULL.
850 (AddressTranslation): Add #ifdef DEBUG around debugging message and
851 a call to sim_warning.
852
853Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
854
855 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
856 16 bit instructions.
857
831f59a2
ILT		 858Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
859
860 Add support for mips16 (16 bit MIPS implementation):
861 * gencode.c (inst_type): Add mips16 instruction encoding types.
862 (GETDATASIZEINSN): Define.
863 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
864 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
865 mtlo.
866 (MIPS16_DECODE): New table, for mips16 instructions.
867 (bitmap_val): New static function.
868 (struct mips16_op): Define.
869 (mips16_op_table): New table, for mips16 operands.
870 (build_mips16_operands): New static function.
871 (process_instructions): If PC is odd, decode a mips16
872 instruction. Break out instruction handling into new
873 build_instruction function.
874 (build_instruction): New static function, broken out of
875 process_instructions. Check modifiers rather than flags for SHIFT
876 bit count and m[ft]{hi,lo} direction.
877 (usage): Pass program name to fprintf.
878 (main): Remove unused variable this_option_optind. Change
879 ``*loptarg++'' to ``loptarg++''.
880 (my_strtoul): Parenthesize && within ||.
350d33b8 881 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
831f59a2
ILT		 882 (simulate): If PC is odd, fetch a 16 bit instruction, and
883 increment PC by 2 rather than 4.
884 * configure.in: Add case for mips16*-*-*.
885 * configure: Rebuild.
886
887Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
888
889 * interp.c: Allow -t to enable tracing in standalone simulator.
890 Fix garbage output in trace file and error messages.
891
e3d12c65
DE		 892Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
893
894 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
895 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
896 * configure.in: Simplify using macros in ../common/aclocal.m4.
897 * configure: Regenerated.
898 * tconfig.in: New file.
899
900Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
901
902 * interp.c: Fix bugs in 64-bit port.
903 Use ansi function declarations for msvc compiler.
904 Initialize and test file pointer in trace code.
905 Prevent duplicate definition of LAST_EMED_REGNUM.
906
907Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
908
909 * interp.c (xfer_big_long): Prevent unwanted sign extension.
910
911Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
912
913 * interp.c (SignalException): Check for explicit terminating
914 breakpoint value.
915 * gencode.c: Pass instruction value through SignalException()
916 calls for Trap, Breakpoint and Syscall.
917
918Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
919
920 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
921 only used on those hosts that provide it.
922 * configure.in: Add sqrt() to list of functions to be checked for.
923 * config.in: Re-generated.
924 * configure: Re-generated.
925
926Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
927
928 * gencode.c (process_instructions): Call build_endian_shift when
929 expanding STORE RIGHT, to fix swr.
930 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
931 clear the high bits.
932 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
933 Fix float to int conversions to produce signed values.
934
cc5201d7
ILT		 935Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
936
458e1f58
ILT		 937 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
938 (process_instructions): Correct handling of nor instruction.
939 Correct shift count for 32 bit shift instructions. Correct sign
940 extension for arithmetic shifts to not shift the number of bits in
941 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
942 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
943 Fix madd.
c05d1721
ILT		 944 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
945 It's OK to have a mult follow a mult. What's not OK is to have a
946 mult follow an mfhi.
458e1f58 947 (Convert): Comment out incorrect rounding code.
cc5201d7 948
f24b7b69
JSC		 949Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
950
951 * interp.c (sim_monitor): Improved monitor printf
952 simulation. Tidied up simulator warnings, and added "--log" option
953 for directing warning message output.
954 * gencode.c: Use sim_warning() rather than WARNING macro.
955
956Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
957
958 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
959 getopt1.o, rather than on gencode.c. Link objects together.
960 Don't link against -liberty.
961 (gencode.o, getopt.o, getopt1.o): New targets.
962 * gencode.c: Include <ctype.h> and "ansidecl.h".
963 (AND): Undefine after including "ansidecl.h".
964 (ULONG_MAX): Define if not defined.
965 (OP_*): Don't define macros; now defined in opcode/mips.h.
966 (main): Call my_strtoul rather than strtoul.
967 (my_strtoul): New static function.
968
969Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
970
971 * gencode.c (process_instructions): Generate word64 and uword64
972 instead of `long long' and `unsigned long long' data types.
973 * interp.c: #include sysdep.h to get signals, and define default
974 for SIGBUS.
975 * (Convert): Work around for Visual-C++ compiler bug with type
976 conversion.
977 * support.h: Make things compile under Visual-C++ by using
978 __int64 instead of `long long'. Change many refs to long long
979 into word64/uword64 typedefs.
980
a271d1d9
JM		 981Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
982
983 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
984 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
985 (docdir): Removed.
986 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
987 (AC_PROG_INSTALL): Added.
988 (AC_PROG_CC): Moved to before configure.host call.
989 * configure: Rebuilt.
990
991Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
992
993 * configure.in: Define @SIMCONF@ depending on mips target.
994 * configure: Rebuild.
995 * Makefile.in (run): Add @SIMCONF@ to control simulator
996 construction.
997 * gencode.c: Change LOADDRMASK to 64bit memory model only.
998 * interp.c: Remove some debugging, provide more detailed error
999 messages, update memory accesses to use LOADDRMASK.
1000
4fa134be
ILT		 1001Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1002
1003 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1004 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1005 stamp-h.
1006 * configure: Rebuild.
1007 * config.in: New file, generated by autoheader.
1008 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1009 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1010 HAVE_ANINT and HAVE_AINT, as appropriate.
1011 * Makefile.in (run): Use @LIBS@ rather than -lm.
1012 (interp.o): Depend upon config.h.
1013 (Makefile): Just rebuild Makefile.
1014 (clean): Remove stamp-h.
1015 (mostlyclean): Make the same as clean, not as distclean.
1016 (config.h, stamp-h): New targets.
1017
1018Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1019
1020 * interp.c (ColdReset): Fix boolean test. Make all simulator
1021 globals static.
1022
f7481d45
JSC		 1023Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1024
1025 * interp.c (xfer_direct_word, xfer_direct_long,
1026 swap_direct_word, swap_direct_long, xfer_big_word,
1027 xfer_big_long, xfer_little_word, xfer_little_long,
1028 swap_word,swap_long): Added.
1029 * interp.c (ColdReset): Provide function indirection to
1030 host<->simulated_target transfer routines.
1031 * interp.c (sim_store_register, sim_fetch_register): Updated to
1032 make use of indirected transfer routines.
1033
1034Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1035
1036 * gencode.c (process_instructions): Ensure FP ABS instruction
1037 recognised.
1038 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1039 system call support.
1040
8b554809
JSC		 1041Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1042
1043 * interp.c (sim_do_command): Complain if callback structure not
1044 initialised.
1045
d0757082
JSC		 1046Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1047
1048 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1049 support for Sun hosts.
1050 * Makefile.in (gencode): Ensure the host compiler and libraries
1051 used for cross-hosted build.
1052
e871dd18
JSC		 1053Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1054
1055 * interp.c, gencode.c: Some more (TODO) tidying.
1056
1057Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1058
1059 * gencode.c, interp.c: Replaced explicit long long references with
1060 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1061 * support.h (SET64LO, SET64HI): Macros added.
1062
5c59ec43
ILT		 1063Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1064
1065 * configure: Regenerate with autoconf 2.7.
1066
1067Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1068
1069 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1070 * support.h: Remove superfluous "1" from #if.
1071 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1072
1073Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1074
1075 * interp.c (StoreFPR): Control UndefinedResult() call on
1076 WARN_RESULT manifest.
1077
8bae0a0c
JSC		 1078Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1079
1080 * gencode.c: Tidied instruction decoding, and added FP instruction
1081 support.
1082
1083 * interp.c: Added dineroIII, and BSD profiling support. Also
1084 run-time FP handling.
1085
1086Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1087
1088 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1089 gencode.c, interp.c, support.h: created.
GDB Binutils - Deliverables
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