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Allow gencode.c to generate input to the igen generator.
[deliverable/binutils-gdb.git] / sim / mips / ChangeLog
CommitLineData
e63bc706
AC		 1Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * Makefile.in (tmp.igen): Add target. Generate igen input from
4 gencode file.
5
6 * gencode.c (FEATURE_IGEN): Define.
7 (main): Add --igen option. Generate output in igen format.
8 (process_instructions): Format output according to igen option.
9 (print_igen_insn_format): New function.
10 (print_igen_insn_models): New function.
11 (process_instructions): Only issue warnings and ignore
12 instructions when no FEATURE_IGEN.
13
eb2e3c85
AC		 14Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
15
16 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
17 MIPS targets.
18
92f91d1f
AC		 19Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
20
21 * configure: Regenerated to track ../common/aclocal.m4 changes.
22
23Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
24
25 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
26 SIM_RESERVED_BITS): Delete, moved to common.
27 (SIM_EXTRA_CFLAGS): Update.
28
794e9ac9
AC		 29Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
30
76a6247f 31 * configure.in: Configure non-strict memory alignment.
794e9ac9
AC		 32 * configure: Regenerated to track ../common/aclocal.m4 changes.
33
b45caf05
AC		 34Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
35
36 * configure: Regenerated to track ../common/aclocal.m4 changes.
37
38Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
39
40 * gencode.c (SDBBP,DERET): Added (3900) insns.
41 (RFE): Turn on for 3900.
42 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
43 (dsstate): Made global.
44 (SUBTARGET_R3900): Added.
45 (CANCELDELAYSLOT): New.
46 (SignalException): Ignore SystemCall rather than ignore and
47 terminate. Add DebugBreakPoint handling.
48 (decode_coproc): New insns RFE, DERET; and new registers Debug
49 and DEPC protected by SUBTARGET_R3900.
50 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
51 bits explicitly.
52 * Makefile.in,configure.in: Add mips subtarget option.
53 * configure: Update.
54
7afa8d4e
GRK		 55Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
56
57 * gencode.c: Add r3900 (tx39).
58
59start-sanitize-tx19
60 * gencode.c: Fix some configuration problems by improving
61 the relationship between tx19 and tx39.
62end-sanitize-tx19
63
667065d0
GRK		 64Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
65
66 * gencode.c (build_instruction): Don't need to subtract 4 for
67 JALR, just 2.
68
9cb8397f
GRK		 69Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
70
71 * interp.c: Correct some HASFPU problems.
72
a2ab5e65
AC		 73Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
74
75 * configure: Regenerated to track ../common/aclocal.m4 changes.
76
11ac69e0
AC		 77Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
78
79 * interp.c (mips_options): Fix samples option short form, should
80 be `x'.
81
972f3a34
AC		 82Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
83
84 * interp.c (sim_info): Enable info code. Was just returning.
85
9eeaaefa
AC		 86Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
87
88 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
89 MFC0.
90
c31c13b4
AC		 91Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
92
93 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
94 constants.
95 (build_instruction): Ditto for LL.
96
b637f306
GRK		 97start-sanitize-tx19
98Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
99
100 * mips/configure.in, mips/gencode: Add tx19/r1900.
101
102end-sanitize-tx19
6fea4763
DE		 103Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
104
105 * configure: Regenerated to track ../common/aclocal.m4 changes.
106
52352d38
AC		 107start-sanitize-r5900
108Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
109
110 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
111 for overflow due to ABS of MININT, set result to MAXINT.
112 (build_instruction): For "psrlvw", signextend bit 31.
113
114end-sanitize-r5900
88117054
AC		 115Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
116
117 * configure: Regenerated to track ../common/aclocal.m4 changes.
118 * config.in: Ditto.
119
fafce69a
AC		 120Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
121
122 * interp.c (sim_open): Add call to sim_analyze_program, update
123 call to sim_config.
124
7230ff0f
AC		 125Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
126
127 * interp.c (sim_kill): Delete.
fafce69a
AC		 128 (sim_create_inferior): Add ABFD argument. Set PC from same.
129 (sim_load): Move code initializing trap handlers from here.
130 (sim_open): To here.
131 (sim_load): Delete, use sim-hload.c.
132
133 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
7230ff0f 134
247fccde
AC		 135Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
136
137 * configure: Regenerated to track ../common/aclocal.m4 changes.
138 * config.in: Ditto.
139
140Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
141
142 * interp.c (sim_open): Add ABFD argument.
143 (sim_load): Move call to sim_config from here.
144 (sim_open): To here. Check return status.
145
146start-sanitize-r5900
147 * gencode.c (build_instruction): Do not define x8000000000000000,
148 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
149
150end-sanitize-r5900
151start-sanitize-r5900
152Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
153
154 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
155 "pdivuw" check for overflow due to signed divide by -1.
156
157end-sanitize-r5900
c12e2e4c
GRK		 158Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
159
160 * gencode.c (build_instruction): Two arg MADD should
161 not assign result to $0.
162
1e851d2c
AC		 163start-sanitize-r5900
164Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
165
166 * gencode.c (build_instruction): For "ppac5" use unsigned
167 arrithmetic so that the sign bit doesn't smear when right shifted.
168 (build_instruction): For "pdiv" perform sign extension when
169 storing results in HI and LO.
170 (build_instructions): For "pdiv" and "pdivbw" check for
171 divide-by-zero.
172 (build_instruction): For "pmfhl.slw" update hi part of dest
173 register as well as low part.
174 (build_instruction): For "pmfhl" portably handle long long values.
175 (build_instruction): For "pmfhl.sh" correctly negative values.
176 Store half words 2 and three in the correct place.
177 (build_instruction): For "psllvw", sign extend value after shift.
178
179end-sanitize-r5900
180Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
181
182 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
183 * sim/mips/configure.in: Regenerate.
184
185Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
186
187 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
188 signed8, unsigned8 et.al. types.
189
190start-sanitize-r5900
191 * gencode.c (build_instruction): For PMULTU* do not sign extend
192 registers. Make generated code easier to debug.
193
194end-sanitize-r5900
195 * interp.c (SUB_REG_FETCH): Handle both little and big endian
196 hosts when selecting subreg.
197
198start-sanitize-r5900
199Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
200
201 * gencode.c (type_for_data_len): For 32bit operations concerned
202 with overflow, perform op using 64bits.
203 (build_instruction): For PADD, always compute operation using type
204 returned by type_for_data_len.
205 (build_instruction): For PSUBU, when overflow, saturate to zero as
206 actually underflow.
207
208end-sanitize-r5900
ae19b07b
JL		 209Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
210
649625bb 211start-sanitize-r5900
64435234
JL		 212 * gencode.c (build_instruction): Handle "pext5" according to
213 version 1.95 of the r5900 ISA.
214
649625bb
JL		 215 * gencode.c (build_instruction): Handle "ppac5" according to
216 version 1.95 of the r5900 ISA.
649625bb 217
1e851d2c 218end-sanitize-r5900
05d1322f
JL		 219 * interp.c (sim_engine_run): Reset the ZERO register to zero
220 regardless of FEATURE_WARN_ZERO.
ae19b07b
JL		 221 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
222
223Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
224
225 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
226 (SignalException): For BreakPoints ignore any mode bits and just
227 save the PC.
228 (SignalException): Always set the CAUSE register.
229
56e7c849
AC		 230Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
231
232 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
233 exception has been taken.
234
235 * interp.c: Implement the ERET and mt/f sr instructions.
236
ae19b07b 237start-sanitize-r5900
56e7c849
AC		 238Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
239
240 * gencode.c (build_instruction): For paddu, extract unsigned
241 sub-fields.
242
243 * gencode.c (build_instruction): Saturate padds instead of padd
244 instructions.
245
246end-sanitize-r5900
247Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
248
249 * interp.c (SignalException): Don't bother restarting an
250 interrupt.
251
252Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
253
254 * interp.c (SignalException): Really take an interrupt.
255 (interrupt_event): Only deliver interrupts when enabled.
256
257Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
258
259 * interp.c (sim_info): Only print info when verbose.
260 (sim_info) Use sim_io_printf for output.
261
2f2e6c5d
AC		 262Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
263
264 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
265 mips architectures.
266
267Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
268
269 * interp.c (sim_do_command): Check for common commands if a
270 simulator specific command fails.
271
d3d2a9f7
GRK		 272Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
273
274 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
275 and simBE when DEBUG is defined.
276
50a2a691
AC		 277Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
278
279 * interp.c (interrupt_event): New function. Pass exception event
280 onto exception handler.
281
282 * configure.in: Check for stdlib.h.
283 * configure: Regenerate.
284
285 * gencode.c (build_instruction): Add UNUSED attribute to tempS
286 variable declaration.
287 (build_instruction): Initialize memval1.
288 (build_instruction): Add UNUSED attribute to byte, bigend,
289 reverse.
290 (build_operands): Ditto.
291
292 * interp.c: Fix GCC warnings.
293 (sim_get_quit_code): Delete.
294
295 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
296 * Makefile.in: Ditto.
297 * configure: Re-generate.
298
299 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
300
301Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
302
303 * interp.c (mips_option_handler): New function parse argumes using
304 sim-options.
305 (myname): Replace with STATE_MY_NAME.
306 (sim_open): Delete check for host endianness - performed by
307 sim_config.
308 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
309 (sim_open): Move much of the initialization from here.
310 (sim_load): To here. After the image has been loaded and
311 endianness set.
312 (sim_open): Move ColdReset from here.
313 (sim_create_inferior): To here.
314 (sim_open): Make FP check less dependant on host endianness.
315
316 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
317 run.
318 * interp.c (sim_set_callbacks): Delete.
319
320 * interp.c (membank, membank_base, membank_size): Replace with
321 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
322 (sim_open): Remove call to callback->init. gdb/run do this.
323
324 * interp.c: Update
325
326 * sim-main.h (SIM_HAVE_FLATMEM): Define.
327
328 * interp.c (big_endian_p): Delete, replaced by
329 current_target_byte_order.
330
331Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
332
333 * interp.c (host_read_long, host_read_word, host_swap_word,
334 host_swap_long): Delete. Using common sim-endian.
335 (sim_fetch_register, sim_store_register): Use H2T.
336 (pipeline_ticks): Delete. Handled by sim-events.
337 (sim_info): Update.
338 (sim_engine_run): Update.
339
340Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
341
342 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
343 reason from here.
344 (SignalException): To here. Signal using sim_engine_halt.
345 (sim_stop_reason): Delete, moved to common.
346
347Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
348
349 * interp.c (sim_open): Add callback argument.
350 (sim_set_callbacks): Delete SIM_DESC argument.
351 (sim_size): Ditto.
352
2e61a3ad
AC		 353Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
354
355 * Makefile.in (SIM_OBJS): Add common modules.
356
357 * interp.c (sim_set_callbacks): Also set SD callback.
358 (set_endianness, xfer_*, swap_*): Delete.
359 (host_read_word, host_read_long, host_swap_word, host_swap_long):
360 Change to functions using sim-endian macros.
361 (control_c, sim_stop): Delete, use common version.
362 (simulate): Convert into.
363 (sim_engine_run): This function.
364 (sim_resume): Delete.
365
366 * interp.c (simulation): New variable - the simulator object.
367 (sim_kind): Delete global - merged into simulation.
368 (sim_load): Cleanup. Move PC assignment from here.
369 (sim_create_inferior): To here.
370
371 * sim-main.h: New file.
372 * interp.c (sim-main.h): Include.
373
374Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
375
376 * configure: Regenerated to track ../common/aclocal.m4 changes.
377
3be0e228
DE		 378Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
379
380 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
381
d654ba0a
GRK		 382Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
383
384 * gencode.c (build_instruction): DIV instructions: check
385 for division by zero and integer overflow before using
386 host's division operation.
387
9d52bcb7
DE		 388Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
389
390 * Makefile.in (SIM_OBJS): Add sim-load.o.
391 * interp.c: #include bfd.h.
392 (target_byte_order): Delete.
393 (sim_kind, myname, big_endian_p): New static locals.
394 (sim_open): Set sim_kind, myname. Move call to set_endianness to
395 after argument parsing. Recognize -E arg, set endianness accordingly.
396 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
397 load file into simulator. Set PC from bfd.
398 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
399 (set_endianness): Use big_endian_p instead of target_byte_order.
400
87e43259
AC		 401Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
402
403 * interp.c (sim_size): Delete prototype - conflicts with
404 definition in remote-sim.h. Correct definition.
405
406Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
407
408 * configure: Regenerated to track ../common/aclocal.m4 changes.
409 * config.in: Ditto.
410
fbda74b1
DE		 411Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
412
8a7c3105
DE		 413 * interp.c (sim_open): New arg `kind'.
414
fbda74b1
DE		 415 * configure: Regenerated to track ../common/aclocal.m4 changes.
416
a35e91c3
AC		 417Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
418
419 * configure: Regenerated to track ../common/aclocal.m4 changes.
420
421Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
422
423 * interp.c (sim_open): Set optind to 0 before calling getopt.
424
425Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
426
427 * configure: Regenerated to track ../common/aclocal.m4 changes.
428
6efa34d8
GRK		 429Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
430
431 * interp.c : Replace uses of pr_addr with pr_uword64
432 where the bit length is always 64 independent of SIM_ADDR.
433 (pr_uword64) : added.
434
a77aa7ec
AC		 435Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
436
437 * configure: Re-generate.
438
601fb8ae
MM		 439Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
440
441 * configure: Regenerate to track ../common/aclocal.m4 changes.
442
53b9417e
DE		 443Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
444
445 * interp.c (sim_open): New SIM_DESC result. Argument is now
446 in argv form.
447 (other sim_*): New SIM_DESC argument.
448
449start-sanitize-r5900
450Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
451
452 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
453 Change values to avoid overloading DOUBLEWORD which is tested
454 for all insns.
455 * gencode.c: reinstate "offending code".
53b9417e 456
56e7c849 457end-sanitize-r5900
53b9417e
DE		 458Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
459
460 * interp.c: Fix printing of addresses for non-64-bit targets.
461 (pr_addr): Add function to print address based on size.
462start-sanitize-r5900
463 * gencode.c: #ifdef out offending code until a permanent fix
464 can be added. Code is causing build errors for non-5900 mips targets.
465end-sanitize-r5900
466
467start-sanitize-r5900
468Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
469
470 * gencode.c (process_instructions): Correct test for ISA dependent
471 architecture bits in isa field of MIPS_DECODE.
472
473end-sanitize-r5900
7e05106d
MA		 474Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
475
476 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
477
2d18fbc6 478start-sanitize-r5900
53b9417e 479Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
2d18fbc6
GRK		 480
481 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
482 PMADDUW.
483
484end-sanitize-r5900
485Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
486
487 * gencode.c (build_mips16_operands): Correct computation of base
488 address for extended PC relative instruction.
489
276c2d7d
GRK		 490start-sanitize-r5900
491Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
2d18fbc6
GRK		 492
493 * Makefile.in, configure, configure.in, gencode.c,
494 interp.c, support.h: add r5900.
495
276c2d7d 496end-sanitize-r5900
da0bce9c
ILT		 497Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
498
499 * interp.c (mips16_entry): Add support for floating point cases.
500 (SignalException): Pass floating point cases to mips16_entry.
501 (ValueFPR): Don't restrict fmt_single and fmt_word to even
502 registers.
503 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
504 or fmt_word.
505 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
506 and then set the state to fmt_uninterpreted.
507 (COP_SW): Temporarily set the state to fmt_word while calling
508 ValueFPR.
509
6389d856
ILT		 510Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
511
512 * gencode.c (build_instruction): The high order may be set in the
513 comparison flags at any ISA level, not just ISA 4.
514
19c5af72
DE		 515Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
516
517 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
518 COMMON_{PRE,POST}_CONFIG_FRAG instead.
519 * configure.in: sinclude ../common/aclocal.m4.
520 * configure: Regenerated.
521
736a306c
ILT		 522Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
523
524 * configure: Rebuild after change to aclocal.m4.
525
295dbbe4
SG		 526Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
527
528 * configure configure.in Makefile.in: Update to new configure
529 scheme which is more compatible with WinGDB builds.
530 * configure.in: Improve comment on how to run autoconf.
531 * configure: Re-run autoconf to get new ../common/aclocal.m4.
532 * Makefile.in: Use autoconf substitution to install common
533 makefile fragment.
534
535Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
536
537 * gencode.c (build_instruction): Use BigEndianCPU instead of
538 ByteSwapMem.
539
e1db0d47
MA		 540Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
541
542 * interp.c (sim_monitor): Make output to stdout visible in
543 wingdb's I/O log window.
544
2902e8ab
MA		 545Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
546
547 * support.h: Undo previous change to SIGTRAP
548 and SIGQUIT values.
549
7e6c297e
ILT		 550Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
551
552 * interp.c (store_word, load_word): New static functions.
553 (mips16_entry): New static function.
554 (SignalException): Look for mips16 entry and exit instructions.
555 (simulate): Use the correct index when setting fpr_state after
556 doing a pending move.
557
0049ba7a
MA		 558Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
559
560 * interp.c: Fix byte-swapping code throughout to work on
561 both little- and big-endian hosts.
562
2510786b
MA		 563Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
564
565 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
566 with gdb/config/i386/xm-windows.h.
567
39bf0ef4
MA		 568Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
569
570 * gencode.c (build_instruction): Work around MSVC++ code gen bug
571 that messes up arithmetic shifts.
572
dbeec768
SG		 573Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
574
575 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
576 SIGTRAP and SIGQUIT for _WIN32.
577
deffd638
ILT		 578Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
579
580 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
581 force a 64 bit multiplication.
582 (build_instruction) [OR]: In mips16 mode, don't do anything if the
583 destination register is 0, since that is the default mips16 nop
584 instruction.
585
aaff8437
ILT		 586Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
587
063443cf
ILT		 588 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
589 (build_endian_shift): Don't check proc64.
590 (build_instruction): Always set memval to uword64. Cast op2 to
591 uword64 when shifting it left in memory instructions. Always use
592 the same code for stores--don't special case proc64.
593
aaff8437
ILT		 594 * gencode.c (build_mips16_operands): Fix base PC value for PC
595 relative operands.
596 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
597 jal instruction.
598 * interp.c (simJALDELAYSLOT): Define.
599 (JALDELAYSLOT): Define.
600 (INDELAYSLOT, INJALDELAYSLOT): Define.
601 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
602
280f90e1
AMT		 603Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
604
605 * interp.c (sim_open): add flush_cache as a PMON routine
606 (sim_monitor): handle flush_cache by ignoring it
607
aaff8437
ILT		 608Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
609
610 * gencode.c (build_instruction): Use !ByteSwapMem instead of
611 BigEndianMem.
612 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
613 (BigEndianMem): Rename to ByteSwapMem and change sense.
614 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
615 BigEndianMem references to !ByteSwapMem.
616 (set_endianness): New function, with prototype.
617 (sim_open): Call set_endianness.
618 (sim_info): Use simBE instead of BigEndianMem.
619 (xfer_direct_word, xfer_direct_long, swap_direct_word,
620 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
621 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
622 ifdefs, keeping the prototype declaration.
623 (swap_word): Rewrite correctly.
624 (ColdReset): Delete references to CONFIG. Delete endianness related
625 code; moved to set_endianness.
626
6429b296
JW		 627Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
628
629 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
630 * interp.c (CHECKHILO): Define away.
631 (simSIGINT): New macro.
632 (membank_size): Increase from 1MB to 2MB.
633 (control_c): New function.
634 (sim_resume): Rename parameter signal to signal_number. Add local
635 variable prev. Call signal before and after simulate.
636 (sim_stop_reason): Add simSIGINT support.
637 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
638 functions always.
639 (sim_warning): Delete call to SignalException. Do call printf_filtered
640 if logfh is NULL.
641 (AddressTranslation): Add #ifdef DEBUG around debugging message and
642 a call to sim_warning.
643
644Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
645
646 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
647 16 bit instructions.
648
831f59a2
ILT		 649Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
650
651 Add support for mips16 (16 bit MIPS implementation):
652 * gencode.c (inst_type): Add mips16 instruction encoding types.
653 (GETDATASIZEINSN): Define.
654 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
655 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
656 mtlo.
657 (MIPS16_DECODE): New table, for mips16 instructions.
658 (bitmap_val): New static function.
659 (struct mips16_op): Define.
660 (mips16_op_table): New table, for mips16 operands.
661 (build_mips16_operands): New static function.
662 (process_instructions): If PC is odd, decode a mips16
663 instruction. Break out instruction handling into new
664 build_instruction function.
665 (build_instruction): New static function, broken out of
666 process_instructions. Check modifiers rather than flags for SHIFT
667 bit count and m[ft]{hi,lo} direction.
668 (usage): Pass program name to fprintf.
669 (main): Remove unused variable this_option_optind. Change
670 ``*loptarg++'' to ``loptarg++''.
671 (my_strtoul): Parenthesize && within ||.
350d33b8 672 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
831f59a2
ILT		 673 (simulate): If PC is odd, fetch a 16 bit instruction, and
674 increment PC by 2 rather than 4.
675 * configure.in: Add case for mips16*-*-*.
676 * configure: Rebuild.
677
678Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
679
680 * interp.c: Allow -t to enable tracing in standalone simulator.
681 Fix garbage output in trace file and error messages.
682
e3d12c65
DE		 683Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
684
685 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
686 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
687 * configure.in: Simplify using macros in ../common/aclocal.m4.
688 * configure: Regenerated.
689 * tconfig.in: New file.
690
691Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
692
693 * interp.c: Fix bugs in 64-bit port.
694 Use ansi function declarations for msvc compiler.
695 Initialize and test file pointer in trace code.
696 Prevent duplicate definition of LAST_EMED_REGNUM.
697
698Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
699
700 * interp.c (xfer_big_long): Prevent unwanted sign extension.
701
702Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
703
704 * interp.c (SignalException): Check for explicit terminating
705 breakpoint value.
706 * gencode.c: Pass instruction value through SignalException()
707 calls for Trap, Breakpoint and Syscall.
708
709Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
710
711 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
712 only used on those hosts that provide it.
713 * configure.in: Add sqrt() to list of functions to be checked for.
714 * config.in: Re-generated.
715 * configure: Re-generated.
716
717Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
718
719 * gencode.c (process_instructions): Call build_endian_shift when
720 expanding STORE RIGHT, to fix swr.
721 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
722 clear the high bits.
723 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
724 Fix float to int conversions to produce signed values.
725
cc5201d7
ILT		 726Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
727
458e1f58
ILT		 728 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
729 (process_instructions): Correct handling of nor instruction.
730 Correct shift count for 32 bit shift instructions. Correct sign
731 extension for arithmetic shifts to not shift the number of bits in
732 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
733 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
734 Fix madd.
c05d1721
ILT		 735 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
736 It's OK to have a mult follow a mult. What's not OK is to have a
737 mult follow an mfhi.
458e1f58 738 (Convert): Comment out incorrect rounding code.
cc5201d7 739
f24b7b69
JSC		 740Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
741
742 * interp.c (sim_monitor): Improved monitor printf
743 simulation. Tidied up simulator warnings, and added "--log" option
744 for directing warning message output.
745 * gencode.c: Use sim_warning() rather than WARNING macro.
746
747Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
748
749 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
750 getopt1.o, rather than on gencode.c. Link objects together.
751 Don't link against -liberty.
752 (gencode.o, getopt.o, getopt1.o): New targets.
753 * gencode.c: Include <ctype.h> and "ansidecl.h".
754 (AND): Undefine after including "ansidecl.h".
755 (ULONG_MAX): Define if not defined.
756 (OP_*): Don't define macros; now defined in opcode/mips.h.
757 (main): Call my_strtoul rather than strtoul.
758 (my_strtoul): New static function.
759
760Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
761
762 * gencode.c (process_instructions): Generate word64 and uword64
763 instead of `long long' and `unsigned long long' data types.
764 * interp.c: #include sysdep.h to get signals, and define default
765 for SIGBUS.
766 * (Convert): Work around for Visual-C++ compiler bug with type
767 conversion.
768 * support.h: Make things compile under Visual-C++ by using
769 __int64 instead of `long long'. Change many refs to long long
770 into word64/uword64 typedefs.
771
a271d1d9
JM		 772Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
773
774 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
775 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
776 (docdir): Removed.
777 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
778 (AC_PROG_INSTALL): Added.
779 (AC_PROG_CC): Moved to before configure.host call.
780 * configure: Rebuilt.
781
782Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
783
784 * configure.in: Define @SIMCONF@ depending on mips target.
785 * configure: Rebuild.
786 * Makefile.in (run): Add @SIMCONF@ to control simulator
787 construction.
788 * gencode.c: Change LOADDRMASK to 64bit memory model only.
789 * interp.c: Remove some debugging, provide more detailed error
790 messages, update memory accesses to use LOADDRMASK.
791
4fa134be
ILT		 792Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
793
794 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
795 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
796 stamp-h.
797 * configure: Rebuild.
798 * config.in: New file, generated by autoheader.
799 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
800 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
801 HAVE_ANINT and HAVE_AINT, as appropriate.
802 * Makefile.in (run): Use @LIBS@ rather than -lm.
803 (interp.o): Depend upon config.h.
804 (Makefile): Just rebuild Makefile.
805 (clean): Remove stamp-h.
806 (mostlyclean): Make the same as clean, not as distclean.
807 (config.h, stamp-h): New targets.
808
809Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
810
811 * interp.c (ColdReset): Fix boolean test. Make all simulator
812 globals static.
813
f7481d45
JSC		 814Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
815
816 * interp.c (xfer_direct_word, xfer_direct_long,
817 swap_direct_word, swap_direct_long, xfer_big_word,
818 xfer_big_long, xfer_little_word, xfer_little_long,
819 swap_word,swap_long): Added.
820 * interp.c (ColdReset): Provide function indirection to
821 host<->simulated_target transfer routines.
822 * interp.c (sim_store_register, sim_fetch_register): Updated to
823 make use of indirected transfer routines.
824
825Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
826
827 * gencode.c (process_instructions): Ensure FP ABS instruction
828 recognised.
829 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
830 system call support.
831
8b554809
JSC		 832Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
833
834 * interp.c (sim_do_command): Complain if callback structure not
835 initialised.
836
d0757082
JSC		 837Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
838
839 * interp.c (Convert): Provide round-to-nearest and round-to-zero
840 support for Sun hosts.
841 * Makefile.in (gencode): Ensure the host compiler and libraries
842 used for cross-hosted build.
843
e871dd18
JSC		 844Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
845
846 * interp.c, gencode.c: Some more (TODO) tidying.
847
848Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
849
850 * gencode.c, interp.c: Replaced explicit long long references with
851 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
852 * support.h (SET64LO, SET64HI): Macros added.
853
5c59ec43
ILT		 854Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
855
856 * configure: Regenerate with autoconf 2.7.
857
858Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
859
860 * interp.c (LoadMemory): Enclose text following #endif in /* */.
861 * support.h: Remove superfluous "1" from #if.
862 * support.h (CHECKSIM): Remove stray 'a' at end of line.
863
864Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
865
866 * interp.c (StoreFPR): Control UndefinedResult() call on
867 WARN_RESULT manifest.
868
8bae0a0c
JSC		 869Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
870
871 * gencode.c: Tidied instruction decoding, and added FP instruction
872 support.
873
874 * interp.c: Added dineroIII, and BSD profiling support. Also
875 run-time FP handling.
876
877Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
878
879 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
880 gencode.c, interp.c, support.h: created.
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