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* infrun.c: Fix prototype of signals_info to match static funtion.
[deliverable/binutils-gdb.git] / sim / mips / Makefile.in
CommitLineData
4fa134be
ILT		 1# Makefile template for Configure for the MIPS simulator.
2# Written by Cygnus Support.
3
19c5af72
DE		 4## COMMON_PRE_CONFIG_FRAG
5
fafce69a
AC		 6srcdir=@srcdir@
7srcroot=$(srcdir)/../../
8
90ad43b2
AC		 9SIM_NO_OBJ =
10
5759734b
DE		 11# start-sanitize-sky
12SIM_SKY_OBJS = \
13 sky-device.o \
14 sky-dma.o \
15 sky-engine.o \
16 sky-gpuif.o \
17 sky-hardware.o \
18 sky-libvpe.o \
19 sky-pke.o \
d44859a2 20 sky-vu.o \
76969284 21 sky-gs.o \
aaab4e57 22 sky-gdb.o
5759734b
DE		 23# end-sanitize-sky
24
90ad43b2
AC		 25SIM_IGEN_OBJ = \
26 support.o \
27 itable.o \
28 semantics.o \
29 idecode.o \
30 icache.o \
31 engine.o \
37379a25 32 irun.o \
90ad43b2
AC		 33
34SIM_M16_OBJ = \
90ad43b2 35 m16_support.o \
90ad43b2
AC		 36 m16_semantics.o \
37 m16_idecode.o \
38 m16_icache.o \
37379a25
AC		 39 \
40 m32_support.o \
41 m32_semantics.o \
42 m32_idecode.o \
43 m32_icache.o \
44 \
45 itable.o \
46 m16run.o \
90ad43b2 47
5759734b 48MIPS_EXTRA_OBJS = @mips_extra_objs@
d44859a2 49MIPS_EXTRA_LIBS = @mips_extra_libs@
5759734b 50
122edc03
AC		 51SIM_OBJS = \
52 $(SIM_@sim_gen@_OBJ) \
37379a25 53 $(SIM_NEW_COMMON_OBJS) \
5759734b 54 $(MIPS_EXTRA_OBJS) \
122edc03 55 interp.o \
fafce69a 56 sim-hload.o \
fafce69a
AC		 57 sim-engine.o \
58 sim-stop.o \
59 sim-resume.o \
60 sim-reason.o \
122edc03
AC		 61
62
fafce69a 63# List of flags to always pass to $(CC).
92f91d1f 64SIM_SUBTARGET=@SIM_SUBTARGET@
fafce69a 65
16bd5d6e
AC		 66SIM_NO_CFLAGS = -DWITH_IGEN=0
67SIM_IGEN_CFLAGS = -DWITH_IGEN=1
68SIM_M16_CFLAGS = -DWITH_IGEN=1
69
295dbbe4
SG		 70# FIXME: Hack to find syscall.h? Better support for syscall.h
71# is in progress.
fafce69a 72SIM_EXTRA_CFLAGS = \
92f91d1f 73 $(SIM_SUBTARGET) \
122edc03
AC		 74 -I$(srcdir)/../../newlib/libc/sys/idt \
75 $(SIM_@sim_gen@_CFLAGS)
fafce69a 76
aaab4e57 77SIM_EXTRA_CLEAN = clean-extra
4fa134be 78
122edc03 79SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
18c64df6 80
d44859a2
RU		 81SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
82
fafce69a
AC		 83# List of main object files for `run'.
84SIM_RUN_OBJS = nrun.o
85
86
87
19c5af72 88## COMMON_POST_CONFIG_FRAG
4fa134be 89
37379a25
AC		 90SIM_NO_INTERP = oengine.c
91interp.o: $(srcdir)/interp.c config.h sim-main.h $(SIM_@sim_gen@_INTERP)
92
93
94
95#
96# Old deprecated generator
97#
98
99SIM_NO_ALL = oengine.c
4fa134be 100
284e759d
AC		 101oengine.c: gencode
102 ./gencode @SIMCONF@ > tmp-oengine
103 mv tmp-oengine oengine.c
4fa134be 104
295dbbe4
SG		 105gencode: gencode.o getopt.o getopt1.o
106 $(CC_FOR_BUILD) -o $@ gencode.o getopt.o getopt1.o
4fa134be 107
295dbbe4
SG		 108gencode.o: $(srcdir)/gencode.c
109 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/gencode.c
18c64df6 110
295dbbe4
SG		 111getopt.o: $(srcdir)/../../libiberty/getopt.c
112 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt.c
113getopt1.o: $(srcdir)/../../libiberty/getopt1.c
114 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt1.c
4fa134be 115
122edc03 116
37379a25 117
122edc03
AC		 118../igen/igen:
119 cd ../igen && $(MAKE)
120
121IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
122IGEN_INSN=$(srcdir)/mips.igen
123IGEN_DC=$(srcdir)/mips.dc
37379a25 124M16_DC=$(srcdir)/m16.dc
01b9cd49
AC		 125IGEN_INCLUDE=\
126 $(start-sanitize-r5900) \
127 $(srcdir)/r5900.igen \
128 $(end-sanitize-r5900) \
129 $(start-sanitize-vr5400) \
130 $(srcdir)/vr5400.igen \
37379a25 131 $(srcdir)/mdmx.igen \
01b9cd49 132 $(end-sanitize-vr5400) \
d44859a2
RU		 133 $(start-sanitize-vr4320) \
134 $(srcdir)/vr4320.igen \
135 $(end-sanitize-vr4320) \
01b9cd49 136 $(srcdir)/m16.igen
122edc03 137
122edc03
AC		 138SIM_IGEN_ALL = tmp-igen
139
122edc03
AC		 140BUILT_SRC_FROM_IGEN = \
141 icache.h \
142 icache.c \
143 idecode.h \
144 idecode.c \
145 semantics.h \
146 semantics.c \
147 model.h \
148 model.c \
149 support.h \
150 support.c \
122edc03
AC		 151 engine.h \
152 engine.c \
aaab4e57 153 irun.c \
122edc03 154
aaab4e57
RU		 155# NB: Since these can be built by either tmp-igen or tmp-m16
156# they are explicitly marked as being dependant on the
157# dependant on the selected generator.
158BUILT_SRC_FROM_GEN = \
159 itable.h \
160 itable.c \
122edc03 161
aaab4e57
RU		 162$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
163
164
165$(BUILT_SRC_FROM_IGEN): tmp-igen
122edc03 166
01b9cd49 167tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
122edc03
AC		 168 cd ../igen && $(MAKE)
169 ../igen/igen \
170 $(IGEN_TRACE) \
90ad43b2 171 -I $(srcdir) \
122edc03
AC		 172 -Werror \
173 -Wnodiscard \
16bd5d6e 174 @sim_igen_flags@ \
122edc03 175 -G gen-direct-access \
37379a25
AC		 176 -G gen-zero-r0 \
177 -B 32 \
178 -H 31 \
122edc03
AC		 179 -i $(IGEN_INSN) \
180 -o $(IGEN_DC) \
181 -x \
182 -n icache.h -hc tmp-icache.h \
183 -n icache.c -c tmp-icache.c \
184 -n semantics.h -hs tmp-semantics.h \
185 -n semantics.c -s tmp-semantics.c \
186 -n idecode.h -hd tmp-idecode.h \
187 -n idecode.c -d tmp-idecode.c \
188 -n model.h -hm tmp-model.h \
189 -n model.c -m tmp-model.c \
190 -n support.h -hf tmp-support.h \
191 -n support.c -f tmp-support.c \
192 -n itable.h -ht tmp-itable.h \
193 -n itable.c -t tmp-itable.c \
194 -n engine.h -he tmp-engine.h \
195 -n engine.c -e tmp-engine.c \
196 -n irun.c -r tmp-irun.c
197 $(srcdir)/../../move-if-change tmp-icache.h icache.h
198 $(srcdir)/../../move-if-change tmp-icache.c icache.c
199 $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
200 $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
201 $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
202 $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
203 $(srcdir)/../../move-if-change tmp-model.h model.h
204 $(srcdir)/../../move-if-change tmp-model.c model.c
205 $(srcdir)/../../move-if-change tmp-support.h support.h
206 $(srcdir)/../../move-if-change tmp-support.c support.c
207 $(srcdir)/../../move-if-change tmp-itable.h itable.h
208 $(srcdir)/../../move-if-change tmp-itable.c itable.c
209 $(srcdir)/../../move-if-change tmp-engine.h engine.h
210 $(srcdir)/../../move-if-change tmp-engine.c engine.c
211 $(srcdir)/../../move-if-change tmp-irun.c irun.c
212 touch tmp-igen
213
7ce8b917
AC		 214semantics.o: sim-main.h $(SIM_EXTRA_DEPS)
215engine.o: sim-main.h $(SIM_EXTRA_DEPS)
216support.o: sim-main.h $(SIM_EXTRA_DEPS)
217idecode.o: sim-main.h $(SIM_EXTRA_DEPS)
218itable.o: sim-main.h $(SIM_EXTRA_DEPS)
219
122edc03
AC		 220
221
37379a25 222SIM_M16_ALL = tmp-m16
122edc03 223
122edc03
AC		 224BUILT_SRC_FROM_M16 = \
225 m16_icache.h \
226 m16_icache.c \
227 m16_idecode.h \
228 m16_idecode.c \
229 m16_semantics.h \
230 m16_semantics.c \
231 m16_model.h \
232 m16_model.c \
233 m16_support.h \
234 m16_support.c \
37379a25
AC		 235 \
236 m32_icache.h \
237 m32_icache.c \
238 m32_idecode.h \
239 m32_idecode.c \
240 m32_semantics.h \
241 m32_semantics.c \
242 m32_model.h \
243 m32_model.c \
244 m32_support.h \
245 m32_support.c \
122edc03
AC		 246
247$(BUILT_SRC_FROM_M16): tmp-m16
248
01b9cd49 249tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
122edc03
AC		 250 cd ../igen && $(MAKE)
251 ../igen/igen \
252 $(IGEN_TRACE) \
90ad43b2 253 -I $(srcdir) \
122edc03
AC		 254 -Werror \
255 -Wnodiscard \
37379a25 256 @sim_m16_flags@ \
122edc03 257 -G gen-direct-access \
37379a25
AC		 258 -G gen-zero-r0 \
259 -B 16 \
260 -H 15 \
122edc03 261 -i $(IGEN_INSN) \
37379a25
AC		 262 -o $(M16_DC) \
263 -P m16_ \
122edc03
AC		 264 -x \
265 -n m16_icache.h -hc tmp-icache.h \
266 -n m16_icache.c -c tmp-icache.c \
267 -n m16_semantics.h -hs tmp-semantics.h \
268 -n m16_semantics.c -s tmp-semantics.c \
269 -n m16_idecode.h -hd tmp-idecode.h \
270 -n m16_idecode.c -d tmp-idecode.c \
271 -n m16_model.h -hm tmp-model.h \
272 -n m16_model.c -m tmp-model.c \
273 -n m16_support.h -hf tmp-support.h \
274 -n m16_support.c -f tmp-support.c \
37379a25 275 #
122edc03
AC		 276 $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
277 $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
278 $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
279 $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
280 $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
281 $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
282 $(srcdir)/../../move-if-change tmp-model.h m16_model.h
283 $(srcdir)/../../move-if-change tmp-model.c m16_model.c
284 $(srcdir)/../../move-if-change tmp-support.h m16_support.h
285 $(srcdir)/../../move-if-change tmp-support.c m16_support.c
37379a25
AC		 286 ../igen/igen \
287 $(IGEN_TRACE) \
288 -I $(srcdir) \
289 -Werror \
290 -Wnodiscard \
291 @sim_igen_flags@ \
292 -G gen-direct-access \
293 -G gen-zero-r0 \
294 -B 32 \
295 -H 31 \
296 -i $(IGEN_INSN) \
297 -o $(IGEN_DC) \
298 -P m32_ \
299 -x \
300 -n m32_icache.h -hc tmp-icache.h \
301 -n m32_icache.c -c tmp-icache.c \
302 -n m32_semantics.h -hs tmp-semantics.h \
303 -n m32_semantics.c -s tmp-semantics.c \
304 -n m32_idecode.h -hd tmp-idecode.h \
305 -n m32_idecode.c -d tmp-idecode.c \
306 -n m32_model.h -hm tmp-model.h \
307 -n m32_model.c -m tmp-model.c \
308 -n m32_support.h -hf tmp-support.h \
309 -n m32_support.c -f tmp-support.c \
310 #
311 $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
312 $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
313 $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
314 $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
315 $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
316 $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
317 $(srcdir)/../../move-if-change tmp-model.h m32_model.h
318 $(srcdir)/../../move-if-change tmp-model.c m32_model.c
319 $(srcdir)/../../move-if-change tmp-support.h m32_support.h
320 $(srcdir)/../../move-if-change tmp-support.c m32_support.c
321 ../igen/igen \
322 $(IGEN_TRACE) \
323 -I $(srcdir) \
324 -Werror \
325 -Wnodiscard \
326 -Wnowidth \
327 @sim_igen_flags@ @sim_m16_flags@ \
328 -G gen-direct-access \
329 -G gen-zero-r0 \
330 -i $(IGEN_INSN) \
331 -n itable.h -ht tmp-itable.h \
332 -n itable.c -t tmp-itable.c \
333 #
334 $(srcdir)/../../move-if-change tmp-itable.h itable.h
335 $(srcdir)/../../move-if-change tmp-itable.c itable.c
122edc03
AC		 336 touch tmp-m16
337
338
295dbbe4 339clean-extra:
122edc03 340 rm -f gencode oengine.c tmp.igen
aaab4e57
RU		 341 rm -f $(BUILT_SRC_FROM_GEN)
342 rm -f $(BUILT_SRC_FROM_IGEN)
343 rm -f $(BUILT_SRC_FROM_M16)
344 rm -f tmp-igen
345 rm -f tmp-m16
GDB Binutils - Deliverables
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