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* gen-engine.c (print_run_body): Avoid multi-line strings.
[deliverable/binutils-gdb.git] / sim / mips / Makefile.in
CommitLineData
c906108c
SS		 1# Makefile template for Configure for the MIPS simulator.
2# Written by Cygnus Support.
3
4## COMMON_PRE_CONFIG_FRAG
5
6srcdir=@srcdir@
7srcroot=$(srcdir)/../../
8
9# Object files created by various simulator generators.
10
11
12SIM_IGEN_OBJ = \
13 support.o \
14 itable.o \
15 semantics.o \
16 idecode.o \
17 icache.o \
18 @mips_igen_engine@ \
19 irun.o \
20
21
22SIM_M16_OBJ = \
23 m16_support.o \
24 m16_semantics.o \
25 m16_idecode.o \
26 m16_icache.o \
27 \
28 m32_support.o \
29 m32_semantics.o \
30 m32_idecode.o \
31 m32_icache.o \
32 \
33 itable.o \
34 m16run.o \
35
36
37MIPS_EXTRA_OBJS = @mips_extra_objs@
38MIPS_EXTRA_LIBS = @mips_extra_libs@
39
40SIM_OBJS = \
41 $(SIM_@sim_gen@_OBJ) \
42 $(SIM_NEW_COMMON_OBJS) \
43 $(MIPS_EXTRA_OBJS) \
487f79b7 44 cp1.o \
c906108c 45 interp.o \
f4f1b9f1 46 mdmx.o \
c906108c
SS		 47 sim-main.o \
48 sim-hload.o \
49 sim-engine.o \
50 sim-stop.o \
51 sim-resume.o \
52 sim-reason.o \
53
54
55# List of flags to always pass to $(CC).
56SIM_SUBTARGET=@SIM_SUBTARGET@
57SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET)
58
59SIM_EXTRA_CLEAN = clean-extra
60
61SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
62
63SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
64
65# List of main object files for `run'.
66SIM_RUN_OBJS = nrun.o
67
68
69
70## COMMON_POST_CONFIG_FRAG
71
72interp.o: $(srcdir)/interp.c config.h sim-main.h itable.h
487f79b7 73cp1.o: $(srcdir)/cp1.c config.h sim-main.h
c906108c 74
f4f1b9f1 75mdmx.o: $(srcdir)/mdmx.c $(srcdir)/sim-main.h
c906108c
SS		 76
77../igen/igen:
78 cd ../igen && $(MAKE)
79
80IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
81IGEN_INSN=$(srcdir)/mips.igen
82IGEN_DC=$(srcdir)/mips.dc
83M16_DC=$(srcdir)/m16.dc
84IGEN_INCLUDE=\
85 $(srcdir)/m16.igen \
86 $(srcdir)/tx.igen \
87 $(srcdir)/vr.igen \
88
89# NB: Since these can be built by a number of generators, care
90# must be taken to ensure that they are only dependant on
91# one of those generators.
92BUILT_SRC_FROM_GEN = \
93 itable.h \
94 itable.c \
95
96SIM_IGEN_ALL = tmp-igen
97SIM_M16_ALL = tmp-m16
98
99$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
100
101
102
103BUILT_SRC_FROM_IGEN = \
104 icache.h \
105 icache.c \
106 idecode.h \
107 idecode.c \
108 semantics.h \
109 semantics.c \
110 model.h \
111 model.c \
112 support.h \
113 support.c \
114 engine.h \
115 engine.c \
116 irun.c \
117
118$(BUILT_SRC_FROM_IGEN): tmp-igen
119
120tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
121 cd ../igen && $(MAKE)
122 ../igen/igen \
123 $(IGEN_TRACE) \
124 -I $(srcdir) \
125 -Werror \
126 -Wnodiscard \
127 @sim_igen_flags@ \
128 -G gen-direct-access \
129 -G gen-zero-r0 \
130 -B 32 \
131 -H 31 \
132 -i $(IGEN_INSN) \
133 -o $(IGEN_DC) \
134 -x \
135 -n icache.h -hc tmp-icache.h \
136 -n icache.c -c tmp-icache.c \
137 -n semantics.h -hs tmp-semantics.h \
138 -n semantics.c -s tmp-semantics.c \
139 -n idecode.h -hd tmp-idecode.h \
140 -n idecode.c -d tmp-idecode.c \
141 -n model.h -hm tmp-model.h \
142 -n model.c -m tmp-model.c \
143 -n support.h -hf tmp-support.h \
144 -n support.c -f tmp-support.c \
145 -n itable.h -ht tmp-itable.h \
146 -n itable.c -t tmp-itable.c \
147 -n engine.h -he tmp-engine.h \
148 -n engine.c -e tmp-engine.c \
149 -n irun.c -r tmp-irun.c
150 $(srcdir)/../../move-if-change tmp-icache.h icache.h
151 $(srcdir)/../../move-if-change tmp-icache.c icache.c
152 $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
153 $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
154 $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
155 $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
156 $(srcdir)/../../move-if-change tmp-model.h model.h
157 $(srcdir)/../../move-if-change tmp-model.c model.c
158 $(srcdir)/../../move-if-change tmp-support.h support.h
159 $(srcdir)/../../move-if-change tmp-support.c support.c
160 $(srcdir)/../../move-if-change tmp-itable.h itable.h
161 $(srcdir)/../../move-if-change tmp-itable.c itable.c
162 $(srcdir)/../../move-if-change tmp-engine.h engine.h
163 $(srcdir)/../../move-if-change tmp-engine.c engine.c
164 $(srcdir)/../../move-if-change tmp-irun.c irun.c
165 touch tmp-igen
166
167semantics.o: sim-main.h semantics.c $(SIM_EXTRA_DEPS)
168engine.o: sim-main.h engine.c $(SIM_EXTRA_DEPS)
169support.o: sim-main.h support.c $(SIM_EXTRA_DEPS)
170idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS)
171itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS)
172
173
174
175
176BUILT_SRC_FROM_M16 = \
177 m16_icache.h \
178 m16_icache.c \
179 m16_idecode.h \
180 m16_idecode.c \
181 m16_semantics.h \
182 m16_semantics.c \
183 m16_model.h \
184 m16_model.c \
185 m16_support.h \
186 m16_support.c \
187 \
188 m32_icache.h \
189 m32_icache.c \
190 m32_idecode.h \
191 m32_idecode.c \
192 m32_semantics.h \
193 m32_semantics.c \
194 m32_model.h \
195 m32_model.c \
196 m32_support.h \
197 m32_support.c \
198
199$(BUILT_SRC_FROM_M16): tmp-m16
200
201tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
202 cd ../igen && $(MAKE)
203 ../igen/igen \
204 $(IGEN_TRACE) \
205 -I $(srcdir) \
206 -Werror \
207 -Wnodiscard \
208 @sim_m16_flags@ \
209 -G gen-direct-access \
210 -G gen-zero-r0 \
211 -B 16 \
212 -H 15 \
213 -i $(IGEN_INSN) \
214 -o $(M16_DC) \
215 -P m16_ \
216 -x \
217 -n m16_icache.h -hc tmp-icache.h \
218 -n m16_icache.c -c tmp-icache.c \
219 -n m16_semantics.h -hs tmp-semantics.h \
220 -n m16_semantics.c -s tmp-semantics.c \
221 -n m16_idecode.h -hd tmp-idecode.h \
222 -n m16_idecode.c -d tmp-idecode.c \
223 -n m16_model.h -hm tmp-model.h \
224 -n m16_model.c -m tmp-model.c \
225 -n m16_support.h -hf tmp-support.h \
226 -n m16_support.c -f tmp-support.c \
227 #
228 $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
229 $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
230 $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
231 $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
232 $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
233 $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
234 $(srcdir)/../../move-if-change tmp-model.h m16_model.h
235 $(srcdir)/../../move-if-change tmp-model.c m16_model.c
236 $(srcdir)/../../move-if-change tmp-support.h m16_support.h
237 $(srcdir)/../../move-if-change tmp-support.c m16_support.c
238 ../igen/igen \
239 $(IGEN_TRACE) \
240 -I $(srcdir) \
241 -Werror \
242 -Wnodiscard \
243 @sim_igen_flags@ \
244 -G gen-direct-access \
245 -G gen-zero-r0 \
246 -B 32 \
247 -H 31 \
248 -i $(IGEN_INSN) \
249 -o $(IGEN_DC) \
250 -P m32_ \
251 -x \
252 -n m32_icache.h -hc tmp-icache.h \
253 -n m32_icache.c -c tmp-icache.c \
254 -n m32_semantics.h -hs tmp-semantics.h \
255 -n m32_semantics.c -s tmp-semantics.c \
256 -n m32_idecode.h -hd tmp-idecode.h \
257 -n m32_idecode.c -d tmp-idecode.c \
258 -n m32_model.h -hm tmp-model.h \
259 -n m32_model.c -m tmp-model.c \
260 -n m32_support.h -hf tmp-support.h \
261 -n m32_support.c -f tmp-support.c \
262 #
263 $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
264 $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
265 $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
266 $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
267 $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
268 $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
269 $(srcdir)/../../move-if-change tmp-model.h m32_model.h
270 $(srcdir)/../../move-if-change tmp-model.c m32_model.c
271 $(srcdir)/../../move-if-change tmp-support.h m32_support.h
272 $(srcdir)/../../move-if-change tmp-support.c m32_support.c
273 ../igen/igen \
274 $(IGEN_TRACE) \
275 -I $(srcdir) \
276 -Werror \
277 -Wnodiscard \
278 -Wnowidth \
279 @sim_igen_flags@ @sim_m16_flags@ \
280 -G gen-direct-access \
281 -G gen-zero-r0 \
282 -i $(IGEN_INSN) \
283 -n itable.h -ht tmp-itable.h \
284 -n itable.c -t tmp-itable.c \
285 #
286 $(srcdir)/../../move-if-change tmp-itable.h itable.h
287 $(srcdir)/../../move-if-change tmp-itable.c itable.c
288 touch tmp-m16
289
290
291clean-extra:
292 rm -f $(BUILT_SRC_FROM_GEN)
293 rm -f $(BUILT_SRC_FROM_IGEN)
294 rm -f $(BUILT_SRC_FROM_M16)
295 rm -f tmp-*
071da002 296 rm -f m16*.o m32*.o itable*.o
c906108c 297
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