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* Makefile.in (SIM_SKY_OBJS,MIPS_EXTRA_OBJS): New vars.
[deliverable/binutils-gdb.git] / sim / mips / Makefile.in
CommitLineData
4fa134be
ILT		 1# Makefile template for Configure for the MIPS simulator.
2# Written by Cygnus Support.
3
19c5af72
DE		 4## COMMON_PRE_CONFIG_FRAG
5
fafce69a
AC		 6srcdir=@srcdir@
7srcroot=$(srcdir)/../../
8
90ad43b2
AC		 9SIM_NO_OBJ =
10
5759734b
DE		 11# start-sanitize-sky
12SIM_SKY_OBJS = \
13 sky-device.o \
14 sky-dma.o \
15 sky-engine.o \
16 sky-gpuif.o \
17 sky-hardware.o \
18 sky-libvpe.o \
19 sky-pke.o \
20 sky-vu0.o \
21 sky-vu1.o
22# end-sanitize-sky
23
90ad43b2
AC		 24SIM_IGEN_OBJ = \
25 support.o \
26 itable.o \
27 semantics.o \
28 idecode.o \
29 icache.o \
30 engine.o \
37379a25 31 irun.o \
90ad43b2
AC		 32
33SIM_M16_OBJ = \
90ad43b2 34 m16_support.o \
90ad43b2
AC		 35 m16_semantics.o \
36 m16_idecode.o \
37 m16_icache.o \
37379a25
AC		 38 \
39 m32_support.o \
40 m32_semantics.o \
41 m32_idecode.o \
42 m32_icache.o \
43 \
44 itable.o \
45 m16run.o \
90ad43b2 46
5759734b
DE		 47MIPS_EXTRA_OBJS = @mips_extra_objs@
48
122edc03
AC		 49SIM_OBJS = \
50 $(SIM_@sim_gen@_OBJ) \
37379a25 51 $(SIM_NEW_COMMON_OBJS) \
5759734b 52 $(MIPS_EXTRA_OBJS) \
122edc03 53 interp.o \
fafce69a 54 sim-hload.o \
fafce69a
AC		 55 sim-engine.o \
56 sim-stop.o \
57 sim-resume.o \
58 sim-reason.o \
122edc03
AC		 59
60
fafce69a 61# List of flags to always pass to $(CC).
92f91d1f 62SIM_SUBTARGET=@SIM_SUBTARGET@
fafce69a 63
16bd5d6e
AC		 64SIM_NO_CFLAGS = -DWITH_IGEN=0
65SIM_IGEN_CFLAGS = -DWITH_IGEN=1
66SIM_M16_CFLAGS = -DWITH_IGEN=1
67
295dbbe4
SG		 68# FIXME: Hack to find syscall.h? Better support for syscall.h
69# is in progress.
fafce69a 70SIM_EXTRA_CFLAGS = \
92f91d1f 71 $(SIM_SUBTARGET) \
122edc03
AC		 72 -I$(srcdir)/../../newlib/libc/sys/idt \
73 $(SIM_@sim_gen@_CFLAGS)
fafce69a 74
122edc03 75SIM_EXTRA_CLEAN = clean-igen clean-m16 clean-extra
4fa134be 76
122edc03 77SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
18c64df6 78
fafce69a
AC		 79# List of main object files for `run'.
80SIM_RUN_OBJS = nrun.o
81
82
83
19c5af72 84## COMMON_POST_CONFIG_FRAG
4fa134be 85
37379a25
AC		 86SIM_NO_INTERP = oengine.c
87interp.o: $(srcdir)/interp.c config.h sim-main.h $(SIM_@sim_gen@_INTERP)
88
89
90
91#
92# Old deprecated generator
93#
94
95SIM_NO_ALL = oengine.c
4fa134be 96
284e759d
AC		 97oengine.c: gencode
98 ./gencode @SIMCONF@ > tmp-oengine
99 mv tmp-oengine oengine.c
4fa134be 100
295dbbe4
SG		 101gencode: gencode.o getopt.o getopt1.o
102 $(CC_FOR_BUILD) -o $@ gencode.o getopt.o getopt1.o
4fa134be 103
295dbbe4
SG		 104gencode.o: $(srcdir)/gencode.c
105 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/gencode.c
18c64df6 106
295dbbe4
SG		 107getopt.o: $(srcdir)/../../libiberty/getopt.c
108 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt.c
109getopt1.o: $(srcdir)/../../libiberty/getopt1.c
110 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt1.c
4fa134be 111
122edc03 112
37379a25 113
122edc03
AC		 114../igen/igen:
115 cd ../igen && $(MAKE)
116
117IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
118IGEN_INSN=$(srcdir)/mips.igen
119IGEN_DC=$(srcdir)/mips.dc
37379a25 120M16_DC=$(srcdir)/m16.dc
01b9cd49
AC		 121IGEN_INCLUDE=\
122 $(start-sanitize-r5900) \
123 $(srcdir)/r5900.igen \
124 $(end-sanitize-r5900) \
125 $(start-sanitize-vr5400) \
126 $(srcdir)/vr5400.igen \
37379a25 127 $(srcdir)/mdmx.igen \
01b9cd49
AC		 128 $(end-sanitize-vr5400) \
129 $(srcdir)/m16.igen
122edc03 130
122edc03
AC		 131SIM_IGEN_ALL = tmp-igen
132
122edc03
AC		 133BUILT_SRC_FROM_IGEN = \
134 icache.h \
135 icache.c \
136 idecode.h \
137 idecode.c \
138 semantics.h \
139 semantics.c \
140 model.h \
141 model.c \
142 support.h \
143 support.c \
144 itable.h \
145 itable.c \
146 engine.h \
147 engine.c \
148 irun.c
149
150$(BUILT_SRC_FROM_IGEN): tmp-igen
151
152.PHONY: clean-igen
153clean-igen:
154 rm -f $(BUILT_SRC_FROM_IGEN)
155 rm -f tmp-igen
156
01b9cd49 157tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
122edc03
AC		 158 cd ../igen && $(MAKE)
159 ../igen/igen \
160 $(IGEN_TRACE) \
90ad43b2 161 -I $(srcdir) \
122edc03
AC		 162 -Werror \
163 -Wnodiscard \
16bd5d6e 164 @sim_igen_flags@ \
122edc03 165 -G gen-direct-access \
37379a25
AC		 166 -G gen-zero-r0 \
167 -B 32 \
168 -H 31 \
122edc03
AC		 169 -i $(IGEN_INSN) \
170 -o $(IGEN_DC) \
171 -x \
172 -n icache.h -hc tmp-icache.h \
173 -n icache.c -c tmp-icache.c \
174 -n semantics.h -hs tmp-semantics.h \
175 -n semantics.c -s tmp-semantics.c \
176 -n idecode.h -hd tmp-idecode.h \
177 -n idecode.c -d tmp-idecode.c \
178 -n model.h -hm tmp-model.h \
179 -n model.c -m tmp-model.c \
180 -n support.h -hf tmp-support.h \
181 -n support.c -f tmp-support.c \
182 -n itable.h -ht tmp-itable.h \
183 -n itable.c -t tmp-itable.c \
184 -n engine.h -he tmp-engine.h \
185 -n engine.c -e tmp-engine.c \
186 -n irun.c -r tmp-irun.c
187 $(srcdir)/../../move-if-change tmp-icache.h icache.h
188 $(srcdir)/../../move-if-change tmp-icache.c icache.c
189 $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
190 $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
191 $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
192 $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
193 $(srcdir)/../../move-if-change tmp-model.h model.h
194 $(srcdir)/../../move-if-change tmp-model.c model.c
195 $(srcdir)/../../move-if-change tmp-support.h support.h
196 $(srcdir)/../../move-if-change tmp-support.c support.c
197 $(srcdir)/../../move-if-change tmp-itable.h itable.h
198 $(srcdir)/../../move-if-change tmp-itable.c itable.c
199 $(srcdir)/../../move-if-change tmp-engine.h engine.h
200 $(srcdir)/../../move-if-change tmp-engine.c engine.c
201 $(srcdir)/../../move-if-change tmp-irun.c irun.c
202 touch tmp-igen
203
7ce8b917
AC		 204semantics.o: sim-main.h $(SIM_EXTRA_DEPS)
205engine.o: sim-main.h $(SIM_EXTRA_DEPS)
206support.o: sim-main.h $(SIM_EXTRA_DEPS)
207idecode.o: sim-main.h $(SIM_EXTRA_DEPS)
208itable.o: sim-main.h $(SIM_EXTRA_DEPS)
209
122edc03
AC		 210
211
37379a25 212SIM_M16_ALL = tmp-m16
122edc03 213
122edc03
AC		 214BUILT_SRC_FROM_M16 = \
215 m16_icache.h \
216 m16_icache.c \
217 m16_idecode.h \
218 m16_idecode.c \
219 m16_semantics.h \
220 m16_semantics.c \
221 m16_model.h \
222 m16_model.c \
223 m16_support.h \
224 m16_support.c \
37379a25
AC		 225 \
226 m32_icache.h \
227 m32_icache.c \
228 m32_idecode.h \
229 m32_idecode.c \
230 m32_semantics.h \
231 m32_semantics.c \
232 m32_model.h \
233 m32_model.c \
234 m32_support.h \
235 m32_support.c \
236 \
237 itable.h \
238 itable.c \
122edc03
AC		 239
240$(BUILT_SRC_FROM_M16): tmp-m16
241
242.PHONY: clean-m16
243clean-m16:
244 rm -f $(BUILT_SRC_FROM_M16)
245 rm -f tmp-m16
246
01b9cd49 247tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
122edc03
AC		 248 cd ../igen && $(MAKE)
249 ../igen/igen \
250 $(IGEN_TRACE) \
90ad43b2 251 -I $(srcdir) \
122edc03
AC		 252 -Werror \
253 -Wnodiscard \
37379a25 254 @sim_m16_flags@ \
122edc03 255 -G gen-direct-access \
37379a25
AC		 256 -G gen-zero-r0 \
257 -B 16 \
258 -H 15 \
122edc03 259 -i $(IGEN_INSN) \
37379a25
AC		 260 -o $(M16_DC) \
261 -P m16_ \
122edc03
AC		 262 -x \
263 -n m16_icache.h -hc tmp-icache.h \
264 -n m16_icache.c -c tmp-icache.c \
265 -n m16_semantics.h -hs tmp-semantics.h \
266 -n m16_semantics.c -s tmp-semantics.c \
267 -n m16_idecode.h -hd tmp-idecode.h \
268 -n m16_idecode.c -d tmp-idecode.c \
269 -n m16_model.h -hm tmp-model.h \
270 -n m16_model.c -m tmp-model.c \
271 -n m16_support.h -hf tmp-support.h \
272 -n m16_support.c -f tmp-support.c \
37379a25 273 #
122edc03
AC		 274 $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
275 $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
276 $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
277 $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
278 $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
279 $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
280 $(srcdir)/../../move-if-change tmp-model.h m16_model.h
281 $(srcdir)/../../move-if-change tmp-model.c m16_model.c
282 $(srcdir)/../../move-if-change tmp-support.h m16_support.h
283 $(srcdir)/../../move-if-change tmp-support.c m16_support.c
37379a25
AC		 284 ../igen/igen \
285 $(IGEN_TRACE) \
286 -I $(srcdir) \
287 -Werror \
288 -Wnodiscard \
289 @sim_igen_flags@ \
290 -G gen-direct-access \
291 -G gen-zero-r0 \
292 -B 32 \
293 -H 31 \
294 -i $(IGEN_INSN) \
295 -o $(IGEN_DC) \
296 -P m32_ \
297 -x \
298 -n m32_icache.h -hc tmp-icache.h \
299 -n m32_icache.c -c tmp-icache.c \
300 -n m32_semantics.h -hs tmp-semantics.h \
301 -n m32_semantics.c -s tmp-semantics.c \
302 -n m32_idecode.h -hd tmp-idecode.h \
303 -n m32_idecode.c -d tmp-idecode.c \
304 -n m32_model.h -hm tmp-model.h \
305 -n m32_model.c -m tmp-model.c \
306 -n m32_support.h -hf tmp-support.h \
307 -n m32_support.c -f tmp-support.c \
308 #
309 $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
310 $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
311 $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
312 $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
313 $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
314 $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
315 $(srcdir)/../../move-if-change tmp-model.h m32_model.h
316 $(srcdir)/../../move-if-change tmp-model.c m32_model.c
317 $(srcdir)/../../move-if-change tmp-support.h m32_support.h
318 $(srcdir)/../../move-if-change tmp-support.c m32_support.c
319 ../igen/igen \
320 $(IGEN_TRACE) \
321 -I $(srcdir) \
322 -Werror \
323 -Wnodiscard \
324 -Wnowidth \
325 @sim_igen_flags@ @sim_m16_flags@ \
326 -G gen-direct-access \
327 -G gen-zero-r0 \
328 -i $(IGEN_INSN) \
329 -n itable.h -ht tmp-itable.h \
330 -n itable.c -t tmp-itable.c \
331 #
332 $(srcdir)/../../move-if-change tmp-itable.h itable.h
333 $(srcdir)/../../move-if-change tmp-itable.c itable.c
122edc03
AC		 334 touch tmp-m16
335
336
295dbbe4 337clean-extra:
122edc03 338 rm -f gencode oengine.c tmp.igen
GDB Binutils - Deliverables
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