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* testutils.inc (setup): __start is also a valid start symbol.
[deliverable/binutils-gdb.git] / sim / mips / Makefile.in
CommitLineData
c906108c
SS		 1# Makefile template for Configure for the MIPS simulator.
2# Written by Cygnus Support.
3
ae451ac6
ILT		 4SHELL = @SHELL@
5
c906108c
SS		 6## COMMON_PRE_CONFIG_FRAG
7
8srcdir=@srcdir@
9srcroot=$(srcdir)/../../
10
11# Object files created by various simulator generators.
12
13
14SIM_IGEN_OBJ = \
15 support.o \
16 itable.o \
17 semantics.o \
18 idecode.o \
19 icache.o \
20 @mips_igen_engine@ \
21 irun.o \
22
23
24SIM_M16_OBJ = \
25 m16_support.o \
26 m16_semantics.o \
27 m16_idecode.o \
28 m16_icache.o \
29 \
30 m32_support.o \
31 m32_semantics.o \
32 m32_idecode.o \
33 m32_icache.o \
34 \
35 itable.o \
36 m16run.o \
37
4c54fc26 38SIM_MULTI_OBJ = itable.o @sim_multi_obj@
c906108c
SS		 39
40MIPS_EXTRA_OBJS = @mips_extra_objs@
41MIPS_EXTRA_LIBS = @mips_extra_libs@
42
43SIM_OBJS = \
44 $(SIM_@sim_gen@_OBJ) \
45 $(SIM_NEW_COMMON_OBJS) \
46 $(MIPS_EXTRA_OBJS) \
487f79b7 47 cp1.o \
c906108c 48 interp.o \
f4f1b9f1 49 mdmx.o \
40a5538e 50 dsp.o \
c906108c
SS		 51 sim-main.o \
52 sim-hload.o \
53 sim-engine.o \
54 sim-stop.o \
55 sim-resume.o \
56 sim-reason.o \
57
58
59# List of flags to always pass to $(CC).
60SIM_SUBTARGET=@SIM_SUBTARGET@
61SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET)
62
63SIM_EXTRA_CLEAN = clean-extra
4c54fc26 64SIM_EXTRA_DISTCLEAN = distclean-extra
c906108c
SS		 65
66SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
67
68SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
69
70# List of main object files for `run'.
71SIM_RUN_OBJS = nrun.o
72
73
74
75## COMMON_POST_CONFIG_FRAG
76
77interp.o: $(srcdir)/interp.c config.h sim-main.h itable.h
487f79b7 78cp1.o: $(srcdir)/cp1.c config.h sim-main.h
c906108c 79
f4f1b9f1 80mdmx.o: $(srcdir)/mdmx.c $(srcdir)/sim-main.h
c906108c 81
40a5538e
CF		 82dsp.o: $(srcdir)/dsp.c $(srcdir)/sim-main.h
83
4c54fc26
CD		 84multi-run.o: multi-include.h tmp-mach-multi
85
c906108c
SS		 86../igen/igen:
87 cd ../igen && $(MAKE)
88
89IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
90IGEN_INSN=$(srcdir)/mips.igen
91IGEN_DC=$(srcdir)/mips.dc
92M16_DC=$(srcdir)/m16.dc
93IGEN_INCLUDE=\
94 $(srcdir)/m16.igen \
909daa82 95 $(srcdir)/mdmx.igen \
e7e81181 96 $(srcdir)/mips3d.igen \
7cbea089 97 $(srcdir)/sb1.igen \
c906108c
SS		 98 $(srcdir)/tx.igen \
99 $(srcdir)/vr.igen \
40a5538e 100 $(srcdir)/dsp.igen \
c906108c
SS		 101
102# NB: Since these can be built by a number of generators, care
103# must be taken to ensure that they are only dependant on
104# one of those generators.
105BUILT_SRC_FROM_GEN = \
106 itable.h \
107 itable.c \
108
109SIM_IGEN_ALL = tmp-igen
110SIM_M16_ALL = tmp-m16
4c54fc26 111SIM_MULTI_ALL = tmp-multi
c906108c
SS		 112
113$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
114
115
116
117BUILT_SRC_FROM_IGEN = \
118 icache.h \
119 icache.c \
120 idecode.h \
121 idecode.c \
122 semantics.h \
123 semantics.c \
124 model.h \
125 model.c \
126 support.h \
127 support.c \
128 engine.h \
129 engine.c \
130 irun.c \
131
132$(BUILT_SRC_FROM_IGEN): tmp-igen
133
134tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
135 cd ../igen && $(MAKE)
136 ../igen/igen \
137 $(IGEN_TRACE) \
138 -I $(srcdir) \
139 -Werror \
140 -Wnodiscard \
141 @sim_igen_flags@ \
142 -G gen-direct-access \
143 -G gen-zero-r0 \
144 -B 32 \
145 -H 31 \
146 -i $(IGEN_INSN) \
147 -o $(IGEN_DC) \
148 -x \
149 -n icache.h -hc tmp-icache.h \
150 -n icache.c -c tmp-icache.c \
151 -n semantics.h -hs tmp-semantics.h \
152 -n semantics.c -s tmp-semantics.c \
153 -n idecode.h -hd tmp-idecode.h \
154 -n idecode.c -d tmp-idecode.c \
155 -n model.h -hm tmp-model.h \
156 -n model.c -m tmp-model.c \
157 -n support.h -hf tmp-support.h \
158 -n support.c -f tmp-support.c \
159 -n itable.h -ht tmp-itable.h \
160 -n itable.c -t tmp-itable.c \
161 -n engine.h -he tmp-engine.h \
162 -n engine.c -e tmp-engine.c \
163 -n irun.c -r tmp-irun.c
ae451ac6
ILT		 164 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
165 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
166 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
167 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
168 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
169 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
170 $(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
171 $(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
172 $(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
173 $(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
174 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
175 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
176 $(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
177 $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
178 $(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
c906108c
SS		 179 touch tmp-igen
180
181semantics.o: sim-main.h semantics.c $(SIM_EXTRA_DEPS)
182engine.o: sim-main.h engine.c $(SIM_EXTRA_DEPS)
183support.o: sim-main.h support.c $(SIM_EXTRA_DEPS)
184idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS)
185itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS)
186
187
188
189
190BUILT_SRC_FROM_M16 = \
191 m16_icache.h \
192 m16_icache.c \
193 m16_idecode.h \
194 m16_idecode.c \
195 m16_semantics.h \
196 m16_semantics.c \
197 m16_model.h \
198 m16_model.c \
199 m16_support.h \
200 m16_support.c \
201 \
202 m32_icache.h \
203 m32_icache.c \
204 m32_idecode.h \
205 m32_idecode.c \
206 m32_semantics.h \
207 m32_semantics.c \
208 m32_model.h \
209 m32_model.c \
210 m32_support.h \
211 m32_support.c \
212
213$(BUILT_SRC_FROM_M16): tmp-m16
214
215tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
216 cd ../igen && $(MAKE)
217 ../igen/igen \
218 $(IGEN_TRACE) \
219 -I $(srcdir) \
220 -Werror \
221 -Wnodiscard \
222 @sim_m16_flags@ \
223 -G gen-direct-access \
224 -G gen-zero-r0 \
225 -B 16 \
226 -H 15 \
227 -i $(IGEN_INSN) \
228 -o $(M16_DC) \
229 -P m16_ \
230 -x \
231 -n m16_icache.h -hc tmp-icache.h \
232 -n m16_icache.c -c tmp-icache.c \
233 -n m16_semantics.h -hs tmp-semantics.h \
234 -n m16_semantics.c -s tmp-semantics.c \
235 -n m16_idecode.h -hd tmp-idecode.h \
236 -n m16_idecode.c -d tmp-idecode.c \
237 -n m16_model.h -hm tmp-model.h \
238 -n m16_model.c -m tmp-model.c \
239 -n m16_support.h -hf tmp-support.h \
240 -n m16_support.c -f tmp-support.c \
241 #
ae451ac6
ILT		 242 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
243 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
244 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
245 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
246 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
247 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
248 $(SHELL) $(srcdir)/../../move-if-change tmp-model.h m16_model.h
249 $(SHELL) $(srcdir)/../../move-if-change tmp-model.c m16_model.c
250 $(SHELL) $(srcdir)/../../move-if-change tmp-support.h m16_support.h
251 $(SHELL) $(srcdir)/../../move-if-change tmp-support.c m16_support.c
c906108c
SS		 252 ../igen/igen \
253 $(IGEN_TRACE) \
254 -I $(srcdir) \
255 -Werror \
256 -Wnodiscard \
257 @sim_igen_flags@ \
258 -G gen-direct-access \
259 -G gen-zero-r0 \
260 -B 32 \
261 -H 31 \
262 -i $(IGEN_INSN) \
263 -o $(IGEN_DC) \
264 -P m32_ \
265 -x \
266 -n m32_icache.h -hc tmp-icache.h \
267 -n m32_icache.c -c tmp-icache.c \
268 -n m32_semantics.h -hs tmp-semantics.h \
269 -n m32_semantics.c -s tmp-semantics.c \
270 -n m32_idecode.h -hd tmp-idecode.h \
271 -n m32_idecode.c -d tmp-idecode.c \
272 -n m32_model.h -hm tmp-model.h \
273 -n m32_model.c -m tmp-model.c \
274 -n m32_support.h -hf tmp-support.h \
275 -n m32_support.c -f tmp-support.c \
276 #
ae451ac6
ILT		 277 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
278 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
279 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
280 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
281 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
282 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
283 $(SHELL) $(srcdir)/../../move-if-change tmp-model.h m32_model.h
284 $(SHELL) $(srcdir)/../../move-if-change tmp-model.c m32_model.c
285 $(SHELL) $(srcdir)/../../move-if-change tmp-support.h m32_support.h
286 $(SHELL) $(srcdir)/../../move-if-change tmp-support.c m32_support.c
c906108c
SS		 287 ../igen/igen \
288 $(IGEN_TRACE) \
289 -I $(srcdir) \
290 -Werror \
291 -Wnodiscard \
292 -Wnowidth \
293 @sim_igen_flags@ @sim_m16_flags@ \
294 -G gen-direct-access \
295 -G gen-zero-r0 \
296 -i $(IGEN_INSN) \
297 -n itable.h -ht tmp-itable.h \
298 -n itable.c -t tmp-itable.c \
299 #
ae451ac6
ILT		 300 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
301 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
c906108c
SS		 302 touch tmp-m16
303
304
4c54fc26
CD		 305BUILT_SRC_FROM_MULTI = @sim_multi_src@
306SIM_MULTI_IGEN_CONFIGS = @sim_multi_igen_configs@
307
308$(BUILT_SRC_FROM_MULTI): tmp-multi
309tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi targ-vals.h
310tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
311 for t in $(SIM_MULTI_IGEN_CONFIGS); do \
312 p=`echo $${t} | sed -e 's/:.*//'` ; \
313 m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
314 f=`echo $${t} | sed -e 's/.*://'` ; \
315 case $${p} in \
316 m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
317 *) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
318 esac; \
319 ../igen/igen \
320 $(IGEN_TRACE) \
321 $${e} \
322 -I $(srcdir) \
323 -Werror \
324 -Wnodiscard \
325 -N 0 \
326 -M $${m} \
327 -G gen-direct-access \
328 -G gen-zero-r0 \
329 -i $(IGEN_INSN) \
330 -P $${p}_ \
331 -x \
332 -n $${p}_icache.h -hc tmp-icache.h \
333 -n $${p}_icache.c -c tmp-icache.c \
334 -n $${p}_semantics.h -hs tmp-semantics.h \
335 -n $${p}_semantics.c -s tmp-semantics.c \
336 -n $${p}_idecode.h -hd tmp-idecode.h \
337 -n $${p}_idecode.c -d tmp-idecode.c \
338 -n $${p}_model.h -hm tmp-model.h \
339 -n $${p}_model.c -m tmp-model.c \
340 -n $${p}_support.h -hf tmp-support.h \
341 -n $${p}_support.c -f tmp-support.c \
342 -n $${p}_engine.h -he tmp-engine.h \
343 -n $${p}_engine.c -e tmp-engine.c \
344 ; \
ae451ac6
ILT		 345 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h $${p}_icache.h ; \
346 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c $${p}_icache.c ; \
347 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h $${p}_idecode.h ; \
348 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c $${p}_idecode.c ; \
349 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h $${p}_semantics.h ; \
350 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c $${p}_semantics.c ; \
351 $(SHELL) $(srcdir)/../../move-if-change tmp-model.h $${p}_model.h ; \
352 $(SHELL) $(srcdir)/../../move-if-change tmp-model.c $${p}_model.c ; \
353 $(SHELL) $(srcdir)/../../move-if-change tmp-support.h $${p}_support.h ; \
354 $(SHELL) $(srcdir)/../../move-if-change tmp-support.c $${p}_support.c ; \
355 $(SHELL) $(srcdir)/../../move-if-change tmp-engine.h $${p}_engine.h ; \
356 $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c $${p}_engine.c ; \
4c54fc26
CD		 357 done
358 touch tmp-mach-multi
359tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
360 ../igen/igen \
361 $(IGEN_TRACE) \
362 -I $(srcdir) \
363 -Werror \
364 -Wnodiscard \
365 -Wnowidth \
366 -N 0 \
367 @sim_multi_flags@ \
368 -G gen-direct-access \
369 -G gen-zero-r0 \
370 -i $(IGEN_INSN) \
371 -n itable.h -ht tmp-itable.h \
372 -n itable.c -t tmp-itable.c \
373 #
ae451ac6
ILT		 374 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
375 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
4c54fc26
CD		 376 touch tmp-itable-multi
377tmp-run-multi: $(srcdir)/m16run.c
378 for t in $(SIM_MULTI_IGEN_CONFIGS); do \
379 case $${t} in \
80551777 380 m16*) \
4c54fc26
CD		 381 m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
382 sed < $(srcdir)/m16run.c > tmp-run \
383 -e "s/^sim_/m16$${m}_/" \
384 -e "s/m16_/m16$${m}_/" \
385 -e "s/m32_/m32$${m}_/" ; \
ae451ac6 386 $(SHELL) $(srcdir)/../../move-if-change tmp-run m16$${m}_run.c ; \
4c54fc26
CD		 387 esac \
388 done
389 touch tmp-run-multi
390
c906108c
SS		 391clean-extra:
392 rm -f $(BUILT_SRC_FROM_GEN)
393 rm -f $(BUILT_SRC_FROM_IGEN)
394 rm -f $(BUILT_SRC_FROM_M16)
4c54fc26 395 rm -f $(BUILT_SRC_FROM_MULTI)
c906108c 396 rm -f tmp-*
071da002 397 rm -f m16*.o m32*.o itable*.o
c906108c 398
4c54fc26
CD		 399distclean-extra:
400 rm -f multi-include.h multi-run.c
GDB Binutils - Deliverables
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