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Implement 32 bit MIPS16 instructions listed in m16.igen.
[deliverable/binutils-gdb.git] / sim / mips / Makefile.in
CommitLineData
4fa134be
ILT		 1# Makefile template for Configure for the MIPS simulator.
2# Written by Cygnus Support.
3
19c5af72
DE		 4## COMMON_PRE_CONFIG_FRAG
5
fafce69a
AC		 6srcdir=@srcdir@
7srcroot=$(srcdir)/../../
8
90ad43b2
AC		 9SIM_NO_OBJ =
10
5759734b
DE		 11# start-sanitize-sky
12SIM_SKY_OBJS = \
13 sky-device.o \
14 sky-dma.o \
15 sky-engine.o \
16 sky-gpuif.o \
17 sky-hardware.o \
18 sky-libvpe.o \
19 sky-pke.o \
d44859a2 20 sky-vu.o \
11c47f31 21 sky-vudis.o \
76969284 22 sky-gs.o \
aaab4e57 23 sky-gdb.o
5759734b
DE		 24# end-sanitize-sky
25
90ad43b2
AC		 26SIM_IGEN_OBJ = \
27 support.o \
28 itable.o \
29 semantics.o \
30 idecode.o \
31 icache.o \
32 engine.o \
37379a25 33 irun.o \
90ad43b2
AC		 34
35SIM_M16_OBJ = \
90ad43b2 36 m16_support.o \
90ad43b2
AC		 37 m16_semantics.o \
38 m16_idecode.o \
39 m16_icache.o \
37379a25
AC		 40 \
41 m32_support.o \
42 m32_semantics.o \
43 m32_idecode.o \
44 m32_icache.o \
45 \
46 itable.o \
47 m16run.o \
90ad43b2 48
5759734b 49MIPS_EXTRA_OBJS = @mips_extra_objs@
d44859a2 50MIPS_EXTRA_LIBS = @mips_extra_libs@
5759734b 51
122edc03
AC		 52SIM_OBJS = \
53 $(SIM_@sim_gen@_OBJ) \
37379a25 54 $(SIM_NEW_COMMON_OBJS) \
5759734b 55 $(MIPS_EXTRA_OBJS) \
122edc03 56 interp.o \
64ed8b6a 57 sim-main.o \
fafce69a 58 sim-hload.o \
fafce69a
AC		 59 sim-engine.o \
60 sim-stop.o \
61 sim-resume.o \
62 sim-reason.o \
122edc03
AC		 63
64
fafce69a 65# List of flags to always pass to $(CC).
92f91d1f 66SIM_SUBTARGET=@SIM_SUBTARGET@
fafce69a 67
16bd5d6e
AC		 68SIM_NO_CFLAGS = -DWITH_IGEN=0
69SIM_IGEN_CFLAGS = -DWITH_IGEN=1
70SIM_M16_CFLAGS = -DWITH_IGEN=1
71
295dbbe4
SG		 72# FIXME: Hack to find syscall.h? Better support for syscall.h
73# is in progress.
fafce69a 74SIM_EXTRA_CFLAGS = \
92f91d1f 75 $(SIM_SUBTARGET) \
122edc03
AC		 76 -I$(srcdir)/../../newlib/libc/sys/idt \
77 $(SIM_@sim_gen@_CFLAGS)
fafce69a 78
aaab4e57 79SIM_EXTRA_CLEAN = clean-extra
4fa134be 80
122edc03 81SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
18c64df6 82
d44859a2
RU		 83SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
84
fafce69a
AC		 85# List of main object files for `run'.
86SIM_RUN_OBJS = nrun.o
87
88
89
19c5af72 90## COMMON_POST_CONFIG_FRAG
4fa134be 91
37379a25
AC		 92SIM_NO_INTERP = oengine.c
93interp.o: $(srcdir)/interp.c config.h sim-main.h $(SIM_@sim_gen@_INTERP)
94
95
96
97#
98# Old deprecated generator
99#
100
101SIM_NO_ALL = oengine.c
4fa134be 102
284e759d
AC		 103oengine.c: gencode
104 ./gencode @SIMCONF@ > tmp-oengine
105 mv tmp-oengine oengine.c
4fa134be 106
295dbbe4
SG		 107gencode: gencode.o getopt.o getopt1.o
108 $(CC_FOR_BUILD) -o $@ gencode.o getopt.o getopt1.o
4fa134be 109
295dbbe4
SG		 110gencode.o: $(srcdir)/gencode.c
111 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/gencode.c
18c64df6 112
295dbbe4
SG		 113getopt.o: $(srcdir)/../../libiberty/getopt.c
114 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt.c
115getopt1.o: $(srcdir)/../../libiberty/getopt1.c
116 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt1.c
4fa134be 117
122edc03 118
37379a25 119
122edc03
AC		 120../igen/igen:
121 cd ../igen && $(MAKE)
122
c0a4c3ba 123IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
122edc03
AC		 124IGEN_INSN=$(srcdir)/mips.igen
125IGEN_DC=$(srcdir)/mips.dc
37379a25 126M16_DC=$(srcdir)/m16.dc
01b9cd49
AC		 127IGEN_INCLUDE=\
128 $(start-sanitize-r5900) \
129 $(srcdir)/r5900.igen \
130 $(end-sanitize-r5900) \
131 $(start-sanitize-vr5400) \
132 $(srcdir)/vr5400.igen \
37379a25 133 $(srcdir)/mdmx.igen \
01b9cd49 134 $(end-sanitize-vr5400) \
d44859a2
RU		 135 $(start-sanitize-vr4320) \
136 $(srcdir)/vr4320.igen \
137 $(end-sanitize-vr4320) \
64ed8b6a
AC		 138 $(srcdir)/m16.igen \
139 $(srcdir)/tx.igen
122edc03 140
122edc03
AC		 141SIM_IGEN_ALL = tmp-igen
142
122edc03
AC		 143BUILT_SRC_FROM_IGEN = \
144 icache.h \
145 icache.c \
146 idecode.h \
147 idecode.c \
148 semantics.h \
149 semantics.c \
150 model.h \
151 model.c \
152 support.h \
153 support.c \
122edc03
AC		 154 engine.h \
155 engine.c \
aaab4e57 156 irun.c \
122edc03 157
aaab4e57
RU		 158# NB: Since these can be built by either tmp-igen or tmp-m16
159# they are explicitly marked as being dependant on the
160# dependant on the selected generator.
161BUILT_SRC_FROM_GEN = \
162 itable.h \
163 itable.c \
122edc03 164
aaab4e57
RU		 165$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
166
167
168$(BUILT_SRC_FROM_IGEN): tmp-igen
122edc03 169
01b9cd49 170tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
122edc03
AC		 171 cd ../igen && $(MAKE)
172 ../igen/igen \
173 $(IGEN_TRACE) \
90ad43b2 174 -I $(srcdir) \
122edc03
AC		 175 -Werror \
176 -Wnodiscard \
16bd5d6e 177 @sim_igen_flags@ \
122edc03 178 -G gen-direct-access \
37379a25
AC		 179 -G gen-zero-r0 \
180 -B 32 \
181 -H 31 \
122edc03
AC		 182 -i $(IGEN_INSN) \
183 -o $(IGEN_DC) \
184 -x \
185 -n icache.h -hc tmp-icache.h \
186 -n icache.c -c tmp-icache.c \
187 -n semantics.h -hs tmp-semantics.h \
188 -n semantics.c -s tmp-semantics.c \
189 -n idecode.h -hd tmp-idecode.h \
190 -n idecode.c -d tmp-idecode.c \
191 -n model.h -hm tmp-model.h \
192 -n model.c -m tmp-model.c \
193 -n support.h -hf tmp-support.h \
194 -n support.c -f tmp-support.c \
195 -n itable.h -ht tmp-itable.h \
196 -n itable.c -t tmp-itable.c \
197 -n engine.h -he tmp-engine.h \
198 -n engine.c -e tmp-engine.c \
199 -n irun.c -r tmp-irun.c
200 $(srcdir)/../../move-if-change tmp-icache.h icache.h
201 $(srcdir)/../../move-if-change tmp-icache.c icache.c
202 $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
203 $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
204 $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
205 $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
206 $(srcdir)/../../move-if-change tmp-model.h model.h
207 $(srcdir)/../../move-if-change tmp-model.c model.c
208 $(srcdir)/../../move-if-change tmp-support.h support.h
209 $(srcdir)/../../move-if-change tmp-support.c support.c
210 $(srcdir)/../../move-if-change tmp-itable.h itable.h
211 $(srcdir)/../../move-if-change tmp-itable.c itable.c
212 $(srcdir)/../../move-if-change tmp-engine.h engine.h
213 $(srcdir)/../../move-if-change tmp-engine.c engine.c
214 $(srcdir)/../../move-if-change tmp-irun.c irun.c
215 touch tmp-igen
216
64ed8b6a
AC		 217semantics.o: sim-main.h semantics.c $(SIM_EXTRA_DEPS)
218engine.o: sim-main.h engine.c $(SIM_EXTRA_DEPS)
219support.o: sim-main.h support.c $(SIM_EXTRA_DEPS)
220idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS)
221itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS)
7ce8b917 222
122edc03
AC		 223
224
37379a25 225SIM_M16_ALL = tmp-m16
122edc03 226
122edc03
AC		 227BUILT_SRC_FROM_M16 = \
228 m16_icache.h \
229 m16_icache.c \
230 m16_idecode.h \
231 m16_idecode.c \
232 m16_semantics.h \
233 m16_semantics.c \
234 m16_model.h \
235 m16_model.c \
236 m16_support.h \
237 m16_support.c \
37379a25
AC		 238 \
239 m32_icache.h \
240 m32_icache.c \
241 m32_idecode.h \
242 m32_idecode.c \
243 m32_semantics.h \
244 m32_semantics.c \
245 m32_model.h \
246 m32_model.c \
247 m32_support.h \
248 m32_support.c \
122edc03
AC		 249
250$(BUILT_SRC_FROM_M16): tmp-m16
251
01b9cd49 252tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
122edc03
AC		 253 cd ../igen && $(MAKE)
254 ../igen/igen \
255 $(IGEN_TRACE) \
90ad43b2 256 -I $(srcdir) \
122edc03
AC		 257 -Werror \
258 -Wnodiscard \
37379a25 259 @sim_m16_flags@ \
122edc03 260 -G gen-direct-access \
37379a25
AC		 261 -G gen-zero-r0 \
262 -B 16 \
263 -H 15 \
122edc03 264 -i $(IGEN_INSN) \
37379a25
AC		 265 -o $(M16_DC) \
266 -P m16_ \
122edc03
AC		 267 -x \
268 -n m16_icache.h -hc tmp-icache.h \
269 -n m16_icache.c -c tmp-icache.c \
270 -n m16_semantics.h -hs tmp-semantics.h \
271 -n m16_semantics.c -s tmp-semantics.c \
272 -n m16_idecode.h -hd tmp-idecode.h \
273 -n m16_idecode.c -d tmp-idecode.c \
274 -n m16_model.h -hm tmp-model.h \
275 -n m16_model.c -m tmp-model.c \
276 -n m16_support.h -hf tmp-support.h \
277 -n m16_support.c -f tmp-support.c \
37379a25 278 #
122edc03
AC		 279 $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
280 $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
281 $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
282 $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
283 $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
284 $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
285 $(srcdir)/../../move-if-change tmp-model.h m16_model.h
286 $(srcdir)/../../move-if-change tmp-model.c m16_model.c
287 $(srcdir)/../../move-if-change tmp-support.h m16_support.h
288 $(srcdir)/../../move-if-change tmp-support.c m16_support.c
37379a25
AC		 289 ../igen/igen \
290 $(IGEN_TRACE) \
291 -I $(srcdir) \
292 -Werror \
293 -Wnodiscard \
294 @sim_igen_flags@ \
295 -G gen-direct-access \
296 -G gen-zero-r0 \
297 -B 32 \
298 -H 31 \
299 -i $(IGEN_INSN) \
300 -o $(IGEN_DC) \
301 -P m32_ \
302 -x \
303 -n m32_icache.h -hc tmp-icache.h \
304 -n m32_icache.c -c tmp-icache.c \
305 -n m32_semantics.h -hs tmp-semantics.h \
306 -n m32_semantics.c -s tmp-semantics.c \
307 -n m32_idecode.h -hd tmp-idecode.h \
308 -n m32_idecode.c -d tmp-idecode.c \
309 -n m32_model.h -hm tmp-model.h \
310 -n m32_model.c -m tmp-model.c \
311 -n m32_support.h -hf tmp-support.h \
312 -n m32_support.c -f tmp-support.c \
313 #
314 $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
315 $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
316 $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
317 $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
318 $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
319 $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
320 $(srcdir)/../../move-if-change tmp-model.h m32_model.h
321 $(srcdir)/../../move-if-change tmp-model.c m32_model.c
322 $(srcdir)/../../move-if-change tmp-support.h m32_support.h
323 $(srcdir)/../../move-if-change tmp-support.c m32_support.c
324 ../igen/igen \
325 $(IGEN_TRACE) \
326 -I $(srcdir) \
327 -Werror \
328 -Wnodiscard \
329 -Wnowidth \
330 @sim_igen_flags@ @sim_m16_flags@ \
331 -G gen-direct-access \
332 -G gen-zero-r0 \
333 -i $(IGEN_INSN) \
334 -n itable.h -ht tmp-itable.h \
335 -n itable.c -t tmp-itable.c \
336 #
337 $(srcdir)/../../move-if-change tmp-itable.h itable.h
338 $(srcdir)/../../move-if-change tmp-itable.c itable.c
122edc03
AC		 339 touch tmp-m16
340
341
295dbbe4 342clean-extra:
122edc03 343 rm -f gencode oengine.c tmp.igen
aaab4e57
RU		 344 rm -f $(BUILT_SRC_FROM_GEN)
345 rm -f $(BUILT_SRC_FROM_IGEN)
346 rm -f $(BUILT_SRC_FROM_M16)
347 rm -f tmp-igen
348 rm -f tmp-m16
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