Commit | Line | Data |
---|---|---|
c906108c | 1 | dnl Process this file with autoconf to produce a configure script. |
6ffe910a | 2 | AC_PREREQ(2.64)dnl |
c906108c | 3 | AC_INIT(Makefile.in) |
9c082ca8 | 4 | sinclude(../common/acinclude.m4) |
c906108c | 5 | |
6ffe910a | 6 | SIM_AC_COMMON |
35695fd6 | 7 | |
c906108c SS |
8 | dnl Options available in this module |
9 | SIM_AC_OPTION_INLINE() | |
10 | SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT) | |
11 | SIM_AC_OPTION_HOSTENDIAN | |
12 | SIM_AC_OPTION_WARNINGS | |
e6c674b8 | 13 | SIM_AC_OPTION_RESERVED_BITS(1) |
c906108c SS |
14 | |
15 | # DEPRECATED | |
16 | # | |
17 | # Instead of defining a `subtarget' macro, code should be checking | |
18 | # the value of {STATE,CPU}_ARCHITECTURE to identify the architecture | |
19 | # in question. | |
20 | # | |
21 | case "${target}" in | |
4c54fc26 | 22 | mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;; |
c906108c | 23 | mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; |
109ad085 | 24 | mips*-sde-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; |
cc220243 | 25 | mips*-mti-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; |
1e799e28 CD |
26 | mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; |
27 | mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; | |
c906108c SS |
28 | *) SIM_SUBTARGET="";; |
29 | esac | |
30 | AC_SUBST(SIM_SUBTARGET) | |
31 | ||
32 | ||
33 | ||
34 | # | |
35 | # Select the byte order of the target | |
36 | # | |
37 | mips_endian= | |
38 | default_endian= | |
39 | case "${target}" in | |
40 | mips64el*-*-*) mips_endian=LITTLE_ENDIAN ;; | |
7a292a7a | 41 | mips64vr*el-*-*) default_endian=LITTLE_ENDIAN ;; |
c906108c SS |
42 | mips64*-*-*) default_endian=BIG_ENDIAN ;; |
43 | mips16*-*-*) default_endian=BIG_ENDIAN ;; | |
1e799e28 CD |
44 | mipsisa32*-*-*) default_endian=BIG_ENDIAN ;; |
45 | mipsisa64*-*-*) default_endian=BIG_ENDIAN ;; | |
c906108c SS |
46 | mips*-*-*) default_endian=BIG_ENDIAN ;; |
47 | *) default_endian=BIG_ENDIAN ;; | |
48 | esac | |
49 | SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian) | |
50 | ||
51 | ||
52 | ||
53 | # | |
54 | # Select the bitsize of the target | |
55 | # | |
56 | mips_addr_bitsize= | |
57 | case "${target}" in | |
4b5d35ee | 58 | mips*-sde-elf*) mips_bitsize=64 ; mips_msb=63 ;; |
cc220243 | 59 | mips*-mti-elf*) mips_bitsize=64 ; mips_msb=63 ;; |
c906108c SS |
60 | mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; |
61 | mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;; | |
1e799e28 CD |
62 | mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;; |
63 | mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; | |
c906108c SS |
64 | mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;; |
65 | *) mips_bitsize=64 ; mips_msb=63 ;; | |
66 | esac | |
67 | SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize) | |
68 | ||
69 | ||
70 | ||
71 | # | |
72 | # Select the floating hardware support of the target | |
73 | # | |
74 | mips_fpu=HARDWARE_FLOATING_POINT | |
75 | mips_fpu_bitsize= | |
76 | case "${target}" in | |
4b5d35ee TS |
77 | mips*tx39*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; |
78 | mips*-sde-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; | |
cc220243 | 79 | mips*-mti-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; |
c906108c SS |
80 | mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;; |
81 | mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;; | |
1e799e28 CD |
82 | mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; |
83 | mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; | |
c906108c SS |
84 | mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; |
85 | *) mips_fpu=HARD_FLOATING_POINT ;; | |
86 | esac | |
87 | SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize) | |
88 | ||
89 | ||
90 | ||
91 | # | |
92 | # Select the level of SMP support | |
93 | # | |
94 | case "${target}" in | |
95 | *) mips_smp=0 ;; | |
96 | esac | |
97 | SIM_AC_OPTION_SMP($mips_smp) | |
98 | ||
99 | ||
100 | ||
101 | # | |
102 | # Select the IGEN architecture | |
103 | # | |
104 | sim_gen=IGEN | |
105 | sim_igen_machine="-M mipsIV" | |
139181c8 | 106 | sim_m16_machine="-M mips16,mipsIII" |
c906108c SS |
107 | sim_igen_filter="32,64,f" |
108 | sim_m16_filter="16" | |
4c54fc26 CD |
109 | sim_mach_default="mips8000" |
110 | ||
c906108c SS |
111 | case "${target}" in |
112 | mips*tx39*) sim_gen=IGEN | |
113 | sim_igen_filter="32,f" | |
114 | sim_igen_machine="-M r3900" | |
115 | ;; | |
116 | mips64vr43*-*-*) sim_gen=IGEN | |
117 | sim_igen_machine="-M mipsIV" | |
4c54fc26 | 118 | sim_mach_default="mips8000" |
c906108c SS |
119 | ;; |
120 | mips64vr5*-*-*) sim_gen=IGEN | |
121 | sim_igen_machine="-M vr5000" | |
4c54fc26 | 122 | sim_mach_default="mips5000" |
c906108c SS |
123 | ;; |
124 | mips64vr41*) sim_gen=M16 | |
125 | sim_igen_machine="-M vr4100" | |
126 | sim_m16_machine="-M vr4100" | |
127 | sim_igen_filter="32,64,f" | |
128 | sim_m16_filter="16" | |
4c54fc26 | 129 | sim_mach_default="mips4100" |
c906108c | 130 | ;; |
4c54fc26 CD |
131 | mips64vr-*-* | mips64vrel-*-*) |
132 | sim_gen=MULTI | |
133 | sim_multi_configs="\ | |
134 | vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\ | |
135 | vr4120:mipsIII,mips16,vr4120:32,64:mips4120\ | |
136 | vr5000:mipsIV:32,64,f:mips4300,mips5000\ | |
137 | vr5400:mipsIV,vr5400:32,64,f:mips5400\ | |
138 | vr5500:mipsIV,vr5500:32,64,f:mips5500" | |
139 | sim_multi_default=mips5000 | |
140 | ;; | |
cc220243 SE |
141 | mips*-sde-elf* | mips*-mti-elf*) |
142 | sim_gen=M16 | |
8b082fb1 | 143 | sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips" |
3669427c TS |
144 | sim_m16_machine="-M mips16,mips16e,mips64r2" |
145 | sim_igen_filter="32,64,f" | |
146 | sim_mach_default="mipsisa64r2" | |
147 | ;; | |
c906108c SS |
148 | mips64*-*-*) sim_igen_filter="32,64,f" |
149 | sim_gen=IGEN | |
150 | ;; | |
151 | mips16*-*-*) sim_gen=M16 | |
152 | sim_igen_filter="32,64,f" | |
153 | sim_m16_filter="16" | |
154 | ;; | |
d5fb0879 RS |
155 | mipsisa32r2*-*-*) sim_gen=M16 |
156 | sim_igen_machine="-M mips32r2,mips16,mips16e,mdmx,dsp,dsp2,smartmips" | |
157 | sim_m16_machine="-M mips16,mips16e,mips32r2" | |
158 | sim_igen_filter="32,f" | |
159 | sim_mach_default="mipsisa32r2" | |
e70cb6cd | 160 | ;; |
d5fb0879 RS |
161 | mipsisa32*-*-*) sim_gen=M16 |
162 | sim_igen_machine="-M mips32,mips16,mips16e,smartmips" | |
163 | sim_m16_machine="-M mips16,mips16e,mips32" | |
164 | sim_igen_filter="32,f" | |
165 | sim_mach_default="mipsisa32" | |
1e799e28 | 166 | ;; |
d5fb0879 RS |
167 | mipsisa64r2*-*-*) sim_gen=M16 |
168 | sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2" | |
169 | sim_m16_machine="-M mips16,mips16e,mips64r2" | |
170 | sim_igen_filter="32,64,f" | |
171 | sim_mach_default="mipsisa64r2" | |
e70cb6cd | 172 | ;; |
7cbea089 | 173 | mipsisa64sb1*-*-*) sim_gen=IGEN |
109ad085 | 174 | sim_igen_machine="-M mips64,mips3d,sb1" |
7cbea089 | 175 | sim_igen_filter="32,64,f" |
4c54fc26 | 176 | sim_mach_default="mips_sb1" |
7cbea089 | 177 | ;; |
d5fb0879 RS |
178 | mipsisa64*-*-*) sim_gen=M16 |
179 | sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx" | |
180 | sim_m16_machine="-M mips16,mips16e,mips64" | |
181 | sim_igen_filter="32,64,f" | |
182 | sim_mach_default="mipsisa64" | |
1e799e28 | 183 | ;; |
109ad085 | 184 | mips*lsi*) sim_gen=M16 |
c906108c SS |
185 | sim_igen_machine="-M mipsIII,mips16" |
186 | sim_m16_machine="-M mips16,mipsIII" | |
187 | sim_igen_filter="32,f" | |
188 | sim_m16_filter="16" | |
4c54fc26 | 189 | sim_mach_default="mips4000" |
109ad085 | 190 | ;; |
c906108c SS |
191 | mips*-*-*) sim_gen=IGEN |
192 | sim_igen_filter="32,f" | |
193 | ;; | |
194 | esac | |
4c54fc26 CD |
195 | |
196 | # The MULTI generator can combine several simulation engines into one. | |
197 | # executable. A configuration which uses the MULTI should set two | |
198 | # variables: ${sim_multi_configs} and ${sim_multi_default}. | |
199 | # | |
200 | # ${sim_multi_configs} is the list of engines to build. Each | |
201 | # space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS, | |
202 | # where: | |
203 | # | |
204 | # - NAME is a C-compatible prefix for the engine, | |
205 | # - MACHINE is a -M argument, | |
206 | # - FILTER is a -F argument, and | |
207 | # - BFDMACHS is a comma-separated list of bfd machines that the | |
208 | # simulator can run. | |
209 | # | |
210 | # Each entry will have a separate simulation engine whose prefix is | |
211 | # m32<NAME>. If the machine list includes "mips16", there will also | |
212 | # be a mips16 engine, prefix m16<NAME>. The mips16 engine will be | |
213 | # generated using the same machine list as the 32-bit version, | |
214 | # but the filter will be "16" instead of FILTER. | |
215 | # | |
216 | # The simulator compares the bfd mach against BFDMACHS to decide | |
217 | # which engine to use. Entries in BFDMACHS should be bfd_mach | |
218 | # values with "bfd_mach_" removed. ${sim_multi_default} says | |
219 | # which entry should be the default. | |
220 | if test ${sim_gen} = MULTI; then | |
221 | ||
222 | # Simple sanity check. | |
223 | if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then | |
224 | AC_MSG_ERROR(Error in configure.in: MULTI simulator not set up correctly) | |
225 | fi | |
226 | ||
227 | # Start in a known state. | |
228 | rm -f multi-include.h multi-run.c | |
229 | sim_multi_flags= | |
230 | sim_multi_src= | |
231 | sim_multi_obj=multi-run.o | |
232 | sim_multi_igen_configs= | |
233 | sim_seen_default=no | |
234 | ||
235 | cat << __EOF__ > multi-run.c | |
236 | /* Main entry point for MULTI simulators. | |
ecd75fc8 | 237 | Copyright (C) 2003-2014 Free Software Foundation, Inc. |
4c54fc26 CD |
238 | |
239 | This program is free software; you can redistribute it and/or modify | |
240 | it under the terms of the GNU General Public License as published by | |
35ee6e1e | 241 | the Free Software Foundation; either version 3 of the License, or |
4c54fc26 CD |
242 | (at your option) any later version. |
243 | ||
244 | This program is distributed in the hope that it will be useful, | |
245 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
246 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
247 | GNU General Public License for more details. | |
248 | ||
249 | You should have received a copy of the GNU General Public License | |
35ee6e1e | 250 | along with this program. If not, see <http://www.gnu.org/licenses/>. |
4c54fc26 CD |
251 | |
252 | -- | |
253 | ||
254 | This file was generated by sim/mips/configure. */ | |
255 | ||
256 | #include "sim-main.h" | |
257 | #include "multi-include.h" | |
258 | ||
259 | #define SD sd | |
260 | #define CPU cpu | |
261 | ||
262 | void | |
263 | sim_engine_run (SIM_DESC sd, | |
264 | int next_cpu_nr, | |
265 | int nr_cpus, | |
266 | int signal) /* ignore */ | |
267 | { | |
268 | int mach; | |
269 | ||
270 | if (STATE_ARCHITECTURE (sd) == NULL) | |
271 | mach = bfd_mach_${sim_multi_default}; | |
272 | else | |
273 | mach = STATE_ARCHITECTURE (SD)->mach; | |
274 | ||
275 | switch (mach) | |
276 | { | |
277 | __EOF__ | |
278 | ||
279 | for fc in ${sim_multi_configs}; do | |
280 | ||
281 | # Split up the entry. ${c} contains the first three elements. | |
282 | # Note: outer sqaure brackets are m4 quotes. | |
283 | c=`echo ${fc} | sed ['s/:[^:]*$//']` | |
284 | bfdmachs=`echo ${fc} | sed 's/.*://'` | |
285 | name=`echo ${c} | sed 's/:.*//'` | |
286 | machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'` | |
287 | filter=`echo ${c} | sed 's/.*://'` | |
288 | ||
289 | # Build the following lists: | |
290 | # | |
291 | # sim_multi_flags: all -M and -F flags used by the simulator | |
292 | # sim_multi_src: all makefile-generated source files | |
293 | # sim_multi_obj: the objects for ${sim_multi_src} | |
294 | # sim_multi_igen_configs: igen configuration strings. | |
295 | # | |
296 | # Each entry in ${sim_multi_igen_configs} is a prefix (m32 | |
297 | # or m16) followed by the NAME, MACHINE and FILTER part of | |
298 | # the ${sim_multi_configs} entry. | |
299 | sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}" | |
300 | ||
301 | # Check whether mips16 handling is needed. | |
302 | case ${c} in | |
303 | *:*mips16*:*) | |
304 | # Run igen twice, once for normal mode and once for mips16. | |
305 | ws="m32 m16" | |
306 | ||
307 | # The top-level function for the mips16 simulator is | |
308 | # in a file m16${name}_run.c, generated by the | |
309 | # tmp-run-multi Makefile rule. | |
310 | sim_multi_src="${sim_multi_src} m16${name}_run.c" | |
311 | sim_multi_obj="${sim_multi_obj} m16${name}_run.o" | |
312 | sim_multi_flags="${sim_multi_flags} -F 16" | |
313 | ;; | |
314 | *) | |
315 | ws=m32 | |
316 | ;; | |
317 | esac | |
318 | ||
319 | # Now add the list of igen-generated files to ${sim_multi_src} | |
320 | # and ${sim_multi_obj}. | |
321 | for w in ${ws}; do | |
322 | for base in engine icache idecode model semantics support; do | |
323 | sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c" | |
324 | sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h" | |
325 | sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o" | |
326 | done | |
327 | sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}" | |
328 | done | |
329 | ||
330 | # Add an include for the engine.h file. This file declares the | |
331 | # top-level foo_engine_run() function. | |
332 | echo "#include \"${w}${name}_engine.h\"" >> multi-include.h | |
333 | ||
334 | # Add case statements for this engine to sim_engine_run(). | |
335 | for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do | |
336 | echo " case bfd_mach_${mach}:" >> multi-run.c | |
337 | if test ${mach} = ${sim_multi_default}; then | |
338 | echo " default:" >> multi-run.c | |
339 | sim_seen_default=yes | |
340 | fi | |
341 | done | |
342 | echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \ | |
343 | >> multi-run.c | |
344 | echo " break;" >> multi-run.c | |
345 | done | |
346 | ||
347 | # Check whether we added a 'default:' label. | |
348 | if test ${sim_seen_default} = no; then | |
349 | AC_MSG_ERROR(Error in configure.in: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default}) | |
350 | fi | |
351 | ||
352 | cat << __EOF__ >> multi-run.c | |
353 | } | |
354 | } | |
355 | ||
356 | int | |
357 | mips_mach_multi (SIM_DESC sd) | |
358 | { | |
359 | if (STATE_ARCHITECTURE (sd) == NULL) | |
360 | return bfd_mach_${sim_multi_default}; | |
361 | ||
362 | switch (STATE_ARCHITECTURE (SD)->mach) | |
363 | { | |
364 | __EOF__ | |
365 | ||
366 | # Add case statements for this engine to mips_mach_multi(). | |
367 | for fc in ${sim_multi_configs}; do | |
368 | ||
369 | # Split up the entry. ${c} contains the first three elements. | |
370 | # Note: outer sqaure brackets are m4 quotes. | |
371 | c=`echo ${fc} | sed ['s/:[^:]*$//']` | |
372 | bfdmachs=`echo ${fc} | sed 's/.*://'` | |
373 | ||
374 | for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do | |
375 | echo " case bfd_mach_${mach}:" >> multi-run.c | |
376 | done | |
377 | done | |
378 | ||
379 | cat << __EOF__ >> multi-run.c | |
380 | return (STATE_ARCHITECTURE (SD)->mach); | |
381 | default: | |
382 | return bfd_mach_${sim_multi_default}; | |
383 | } | |
384 | } | |
385 | __EOF__ | |
386 | ||
387 | SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI" | |
388 | else | |
389 | # For clean-extra | |
390 | sim_multi_src=doesnt-exist.c | |
391 | ||
392 | if test x"${sim_mach_default}" = x""; then | |
393 | AC_MSG_ERROR(Error in configure.in: \${sim_mach_default} not defined) | |
394 | fi | |
395 | SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}" | |
396 | fi | |
c906108c SS |
397 | sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}" |
398 | sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}" | |
399 | AC_SUBST(sim_igen_flags) | |
400 | AC_SUBST(sim_m16_flags) | |
401 | AC_SUBST(sim_gen) | |
4c54fc26 CD |
402 | AC_SUBST(sim_multi_flags) |
403 | AC_SUBST(sim_multi_igen_configs) | |
404 | AC_SUBST(sim_multi_src) | |
405 | AC_SUBST(sim_multi_obj) | |
c906108c SS |
406 | |
407 | ||
408 | # | |
409 | # Add simulated hardware devices | |
410 | # | |
411 | hw_enabled=no | |
412 | case "${target}" in | |
413 | mips*tx39*) | |
414 | hw_enabled=yes | |
415 | hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio" | |
c906108c SS |
416 | SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1" |
417 | ;; | |
418 | *) | |
c906108c SS |
419 | ;; |
420 | esac | |
421 | SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices) | |
3be31516 | 422 | mips_extra_objs="$SIM_DV_SOCKSER_O" |
c906108c SS |
423 | AC_SUBST(mips_extra_objs) |
424 | ||
3be31516 JS |
425 | if test "$sim_hw_p" = yes -a -z "$SIM_DV_SOCKSER_O"; then |
426 | case " $sim_hw " in | |
427 | *" tx3904sio "*) | |
428 | AC_MSG_ERROR([Sorry, but tx3904sio hardware support is | |
429 | unavailable for your target. Please use --disable-sim-hardware, or pass a | |
430 | list of devices to enable that does not include that.]) | |
431 | esac | |
432 | fi | |
433 | ||
c906108c SS |
434 | |
435 | # Choose simulator engine | |
436 | case "${target}" in | |
437 | *) mips_igen_engine="engine.o" | |
438 | ;; | |
439 | esac | |
440 | AC_SUBST(mips_igen_engine) | |
441 | ||
442 | ||
443 | AC_PATH_X | |
444 | mips_extra_libs="" | |
445 | AC_SUBST(mips_extra_libs) | |
446 | ||
447 | AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h) | |
448 | AC_CHECK_LIB(m, fabs) | |
449 | AC_CHECK_FUNCS(aint anint sqrt) | |
450 | ||
451 | SIM_AC_OUTPUT |