2005-05-26 Andrew Cagney <cagney@gnu.org>
[deliverable/binutils-gdb.git] / sim / mips / configure.ac
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c906108c 1dnl Process this file with autoconf to produce a configure script.
b7026657 2AC_PREREQ(2.59)dnl
c906108c 3AC_INIT(Makefile.in)
35695fd6 4AC_CONFIG_HEADER(config.h:config.in)
c906108c 5
f0569246 6sinclude(../common/aclocal.m4)
c906108c 7
35695fd6
AC
8# Bugs in autoconf 2.59 break the call to SIM_AC_COMMON, hack around
9# it by inlining the macro's contents.
10sinclude(../common/common.m4)
11
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12dnl Options available in this module
13SIM_AC_OPTION_INLINE()
14SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
15SIM_AC_OPTION_HOSTENDIAN
16SIM_AC_OPTION_WARNINGS
e6c674b8 17SIM_AC_OPTION_RESERVED_BITS(1)
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18
19# DEPRECATED
20#
21# Instead of defining a `subtarget' macro, code should be checking
22# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
23# in question.
24#
25case "${target}" in
4c54fc26 26 mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
c906108c 27 mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
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28 mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
29 mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
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30 *) SIM_SUBTARGET="";;
31esac
32AC_SUBST(SIM_SUBTARGET)
33
34
35
36#
37# Select the byte order of the target
38#
39mips_endian=
40default_endian=
41case "${target}" in
42 mips64el*-*-*) mips_endian=LITTLE_ENDIAN ;;
7a292a7a 43 mips64vr*el-*-*) default_endian=LITTLE_ENDIAN ;;
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44 mips64*-*-*) default_endian=BIG_ENDIAN ;;
45 mips16*-*-*) default_endian=BIG_ENDIAN ;;
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46 mipsisa32*-*-*) default_endian=BIG_ENDIAN ;;
47 mipsisa64*-*-*) default_endian=BIG_ENDIAN ;;
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48 mips*-*-*) default_endian=BIG_ENDIAN ;;
49 *) default_endian=BIG_ENDIAN ;;
50esac
51SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
52
53
54
55#
56# Select the bitsize of the target
57#
58mips_addr_bitsize=
59case "${target}" in
60 mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
61 mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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62 mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
63 mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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64 mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
65 *) mips_bitsize=64 ; mips_msb=63 ;;
66esac
67SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
68
69
70
71#
72# Select the floating hardware support of the target
73#
74mips_fpu=HARDWARE_FLOATING_POINT
75mips_fpu_bitsize=
76case "${target}" in
77 mips*tx39*) mips_fpu=HARD_FLOATING_POINT
78 mips_fpu_bitsize=32
79 ;;
80 mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
81 mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
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82 mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
83 mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
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84 mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
85 *) mips_fpu=HARD_FLOATING_POINT ;;
86esac
87SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
88
89
90
91#
92# Select the level of SMP support
93#
94case "${target}" in
95 *) mips_smp=0 ;;
96esac
97SIM_AC_OPTION_SMP($mips_smp)
98
99
100
101#
102# Select the IGEN architecture
103#
104sim_gen=IGEN
105sim_igen_machine="-M mipsIV"
139181c8 106sim_m16_machine="-M mips16,mipsIII"
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107sim_igen_filter="32,64,f"
108sim_m16_filter="16"
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109sim_mach_default="mips8000"
110
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111case "${target}" in
112 mips*tx39*) sim_gen=IGEN
113 sim_igen_filter="32,f"
114 sim_igen_machine="-M r3900"
115 ;;
116 mips64vr43*-*-*) sim_gen=IGEN
117 sim_igen_machine="-M mipsIV"
4c54fc26 118 sim_mach_default="mips8000"
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119 ;;
120 mips64vr5*-*-*) sim_gen=IGEN
121 sim_igen_machine="-M vr5000"
4c54fc26 122 sim_mach_default="mips5000"
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123 ;;
124 mips64vr41*) sim_gen=M16
125 sim_igen_machine="-M vr4100"
126 sim_m16_machine="-M vr4100"
127 sim_igen_filter="32,64,f"
128 sim_m16_filter="16"
4c54fc26 129 sim_mach_default="mips4100"
c906108c 130 ;;
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131 mips64vr-*-* | mips64vrel-*-*)
132 sim_gen=MULTI
133 sim_multi_configs="\
134 vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
135 vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
136 vr5000:mipsIV:32,64,f:mips4300,mips5000\
137 vr5400:mipsIV,vr5400:32,64,f:mips5400\
138 vr5500:mipsIV,vr5500:32,64,f:mips5500"
139 sim_multi_default=mips5000
140 ;;
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141 mips64*-*-*) sim_igen_filter="32,64,f"
142 sim_gen=IGEN
143 ;;
144 mips16*-*-*) sim_gen=M16
145 sim_igen_filter="32,64,f"
146 sim_m16_filter="16"
147 ;;
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148 mipsisa32*-*-*) sim_gen=IGEN
149 sim_igen_machine="-M mips32"
150 sim_igen_filter="32,f"
4c54fc26 151 sim_mach_default="mipsisa32"
1e799e28 152 ;;
7cbea089 153 mipsisa64sb1*-*-*) sim_gen=IGEN
e5da76ec 154 sim_igen_machine="-M mips64,mips3d,sb1"
7cbea089 155 sim_igen_filter="32,64,f"
4c54fc26 156 sim_mach_default="mips_sb1"
7cbea089 157 ;;
1e799e28 158 mipsisa64*-*-*) sim_gen=IGEN
e7e81181 159 sim_igen_machine="-M mips64,mips3d"
1e799e28 160 sim_igen_filter="32,64,f"
4c54fc26 161 sim_mach_default="mipsisa64"
1e799e28 162 ;;
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163 mips*lsi*) sim_gen=M16
164 sim_igen_machine="-M mipsIII,mips16"
165 sim_m16_machine="-M mips16,mipsIII"
166 sim_igen_filter="32,f"
167 sim_m16_filter="16"
4c54fc26 168 sim_mach_default="mips4000"
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169 ;;
170 mips*-*-*) sim_gen=IGEN
171 sim_igen_filter="32,f"
172 ;;
173esac
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174
175# The MULTI generator can combine several simulation engines into one.
176# executable. A configuration which uses the MULTI should set two
177# variables: ${sim_multi_configs} and ${sim_multi_default}.
178#
179# ${sim_multi_configs} is the list of engines to build. Each
180# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
181# where:
182#
183# - NAME is a C-compatible prefix for the engine,
184# - MACHINE is a -M argument,
185# - FILTER is a -F argument, and
186# - BFDMACHS is a comma-separated list of bfd machines that the
187# simulator can run.
188#
189# Each entry will have a separate simulation engine whose prefix is
190# m32<NAME>. If the machine list includes "mips16", there will also
191# be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
192# generated using the same machine list as the 32-bit version,
193# but the filter will be "16" instead of FILTER.
194#
195# The simulator compares the bfd mach against BFDMACHS to decide
196# which engine to use. Entries in BFDMACHS should be bfd_mach
197# values with "bfd_mach_" removed. ${sim_multi_default} says
198# which entry should be the default.
199if test ${sim_gen} = MULTI; then
200
201 # Simple sanity check.
202 if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
203 AC_MSG_ERROR(Error in configure.in: MULTI simulator not set up correctly)
204 fi
205
206 # Start in a known state.
207 rm -f multi-include.h multi-run.c
208 sim_multi_flags=
209 sim_multi_src=
210 sim_multi_obj=multi-run.o
211 sim_multi_igen_configs=
212 sim_seen_default=no
213
214 cat << __EOF__ > multi-run.c
215/* Main entry point for MULTI simulators.
216 Copyright (C) 2003 Free Software Foundation, Inc.
217
218 This program is free software; you can redistribute it and/or modify
219 it under the terms of the GNU General Public License as published by
220 the Free Software Foundation; either version 2 of the License, or
221 (at your option) any later version.
222
223 This program is distributed in the hope that it will be useful,
224 but WITHOUT ANY WARRANTY; without even the implied warranty of
225 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
226 GNU General Public License for more details.
227
228 You should have received a copy of the GNU General Public License
229 along with this program; if not, write to the Free Software
230 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
231
232 --
233
234 This file was generated by sim/mips/configure. */
235
236#include "sim-main.h"
237#include "multi-include.h"
238
239#define SD sd
240#define CPU cpu
241
242void
243sim_engine_run (SIM_DESC sd,
244 int next_cpu_nr,
245 int nr_cpus,
246 int signal) /* ignore */
247{
248 int mach;
249
250 if (STATE_ARCHITECTURE (sd) == NULL)
251 mach = bfd_mach_${sim_multi_default};
252 else
253 mach = STATE_ARCHITECTURE (SD)->mach;
254
255 switch (mach)
256 {
257__EOF__
258
259 for fc in ${sim_multi_configs}; do
260
261 # Split up the entry. ${c} contains the first three elements.
262 # Note: outer sqaure brackets are m4 quotes.
263 c=`echo ${fc} | sed ['s/:[^:]*$//']`
264 bfdmachs=`echo ${fc} | sed 's/.*://'`
265 name=`echo ${c} | sed 's/:.*//'`
266 machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
267 filter=`echo ${c} | sed 's/.*://'`
268
269 # Build the following lists:
270 #
271 # sim_multi_flags: all -M and -F flags used by the simulator
272 # sim_multi_src: all makefile-generated source files
273 # sim_multi_obj: the objects for ${sim_multi_src}
274 # sim_multi_igen_configs: igen configuration strings.
275 #
276 # Each entry in ${sim_multi_igen_configs} is a prefix (m32
277 # or m16) followed by the NAME, MACHINE and FILTER part of
278 # the ${sim_multi_configs} entry.
279 sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
280
281 # Check whether mips16 handling is needed.
282 case ${c} in
283 *:*mips16*:*)
284 # Run igen twice, once for normal mode and once for mips16.
285 ws="m32 m16"
286
287 # The top-level function for the mips16 simulator is
288 # in a file m16${name}_run.c, generated by the
289 # tmp-run-multi Makefile rule.
290 sim_multi_src="${sim_multi_src} m16${name}_run.c"
291 sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
292 sim_multi_flags="${sim_multi_flags} -F 16"
293 ;;
294 *)
295 ws=m32
296 ;;
297 esac
298
299 # Now add the list of igen-generated files to ${sim_multi_src}
300 # and ${sim_multi_obj}.
301 for w in ${ws}; do
302 for base in engine icache idecode model semantics support; do
303 sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
304 sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
305 sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
306 done
307 sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
308 done
309
310 # Add an include for the engine.h file. This file declares the
311 # top-level foo_engine_run() function.
312 echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
313
314 # Add case statements for this engine to sim_engine_run().
315 for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
316 echo " case bfd_mach_${mach}:" >> multi-run.c
317 if test ${mach} = ${sim_multi_default}; then
318 echo " default:" >> multi-run.c
319 sim_seen_default=yes
320 fi
321 done
322 echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
323 >> multi-run.c
324 echo " break;" >> multi-run.c
325 done
326
327 # Check whether we added a 'default:' label.
328 if test ${sim_seen_default} = no; then
329 AC_MSG_ERROR(Error in configure.in: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
330 fi
331
332 cat << __EOF__ >> multi-run.c
333 }
334}
335
336int
337mips_mach_multi (SIM_DESC sd)
338{
339 if (STATE_ARCHITECTURE (sd) == NULL)
340 return bfd_mach_${sim_multi_default};
341
342 switch (STATE_ARCHITECTURE (SD)->mach)
343 {
344__EOF__
345
346 # Add case statements for this engine to mips_mach_multi().
347 for fc in ${sim_multi_configs}; do
348
349 # Split up the entry. ${c} contains the first three elements.
350 # Note: outer sqaure brackets are m4 quotes.
351 c=`echo ${fc} | sed ['s/:[^:]*$//']`
352 bfdmachs=`echo ${fc} | sed 's/.*://'`
353
354 for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
355 echo " case bfd_mach_${mach}:" >> multi-run.c
356 done
357 done
358
359 cat << __EOF__ >> multi-run.c
360 return (STATE_ARCHITECTURE (SD)->mach);
361 default:
362 return bfd_mach_${sim_multi_default};
363 }
364}
365__EOF__
366
367 SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
368else
369 # For clean-extra
370 sim_multi_src=doesnt-exist.c
371
372 if test x"${sim_mach_default}" = x""; then
373 AC_MSG_ERROR(Error in configure.in: \${sim_mach_default} not defined)
374 fi
375 SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
376fi
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377sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
378sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
379AC_SUBST(sim_igen_flags)
380AC_SUBST(sim_m16_flags)
381AC_SUBST(sim_gen)
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382AC_SUBST(sim_multi_flags)
383AC_SUBST(sim_multi_igen_configs)
384AC_SUBST(sim_multi_src)
385AC_SUBST(sim_multi_obj)
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386
387
388#
389# Add simulated hardware devices
390#
391hw_enabled=no
392case "${target}" in
393 mips*tx39*)
394 hw_enabled=yes
395 hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
396 mips_extra_objs="dv-sockser.o"
397 SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
398 ;;
399 *)
400 mips_extra_objs=""
401 ;;
402esac
403SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
404AC_SUBST(mips_extra_objs)
405
406
407# Choose simulator engine
408case "${target}" in
409 *) mips_igen_engine="engine.o"
410 ;;
411esac
412AC_SUBST(mips_igen_engine)
413
414
415AC_PATH_X
416mips_extra_libs=""
417AC_SUBST(mips_extra_libs)
418
419AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
420AC_CHECK_LIB(m, fabs)
421AC_CHECK_FUNCS(aint anint sqrt)
422
423SIM_AC_OUTPUT
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