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[deliverable/binutils-gdb.git] / sim / mips / configure.ac
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c906108c 1dnl Process this file with autoconf to produce a configure script.
b7026657 2AC_PREREQ(2.59)dnl
c906108c 3AC_INIT(Makefile.in)
35695fd6 4AC_CONFIG_HEADER(config.h:config.in)
c906108c 5
f0569246 6sinclude(../common/aclocal.m4)
c906108c 7
35695fd6
AC
8# Bugs in autoconf 2.59 break the call to SIM_AC_COMMON, hack around
9# it by inlining the macro's contents.
10sinclude(../common/common.m4)
11
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12dnl Options available in this module
13SIM_AC_OPTION_INLINE()
14SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
15SIM_AC_OPTION_HOSTENDIAN
16SIM_AC_OPTION_WARNINGS
e6c674b8 17SIM_AC_OPTION_RESERVED_BITS(1)
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18
19# DEPRECATED
20#
21# Instead of defining a `subtarget' macro, code should be checking
22# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
23# in question.
24#
25case "${target}" in
4c54fc26 26 mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
c906108c 27 mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
109ad085 28 mips*-sde-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
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29 mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
30 mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
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31 *) SIM_SUBTARGET="";;
32esac
33AC_SUBST(SIM_SUBTARGET)
34
35
36
37#
38# Select the byte order of the target
39#
40mips_endian=
41default_endian=
42case "${target}" in
43 mips64el*-*-*) mips_endian=LITTLE_ENDIAN ;;
7a292a7a 44 mips64vr*el-*-*) default_endian=LITTLE_ENDIAN ;;
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45 mips64*-*-*) default_endian=BIG_ENDIAN ;;
46 mips16*-*-*) default_endian=BIG_ENDIAN ;;
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47 mipsisa32*-*-*) default_endian=BIG_ENDIAN ;;
48 mipsisa64*-*-*) default_endian=BIG_ENDIAN ;;
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49 mips*-*-*) default_endian=BIG_ENDIAN ;;
50 *) default_endian=BIG_ENDIAN ;;
51esac
52SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
53
54
55
56#
57# Select the bitsize of the target
58#
59mips_addr_bitsize=
60case "${target}" in
61 mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
62 mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
109ad085 63 mips*-sde-elf*) mips_bitsize=64 ; mips_msb=63 ;;
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64 mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
65 mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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66 mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
67 *) mips_bitsize=64 ; mips_msb=63 ;;
68esac
69SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
70
71
72
73#
74# Select the floating hardware support of the target
75#
76mips_fpu=HARDWARE_FLOATING_POINT
77mips_fpu_bitsize=
78case "${target}" in
79 mips*tx39*) mips_fpu=HARD_FLOATING_POINT
80 mips_fpu_bitsize=32
81 ;;
82 mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
83 mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
109ad085 84 mips*-sde-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
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85 mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
86 mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
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87 mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
88 *) mips_fpu=HARD_FLOATING_POINT ;;
89esac
90SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
91
92
93
94#
95# Select the level of SMP support
96#
97case "${target}" in
98 *) mips_smp=0 ;;
99esac
100SIM_AC_OPTION_SMP($mips_smp)
101
102
103
104#
105# Select the IGEN architecture
106#
107sim_gen=IGEN
108sim_igen_machine="-M mipsIV"
139181c8 109sim_m16_machine="-M mips16,mipsIII"
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110sim_igen_filter="32,64,f"
111sim_m16_filter="16"
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112sim_mach_default="mips8000"
113
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114case "${target}" in
115 mips*tx39*) sim_gen=IGEN
116 sim_igen_filter="32,f"
117 sim_igen_machine="-M r3900"
118 ;;
119 mips64vr43*-*-*) sim_gen=IGEN
120 sim_igen_machine="-M mipsIV"
4c54fc26 121 sim_mach_default="mips8000"
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122 ;;
123 mips64vr5*-*-*) sim_gen=IGEN
124 sim_igen_machine="-M vr5000"
4c54fc26 125 sim_mach_default="mips5000"
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126 ;;
127 mips64vr41*) sim_gen=M16
128 sim_igen_machine="-M vr4100"
129 sim_m16_machine="-M vr4100"
130 sim_igen_filter="32,64,f"
131 sim_m16_filter="16"
4c54fc26 132 sim_mach_default="mips4100"
c906108c 133 ;;
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134 mips64vr-*-* | mips64vrel-*-*)
135 sim_gen=MULTI
136 sim_multi_configs="\
137 vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
138 vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
139 vr5000:mipsIV:32,64,f:mips4300,mips5000\
140 vr5400:mipsIV,vr5400:32,64,f:mips5400\
141 vr5500:mipsIV,vr5500:32,64,f:mips5500"
142 sim_multi_default=mips5000
143 ;;
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144 mips*-sde-elf*) sim_gen=M16
145 sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,smartmips"
146 sim_m16_machine="-M mips16,mips16e,mips64r2"
147 sim_igen_filter="32,64,f"
148 sim_mach_default="mipsisa64r2"
149 ;;
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150 mips64*-*-*) sim_igen_filter="32,64,f"
151 sim_gen=IGEN
152 ;;
153 mips16*-*-*) sim_gen=M16
154 sim_igen_filter="32,64,f"
155 sim_m16_filter="16"
156 ;;
b16d63da 157 mipsisa32r2*-*-*) sim_gen=M16
3669427c 158 sim_igen_machine="-M mips32r2,mips16,mips16e,mdmx,dsp,smartmips"
b16d63da 159 sim_m16_machine="-M mips16,mips16e,mips32r2"
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160 sim_igen_filter="32,f"
161 sim_mach_default="mipsisa32r2"
162 ;;
b16d63da 163 mipsisa32*-*-*) sim_gen=M16
3669427c 164 sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
b16d63da 165 sim_m16_machine="-M mips16,mips16e,mips32"
1e799e28 166 sim_igen_filter="32,f"
4c54fc26 167 sim_mach_default="mipsisa32"
1e799e28 168 ;;
b16d63da 169 mipsisa64r2*-*-*) sim_gen=M16
3669427c 170 sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp"
b16d63da 171 sim_m16_machine="-M mips16,mips16e,mips64r2"
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172 sim_igen_filter="32,64,f"
173 sim_mach_default="mipsisa64r2"
174 ;;
7cbea089 175 mipsisa64sb1*-*-*) sim_gen=IGEN
109ad085 176 sim_igen_machine="-M mips64,mips3d,sb1"
7cbea089 177 sim_igen_filter="32,64,f"
4c54fc26 178 sim_mach_default="mips_sb1"
7cbea089 179 ;;
b16d63da 180 mipsisa64*-*-*) sim_gen=M16
3669427c 181 sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
b16d63da 182 sim_m16_machine="-M mips16,mips16e,mips64"
1e799e28 183 sim_igen_filter="32,64,f"
4c54fc26 184 sim_mach_default="mipsisa64"
1e799e28 185 ;;
109ad085 186 mips*lsi*) sim_gen=M16
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187 sim_igen_machine="-M mipsIII,mips16"
188 sim_m16_machine="-M mips16,mipsIII"
189 sim_igen_filter="32,f"
190 sim_m16_filter="16"
4c54fc26 191 sim_mach_default="mips4000"
109ad085 192 ;;
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193 mips*-*-*) sim_gen=IGEN
194 sim_igen_filter="32,f"
195 ;;
196esac
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197
198# The MULTI generator can combine several simulation engines into one.
199# executable. A configuration which uses the MULTI should set two
200# variables: ${sim_multi_configs} and ${sim_multi_default}.
201#
202# ${sim_multi_configs} is the list of engines to build. Each
203# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
204# where:
205#
206# - NAME is a C-compatible prefix for the engine,
207# - MACHINE is a -M argument,
208# - FILTER is a -F argument, and
209# - BFDMACHS is a comma-separated list of bfd machines that the
210# simulator can run.
211#
212# Each entry will have a separate simulation engine whose prefix is
213# m32<NAME>. If the machine list includes "mips16", there will also
214# be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
215# generated using the same machine list as the 32-bit version,
216# but the filter will be "16" instead of FILTER.
217#
218# The simulator compares the bfd mach against BFDMACHS to decide
219# which engine to use. Entries in BFDMACHS should be bfd_mach
220# values with "bfd_mach_" removed. ${sim_multi_default} says
221# which entry should be the default.
222if test ${sim_gen} = MULTI; then
223
224 # Simple sanity check.
225 if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
226 AC_MSG_ERROR(Error in configure.in: MULTI simulator not set up correctly)
227 fi
228
229 # Start in a known state.
230 rm -f multi-include.h multi-run.c
231 sim_multi_flags=
232 sim_multi_src=
233 sim_multi_obj=multi-run.o
234 sim_multi_igen_configs=
235 sim_seen_default=no
236
237 cat << __EOF__ > multi-run.c
238/* Main entry point for MULTI simulators.
239 Copyright (C) 2003 Free Software Foundation, Inc.
240
241 This program is free software; you can redistribute it and/or modify
242 it under the terms of the GNU General Public License as published by
243 the Free Software Foundation; either version 2 of the License, or
244 (at your option) any later version.
245
246 This program is distributed in the hope that it will be useful,
247 but WITHOUT ANY WARRANTY; without even the implied warranty of
248 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
249 GNU General Public License for more details.
250
251 You should have received a copy of the GNU General Public License
252 along with this program; if not, write to the Free Software
253 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
254
255 --
256
257 This file was generated by sim/mips/configure. */
258
259#include "sim-main.h"
260#include "multi-include.h"
261
262#define SD sd
263#define CPU cpu
264
265void
266sim_engine_run (SIM_DESC sd,
267 int next_cpu_nr,
268 int nr_cpus,
269 int signal) /* ignore */
270{
271 int mach;
272
273 if (STATE_ARCHITECTURE (sd) == NULL)
274 mach = bfd_mach_${sim_multi_default};
275 else
276 mach = STATE_ARCHITECTURE (SD)->mach;
277
278 switch (mach)
279 {
280__EOF__
281
282 for fc in ${sim_multi_configs}; do
283
284 # Split up the entry. ${c} contains the first three elements.
285 # Note: outer sqaure brackets are m4 quotes.
286 c=`echo ${fc} | sed ['s/:[^:]*$//']`
287 bfdmachs=`echo ${fc} | sed 's/.*://'`
288 name=`echo ${c} | sed 's/:.*//'`
289 machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
290 filter=`echo ${c} | sed 's/.*://'`
291
292 # Build the following lists:
293 #
294 # sim_multi_flags: all -M and -F flags used by the simulator
295 # sim_multi_src: all makefile-generated source files
296 # sim_multi_obj: the objects for ${sim_multi_src}
297 # sim_multi_igen_configs: igen configuration strings.
298 #
299 # Each entry in ${sim_multi_igen_configs} is a prefix (m32
300 # or m16) followed by the NAME, MACHINE and FILTER part of
301 # the ${sim_multi_configs} entry.
302 sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
303
304 # Check whether mips16 handling is needed.
305 case ${c} in
306 *:*mips16*:*)
307 # Run igen twice, once for normal mode and once for mips16.
308 ws="m32 m16"
309
310 # The top-level function for the mips16 simulator is
311 # in a file m16${name}_run.c, generated by the
312 # tmp-run-multi Makefile rule.
313 sim_multi_src="${sim_multi_src} m16${name}_run.c"
314 sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
315 sim_multi_flags="${sim_multi_flags} -F 16"
316 ;;
317 *)
318 ws=m32
319 ;;
320 esac
321
322 # Now add the list of igen-generated files to ${sim_multi_src}
323 # and ${sim_multi_obj}.
324 for w in ${ws}; do
325 for base in engine icache idecode model semantics support; do
326 sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
327 sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
328 sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
329 done
330 sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
331 done
332
333 # Add an include for the engine.h file. This file declares the
334 # top-level foo_engine_run() function.
335 echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
336
337 # Add case statements for this engine to sim_engine_run().
338 for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
339 echo " case bfd_mach_${mach}:" >> multi-run.c
340 if test ${mach} = ${sim_multi_default}; then
341 echo " default:" >> multi-run.c
342 sim_seen_default=yes
343 fi
344 done
345 echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
346 >> multi-run.c
347 echo " break;" >> multi-run.c
348 done
349
350 # Check whether we added a 'default:' label.
351 if test ${sim_seen_default} = no; then
352 AC_MSG_ERROR(Error in configure.in: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
353 fi
354
355 cat << __EOF__ >> multi-run.c
356 }
357}
358
359int
360mips_mach_multi (SIM_DESC sd)
361{
362 if (STATE_ARCHITECTURE (sd) == NULL)
363 return bfd_mach_${sim_multi_default};
364
365 switch (STATE_ARCHITECTURE (SD)->mach)
366 {
367__EOF__
368
369 # Add case statements for this engine to mips_mach_multi().
370 for fc in ${sim_multi_configs}; do
371
372 # Split up the entry. ${c} contains the first three elements.
373 # Note: outer sqaure brackets are m4 quotes.
374 c=`echo ${fc} | sed ['s/:[^:]*$//']`
375 bfdmachs=`echo ${fc} | sed 's/.*://'`
376
377 for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
378 echo " case bfd_mach_${mach}:" >> multi-run.c
379 done
380 done
381
382 cat << __EOF__ >> multi-run.c
383 return (STATE_ARCHITECTURE (SD)->mach);
384 default:
385 return bfd_mach_${sim_multi_default};
386 }
387}
388__EOF__
389
390 SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
391else
392 # For clean-extra
393 sim_multi_src=doesnt-exist.c
394
395 if test x"${sim_mach_default}" = x""; then
396 AC_MSG_ERROR(Error in configure.in: \${sim_mach_default} not defined)
397 fi
398 SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
399fi
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400sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
401sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
402AC_SUBST(sim_igen_flags)
403AC_SUBST(sim_m16_flags)
404AC_SUBST(sim_gen)
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405AC_SUBST(sim_multi_flags)
406AC_SUBST(sim_multi_igen_configs)
407AC_SUBST(sim_multi_src)
408AC_SUBST(sim_multi_obj)
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409
410
411#
412# Add simulated hardware devices
413#
414hw_enabled=no
415case "${target}" in
416 mips*tx39*)
417 hw_enabled=yes
418 hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
419 mips_extra_objs="dv-sockser.o"
420 SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
421 ;;
422 *)
423 mips_extra_objs=""
424 ;;
425esac
426SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
427AC_SUBST(mips_extra_objs)
428
429
430# Choose simulator engine
431case "${target}" in
432 *) mips_igen_engine="engine.o"
433 ;;
434esac
435AC_SUBST(mips_igen_engine)
436
437
438AC_PATH_X
439mips_extra_libs=""
440AC_SUBST(mips_extra_libs)
441
442AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
443AC_CHECK_LIB(m, fabs)
444AC_CHECK_FUNCS(aint anint sqrt)
445
446SIM_AC_OUTPUT
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