[deliverable/binutils-gdb.git] / sim / mips / configure.ac

dnl Process this file with autoconf to produce a configure script.
AC_PREREQ(2.64)dnl
AC_INIT(Makefile.in)
sinclude(../common/acinclude.m4)

SIM_AC_COMMON

dnl Options available in this module
SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
SIM_AC_OPTION_WARNINGS
SIM_AC_OPTION_RESERVED_BITS(1)

# DEPRECATED
#
# Instead of defining a `subtarget' macro, code should be checking
# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
# in question.
#
case "${target}" in
  mips64vr*-*-*)	SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
  mips*tx39*)           SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
  mips*-sde-elf*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mips*-mti-elf*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mipsisa32*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mipsisa64*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  *)                    SIM_SUBTARGET="";;
esac
AC_SUBST(SIM_SUBTARGET)


#
# Select the byte order of the target
#
mips_endian=
default_endian=
case "${target}" in
  mips64el*-*-*)        mips_endian=LITTLE ;;
  mips64vr*el-*-*)      default_endian=LITTLE ;;
  mips64*-*-*)          default_endian=BIG ;;
  mips16*-*-*)          default_endian=BIG ;;
  mipsisa32*-*-*)       default_endian=BIG ;;
  mipsisa64*-*-*)       default_endian=BIG ;;
  mips*-*-*)            default_endian=BIG ;;
  *)                    default_endian=BIG ;;
esac
SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)


#
# Select the bitsize of the target
#
mips_addr_bitsize=
case "${target}" in
  mips*-sde-elf*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips*-mti-elf*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips64*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
  mips16*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
  mipsisa32*-*-*)       mips_bitsize=32 ; mips_msb=31 ;;
  mipsisa64*-*-*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips*-*-*)            mips_bitsize=32 ; mips_msb=31 ;;
  *)                    mips_bitsize=64 ; mips_msb=63 ;;
esac
SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)


#
# Select the floating hardware support of the target
#
mips_fpu=HARDWARE_FLOATING_POINT
mips_fpu_bitsize=
case "${target}" in
  mips*tx39*)		mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
  mips*-sde-elf*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips*-mti-elf*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips64*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
  mips16*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
  mipsisa32*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mipsisa64*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips*-*-*)            mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
  *)                    mips_fpu=HARD_FLOATING_POINT ;;
esac
SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)


#
# Select the IGEN architecture
#
sim_gen=IGEN
sim_igen_machine="-M mipsIV"
sim_m16_machine="-M mips16,mipsIII"
sim_igen_filter="32,64,f"
sim_m16_filter="16"
sim_mach_default="mips8000"

case "${target}" in
  mips*tx39*)		sim_gen=IGEN
			sim_igen_filter="32,f"
			sim_igen_machine="-M r3900"
			;;
  mips64vr43*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M mipsIV"
			sim_mach_default="mips8000"
			;;
  mips64vr5*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M vr5000"
			sim_mach_default="mips5000"
			;;
  mips64vr41*)		sim_gen=M16
			sim_igen_machine="-M vr4100"
			sim_m16_machine="-M vr4100"
			sim_igen_filter="32,64,f"
			sim_m16_filter="16"
			sim_mach_default="mips4100"
                        ;;
  mips64vr-*-* | mips64vrel-*-*)
			sim_gen=MULTI
			sim_multi_configs="\
			  vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
			  vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
			  vr5000:mipsIV:32,64,f:mips4300,mips5000\
			  vr5400:mipsIV,vr5400:32,64,f:mips5400\
			  vr5500:mipsIV,vr5500:32,64,f:mips5500"
			sim_multi_default=mips5000
			;;
  mips*-sde-elf* | mips*-mti-elf*)
			sim_gen=MULTI
			sim_multi_configs="\
			  micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\
			  mips64r2:mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,64,f:mipsisa64r2"
			sim_multi_default=mipsisa64r2
			;;
  mips64*-*-*)		sim_igen_filter="32,64,f"
			sim_gen=IGEN
			;;
  mips16*-*-*)		sim_gen=M16
			sim_igen_filter="32,64,f"
			sim_m16_filter="16"
			;;
  mipsisa32r2*-*-*)	sim_gen=MULTI
			sim_multi_configs="\
			  micromips:micromips32,micromipsdsp:32,f:mips_micromips\
			  mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
			sim_multi_default=mipsisa32r2
			;;
  mipsisa32*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
			sim_m16_machine="-M mips16,mips16e,mips32"
			sim_igen_filter="32,f"
			sim_mach_default="mipsisa32"
			;;
  mipsisa64r2*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
			sim_m16_machine="-M mips16,mips16e,mips64r2"
			sim_igen_filter="32,64,f"
			sim_mach_default="mipsisa64r2"
			;;
  mipsisa64sb1*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M mips64,mips3d,sb1"
			sim_igen_filter="32,64,f"
			sim_mach_default="mips_sb1"
			;;
  mipsisa64*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
			sim_m16_machine="-M mips16,mips16e,mips64"
			sim_igen_filter="32,64,f"
			sim_mach_default="mipsisa64"
			;;
  mips*lsi*)		sim_gen=M16
			sim_igen_machine="-M mipsIII,mips16"
			sim_m16_machine="-M mips16,mipsIII"
			sim_igen_filter="32,f"
			sim_m16_filter="16"
			sim_mach_default="mips4000"
			;;
  mips*-*-*)		sim_gen=IGEN
			sim_igen_filter="32,f"
			;;
esac

# The MULTI generator can combine several simulation engines into one.
# executable.  A configuration which uses the MULTI should set two
# variables: ${sim_multi_configs} and ${sim_multi_default}.
#
# ${sim_multi_configs} is the list of engines to build.  Each
# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
# where:
#
# - NAME is a C-compatible prefix for the engine,
# - MACHINE is a -M argument,
# - FILTER is a -F argument, and
# - BFDMACHS is a comma-separated list of bfd machines that the
#     simulator can run.
#
# Each entry will have a separate simulation engine whose prefix is
# m32<NAME>.  If the machine list includes "mips16", there will also
# be a mips16 engine, prefix m16<NAME>.  The mips16 engine will be
# generated using the same machine list as the 32-bit version,
# but the filter will be "16" instead of FILTER.
#
# The simulator compares the bfd mach against BFDMACHS to decide
# which engine to use.  Entries in BFDMACHS should be bfd_mach
# values with "bfd_mach_" removed.  ${sim_multi_default} says
# which entry should be the default.
if test ${sim_gen} = MULTI; then

  # Simple sanity check.
  if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
    AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly)
  fi

  # Start in a known state.
  rm -f multi-include.h multi-run.c
  sim_multi_flags=
  sim_multi_src=
  sim_multi_obj=
  sim_multi_igen_configs=
  sim_seen_default=no

  cat << __EOF__ > multi-run.c
/* Main entry point for MULTI simulators.
   Copyright (C) 2003-2016 Free Software Foundation, Inc.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.

   --

   This file was generated by sim/mips/configure.  */

#include "sim-main.h"
#include "multi-include.h"
#include "elf-bfd.h"
#include "elf/mips.h"

#define SD sd
#define CPU cpu

void
sim_engine_run (SIM_DESC sd,
		int next_cpu_nr,
		int nr_cpus,
		int signal) /* ignore */
{
  int mach;

  if (STATE_ARCHITECTURE (sd) == NULL)
    mach = bfd_mach_${sim_multi_default};
  else if (elf_elfheader (sd->base.prog_bfd)->e_flags
	   & EF_MIPS_ARCH_ASE_MICROMIPS)
    mach = bfd_mach_mips_micromips;
  else
    mach = STATE_ARCHITECTURE (SD)->mach;

  switch (mach)
    {
__EOF__

  for fc in ${sim_multi_configs}; do

    # Split up the entry.  ${c} contains the first three elements.
    # Note: outer sqaure brackets are m4 quotes.
    c=`echo ${fc} | sed ['s/:[^:]*$//']`
    bfdmachs=`echo ${fc} | sed 's/.*://'`
    name=`echo ${c} | sed 's/:.*//'`
    machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
    filter=`echo ${c} | sed 's/.*://'`

    # Build the following lists:
    #
    #   sim_multi_flags: all -M and -F flags used by the simulator
    #   sim_multi_src: all makefile-generated source files
    #   sim_multi_obj: the objects for ${sim_multi_src}
    #   sim_multi_igen_configs: igen configuration strings.
    #
    # Each entry in ${sim_multi_igen_configs} is a prefix (m32
    # or m16) followed by the NAME, MACHINE and FILTER part of
    # the ${sim_multi_configs} entry.
    sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"

    # Check whether special handling is needed.
    case ${c} in
      *:*mips16*:*)
	# Run igen twice, once for normal mode and once for mips16.
	ws="m32 m16"

	# The top-level function for the mips16 simulator is
	# in a file m16${name}_run.c, generated by the
	# tmp-run-multi Makefile rule.
	sim_multi_src="${sim_multi_src} m16${name}_run.c"
	sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
	sim_multi_flags="${sim_multi_flags} -F 16"
	;;
      *:*micromips32*:*)
	# Run igen thrice, once for micromips32, once for micromips16,
	# and once for m32.
	ws="micromips_m32 micromips16 micromips32"

	# The top-level function for the micromips simulator is
	# in a file micromips${name}_run.c, generated by the
	# tmp-run-multi Makefile rule.
	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	sim_multi_flags="${sim_multi_flags} -F 16,32"
	;;
      *:*micromips64*:*)
	# Run igen thrice, once for micromips64, once for micromips16,
	# and once for m64.
	ws="micromips_m64 micromips16 micromips64"

	# The top-level function for the micromips simulator is
	# in a file micromips${name}_run.c, generated by the
	# tmp-run-multi Makefile rule.
	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	sim_multi_flags="${sim_multi_flags} -F 16,32,64"
	;;
      *)
	ws=m32
	;;
    esac

    # Now add the list of igen-generated files to ${sim_multi_src}
    # and ${sim_multi_obj}.
    for w in ${ws}; do
      for base in engine icache idecode model semantics support; do
	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
	sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
      done
      sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
    done

    # Add an include for the engine.h file.  This file declares the
    # top-level foo_engine_run() function.
    echo "#include \"${w}${name}_engine.h\"" >> multi-include.h

    # Add case statements for this engine to sim_engine_run().
    for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
      echo "    case bfd_mach_${mach}:" >> multi-run.c
      if test ${mach} = ${sim_multi_default}; then
	echo "    default:" >> multi-run.c
	sim_seen_default=yes
      fi
    done
    echo "      ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
      >> multi-run.c
    echo "      break;" >> multi-run.c
  done

  # Check whether we added a 'default:' label.
  if test ${sim_seen_default} = no; then
    AC_MSG_ERROR(Error in configure.ac: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
  fi

  cat << __EOF__ >> multi-run.c
    }
}

int
mips_mach_multi (SIM_DESC sd)
{
  if (STATE_ARCHITECTURE (sd) == NULL)
    return bfd_mach_${sim_multi_default};

  switch (STATE_ARCHITECTURE (SD)->mach)
    {
__EOF__

  # Add case statements for this engine to mips_mach_multi().
  for fc in ${sim_multi_configs}; do

    # Split up the entry.  ${c} contains the first three elements.
    # Note: outer sqaure brackets are m4 quotes.
    c=`echo ${fc} | sed ['s/:[^:]*$//']`
    bfdmachs=`echo ${fc} | sed 's/.*://'`

    for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
      echo "    case bfd_mach_${mach}:" >> multi-run.c
    done
  done

  cat << __EOF__ >> multi-run.c
      return (STATE_ARCHITECTURE (SD)->mach);
    default:
      return bfd_mach_${sim_multi_default};
    }
}
__EOF__

  SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
else
  # For clean-extra
  sim_multi_src=doesnt-exist.c

  if test x"${sim_mach_default}" = x""; then
    AC_MSG_ERROR(Error in configure.ac: \${sim_mach_default} not defined)
  fi
  SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
fi
sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
sim_m16_flags=" -F ${sim_m16_filter}  ${sim_m16_machine}  ${sim_igen_smp}"
sim_micromips16_flags=" -F ${sim_micromips16_filter}  ${sim_micromips16_machine}  ${sim_igen_smp}"
sim_micromips_flags=" -F ${sim_micromips_filter}  ${sim_micromips_machine}  ${sim_igen_smp}"
AC_SUBST(sim_igen_flags)
AC_SUBST(sim_m16_flags)
AC_SUBST(sim_micromips_flags)
AC_SUBST(sim_micromips16_flags)
AC_SUBST(sim_gen)
AC_SUBST(sim_multi_flags)
AC_SUBST(sim_multi_igen_configs)
AC_SUBST(sim_multi_src)
AC_SUBST(sim_multi_obj)
#
# Add simulated hardware devices
#
hw_enabled=no
case "${target}" in
  mips*tx39*)
	hw_enabled=yes
	hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio" 
	;;
  *)
	;;
esac
SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)


# Choose simulator engine
case "${target}" in
  *)    mips_igen_engine="engine.o"
	;;
esac
AC_SUBST(mips_igen_engine)


AC_PATH_X
mips_extra_libs=""
AC_SUBST(mips_extra_libs)

AC_CHECK_LIB(m, fabs)
AC_CHECK_FUNCS(aint anint sqrt)

SIM_AC_OUTPUT
Commit	Line	Data
c906108c	1	dnl Process this file with autoconf to produce a configure script.
6ffe910a	2	AC_PREREQ(2.64)dnl
c906108c	3	AC_INIT(Makefile.in)
9c082ca8	4	sinclude(../common/acinclude.m4)
c906108c	5
6ffe910a	6	SIM_AC_COMMON
35695fd6	7
c906108c	8	dnl Options available in this module
c906108c	9	SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
c906108c	10	SIM_AC_OPTION_WARNINGS
e6c674b8	11	SIM_AC_OPTION_RESERVED_BITS(1)
c906108c SS	12
	13	# DEPRECATED
	14	#
	15	# Instead of defining a `subtarget' macro, code should be checking
	16	# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
	17	# in question.
	18	#
	19	case "${target}" in
4c54fc26	20	mips64vr--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
c906108c	21	mipstx39) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
109ad085	22	mips-sde-elf) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
cc220243	23	mips-mti-elf) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
1e799e28 CD	24	mipsisa32--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
1e799e28 CD	25	mipsisa64--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
c906108c SS	26	*) SIM_SUBTARGET="";;
	27	esac
	28	AC_SUBST(SIM_SUBTARGET)
	29
	30
	31
	32	#
	33	# Select the byte order of the target
	34	#
	35	mips_endian=
	36	default_endian=
	37	case "${target}" in
1ac72f06 MF	38	mips64el--*) mips_endian=LITTLE ;;
	39	mips64vrel--*) default_endian=LITTLE ;;
	40	mips64--*) default_endian=BIG ;;
	41	mips16--*) default_endian=BIG ;;
	42	mipsisa32--*) default_endian=BIG ;;
	43	mipsisa64--*) default_endian=BIG ;;
	44	mips--*) default_endian=BIG ;;
	45	*) default_endian=BIG ;;
c906108c SS	46	esac
	47	SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
	48
	49
	50
	51	#
	52	# Select the bitsize of the target
	53	#
	54	mips_addr_bitsize=
	55	case "${target}" in
4b5d35ee	56	mips-sde-elf) mips_bitsize=64 ; mips_msb=63 ;;
cc220243	57	mips-mti-elf) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	58	mips64--*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	59	mips16--*) mips_bitsize=64 ; mips_msb=63 ;;
1e799e28 CD	60	mipsisa32--*) mips_bitsize=32 ; mips_msb=31 ;;
1e799e28 CD	61	mipsisa64--*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	62	mips--*) mips_bitsize=32 ; mips_msb=31 ;;
	63	*) mips_bitsize=64 ; mips_msb=63 ;;
	64	esac
	65	SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
	66
	67
	68
	69	#
	70	# Select the floating hardware support of the target
	71	#
	72	mips_fpu=HARDWARE_FLOATING_POINT
	73	mips_fpu_bitsize=
	74	case "${target}" in
4b5d35ee TS	75	mipstx39) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
4b5d35ee TS	76	mips-sde-elf) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
cc220243	77	mips-mti-elf) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c SS	78	mips64--*) mips_fpu=HARD_FLOATING_POINT ;;
c906108c SS	79	mips16--*) mips_fpu=HARD_FLOATING_POINT ;;
1e799e28 CD	80	mipsisa32--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
1e799e28 CD	81	mipsisa64--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c SS	82	mips--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
	83	*) mips_fpu=HARD_FLOATING_POINT ;;
	84	esac
	85	SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
	86
	87
	88
c906108c SS	89	#
	90	# Select the IGEN architecture
	91	#
	92	sim_gen=IGEN
	93	sim_igen_machine="-M mipsIV"
139181c8	94	sim_m16_machine="-M mips16,mipsIII"
c906108c SS	95	sim_igen_filter="32,64,f"
c906108c SS	96	sim_m16_filter="16"
4c54fc26 CD	97	sim_mach_default="mips8000"
4c54fc26 CD	98
c906108c SS	99	case "${target}" in
	100	mipstx39) sim_gen=IGEN
	101	sim_igen_filter="32,f"
	102	sim_igen_machine="-M r3900"
	103	;;
	104	mips64vr43--*) sim_gen=IGEN
	105	sim_igen_machine="-M mipsIV"
4c54fc26	106	sim_mach_default="mips8000"
c906108c SS	107	;;
	108	mips64vr5--*) sim_gen=IGEN
	109	sim_igen_machine="-M vr5000"
4c54fc26	110	sim_mach_default="mips5000"
c906108c SS	111	;;
	112	mips64vr41*) sim_gen=M16
	113	sim_igen_machine="-M vr4100"
	114	sim_m16_machine="-M vr4100"
	115	sim_igen_filter="32,64,f"
	116	sim_m16_filter="16"
4c54fc26	117	sim_mach_default="mips4100"
c906108c	118	;;
4c54fc26 CD	119	mips64vr-- \| mips64vrel--)
	120	sim_gen=MULTI
	121	sim_multi_configs="\
	122	vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
	123	vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
	124	vr5000:mipsIV:32,64,f:mips4300,mips5000\
	125	vr5400:mipsIV,vr5400:32,64,f:mips5400\
	126	vr5500:mipsIV,vr5500:32,64,f:mips5500"
	127	sim_multi_default=mips5000
	128	;;
cc220243	129	mips-sde-elf \| mips-mti-elf)
8e394ffc AB	130	sim_gen=MULTI
	131	sim_multi_configs="\
	132	micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\
	133	mips64r2:mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,64,f:mipsisa64r2"
	134	sim_multi_default=mipsisa64r2
3669427c	135	;;
c906108c SS	136	mips64--*) sim_igen_filter="32,64,f"
	137	sim_gen=IGEN
	138	;;
	139	mips16--*) sim_gen=M16
	140	sim_igen_filter="32,64,f"
	141	sim_m16_filter="16"
	142	;;
8e394ffc AB	143	mipsisa32r2--*) sim_gen=MULTI
	144	sim_multi_configs="\
	145	micromips:micromips32,micromipsdsp:32,f:mips_micromips\
	146	mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
	147	sim_multi_default=mipsisa32r2
e70cb6cd	148	;;
d5fb0879 RS	149	mipsisa32--*) sim_gen=M16
	150	sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
	151	sim_m16_machine="-M mips16,mips16e,mips32"
	152	sim_igen_filter="32,f"
	153	sim_mach_default="mipsisa32"
1e799e28	154	;;
d5fb0879 RS	155	mipsisa64r2--*) sim_gen=M16
	156	sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
	157	sim_m16_machine="-M mips16,mips16e,mips64r2"
	158	sim_igen_filter="32,64,f"
	159	sim_mach_default="mipsisa64r2"
e70cb6cd	160	;;
7cbea089	161	mipsisa64sb1--*) sim_gen=IGEN
109ad085	162	sim_igen_machine="-M mips64,mips3d,sb1"
7cbea089	163	sim_igen_filter="32,64,f"
4c54fc26	164	sim_mach_default="mips_sb1"
7cbea089	165	;;
d5fb0879 RS	166	mipsisa64--*) sim_gen=M16
	167	sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
	168	sim_m16_machine="-M mips16,mips16e,mips64"
	169	sim_igen_filter="32,64,f"
	170	sim_mach_default="mipsisa64"
1e799e28	171	;;
109ad085	172	mipslsi) sim_gen=M16
c906108c SS	173	sim_igen_machine="-M mipsIII,mips16"
	174	sim_m16_machine="-M mips16,mipsIII"
	175	sim_igen_filter="32,f"
	176	sim_m16_filter="16"
4c54fc26	177	sim_mach_default="mips4000"
109ad085	178	;;
c906108c SS	179	mips--*) sim_gen=IGEN
	180	sim_igen_filter="32,f"
	181	;;
	182	esac
4c54fc26 CD	183
	184	# The MULTI generator can combine several simulation engines into one.
	185	# executable. A configuration which uses the MULTI should set two
	186	# variables: ${sim_multi_configs} and ${sim_multi_default}.
	187	#
	188	# ${sim_multi_configs} is the list of engines to build. Each
	189	# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
	190	# where:
	191	#
	192	# - NAME is a C-compatible prefix for the engine,
	193	# - MACHINE is a -M argument,
	194	# - FILTER is a -F argument, and
	195	# - BFDMACHS is a comma-separated list of bfd machines that the
	196	# simulator can run.
	197	#
	198	# Each entry will have a separate simulation engine whose prefix is
	199	# m32<NAME>. If the machine list includes "mips16", there will also
	200	# be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
	201	# generated using the same machine list as the 32-bit version,
	202	# but the filter will be "16" instead of FILTER.
	203	#
	204	# The simulator compares the bfd mach against BFDMACHS to decide
	205	# which engine to use. Entries in BFDMACHS should be bfd_mach
	206	# values with "bfd_mach_" removed. ${sim_multi_default} says
	207	# which entry should be the default.
	208	if test ${sim_gen} = MULTI; then
	209
	210	# Simple sanity check.
	211	if test -z "${sim_multi_configs}" \|\| test -z "${sim_multi_default}"; then
306f4178	212	AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly)
4c54fc26 CD	213	fi
	214
	215	# Start in a known state.
	216	rm -f multi-include.h multi-run.c
	217	sim_multi_flags=
	218	sim_multi_src=
8e394ffc	219	sim_multi_obj=
4c54fc26 CD	220	sim_multi_igen_configs=
	221	sim_seen_default=no
	222
	223	cat << __EOF__ > multi-run.c
	224	/* Main entry point for MULTI simulators.
618f726f	225	Copyright (C) 2003-2016 Free Software Foundation, Inc.
4c54fc26 CD	226
	227	This program is free software; you can redistribute it and/or modify
	228	it under the terms of the GNU General Public License as published by
35ee6e1e	229	the Free Software Foundation; either version 3 of the License, or
4c54fc26 CD	230	(at your option) any later version.
	231
	232	This program is distributed in the hope that it will be useful,
	233	but WITHOUT ANY WARRANTY; without even the implied warranty of
	234	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	235	GNU General Public License for more details.
	236
	237	You should have received a copy of the GNU General Public License
35ee6e1e	238	along with this program. If not, see <http://www.gnu.org/licenses/>.
4c54fc26 CD	239
	240	--
	241
	242	This file was generated by sim/mips/configure. */
	243
	244	#include "sim-main.h"
	245	#include "multi-include.h"
8e394ffc AB	246	#include "elf-bfd.h"
8e394ffc AB	247	#include "elf/mips.h"
4c54fc26 CD	248
	249	#define SD sd
	250	#define CPU cpu
	251
	252	void
	253	sim_engine_run (SIM_DESC sd,
	254	int next_cpu_nr,
	255	int nr_cpus,
	256	int signal) /* ignore */
	257	{
	258	int mach;
	259
	260	if (STATE_ARCHITECTURE (sd) == NULL)
	261	mach = bfd_mach_${sim_multi_default};
8e394ffc AB	262	else if (elf_elfheader (sd->base.prog_bfd)->e_flags
	263	& EF_MIPS_ARCH_ASE_MICROMIPS)
	264	mach = bfd_mach_mips_micromips;
4c54fc26 CD	265	else
	266	mach = STATE_ARCHITECTURE (SD)->mach;
	267
	268	switch (mach)
	269	{
	270	__EOF__
	271
	272	for fc in ${sim_multi_configs}; do
	273
	274	# Split up the entry. ${c} contains the first three elements.
	275	# Note: outer sqaure brackets are m4 quotes.
	276	c=`echo ${fc} \| sed ['s/:[^:]*$//']`
	277	bfdmachs=`echo ${fc} \| sed 's/.*://'`
	278	name=`echo ${c} \| sed 's/:.*//'`
	279	machine=`echo ${c} \| sed 's/.:\(.\):.*/\1/'`
	280	filter=`echo ${c} \| sed 's/.*://'`
	281
	282	# Build the following lists:
	283	#
	284	# sim_multi_flags: all -M and -F flags used by the simulator
	285	# sim_multi_src: all makefile-generated source files
	286	# sim_multi_obj: the objects for ${sim_multi_src}
	287	# sim_multi_igen_configs: igen configuration strings.
	288	#
	289	# Each entry in ${sim_multi_igen_configs} is a prefix (m32
	290	# or m16) followed by the NAME, MACHINE and FILTER part of
	291	# the ${sim_multi_configs} entry.
	292	sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
	293
8e394ffc	294	# Check whether special handling is needed.
4c54fc26 CD	295	case ${c} in
	296	:mips16:)
	297	# Run igen twice, once for normal mode and once for mips16.
	298	ws="m32 m16"
	299
	300	# The top-level function for the mips16 simulator is
	301	# in a file m16${name}_run.c, generated by the
	302	# tmp-run-multi Makefile rule.
	303	sim_multi_src="${sim_multi_src} m16${name}_run.c"
	304	sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
	305	sim_multi_flags="${sim_multi_flags} -F 16"
	306	;;
8e394ffc AB	307	:micromips32:)
	308	# Run igen thrice, once for micromips32, once for micromips16,
	309	# and once for m32.
	310	ws="micromips_m32 micromips16 micromips32"
	311
	312	# The top-level function for the micromips simulator is
	313	# in a file micromips${name}_run.c, generated by the
	314	# tmp-run-multi Makefile rule.
	315	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	316	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	317	sim_multi_flags="${sim_multi_flags} -F 16,32"
	318	;;
	319	:micromips64:)
	320	# Run igen thrice, once for micromips64, once for micromips16,
	321	# and once for m64.
	322	ws="micromips_m64 micromips16 micromips64"
	323
	324	# The top-level function for the micromips simulator is
	325	# in a file micromips${name}_run.c, generated by the
	326	# tmp-run-multi Makefile rule.
	327	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	328	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	329	sim_multi_flags="${sim_multi_flags} -F 16,32,64"
	330	;;
4c54fc26 CD	331	*)
	332	ws=m32
	333	;;
	334	esac
	335
	336	# Now add the list of igen-generated files to ${sim_multi_src}
	337	# and ${sim_multi_obj}.
	338	for w in ${ws}; do
	339	for base in engine icache idecode model semantics support; do
	340	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
	341	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
	342	sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
	343	done
	344	sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
	345	done
	346
	347	# Add an include for the engine.h file. This file declares the
	348	# top-level foo_engine_run() function.
	349	echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
	350
	351	# Add case statements for this engine to sim_engine_run().
	352	for mach in `echo ${bfdmachs} \| sed 's/,/ /g'`; do
	353	echo " case bfd_mach_${mach}:" >> multi-run.c
	354	if test ${mach} = ${sim_multi_default}; then
	355	echo " default:" >> multi-run.c
	356	sim_seen_default=yes
	357	fi
	358	done
	359	echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
	360	>> multi-run.c
	361	echo " break;" >> multi-run.c
	362	done
	363
	364	# Check whether we added a 'default:' label.
	365	if test ${sim_seen_default} = no; then
306f4178	366	AC_MSG_ERROR(Error in configure.ac: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
4c54fc26 CD	367	fi
	368
	369	cat << __EOF__ >> multi-run.c
	370	}
	371	}
	372
	373	int
	374	mips_mach_multi (SIM_DESC sd)
	375	{
	376	if (STATE_ARCHITECTURE (sd) == NULL)
	377	return bfd_mach_${sim_multi_default};
	378
	379	switch (STATE_ARCHITECTURE (SD)->mach)
	380	{
	381	__EOF__
	382
	383	# Add case statements for this engine to mips_mach_multi().
	384	for fc in ${sim_multi_configs}; do
	385
	386	# Split up the entry. ${c} contains the first three elements.
	387	# Note: outer sqaure brackets are m4 quotes.
	388	c=`echo ${fc} \| sed ['s/:[^:]*$//']`
	389	bfdmachs=`echo ${fc} \| sed 's/.*://'`
	390
	391	for mach in `echo ${bfdmachs} \| sed 's/,/ /g'`; do
	392	echo " case bfd_mach_${mach}:" >> multi-run.c
	393	done
	394	done
	395
	396	cat << __EOF__ >> multi-run.c
	397	return (STATE_ARCHITECTURE (SD)->mach);
	398	default:
	399	return bfd_mach_${sim_multi_default};
	400	}
	401	}
	402	__EOF__
	403
	404	SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
	405	else
	406	# For clean-extra
	407	sim_multi_src=doesnt-exist.c
	408
	409	if test x"${sim_mach_default}" = x""; then
306f4178	410	AC_MSG_ERROR(Error in configure.ac: \${sim_mach_default} not defined)
4c54fc26 CD	411	fi
	412	SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
	413	fi
c906108c SS	414	sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
c906108c SS	415	sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
8e394ffc AB	416	sim_micromips16_flags=" -F ${sim_micromips16_filter} ${sim_micromips16_machine} ${sim_igen_smp}"
8e394ffc AB	417	sim_micromips_flags=" -F ${sim_micromips_filter} ${sim_micromips_machine} ${sim_igen_smp}"
c906108c SS	418	AC_SUBST(sim_igen_flags)
c906108c SS	419	AC_SUBST(sim_m16_flags)
8e394ffc AB	420	AC_SUBST(sim_micromips_flags)
8e394ffc AB	421	AC_SUBST(sim_micromips16_flags)
c906108c	422	AC_SUBST(sim_gen)
4c54fc26 CD	423	AC_SUBST(sim_multi_flags)
	424	AC_SUBST(sim_multi_igen_configs)
	425	AC_SUBST(sim_multi_src)
	426	AC_SUBST(sim_multi_obj)
c906108c SS	427	#
	428	# Add simulated hardware devices
	429	#
	430	hw_enabled=no
	431	case "${target}" in
	432	mipstx39)
	433	hw_enabled=yes
	434	hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
c906108c SS	435	;;
c906108c SS	436	*)
c906108c SS	437	;;
	438	esac
	439	SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
c906108c SS	440
	441
	442	# Choose simulator engine
	443	case "${target}" in
	444	*) mips_igen_engine="engine.o"
	445	;;
	446	esac
	447	AC_SUBST(mips_igen_engine)
	448
	449
	450	AC_PATH_X
	451	mips_extra_libs=""
	452	AC_SUBST(mips_extra_libs)
	453
c906108c SS	454	AC_CHECK_LIB(m, fabs)
	455	AC_CHECK_FUNCS(aint anint sqrt)
	456
	457	SIM_AC_OUTPUT