Commit | Line | Data |
---|---|---|
19c5af72 DE |
1 | dnl Process this file with autoconf to produce a configure script. |
2 | sinclude(../common/aclocal.m4) | |
a271d1d9 | 3 | AC_PREREQ(2.5)dnl |
8ad57737 JSC |
4 | AC_INIT(Makefile.in) |
5 | ||
e3d12c65 | 6 | SIM_AC_COMMON |
8ad57737 | 7 | |
50a2a691 AC |
8 | dnl Options available in this module |
9 | SIM_AC_OPTION_INLINE(0) | |
76a6247f | 10 | SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT) |
50a2a691 AC |
11 | SIM_AC_OPTION_HOSTENDIAN |
12 | SIM_AC_OPTION_WARNINGS | |
13 | ||
14 | ||
4634263c | 15 | # Ensure a reasonable default simulator is constructed: (DEPRECATED) |
c98ec95d | 16 | case "${target}" in |
b637f306 GRK |
17 | # start-sanitize-tx19 |
18 | mipstx19*-*-*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";; | |
19 | # end-sanitize-tx19 | |
6205f379 GRK |
20 | # start-sanitize-tx49 |
21 | mips64tx49*-*-*) SIMCONF="-mips3 --warnings -mcpu=r4900";; | |
22 | # end-sanitize-tx49 | |
276c2d7d | 23 | # start-sanitize-r5900 |
832f05e8 | 24 | mips64r59*-*-*) SIMCONF="-mips3 --warnings -mcpu=r5900";; |
276c2d7d | 25 | # end-sanitize-r5900 |
180d1f0b | 26 | mips64vr4100-*-*) SIMCOMF="-mips0 -mcpu=r4100 -mgp64 --warnings" ;; |
c98ec95d | 27 | mips64*-*-*) SIMCONF="-mips0 --warnings";; |
831f59a2 | 28 | mips16*-*-*) SIMCONF="-mips0 --warnings";; |
c98ec95d JSC |
29 | mips*-*-*) SIMCONF="-mips2 --warnings";; |
30 | *) SIMCONF="-mips0 --warnings";; | |
31 | esac | |
e3d12c65 | 32 | AC_SUBST(SIMCONF) |
8ad57737 | 33 | |
4634263c | 34 | # DEPRECATED |
c476ac55 GRK |
35 | case "${target}" in |
36 | # start-sanitize-tx19 | |
37 | mipstx19*-*-*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; | |
38 | # end-sanitize-tx19 | |
39 | *) SIM_SUBTARGET="";; | |
40 | esac | |
41 | AC_SUBST(SIM_SUBTARGET) | |
42 | ||
18c64df6 | 43 | |
4634263c | 44 | |
18c64df6 AC |
45 | # |
46 | # Select the byte order of the target | |
47 | # | |
2d44e12a AC |
48 | mips_endian= |
49 | default_endian= | |
18c64df6 AC |
50 | case "${target}" in |
51 | # start-sanitize-tx19 | |
2d44e12a | 52 | mipstx19*-*-*) default_endian=BIG_ENDIAN ;; |
18c64df6 AC |
53 | # end-sanitize-tx19 |
54 | # start-sanitize-r5900 | |
55 | mips64r59*-*-*) mips_endian=LITTLE_ENDIAN ;; | |
56 | # end-sanitize-r5900 | |
2d44e12a AC |
57 | mips64*-*-*) default_endian=BIG_ENDIAN ;; |
58 | mips16*-*-*) default_endian=BIG_ENDIAN ;; | |
59 | mips*-*-*) default_endian=BIG_ENDIAN ;; | |
60 | *) default_endian=BIG_ENDIAN ;; | |
18c64df6 | 61 | esac |
2d44e12a | 62 | SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian) |
18c64df6 AC |
63 | |
64 | ||
4634263c | 65 | |
18c64df6 AC |
66 | # |
67 | # Select the bitsize of the target | |
68 | # | |
a48e8c8d | 69 | mips_addr_bitsize= |
18c64df6 AC |
70 | case "${target}" in |
71 | # start-sanitize-tx19 | |
72 | mipstx19*-*-*) mips_bitsize=32 ; mips_msb=31 ;; | |
73 | # end-sanitize-tx19 | |
74 | # start-sanitize-r5900 | |
a48e8c8d | 75 | mips64r59*-*-*) mips_bitsize=64 ; mips_msb=63 ; mips_addr_bitsize=32;; |
18c64df6 AC |
76 | # end-sanitize-r5900 |
77 | mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; | |
78 | mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;; | |
79 | mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;; | |
80 | *) mips_bitsize=64 ; mips_msb=63 ;; | |
81 | esac | |
a48e8c8d | 82 | SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize) |
18c64df6 AC |
83 | |
84 | ||
4634263c | 85 | |
18c64df6 AC |
86 | # |
87 | # Select the floating hardware support of the target | |
88 | # | |
89 | mips_fpu=HARDWARE_FLOATING_POINT | |
37379a25 | 90 | mips_fpu_bitsize= |
18c64df6 AC |
91 | case "${target}" in |
92 | # start-sanitize-tx19 | |
93 | mipstx19*-*-*) mips_fpu=SOFT_FLOATING_POINT ;; | |
94 | # end-sanitize-tx19 | |
37379a25 AC |
95 | mipstx39*-*-*) mips_fpu=HARD_FLOATING_POINT |
96 | mips_fpu_bitsize=32 | |
97 | ;; | |
18c64df6 | 98 | # start-sanitize-r5900 |
a48e8c8d | 99 | mips64r59*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; |
18c64df6 AC |
100 | # end-sanitize-r5900 |
101 | mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;; | |
102 | mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;; | |
103 | mips*-*-*) mips_fpu=HARD_FLOATING_POINT ;; | |
104 | *) mips_fpu=HARD_FLOATING_POINT ;; | |
105 | esac | |
37379a25 | 106 | SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize) |
18c64df6 AC |
107 | |
108 | ||
4634263c | 109 | |
01737f42 AC |
110 | # |
111 | # Select the level of SMP support | |
112 | # | |
113 | case "${target}" in | |
114 | # start-sanitize-r5900 | |
115 | mips64r59*-*-*) mips_smp=1 ;; | |
116 | # end-sanitize-r5900 | |
117 | *) mips_smp=0 ;; | |
118 | esac | |
119 | SIM_AC_OPTION_SMP($mips_smp) | |
120 | ||
121 | ||
4634263c | 122 | |
122edc03 | 123 | # |
44b8585a | 124 | # Select the IGEN architecture |
122edc03 | 125 | # |
37379a25 | 126 | sim_use_gen=IGEN |
c02ed6a8 AC |
127 | sim_igen_machine="-M mipsIV" |
128 | sim_m16_machine="-M mips16" | |
44b8585a AC |
129 | sim_igen_filter="32,64,f" |
130 | sim_m16_filter="16" | |
122edc03 | 131 | case "${target}" in |
90ad43b2 | 132 | # start-sanitize-tx19 |
44b8585a | 133 | mipstx19*-*-*) sim_default_gen=M16 |
37379a25 AC |
134 | #sim_use_gen=M16 |
135 | sim_use_gen=NO | |
c02ed6a8 AC |
136 | sim_igen_machine="-M tx19" |
137 | sim_m16_machine="-M tx19" | |
44b8585a AC |
138 | sim_igen_filter="32" |
139 | sim_m16_filter="16" | |
140 | ;; | |
90ad43b2 | 141 | # end-sanitize-tx19 |
37379a25 | 142 | mipstx39*-*-*) sim_default_gen=IGEN |
34f51d87 | 143 | sim_use_gen=NO |
37379a25 AC |
144 | sim_igen_filter="32,f" |
145 | sim_igen_machine="-M r3900" | |
146 | ;; | |
122edc03 | 147 | # start-sanitize-r5900 |
44b8585a | 148 | mips64r59*-*-*) sim_default_gen=IGEN |
c4db5b04 | 149 | sim_use_gen=IGEN |
c02ed6a8 | 150 | sim_igen_machine="-M r5900" |
44b8585a | 151 | ;; |
122edc03 | 152 | # end-sanitize-r5900 |
dd15abd5 GRK |
153 | # start-sanitize-vr4320 |
154 | mips64vr4320-*-*) sim_default_gen=IGEN | |
155 | sim_use_gen=IGEN | |
156 | sim_igen_machine="-M mipsIV,vr4320 -G gen-multi-sim=vr4320" | |
157 | ;; | |
158 | # end-sanitize-vr4320 | |
159 | mips64vr43*-*-*) sim_default_gen=IGEN | |
160 | sim_use_gen=IGEN | |
161 | sim_igen_machine="-M mipsIV" | |
162 | # start-sanitize-vr4320 | |
163 | sim_igen_machine="-M mipsIV,vr4320 -G gen-multi-sim=mipsIV" | |
164 | # end-sanitize-vr4320 | |
165 | ;; | |
122edc03 | 166 | # start-sanitize-vr5400 |
44b8585a AC |
167 | mips64vr54*-*-*) sim_default_gen=IGEN |
168 | sim_use_gen=IGEN | |
c02ed6a8 | 169 | sim_igen_machine="-M vr5000,vr5400 -G gen-multi-sim=vr5400" |
44b8585a | 170 | ;; |
122edc03 | 171 | # end-sanitize-vr5400 |
f23e93da | 172 | mips64vr5*-*-*) sim_default_gen=IGEN |
255cbbf1 | 173 | sim_use_gen=IGEN |
c02ed6a8 | 174 | sim_igen_machine="-M vr5000" |
255cbbf1 JL |
175 | # start-sanitize-vr5400 |
176 | sim_igen_machine="-M vr5000,vr5400 -G gen-multi-sim=vr5000" | |
177 | # end-sanitize-vr5400 | |
f23e93da | 178 | ;; |
180d1f0b JM |
179 | mips64vr4100-*-*) echo "NOTE: mips64vr4100 still uses gencode" |
180 | sim_default_gen=M16 | |
181 | sim_igen_machine="-M tx19" | |
182 | sim_m16_machine="-M tx19" | |
183 | sim_igen_filter = "32,64,f" | |
184 | sim_m16_filter = "16" | |
185 | sim_use_gen=NO | |
186 | ;; | |
187 | ||
4634263c AC |
188 | mips64*-*-*) sim_default_gen=IGEN |
189 | sim_igen_filter="32,64,f" | |
190 | sim_use_gen=IGEN | |
191 | ;; | |
44b8585a | 192 | mips16*-*-*) sim_default_gen=M16 |
4634263c AC |
193 | sim_igen_filter="32,64,f" |
194 | sim_m16_filter="16" | |
37379a25 | 195 | sim_use_igen=NO |
44b8585a | 196 | ;; |
4634263c | 197 | mips*-*-*) sim_default_gen=IGEN |
44b8585a | 198 | sim_igen_filter="32,f" |
4634263c | 199 | sim_use_gen=IGEN |
44b8585a | 200 | ;; |
122edc03 | 201 | esac |
01737f42 AC |
202 | sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}" |
203 | sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}" | |
16bd5d6e AC |
204 | AC_SUBST(sim_igen_flags) |
205 | AC_SUBST(sim_m16_flags) | |
122edc03 | 206 | |
4634263c AC |
207 | |
208 | ||
44b8585a AC |
209 | # |
210 | # Enable igen | |
211 | # | |
212 | AC_ARG_ENABLE(sim-igen, | |
213 | [ --enable-sim-igen=opts Enable IGEN simulator], | |
214 | [case "${enableval}" in | |
215 | yes) sim_gen="${sim_default_gen}";; | |
216 | no) sim_gen=NO;; | |
217 | 16) sim_gen=M16;; | |
9b23b76d | 218 | *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-igen"); sim_gen="";; |
44b8585a AC |
219 | esac |
220 | if test x"$silent" != x"yes" && test x"$sim_gen" != x""; then | |
221 | echo "Setting sim_igen = $sim_gen" 6>&1 | |
222 | fi],[sim_gen="${sim_use_gen}"])dnl | |
223 | AC_SUBST(sim_gen) | |
224 | ||
225 | ||
5759734b DE |
226 | case "${target}" in |
227 | # start-sanitize-sky | |
2c88fae9 | 228 | mips64r59*-sky-*) mips_extra_objs='$(SIM_SKY_OBJS)' ; |
97908603 | 229 | SIM_SUBTARGET="-DTARGET_SKY -DWITH_DEVICES=1 -DDEVICE_INIT=1";; |
2c88fae9 | 230 | |
5759734b DE |
231 | # end-sanitize-sky |
232 | *) mips_extra_objs="" ;; | |
233 | esac | |
234 | AC_SUBST(mips_extra_objs) | |
235 | ||
122edc03 | 236 | |
9b23b76d FCE |
237 | AC_PATH_X |
238 | mips_extra_libs="" | |
239 | # start-sanitize-sky | |
240 | # Enable GPU2 library | |
241 | AC_ARG_WITH(sim-gpu2, | |
242 | [ --with-sim-gpu2=path Use GPU2 library under given directory], | |
243 | [if test -d "${withval}" | |
244 | then | |
245 | SIM_SUBTARGET="${SIM_SUBTARGET} -DSKY_GPU2 -I${withval}/include" | |
246 | mips_extra_libs="-L${withval}/lib -lgpu2 -L${x_libraries} -lX11" | |
247 | else | |
248 | AC_MSG_ERROR("Directory ${withval} does not exist."); | |
249 | fi])dnl | |
250 | # end-sanitize-sky | |
251 | AC_SUBST(mips_extra_libs) | |
252 | ||
50a2a691 | 253 | AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h) |
4fa134be | 254 | AC_CHECK_LIB(m, fabs) |
617c07c6 | 255 | AC_CHECK_FUNCS(aint anint sqrt) |
4fa134be | 256 | |
e3d12c65 | 257 | SIM_AC_OUTPUT |