[deliverable/binutils-gdb.git] / sim / mips / tconfig.h

/* mips target configuration file.  */

/* See sim-hload.c.  We properly handle LMA.  */
#ifdef TARGET_TX3904
#define SIM_HANDLES_LMA 1
#else
#define SIM_HANDLES_LMA 0
#endif

/* Define this if the simulator uses an instruction cache.
   See the h8/300 simulator for an example.
   This enables the `-c size' option to set the size of the cache.
   The target is required to provide sim_set_simcache_size.  */
/* #define SIM_HAVE_SIMCACHE */

/* MIPS uses an unusual format for floating point quiet NaNs.  */
#define SIM_QUIET_NAN_NEGATED
Commit	Line	Data
c906108c SS	1	/* mips target configuration file. */
	2
	3	/* See sim-hload.c. We properly handle LMA. */
	4	#ifdef TARGET_TX3904
	5	#define SIM_HANDLES_LMA 1
43e526b9 JM	6	#else
43e526b9 JM	7	#define SIM_HANDLES_LMA 0
c906108c SS	8	#endif
c906108c SS	9
c906108c SS	10	/* Define this if the simulator uses an instruction cache.
	11	See the h8/300 simulator for an example.
	12	This enables the `-c size' option to set the size of the cache.
	13	The target is required to provide sim_set_simcache_size. */
	14	/* #define SIM_HAVE_SIMCACHE */
	15
21d14896 ILT	16	/* MIPS uses an unusual format for floating point quiet NaNs. */
21d14896 ILT	17	#define SIM_QUIET_NAN_NEGATED