Commit | Line | Data |
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c906108c SS |
1 | /* mips target configuration file. */ |
2 | ||
3 | /* See sim-hload.c. We properly handle LMA. */ | |
4 | #ifdef TARGET_TX3904 | |
5 | #define SIM_HANDLES_LMA 1 | |
43e526b9 JM |
6 | #else |
7 | #define SIM_HANDLES_LMA 0 | |
c906108c SS |
8 | #endif |
9 | ||
c906108c SS |
10 | /* Define this if the simulator uses an instruction cache. |
11 | See the h8/300 simulator for an example. | |
12 | This enables the `-c size' option to set the size of the cache. | |
13 | The target is required to provide sim_set_simcache_size. */ | |
14 | /* #define SIM_HAVE_SIMCACHE */ | |
15 | ||
21d14896 ILT |
16 | /* MIPS uses an unusual format for floating point quiet NaNs. */ |
17 | #define SIM_QUIET_NAN_NEGATED |