* opncls.c (bfd_zalloc): Document this function.
[deliverable/binutils-gdb.git] / sim / mn10300 / ChangeLog
CommitLineData
35695fd6
AC
12005-01-14 Andrew Cagney <cagney@gnu.org>
2
3 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
4 explicit call to AC_CONFIG_HEADER.
5 * configure: Regenerate.
6
f0569246
AC
72005-01-12 Andrew Cagney <cagney@gnu.org>
8
9 * configure.ac: Update to use ../common/common.m4.
10 * configure: Re-generate.
11
38f48d72
AC
122005-01-11 Andrew Cagney <cagney@localhost.localdomain>
13
14 * configure: Regenerated to track ../common/aclocal.m4 changes.
15
b7026657
AC
162005-01-07 Andrew Cagney <cagney@gnu.org>
17
18 * configure.ac: Rename configure.in, require autoconf 2.59.
19 * configure: Re-generate.
20
379832de
HPN
212004-12-08 Hans-Peter Nilsson <hp@axis.com>
22
23 * configure: Regenerate for ../common/aclocal.m4 update.
24
599e0b9e
AO
252004-06-26 Alexandre Oliva <aoliva@redhat.com>
26
c76b4bab
AO
27 2000-08-07 Graham Stott <grahams@cygnus.co.uk>
28 * am33-2.igen (fmadd, fmsub, fmnadd, fmnsub): Correct typo.
29 2000-05-29 Alexandre Oliva <aoliva@cygnus.com>
30 * interp.c (fpu_disabled_exception, fpu_unimp_exception,
31 fpu_check_signal_exception): Take additional state arguments.
32 Print exception type and call program_interrupt. Adjust callers.
33 (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
34 fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Take additional
35 arguments.
36 * mn10300_sim.h (fpu_disabled_exception, fpu_unimp_exception,
37 fpu_check_signal_exception): Adjust prototypes.
38 (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
39 fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Likewise.
40 * am33-2.igen: Adjust calls.
41 2000-05-19 Alexandre Oliva <aoliva@cygnus.com>
42 * op_utils.c (cmp2fcc): Moved...
43 * interp.c: ... here.
44 2000-05-18 Alexandre Oliva <aoliva@cygnus.com>
45 * am33-2.igen: Use `unsigned32', `signed32', `unsigned64' or
46 `signed64' where type width is relevant.
47 2000-05-15 Alexandre Oliva <aoliva@cygnus.com>
48 * mn10300_sim.h: Include sim-fpu.h.
49 (FD2FPU, FPU2FD): Enclose the FD argument in parentheses.
50 (fpu_check_signal_exception): Declare.
51 (struct fp_prec_t, fp_single_prec, fp_double_prec): Likewise.
52 (FP_SINGLE, FP_DOUBLE): Shorthands for fp_*_prec.
53 (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
54 fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Declare.
55 * interp.c (fpu_disabled_exception): Document.
56 (fpu_unimp_exception): Likewise.
57 (fpu_check_signal_exception): Define.
58 (reg2val_32, round_32, val2reg_32, fp_single_prec): Likewise.
59 (reg2val_64, round_64, val2reg_64, fp_double_prec): Likewise.
60 (REG2VAL, ROUND, VAL2REG): Define shorthands.
61 (fpu_status_ok): Define.
62 (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
63 fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Define.
64 * am33-2.igen (frsqrt, fcmp, fadd, fsub, fmul, fdiv,
65 fmadd, fmsub, fnmadd, fnmsub): Use new functions.
66 2000-04-27 Alexandre Oliva <aoliva@cygnus.com>
67 * interp.c (sim_create_inferior): Set PSW bit to enable FP insns
68 if architecture is AM33/2.0.
69 * am33.igen: Include am33-2.igen.
70 2000-04-23 Alexandre Oliva <aoliva@cygnus.com>
71 * mn10300.igen (movm, call, ret, retf): Check for am33_2 too.
72 * am33.igen (movm): Likewise.
73 2000-04-19 Alexandre Oliva <aoliva@cygnus.com>
74 * am33.igen: Added `*am33_2' to some instructions that were
75 missing it.
76 2000-04-07 Alexandre Oliva <aoliva@cygnus.com>
77 * am33-2.igen: New file. All insns implemented, but FP flags are
78 only set for fcmp, exceptional conditions are not handled yet.
79 * Makefile.in (IGEN_INSN): Added am33-2.igen.
80 (tmp-igen): Added -M am33_2.
81 * mn10300.igen, am33.igen: Added `*am33_2' to all insns.
82 * gencode.c: Support FMT_D3.
83 * mn10300_sim.h (dword): New type.
84 (struct _state): Added fpregs.
85 (REG_FPCR, FPCR): New define. All assorted bitmaps.
86 (XS2FS, AS2FS, Xf2FD): New macros.
87 (FS2FPU, FD2FPU, FPU2FS, FPU2FD): Likewise.
88 (load_dword, store_dword): New functions or macros.
89 (u642dw, dw2u64): New functions.
90 (fpu_disabled_exception, fpu_unimp_exception): Declared.
91 * interp.c (fpu_disabled_exception): Defined; no actual
92 implementation.
93 (fpu_unimp_exception): Likewise.
94 * op_utils.c (cmp2fcc): New function.
95
489503ee
AO
96 * interp.c, mn10300_sim.h, op_utils.c: Convert function prototypes
97 and definitions to ISO C.
98
622c89b6
AO
99 * gencode.c, simops.c: Delete.
100 * Makefile.in: Remove non-COMMON dependencies and commands.
101
599e0b9e
AO
102 * configure.in: Use common simulator always. Don't subst sim_gen
103 nor mn10300_common.
104 * configure: Rebuilt.
105 * Makefile.in (WITHOUT_COMMON_OBJS, WITHOUT_COMMON_INTERP_DEP,
106 WITHOUT_COMMON_RUN_OBJS): Remove.
107 (WITH_COMMON_OBJS): Rename to MN10300_OBJS.
108 (WITH_COMMON_INTERP_DEP): Rename to MN10300_INTERP_DEP.
109 (WITH_COMMON_RUN_OBJS): Rename to SIM_RUN_OBJS.
110 (SIM_EXTRA_CFLAGS): Don't use @sim_gen@.
111 * interp.c: Remove non-common bits.
112 * mn10300_sim.h: Likewise.
113
e158f0a0
AC
1142003-08-28 Andrew Cagney <cagney@redhat.com>
115
116 * dv-mn103ser.c (do_polling_event): Change type of "serial_reg" to
117 "long".
118 (read_status_reg): Cast "serial_reg" to "long".
119 * dv-mn103tim.c (do_counter_event): Change type of "timer_nr" to
120 "long".
121 (do_counter6_event, write_mode_reg, write_tm6md): Ditto.
122
6b4a8935
AC
1232003-02-27 Andrew Cagney <cagney@redhat.com>
124
125 * interp.c (sim_open, sim_create_inferior, sim_open)
126 (sim_create_inferior): Rename _bfd to bfd.
127
dbd7cd63
AC
1282003-02-26 Andrew Cagney <cagney@redhat.com>
129
130 * am33.igen: Call sim_engine_abort instead of abort.
131
bb6317d3
DC
1322003-02-26 David Carlton <carlton@math.stanford.edu>
133
134 * dv-mn103tim.c (read_special_timer6_reg): Add break after
135 empty default: label.
136 (write_special_timer6_reg): Ditto.
137 Update copyright.
138
6c0a25e9
AC
1392002-11-28 Andrew Cagney <cagney@redhat.com>
140
141 * sim-main.h: Only include "idecode.h" once.
142 * Makefile.in (SIM_EXTRA_DEPS): Define.
143
c8cca39f
AC
1442002-06-16 Andrew Cagney <ac131313@redhat.com>
145
146 * configure: Regenerated to track ../common/aclocal.m4 changes.
147
3c25f8c7
AC
1482002-06-09 Andrew Cagney <cagney@redhat.com>
149
150 * Makefile.in (INCLUDE): Update path to callback.h.
151 * mn10300_sim.h: Include "gdb/callback.h" and "gdb/remote-sim.h".
152 * tconfig.in: Ditto.
153
ff88f59d
JB
1542001-05-06 Jim Blandy <jimb@redhat.com>
155
156 * mn10300.igen: Doc fixes.
157
cc274e7c
AO
1582001-04-26 Alexandre Oliva <aoliva@redhat.com>
159
160 * Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o):
161 Depend on targ-vals.h.
162
d4424ada
C
1632001-04-15 J.T. Conklin <jtc@redback.com>
164
165 * Makefile.in (simops.o): Add simops.h to dependency list.
166
5425ca99
AO
167Wed Aug 9 02:24:53 2000 Graham Stott <grahams@cygnus.co.uk>
168
169 * am33.igen: Warning clean-up.
170 (movm): Initialize PC and mask.
171 (mov, movbu, movhu): Set srcreg2 from RI0.
172 (bsch): Initialize c.
173 (sat16_cmp): Actually do the comparison.
174 (mov_llt): Do not overwrite dstreg with uninitialized variable.
175
eb2d80b4
AC
176Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
177
178 * configure: Regenerated to track ../common/aclocal.m4 changes.
179
e33c0364
AO
1802000-05-22 Alexandre Oliva <aoliva@cygnus.com>
181
182 * am33.igen: Fix leading comments of SP-relative offset insns that
183 referred to other registers. Make their offsets unsigned.
184
24a39d88
AO
1852000-05-18 Alexandre Oliva <aoliva@cygnus.com>
186
187 * mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,
188 genericXor, genericBtst): Use `unsigned32'.
189 * op_utils.c: Likewise.
190 * mn10300.igen, am33.igen: Use `unsigned32', `signed32',
191 `unsigned64' or `signed64' where type width is relevant.
192
bfa8561f
AO
1932000-04-25 Alexandre Oliva <aoliva@cygnus.com>
194
195 * am33.igen (inc4 Rn): Use genericAdd so as to modify flags.
196
d8e7020f
AO
1972000-04-09 Alexandre Oliva <aoliva@cygnus.com>
198
199 * am33.igen: Make SP-relative offsets unsigned. Add `*am33' for
200 some instructions that were missing it.
201
a9e3a739
FCE
2022000-03-03 Alexandre Oliva <oliva@lsd.ic.unicamp.br>
203
204 * Makefile.in (IGEN_INSN): Added am33.igen.
205
d4f3574e
SS
206Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
207
208 * configure: Regenerated to track ../common/aclocal.m4 changes.
209
adf40b2e
JM
210Tue Jul 13 13:26:20 1999 Andrew Cagney <cagney@b1.cygnus.com>
211
212 * interp.c: Clarify error message reporting an unknown board.
213
cd0fc7c3
SS
2141999-05-08 Felix Lee <flee@cygnus.com>
215
216 * configure: Regenerated to track ../common/aclocal.m4 changes.
217
7a292a7a
SS
2181999-04-16 Frank Ch. Eigler <fche@cygnus.com>
219
220 * interp.c (program_interrupt): Detect undesired recursion using
221 static flag. Set NMIRC register's SYSEF flag during
222 --board=stdeval1 mode.
223 * dv-mn103-int.c (write_icr): Add backdoor address to allow CPU to
224 set SYSEF flag.
225
2261999-04-02 Keith Seitz <keiths@cygnus.com>
227
228 * Makefile.in (SIM_EXTRA_CFLAGS): Define a POLL_QUIT_INTERVAL
229 for use in the simulator so that the poll_quit callback is
230 not called too often.
231
232Tue Mar 9 21:26:41 1999 Andrew Cagney <cagney@b1.cygnus.com>
233
234 * dv-mn103int.c (mn103int_ioctl): Return something.
235 * dv-mn103tim.c (write_tm6md): GCC suggested parentheses around &&
236 within ||.
237
238Tue Feb 16 23:57:17 1999 Jeffrey A Law (law@cygnus.com)
239
240 * mn10300.igen (retf): Fix return address computation and store
241 the new pc value into nia.
242
c906108c
SS
2431998-12-29 Frank Ch. Eigler <fche@cygnus.com>
244
245 * Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o.
246 * interp.c (sim_open): Add stub mn103002 cache control memory regions.
247 Set OPERATING_ENVIRONMENT on "stdeval1" board.
248 (mn10300_core_signal): New function to intercept memory errors.
249 (program_interrupt): New function to dispatch to exception vector
250 (mn10300_exception_*): New functions to snapshot pre/post exception
251 state.
252 * sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal.
253 (SIM_ENGINE_HALT_HOOK): Do nothing.
254 (SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*().
255 (_sim_cpu): Add exc_* fields to store register value snapshots.
256 * dv-mn103ser.c (*): Support dv-sockser backend for UART I/O.
257 Various endianness and warning fixes.
258 * mn10300.igen (illegal): Call program_interrupt on error.
259 (break): Call program_interrupt on breakpoint
260
261 Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com>
262 merged in:
263 * dv-mn103int.c (mn103int_ioctl): New function for NMI
264 generation. (mn103int_finish): Install it as ioctl handler.
265 * dv-mn103tim.c: Support timer 6 specially. Endianness fixes.
266
c2d11a7d
JM
267Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com)
268
269 * am33.igen: Allow autoincrement stores using the same register
270 for source and destination operands.
271
272Mon Aug 31 10:19:55 1998 Jeffrey A Law (law@cygnus.com)
273
274 * am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu".
275
c906108c
SS
276Fri Aug 28 14:40:49 1998 Joyce Janczyn <janczyn@cygnus.com>
277
278 * interp.c (sim_open): Check for invalid --board option, fix
279 indentation, allocate memory for mem control and DMA regs.
280
281Wed Aug 26 09:29:38 1998 Joyce Janczyn <janczyn@cygnus.com>
282
283 * mn10300.igen (div,divu): Fix divide instructions so divide by 0
284 behaves like the hardware.
285
286Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com>
287
288 * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.
289
c2d11a7d
JM
290Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com)
291
292 * am33.igen: Handle case where first DSP operation modifies a
293 register used in the second DSP operation correctly.
294
295Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com)
296
297 * am33.igen: Detect cases where two operands must not match for
298 DSP instructions too.
299
300Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com)
301
302 * am33.igen: Detect cases where two operands must not match in
303 non-DSP instructions.
304
c906108c
SS
305Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>
306
307 * op_utils.c (do_syscall): Rewrite to use common/syscall.c.
308 (syscall_read_mem, syscall_write_mem): New functions for syscall
309 callbacks.
310 * mn10300_sim.h: Add prototypes for syscall_read_mem and
311 syscall_write_mem.
312 * mn10300.igen: Change C++ style comments to C style comments.
313 Check for divide by zero in div and divu ops.
314
c2d11a7d
JM
315Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com)
316
317 * am33.igen (translate_xreg): New function. Use it as needed.
318
319Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com)
320
321 * am33.igen: Add some missing instructions.
322
323 * am33.igen: Autoincrement loads/store fixes.
324
325Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com)
326
327 * am33.igen: Add mov_lCC DSP instructions.
328
329 * am33.igen: Add most am33 DSP instructions.
330
c906108c
SS
331Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com)
332
333 * mn10300.igen: Fix Z bit for addc and subc instructions.
334 Minor fixes in multiply/divide patterns.
335
c2d11a7d
JM
336 * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code
337 handling for many instructions. Fix sign extension for some
338 24bit immediates.
339
340 * am33.igen: Fix Z bit for remaining addc/subc instructions.
341 Do not sign extend immediate for mov imm,XRn.
342 More random mul, mac & div fixes.
343 Remove some unused variables.
344 Sign extend 24bit displacement in memory addresses.
345
346 * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various
347 fixes to 2 register multiply, divide and mac instructions. Set
348 Z,N correctly for sat16. Sign extend 24 bit immediate for add,
349 and sub instructions.
350
351 * am33.igen: Add remaining non-DSP instructions.
352
353Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com)
354
355 * am33.igen (translate_rreg): New function. Use it as appropriate.
356
357 * am33.igen: More am33 instructions. Fix "div".
358
359Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com)
360
361 * mn10300.igen: Add am33 support.
362
363 * Makefile.in: Use multi-sim to support both a mn10300 and am33
364 simulator.
365
366 * am33.igen: Add many more am33 instructions.
c906108c
SS
367
368Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com)
369
370 * mn10300_sim.h (FETCH24): Define.
371
c2d11a7d
JM
372 * mn10300_sim.h: Add defines for some registers found on the AM33.
373 * am33.igen: New file with some am33 support.
c906108c
SS
374
375Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com)
376
377 * mn10300_sim.h: Include bfd.h
378 (struct state): Add more room for processor specific registers.
c2d11a7d 379 (REG_E0): Define.
c906108c
SS
380
381Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>
382
383 * dv-mn103tim.c: Include sim-assert.h
384 * dv-mn103ser.c (do_polling_event): Check for incoming data on
385 serial line and schedule next polling event.
386 (read_status_reg): schedule events to check for incoming data on
387 serial line and issue interrupt if necessary.
388
389Fri Jun 19 16:47:27 1998 Joyce Janczyn <janczyn@cygnus.com>
390
391 * interp.c (sim_open): hook up serial 1 and 2 ports properly (typo).
392
393Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com>
394
395 * interp.c (board): Rename am32 to stdeval1 as this is the name
396 consistently used to refer to the mn1030002 board.
397
398Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com>
399 * interp.c (sim_open): Fix typo in address of EXTMD register
400 (0x34000280, not 0x3400280).
401
402Wed Jun 17 18:00:18 1998 Jeffrey A Law (law@cygnus.com)
403
404 * simops.c (syscall): Handle change in opcode # for syscall.
405 * mn10300.igen (syscall): Likewise.
406
407Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com>
408 * dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or
409 reset) are not enabled on reset.
410
411Sun June 14 17:04:00 1998 Joyce Janczyn <janczyn@cygnus.com>
412 * dv-mn103iop.c (write_*_reg): Check for attempt to write r/o
413 register bits.
414 * dv-mn103ser.c: Fill in methods for reading and writing to serial
415 device registers.
416 * interp.c (sim_open): Make the serial device a polling device.
417
418Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com>
419 * dv-mn103iop.c: New file for handling am32 io ports.
420 * configure.in: Add mn103iop to hw_device list.
421 * configure: Re-generate.
422 * interp.c (sim_open): Create io port device.
423
424Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com>
425 * dv-mn103int.c (external_group): Use enumerated types to access
426 correct group addresses.
427 * dv-mn103tim.c (do_counter_event): Underflow of cascaded timer
428 triggers an interrupt on the higher-numbered timer's port.
429
430Mon June 8 13:30:00 1998 Joyce Janczyn <janczyn@cygnus.com>
431 * interp.c: (mn10300_option_handler): New function parses arguments
432 using sim-options.
433 * (board): Add --board option for specifying am32.
434 * (sim_open): Create new timer and serial devices and control
435 configuration of other am32 devices via board option.
436 * dv-mn103tim.c, dv-mn103ser.c: New files for timers and serial devices.
437 * dv-mn103cpu.c: Fix typos in opening comments.
438 * dv-mn103int.c: Adjust interrupt controller settings for am32 instead of am30.
439 * configure.in: Add mn103tim and mn103ser to hw_device list.
440 * configure: Re-generate.
441
442Mon May 25 20:50:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
443
444 * dv-mn103int.c, dv-mn103cpu.c: Rename *_callback to *_method.
445
446 * dv-mn103cpu.c, dv-mn103int.c: Include hw-main.h and
447 sim-main.h. Declare a struct hw_descriptor instead of struct
448 hw_device_descriptor.
449
450Mon May 25 17:33:33 1998 Andrew Cagney <cagney@b1.cygnus.com>
451
452 * dv-mn103cpu.c (struct mn103cpu): Change type of pending_handler
453 to struct hw_event.
454
455Fri May 22 12:17:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
456
457 * configure.in (SIM_AC_OPTION_HARDWARE): Add argument "yes".
458
459Wed May 6 13:29:06 1998 Andrew Cagney <cagney@b1.cygnus.com>
460
461 * interp.c (sim_open): Create a polling PAL device.
462
463Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
464
465 * dv-mn103int.c (mn103int_port_event):
466 (mn103int_port_event):
467 (mn103int_io_read_buffer):
468 (mn103int_io_write_buffer):
469
470 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Drop CPU/CIA args.
471 (mn103cpu_port_event): Ditto.
472 (mn103cpu_io_read_buffer): Ditto.
473 (mn103cpu_io_write_buffer): Ditto.
474
475Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
476
477 * configure: Regenerated to track ../common/aclocal.m4 changes.
478
479Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
480
481 * configure: Regenerated to track ../common/aclocal.m4 changes.
482 * config.in: Ditto.
483
484Sun Apr 26 15:19:55 1998 Tom Tromey <tromey@cygnus.com>
485
486 * acconfig.h: New file.
487 * configure.in: Reverted change of Apr 24; use sinclude again.
488
489Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
490
491 * configure: Regenerated to track ../common/aclocal.m4 changes.
492 * config.in: Ditto.
493
494Fri Apr 24 11:19:07 1998 Tom Tromey <tromey@cygnus.com>
495
496 * configure.in: Don't call sinclude.
497
498Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
499
500 * mn10300_sim.h: Declare all functions in op_utils.c using
501 INLINE_SIM_MAIN.
502 * op_utils.c: Ditto.
503 * sim-main.c: New file. Include op_utils.c.
504
505 * mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to
506 differentiate between MOV/CMP immediate/register instructions.
507
508 * configure.in (SIM_AC_OPTION_INLINE): Add and enable.
509 * configure: Regenerate.
510
511Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
512
513 * configure: Regenerated to track ../common/aclocal.m4 changes.
514
515Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
516
517 * interp.c (hw): Delete variable, moved to SIM_DESC.
518 (sim_open): Delete calls to hw_tree_create, hw_tree_finish.
519 Handled by sim-module.
520 (sim_open): Do not anotate tree with trace properties, handled by
521 sim-hw.c
522 (sim_open): Call sim_hw_parse instead of hw_tree_parse.
523
524 * configure: Regenerated to track ../common/aclocal.m4 changes.
525
526Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
527
528 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC
529 on the stack when delivering interrupts (not just the lower
530 half)...
531 * mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were
532 specified in the wrong order.
533
534Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
535
536 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of
537 succeeding interrupts, clear pending_handler when the handler
538 isn't re-scheduled.
539
540Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
541
542 * Makefile.in (tmp-igen): Prefix all usage of move-if-change
543 script with $(SHELL) to make NT native builds happy.
544 * configure: Regenerate because of change to ../common/aclocal.m4.
545
546Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
547
548 * configure.in: Make --enable-sim-common the default.
549 * configure: Re-generate.
550
551 * sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
552 address into Sate.regs[REG_PC] instead of common struct.
553
554Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com>
555
556 * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value.
557
558Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com>
559
560 * simops.c (OP_F0FD): Initialise variable 'sp'.
561
562Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
563
564 * dv-mn103int.c (decode_group): A group register every 4 bytes not
565 8.
566 (write_icr): Rewrite equation updating request field.
567 (read_iagr): Fix check that interrupt is still pending.
568
569Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
570
571 * interp.c (sim_open): Tidy up device creation.
572
573 * dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero
574 value.
575 (mn103int_io_read_buffer): Convert absolute address to register
576 block offsets.
577 (read_icr, write_icr): Convert block offset into group offset.
578
579Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
580
581 * interp.c (sim_open): Create second 1mb memory region at
582 0x40000000.
583 (sim_open): Create a device tree.
584 (sim-hw.h): Include.
585 (do_interrupt): Delete, needs to use dv-mn103cpu.c
586
587 * dv-mn103int.c, dv-mn103cpu.c: New files.
588
589Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
590
591 * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM):
592 Define.
593 (SP): Define.
594
595Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
596
597 * configure: Regenerated to track ../common/aclocal.m4 changes.
598
599Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com>
600
601 * interp.c (sim-options.h): Include.
602 (sim_kind, myname): Declare when not using common framework.
603
604 * mn10300_sim.h (do_syscall, generic*): Provide prototypes for
605 functions found in op_utils.c
606
607 * mn10300.igen (add): Discard unused variables.
608
609 * configure, config.in: Re-generate with autoconf 2.12.1.
610
611Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com>
612
613 Add support for --enable-sim-common option.
614 * Makefile.in (WITHOUT_COMMON_OBJS): Files included if
615 ! --enable-sim-common
616 (WITH_COMMON_OBJS): Files included if --enable-sim-common.
617 (MN10300_OBJS,MN10300_INTERP_DEP): New variables.
618 (SIM_OBJS): Rewrite.
619 ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables.
620 (SIM_EXTRA_CFLAGS): New variable.
621 (clean-extra): Clean up igen files.
622 (../igen/igen,clean-igen,tmp-igen): New rules.
623 * configure.in: Add support for common framework via
624 --enable-sim-common.
625 * configure: Regenerate.
626 * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h.
627 (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON.
628 (init_system,sim_write,compare_simops): Likewise.
629 (sim_set_profile,sim_set_profile_size): Likewise.
630 (sim_stop,sim_resume,sim_trace,sim_info): Likewise.
631 (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise.
632 (enum interrupt_type): New enum.
633 (interrupt_names): New global.
634 (do_interrupt): New function.
635 (sim_open): Define differently if WITH_COMMON.
636 (sim_close,sim_create_inferior,sim_do_command): Likewise.
637 * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions
638 for WITH_COMMON.
639 * mn10300.igen: New file.
640 * mn10300.dc: New file.
641 * op_utils.c: New file.
642 * sim-main.h: New file.
643
644Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
645
646 * configure: Regenerated to track ../common/aclocal.m4 changes.
647
648Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com)
649
650 * simops.c (inc): Fix typo.
651
652Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com)
653
654 * simops.c (signed multiply instructions): Cast input operands to
655 signed32 before casting them to signed64 so that the sign bit
656 is propagated properly.
657
658Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com>
659
660 * Makefile.in: Last change was bad. Define NL_TARGET
661 so that targ-vals.h will be used instead of syscall.h.
662 * simops.c: Use targ-vals.h instead of syscall.h.
663 (OP_F020): Disable unsupported system calls.
664
665Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com>
666
667 * Makefile.in: Get header files from libgloss/mn10300/sys.
668
669Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com)
670
671 * simops.c: Include sim-types.h.
672
673Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com)
674
675 * simops.c (multiply instructions): Cast input operands to a
676 signed64/unsigned64 type as appropriate.
677
678Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
679
680 * interp.c (sim_store_register, sim_fetch_register): Pass in
681 length parameter. Return -1.
682
683Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
684
685 * configure: Regenerated to track ../common/aclocal.m4 changes.
686
687Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
688
689 * configure: Regenerated to track ../common/aclocal.m4 changes.
690
691Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
692
693 * configure: Regenerated to track ../common/aclocal.m4 changes.
694
695Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
696
697 * configure: Regenerated to track ../common/aclocal.m4 changes.
698 * config.in: Ditto.
699
700Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
701
702 * configure: Regenerated to track ../common/aclocal.m4 changes.
703
704Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com)
705
706 * simops.c (call:16 call:32): Stack adjustment is determined solely
707 by the imm8 field.
708
709Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
710
711 * interp.c (sim_load): Pass lma_p and sim_write args to
712 sim_load_file.
713
714Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com)
715
716 * simops.c: Correctly handle register restores for "ret" and "retf"
717 instructions.
718
719Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
720
721 * configure: Regenerated to track ../common/aclocal.m4 changes.
722
723Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
724
725 * configure: Regenerated to track ../common/aclocal.m4 changes.
726
727Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
728
729 * configure: Regenerated to track ../common/aclocal.m4 changes.
730
731Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
732
733 * configure: Regenerated to track ../common/aclocal.m4 changes.
734
735Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
736
737 * configure: Regenerated to track ../common/aclocal.m4 changes.
738
739Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
740
741 * configure: Regenerated to track ../common/aclocal.m4 changes.
742
743Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
744
745 * configure: Regenerated to track ../common/aclocal.m4 changes.
746
747Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
748
749 * configure: Regenerated to track ../common/aclocal.m4 changes.
750 * config.in: Ditto.
751
752Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
753
754 * interp.c (sim_kill): Delete.
755 (sim_create_inferior): Add ABFD argument.
756 (sim_load): Move setting of PC from here.
757 (sim_create_inferior): To here.
758
759Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
760
761 * configure: Regenerated to track ../common/aclocal.m4 changes.
762 * config.in: Ditto.
763
764Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
765
766 * interp.c (sim_open): Add ABFD argument.
767
768Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com)
769
770 * interp.c (sim_resume): Clear State.exited.
771 (sim_stop_reason): If State.exited is nonzero, then indicate that
772 the simulator exited instead of stopped.
773 * mn10300_sim.h (struct _state): Add exited field.
774 * simops.c (syscall): Set State.exited for SYS_exit.
775
776Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com)
777
778 * simops.c: Fix thinko in last change.
779
780Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com)
781
782 * simops.c: "call" stores the callee saved registers into the
783 stack! Update the stack pointer properly when done with
784 register saves.
785
786 * simops.c: Fix return address computation for "call" instructions.
787
788Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com)
789
790 * interp.c (sim_open): Fix typo.
791
792Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com)
793
794 * interp.c (sim_resume): Add missing case in big switch
795 statement (for extb instruction).
796
797Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
798
799 * interp.c: Replace all references to load_mem and store_mem
800 with references to load_byte, load_half, load_3_byte, load_word
801 and store_byte, store_half, store_3_byte, store_word.
802 (INLINE): Delete definition.
803 (load_mem_big): Likewise.
804 (max_mem): Make it global.
805 (dispatch): Make this function inline.
806 (load_mem, store_mem): Delete functions.
807 * mn10300_sim.h (INLINE): Define.
808 (RLW): Delete unused definition.
809 (load_mem, store_mem): Delete declarations.
810 (load_mem_big): New definition.
811 (load_byte, load_half, load_3_byte, load_word): New functions.
812 (store_byte, store_half, store_3_byte, store_word): New functions.
813 * simops.c: Replace all references to load_mem and store_mem
814 with references to load_byte, load_half, load_3_byte, load_word
815 and store_byte, store_half, store_3_byte, store_word.
816
817Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
818
819 * interp.c (sim_open): Add callback to arguments.
820 (sim_set_callbacks): Delete SIM_DESC argument.
821
822Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
823
824 * interp.c (dispatch): Make this an inline function.
825
826 * simops.c (syscall): Use callback->write regardless of
827 what file descriptor we're writing too.
828
829Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
830
831 * interp.c (load_mem_big): Remove function. It's now a macro
832 defined elsewhere.
833 (compare_simops): New function.
834 (sim_open): Sort the Simops table before inserting entries
835 into the hash table.
836 * mn10300_sim.h: Remove unused #defines.
837 (load_mem_big): Define.
838
839Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
840
841 * interp.c (load_mem): If we get a load from an out of range
842 address, abort.
843 (store_mem): Likewise for stores.
844 (max_mem): New variable.
845
846Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
847
848 * mn10300_sim.h: Fix ordering of bits in the PSW.
849
850 * interp.c: Improve hashing routine to avoid long list
851 traversals for common instructions. Add HASH_STAT support.
852 Rewrite opcode dispatch code using a big switch instead of
853 cascaded if/else statements. Avoid useless calls to load_mem.
854
855Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
856
857 * mn10300_sim.h (struct _state): Add space for mdrq register.
858 (REG_MDRQ): Define.
859 * simops.c: Don't abort for trap. Add support for the extended
860 instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
861 and "bsch".
862
863Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
864
865 * configure: Regenerated to track ../common/aclocal.m4 changes.
866
867Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
868
869 * interp.c (sim_stop): Add stub function.
870
871Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
872
873 * Makefile.in (SIM_OBJS): Add sim-load.o.
874 * interp.c (sim_kind, myname): New static locals.
875 (sim_open): Set sim_kind, myname. Ignore -E arg.
876 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
877 load file into simulator. Set start address from bfd.
878 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
879
880Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
881
882 * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
883 only include if implemented by host.
884 (OP_F020): Typecast arg passed to time function;
885
886Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
887
888 * simops.c (syscall): Handle new mn10300 calling conventions.
889
890Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
891
892 * configure: Regenerated to track ../common/aclocal.m4 changes.
893 * config.in: Ditto.
894
895Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
896
897 * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
898 corresponding change in opcodes directory.
899
900Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
901
902 * interp.c (sim_open): New arg `kind'.
903
904 * configure: Regenerated to track ../common/aclocal.m4 changes.
905
906Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
907
908 * configure: Regenerated to track ../common/aclocal.m4 changes.
909
910Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
911
912 * simops.c: Fix register extraction for a two "movbu" variants.
913 Somewhat simplify "sub" instructions.
914 Correctly sign extend operands for "mul". Put the correct
915 half of the result in MDR for "mul" and "mulu".
916 Implement remaining instructions.
917 Tweak opcode for "syscall".
918
919Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
920
921 * simops.c: Do syscall emulation in "syscall" instruction. Add
922 dummy "trap" instruction.
923
924Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
925
926 * configure: Regenerated to track ../common/aclocal.m4 changes.
927
928Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
929
930 * configure: Re-generate.
931
932Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
933
934 * configure: Regenerate to track ../common/aclocal.m4 changes.
935
936Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
937
938 * interp.c (sim_open): New SIM_DESC result. Argument is now
939 in argv form.
940 (other sim_*): New SIM_DESC argument.
941
942Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
943
944 * simops.c: Fix carry bit computation for "add" instructions.
945
946 * simops.c: Fix typos in bset insns. Fix arguments to store_mem
947 for bset imm8,(d8,an) and bclr imm8,(d8,an).
948
949Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
950
951 * simops.c: Fix register references when computing Z and N bits
952 for lsr imm8,dn.
953
954Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
955
956 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
957 COMMON_{PRE,POST}_CONFIG_FRAG instead.
958 * configure.in: sinclude ../common/aclocal.m4.
959 * configure: Regenerated.
960
961Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
962
963 * interp.c (init_system): Allocate 2^19 bytes of space for the
964 simulator.
965
966Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
967
968 * configure configure.in Makefile.in: Update to new configure
969 scheme which is more compatible with WinGDB builds.
970 * configure.in: Improve comment on how to run autoconf.
971 * configure: Re-run autoconf to get new ../common/aclocal.m4.
972 * Makefile.in: Use autoconf substitution to install common
973 makefile fragment.
974
975Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
976
977 * simops.c: Undo last change to "rol" and "ror", original code
978 was correct!
979
980Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
981
982 * simops.c: Fix "rol" and "ror".
983
984Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
985
986 * simops.c: Fix typo in last change.
987
988Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
989
990 * simops.c: Use REG macros in few places not using them yet.
991
992Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
993
994 * mn10300_sim.h (struct _state): Fix number of registers!
995
996Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
997
998 * mn10300_sim.h (struct _state): Put all registers into a single
999 array to make gdb implementation easier.
1000 (REG_*): Add definitions for all registers in the state array.
1001 (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
1002 * simops.c: Related changes.
1003
1004Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
1005
1006 * interp.c (sim_resume): Handle 0xff as a single byte insn.
1007
1008 * simops.c: Fix overflow computation for "add" and "inc"
1009 instructions.
1010
1011Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
1012
1013 * simops.c: Handle "break" instruction.
1014
1015 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
1016
1017Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
1018
1019 * gencode.c (write_opcodes): Also write out the format of the
1020 opcode.
1021 * mn10300_sim.h (simops): Add "format" field.
1022 * interp.c (sim_resume): Deal with endianness issues here.
1023
1024Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
1025
1026 * simops.c (REG0_4): Define.
1027 Use REG0_4 for indexed loads/stores.
1028
1029Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
1030
1031 * simops.c (REG0_16): Fix typo.
1032
1033Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
1034
1035 * simops.c: Call abort for any instruction that's not currently
1036 simulated.
1037
1038 * simops.c: Define accessor macros to extract register
1039 values from instructions. Use them consistently.
1040
1041 * interp.c: Delete unused global variable "OP".
1042 (sim_resume): Remove unused variable "opcode".
1043 * simops.c: Fix some uninitialized variable problems, add
1044 parens to fix various -Wall warnings.
1045
1046 * gencode.c (write_header): Add "insn" and "extension" arguments
1047 to the OP_* declarations.
1048 (write_template): Similarly for function templates.
1049 * interp.c (insn, extension): Remove global variables. Instead
1050 pass them as arguments to the OP_* functions.
1051 * mn10300_sim.h: Remove decls for "insn" and "extension".
1052 * simops.c (OP_*): Accept "insn" and "extension" as arguments
1053 instead of using globals.
1054
1055Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
1056
1057 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
1058
1059 * simops.c: Fix thinkos in last change to "inc dn".
1060
1061Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
1062
1063 * simops.c: "add imm,sp" does not effect the condition codes.
1064 "inc dn" does effect the condition codes.
1065
1066Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
1067
1068 * simops.c: Treat both operands as signed values for
1069 "div" instruction.
1070
1071 * simops.c: Fix simulation of division instructions.
1072 Fix typos/thinkos in several "cmp" and "sub" instructions.
1073
1074Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
1075
1076 * simops.c: Fix carry bit handling in "sub" and "cmp"
1077 instructions.
1078
1079 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
1080
1081Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
1082
1083 * simops.c: Fix overflow computation for many instructions.
1084
1085 * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
1086
1087 * simops.c: Fix "mov am, dn".
1088
1089 * simops.c: Fix more bugs in "add imm,an" and
1090 "add imm,dn".
1091
1092Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
1093
1094 * simops.c: Fix bugs in "movm" and "add imm,an".
1095
1096 * simops.c: Don't lose the upper 24 bits of the return
1097 pointer in "call" and "calls" instructions. Rough cut
1098 at emulated system calls.
1099
1100 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
1101
1102 * simops.c: Implement remaining 4 byte instructions.
1103
1104 * simops.c: Implement remaining 3 byte instructions.
1105
1106 * simops.c: Implement remaining 2 byte instructions. Call
1107 abort for instructions we're not implementing now.
1108
1109Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
1110
1111 * simops.c: Implement lots of random instructions.
1112
1113 * simops.c: Implement "movm" and "bCC" insns.
1114
1115 * mn10300_sim.h (_state): Add another register (MDR).
1116 (REG_MDR): Define.
1117 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
1118 a few additional random insns.
1119
1120 * mn10300_sim.h (PSW_*): Define for CC status tracking.
1121 (REG_D0, REG_A0, REG_SP): Define.
1122 * simops.c: Implement "add", "addc" and a few other random
1123 instructions.
1124
1125 * gencode.c, interp.c: Snapshot current simulator code.
1126
1127Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
1128
1129 * Makefile.in, config.in, configure, configure.in: New files.
1130 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
1131
This page took 0.301537 seconds and 4 git commands to generate.