Commit | Line | Data |
---|---|---|
379832de HPN |
1 | 2004-12-08 Hans-Peter Nilsson <hp@axis.com> |
2 | ||
3 | * configure: Regenerate for ../common/aclocal.m4 update. | |
4 | ||
599e0b9e AO |
5 | 2004-06-26 Alexandre Oliva <aoliva@redhat.com> |
6 | ||
c76b4bab AO |
7 | 2000-08-07 Graham Stott <grahams@cygnus.co.uk> |
8 | * am33-2.igen (fmadd, fmsub, fmnadd, fmnsub): Correct typo. | |
9 | 2000-05-29 Alexandre Oliva <aoliva@cygnus.com> | |
10 | * interp.c (fpu_disabled_exception, fpu_unimp_exception, | |
11 | fpu_check_signal_exception): Take additional state arguments. | |
12 | Print exception type and call program_interrupt. Adjust callers. | |
13 | (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, | |
14 | fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Take additional | |
15 | arguments. | |
16 | * mn10300_sim.h (fpu_disabled_exception, fpu_unimp_exception, | |
17 | fpu_check_signal_exception): Adjust prototypes. | |
18 | (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, | |
19 | fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Likewise. | |
20 | * am33-2.igen: Adjust calls. | |
21 | 2000-05-19 Alexandre Oliva <aoliva@cygnus.com> | |
22 | * op_utils.c (cmp2fcc): Moved... | |
23 | * interp.c: ... here. | |
24 | 2000-05-18 Alexandre Oliva <aoliva@cygnus.com> | |
25 | * am33-2.igen: Use `unsigned32', `signed32', `unsigned64' or | |
26 | `signed64' where type width is relevant. | |
27 | 2000-05-15 Alexandre Oliva <aoliva@cygnus.com> | |
28 | * mn10300_sim.h: Include sim-fpu.h. | |
29 | (FD2FPU, FPU2FD): Enclose the FD argument in parentheses. | |
30 | (fpu_check_signal_exception): Declare. | |
31 | (struct fp_prec_t, fp_single_prec, fp_double_prec): Likewise. | |
32 | (FP_SINGLE, FP_DOUBLE): Shorthands for fp_*_prec. | |
33 | (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, | |
34 | fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Declare. | |
35 | * interp.c (fpu_disabled_exception): Document. | |
36 | (fpu_unimp_exception): Likewise. | |
37 | (fpu_check_signal_exception): Define. | |
38 | (reg2val_32, round_32, val2reg_32, fp_single_prec): Likewise. | |
39 | (reg2val_64, round_64, val2reg_64, fp_double_prec): Likewise. | |
40 | (REG2VAL, ROUND, VAL2REG): Define shorthands. | |
41 | (fpu_status_ok): Define. | |
42 | (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, | |
43 | fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Define. | |
44 | * am33-2.igen (frsqrt, fcmp, fadd, fsub, fmul, fdiv, | |
45 | fmadd, fmsub, fnmadd, fnmsub): Use new functions. | |
46 | 2000-04-27 Alexandre Oliva <aoliva@cygnus.com> | |
47 | * interp.c (sim_create_inferior): Set PSW bit to enable FP insns | |
48 | if architecture is AM33/2.0. | |
49 | * am33.igen: Include am33-2.igen. | |
50 | 2000-04-23 Alexandre Oliva <aoliva@cygnus.com> | |
51 | * mn10300.igen (movm, call, ret, retf): Check for am33_2 too. | |
52 | * am33.igen (movm): Likewise. | |
53 | 2000-04-19 Alexandre Oliva <aoliva@cygnus.com> | |
54 | * am33.igen: Added `*am33_2' to some instructions that were | |
55 | missing it. | |
56 | 2000-04-07 Alexandre Oliva <aoliva@cygnus.com> | |
57 | * am33-2.igen: New file. All insns implemented, but FP flags are | |
58 | only set for fcmp, exceptional conditions are not handled yet. | |
59 | * Makefile.in (IGEN_INSN): Added am33-2.igen. | |
60 | (tmp-igen): Added -M am33_2. | |
61 | * mn10300.igen, am33.igen: Added `*am33_2' to all insns. | |
62 | * gencode.c: Support FMT_D3. | |
63 | * mn10300_sim.h (dword): New type. | |
64 | (struct _state): Added fpregs. | |
65 | (REG_FPCR, FPCR): New define. All assorted bitmaps. | |
66 | (XS2FS, AS2FS, Xf2FD): New macros. | |
67 | (FS2FPU, FD2FPU, FPU2FS, FPU2FD): Likewise. | |
68 | (load_dword, store_dword): New functions or macros. | |
69 | (u642dw, dw2u64): New functions. | |
70 | (fpu_disabled_exception, fpu_unimp_exception): Declared. | |
71 | * interp.c (fpu_disabled_exception): Defined; no actual | |
72 | implementation. | |
73 | (fpu_unimp_exception): Likewise. | |
74 | * op_utils.c (cmp2fcc): New function. | |
75 | ||
489503ee AO |
76 | * interp.c, mn10300_sim.h, op_utils.c: Convert function prototypes |
77 | and definitions to ISO C. | |
78 | ||
622c89b6 AO |
79 | * gencode.c, simops.c: Delete. |
80 | * Makefile.in: Remove non-COMMON dependencies and commands. | |
81 | ||
599e0b9e AO |
82 | * configure.in: Use common simulator always. Don't subst sim_gen |
83 | nor mn10300_common. | |
84 | * configure: Rebuilt. | |
85 | * Makefile.in (WITHOUT_COMMON_OBJS, WITHOUT_COMMON_INTERP_DEP, | |
86 | WITHOUT_COMMON_RUN_OBJS): Remove. | |
87 | (WITH_COMMON_OBJS): Rename to MN10300_OBJS. | |
88 | (WITH_COMMON_INTERP_DEP): Rename to MN10300_INTERP_DEP. | |
89 | (WITH_COMMON_RUN_OBJS): Rename to SIM_RUN_OBJS. | |
90 | (SIM_EXTRA_CFLAGS): Don't use @sim_gen@. | |
91 | * interp.c: Remove non-common bits. | |
92 | * mn10300_sim.h: Likewise. | |
93 | ||
e158f0a0 AC |
94 | 2003-08-28 Andrew Cagney <cagney@redhat.com> |
95 | ||
96 | * dv-mn103ser.c (do_polling_event): Change type of "serial_reg" to | |
97 | "long". | |
98 | (read_status_reg): Cast "serial_reg" to "long". | |
99 | * dv-mn103tim.c (do_counter_event): Change type of "timer_nr" to | |
100 | "long". | |
101 | (do_counter6_event, write_mode_reg, write_tm6md): Ditto. | |
102 | ||
6b4a8935 AC |
103 | 2003-02-27 Andrew Cagney <cagney@redhat.com> |
104 | ||
105 | * interp.c (sim_open, sim_create_inferior, sim_open) | |
106 | (sim_create_inferior): Rename _bfd to bfd. | |
107 | ||
dbd7cd63 AC |
108 | 2003-02-26 Andrew Cagney <cagney@redhat.com> |
109 | ||
110 | * am33.igen: Call sim_engine_abort instead of abort. | |
111 | ||
bb6317d3 DC |
112 | 2003-02-26 David Carlton <carlton@math.stanford.edu> |
113 | ||
114 | * dv-mn103tim.c (read_special_timer6_reg): Add break after | |
115 | empty default: label. | |
116 | (write_special_timer6_reg): Ditto. | |
117 | Update copyright. | |
118 | ||
6c0a25e9 AC |
119 | 2002-11-28 Andrew Cagney <cagney@redhat.com> |
120 | ||
121 | * sim-main.h: Only include "idecode.h" once. | |
122 | * Makefile.in (SIM_EXTRA_DEPS): Define. | |
123 | ||
c8cca39f AC |
124 | 2002-06-16 Andrew Cagney <ac131313@redhat.com> |
125 | ||
126 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
127 | ||
3c25f8c7 AC |
128 | 2002-06-09 Andrew Cagney <cagney@redhat.com> |
129 | ||
130 | * Makefile.in (INCLUDE): Update path to callback.h. | |
131 | * mn10300_sim.h: Include "gdb/callback.h" and "gdb/remote-sim.h". | |
132 | * tconfig.in: Ditto. | |
133 | ||
ff88f59d JB |
134 | 2001-05-06 Jim Blandy <jimb@redhat.com> |
135 | ||
136 | * mn10300.igen: Doc fixes. | |
137 | ||
cc274e7c AO |
138 | 2001-04-26 Alexandre Oliva <aoliva@redhat.com> |
139 | ||
140 | * Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o): | |
141 | Depend on targ-vals.h. | |
142 | ||
d4424ada C |
143 | 2001-04-15 J.T. Conklin <jtc@redback.com> |
144 | ||
145 | * Makefile.in (simops.o): Add simops.h to dependency list. | |
146 | ||
5425ca99 AO |
147 | Wed Aug 9 02:24:53 2000 Graham Stott <grahams@cygnus.co.uk> |
148 | ||
149 | * am33.igen: Warning clean-up. | |
150 | (movm): Initialize PC and mask. | |
151 | (mov, movbu, movhu): Set srcreg2 from RI0. | |
152 | (bsch): Initialize c. | |
153 | (sat16_cmp): Actually do the comparison. | |
154 | (mov_llt): Do not overwrite dstreg with uninitialized variable. | |
155 | ||
eb2d80b4 AC |
156 | Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> |
157 | ||
158 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
159 | ||
e33c0364 AO |
160 | 2000-05-22 Alexandre Oliva <aoliva@cygnus.com> |
161 | ||
162 | * am33.igen: Fix leading comments of SP-relative offset insns that | |
163 | referred to other registers. Make their offsets unsigned. | |
164 | ||
24a39d88 AO |
165 | 2000-05-18 Alexandre Oliva <aoliva@cygnus.com> |
166 | ||
167 | * mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr, | |
168 | genericXor, genericBtst): Use `unsigned32'. | |
169 | * op_utils.c: Likewise. | |
170 | * mn10300.igen, am33.igen: Use `unsigned32', `signed32', | |
171 | `unsigned64' or `signed64' where type width is relevant. | |
172 | ||
bfa8561f AO |
173 | 2000-04-25 Alexandre Oliva <aoliva@cygnus.com> |
174 | ||
175 | * am33.igen (inc4 Rn): Use genericAdd so as to modify flags. | |
176 | ||
d8e7020f AO |
177 | 2000-04-09 Alexandre Oliva <aoliva@cygnus.com> |
178 | ||
179 | * am33.igen: Make SP-relative offsets unsigned. Add `*am33' for | |
180 | some instructions that were missing it. | |
181 | ||
a9e3a739 FCE |
182 | 2000-03-03 Alexandre Oliva <oliva@lsd.ic.unicamp.br> |
183 | ||
184 | * Makefile.in (IGEN_INSN): Added am33.igen. | |
185 | ||
d4f3574e SS |
186 | Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> |
187 | ||
188 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
189 | ||
adf40b2e JM |
190 | Tue Jul 13 13:26:20 1999 Andrew Cagney <cagney@b1.cygnus.com> |
191 | ||
192 | * interp.c: Clarify error message reporting an unknown board. | |
193 | ||
cd0fc7c3 SS |
194 | 1999-05-08 Felix Lee <flee@cygnus.com> |
195 | ||
196 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
197 | ||
7a292a7a SS |
198 | 1999-04-16 Frank Ch. Eigler <fche@cygnus.com> |
199 | ||
200 | * interp.c (program_interrupt): Detect undesired recursion using | |
201 | static flag. Set NMIRC register's SYSEF flag during | |
202 | --board=stdeval1 mode. | |
203 | * dv-mn103-int.c (write_icr): Add backdoor address to allow CPU to | |
204 | set SYSEF flag. | |
205 | ||
206 | 1999-04-02 Keith Seitz <keiths@cygnus.com> | |
207 | ||
208 | * Makefile.in (SIM_EXTRA_CFLAGS): Define a POLL_QUIT_INTERVAL | |
209 | for use in the simulator so that the poll_quit callback is | |
210 | not called too often. | |
211 | ||
212 | Tue Mar 9 21:26:41 1999 Andrew Cagney <cagney@b1.cygnus.com> | |
213 | ||
214 | * dv-mn103int.c (mn103int_ioctl): Return something. | |
215 | * dv-mn103tim.c (write_tm6md): GCC suggested parentheses around && | |
216 | within ||. | |
217 | ||
218 | Tue Feb 16 23:57:17 1999 Jeffrey A Law (law@cygnus.com) | |
219 | ||
220 | * mn10300.igen (retf): Fix return address computation and store | |
221 | the new pc value into nia. | |
222 | ||
c906108c SS |
223 | 1998-12-29 Frank Ch. Eigler <fche@cygnus.com> |
224 | ||
225 | * Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o. | |
226 | * interp.c (sim_open): Add stub mn103002 cache control memory regions. | |
227 | Set OPERATING_ENVIRONMENT on "stdeval1" board. | |
228 | (mn10300_core_signal): New function to intercept memory errors. | |
229 | (program_interrupt): New function to dispatch to exception vector | |
230 | (mn10300_exception_*): New functions to snapshot pre/post exception | |
231 | state. | |
232 | * sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal. | |
233 | (SIM_ENGINE_HALT_HOOK): Do nothing. | |
234 | (SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*(). | |
235 | (_sim_cpu): Add exc_* fields to store register value snapshots. | |
236 | * dv-mn103ser.c (*): Support dv-sockser backend for UART I/O. | |
237 | Various endianness and warning fixes. | |
238 | * mn10300.igen (illegal): Call program_interrupt on error. | |
239 | (break): Call program_interrupt on breakpoint | |
240 | ||
241 | Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com> | |
242 | merged in: | |
243 | * dv-mn103int.c (mn103int_ioctl): New function for NMI | |
244 | generation. (mn103int_finish): Install it as ioctl handler. | |
245 | * dv-mn103tim.c: Support timer 6 specially. Endianness fixes. | |
246 | ||
c2d11a7d JM |
247 | Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com) |
248 | ||
249 | * am33.igen: Allow autoincrement stores using the same register | |
250 | for source and destination operands. | |
251 | ||
252 | Mon Aug 31 10:19:55 1998 Jeffrey A Law (law@cygnus.com) | |
253 | ||
254 | * am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu". | |
255 | ||
c906108c SS |
256 | Fri Aug 28 14:40:49 1998 Joyce Janczyn <janczyn@cygnus.com> |
257 | ||
258 | * interp.c (sim_open): Check for invalid --board option, fix | |
259 | indentation, allocate memory for mem control and DMA regs. | |
260 | ||
261 | Wed Aug 26 09:29:38 1998 Joyce Janczyn <janczyn@cygnus.com> | |
262 | ||
263 | * mn10300.igen (div,divu): Fix divide instructions so divide by 0 | |
264 | behaves like the hardware. | |
265 | ||
266 | Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com> | |
267 | ||
268 | * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA. | |
269 | ||
c2d11a7d JM |
270 | Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com) |
271 | ||
272 | * am33.igen: Handle case where first DSP operation modifies a | |
273 | register used in the second DSP operation correctly. | |
274 | ||
275 | Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com) | |
276 | ||
277 | * am33.igen: Detect cases where two operands must not match for | |
278 | DSP instructions too. | |
279 | ||
280 | Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com) | |
281 | ||
282 | * am33.igen: Detect cases where two operands must not match in | |
283 | non-DSP instructions. | |
284 | ||
c906108c SS |
285 | Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com> |
286 | ||
287 | * op_utils.c (do_syscall): Rewrite to use common/syscall.c. | |
288 | (syscall_read_mem, syscall_write_mem): New functions for syscall | |
289 | callbacks. | |
290 | * mn10300_sim.h: Add prototypes for syscall_read_mem and | |
291 | syscall_write_mem. | |
292 | * mn10300.igen: Change C++ style comments to C style comments. | |
293 | Check for divide by zero in div and divu ops. | |
294 | ||
c2d11a7d JM |
295 | Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com) |
296 | ||
297 | * am33.igen (translate_xreg): New function. Use it as needed. | |
298 | ||
299 | Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com) | |
300 | ||
301 | * am33.igen: Add some missing instructions. | |
302 | ||
303 | * am33.igen: Autoincrement loads/store fixes. | |
304 | ||
305 | Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com) | |
306 | ||
307 | * am33.igen: Add mov_lCC DSP instructions. | |
308 | ||
309 | * am33.igen: Add most am33 DSP instructions. | |
310 | ||
c906108c SS |
311 | Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com) |
312 | ||
313 | * mn10300.igen: Fix Z bit for addc and subc instructions. | |
314 | Minor fixes in multiply/divide patterns. | |
315 | ||
c2d11a7d JM |
316 | * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code |
317 | handling for many instructions. Fix sign extension for some | |
318 | 24bit immediates. | |
319 | ||
320 | * am33.igen: Fix Z bit for remaining addc/subc instructions. | |
321 | Do not sign extend immediate for mov imm,XRn. | |
322 | More random mul, mac & div fixes. | |
323 | Remove some unused variables. | |
324 | Sign extend 24bit displacement in memory addresses. | |
325 | ||
326 | * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various | |
327 | fixes to 2 register multiply, divide and mac instructions. Set | |
328 | Z,N correctly for sat16. Sign extend 24 bit immediate for add, | |
329 | and sub instructions. | |
330 | ||
331 | * am33.igen: Add remaining non-DSP instructions. | |
332 | ||
333 | Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com) | |
334 | ||
335 | * am33.igen (translate_rreg): New function. Use it as appropriate. | |
336 | ||
337 | * am33.igen: More am33 instructions. Fix "div". | |
338 | ||
339 | Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com) | |
340 | ||
341 | * mn10300.igen: Add am33 support. | |
342 | ||
343 | * Makefile.in: Use multi-sim to support both a mn10300 and am33 | |
344 | simulator. | |
345 | ||
346 | * am33.igen: Add many more am33 instructions. | |
c906108c SS |
347 | |
348 | Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com) | |
349 | ||
350 | * mn10300_sim.h (FETCH24): Define. | |
351 | ||
c2d11a7d JM |
352 | * mn10300_sim.h: Add defines for some registers found on the AM33. |
353 | * am33.igen: New file with some am33 support. | |
c906108c SS |
354 | |
355 | Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com) | |
356 | ||
357 | * mn10300_sim.h: Include bfd.h | |
358 | (struct state): Add more room for processor specific registers. | |
c2d11a7d | 359 | (REG_E0): Define. |
c906108c SS |
360 | |
361 | Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com> | |
362 | ||
363 | * dv-mn103tim.c: Include sim-assert.h | |
364 | * dv-mn103ser.c (do_polling_event): Check for incoming data on | |
365 | serial line and schedule next polling event. | |
366 | (read_status_reg): schedule events to check for incoming data on | |
367 | serial line and issue interrupt if necessary. | |
368 | ||
369 | Fri Jun 19 16:47:27 1998 Joyce Janczyn <janczyn@cygnus.com> | |
370 | ||
371 | * interp.c (sim_open): hook up serial 1 and 2 ports properly (typo). | |
372 | ||
373 | Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com> | |
374 | ||
375 | * interp.c (board): Rename am32 to stdeval1 as this is the name | |
376 | consistently used to refer to the mn1030002 board. | |
377 | ||
378 | Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com> | |
379 | * interp.c (sim_open): Fix typo in address of EXTMD register | |
380 | (0x34000280, not 0x3400280). | |
381 | ||
382 | Wed Jun 17 18:00:18 1998 Jeffrey A Law (law@cygnus.com) | |
383 | ||
384 | * simops.c (syscall): Handle change in opcode # for syscall. | |
385 | * mn10300.igen (syscall): Likewise. | |
386 | ||
387 | Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com> | |
388 | * dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or | |
389 | reset) are not enabled on reset. | |
390 | ||
391 | Sun June 14 17:04:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
392 | * dv-mn103iop.c (write_*_reg): Check for attempt to write r/o | |
393 | register bits. | |
394 | * dv-mn103ser.c: Fill in methods for reading and writing to serial | |
395 | device registers. | |
396 | * interp.c (sim_open): Make the serial device a polling device. | |
397 | ||
398 | Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
399 | * dv-mn103iop.c: New file for handling am32 io ports. | |
400 | * configure.in: Add mn103iop to hw_device list. | |
401 | * configure: Re-generate. | |
402 | * interp.c (sim_open): Create io port device. | |
403 | ||
404 | Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
405 | * dv-mn103int.c (external_group): Use enumerated types to access | |
406 | correct group addresses. | |
407 | * dv-mn103tim.c (do_counter_event): Underflow of cascaded timer | |
408 | triggers an interrupt on the higher-numbered timer's port. | |
409 | ||
410 | Mon June 8 13:30:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
411 | * interp.c: (mn10300_option_handler): New function parses arguments | |
412 | using sim-options. | |
413 | * (board): Add --board option for specifying am32. | |
414 | * (sim_open): Create new timer and serial devices and control | |
415 | configuration of other am32 devices via board option. | |
416 | * dv-mn103tim.c, dv-mn103ser.c: New files for timers and serial devices. | |
417 | * dv-mn103cpu.c: Fix typos in opening comments. | |
418 | * dv-mn103int.c: Adjust interrupt controller settings for am32 instead of am30. | |
419 | * configure.in: Add mn103tim and mn103ser to hw_device list. | |
420 | * configure: Re-generate. | |
421 | ||
422 | Mon May 25 20:50:35 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
423 | ||
424 | * dv-mn103int.c, dv-mn103cpu.c: Rename *_callback to *_method. | |
425 | ||
426 | * dv-mn103cpu.c, dv-mn103int.c: Include hw-main.h and | |
427 | sim-main.h. Declare a struct hw_descriptor instead of struct | |
428 | hw_device_descriptor. | |
429 | ||
430 | Mon May 25 17:33:33 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
431 | ||
432 | * dv-mn103cpu.c (struct mn103cpu): Change type of pending_handler | |
433 | to struct hw_event. | |
434 | ||
435 | Fri May 22 12:17:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
436 | ||
437 | * configure.in (SIM_AC_OPTION_HARDWARE): Add argument "yes". | |
438 | ||
439 | Wed May 6 13:29:06 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
440 | ||
441 | * interp.c (sim_open): Create a polling PAL device. | |
442 | ||
443 | Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
444 | ||
445 | * dv-mn103int.c (mn103int_port_event): | |
446 | (mn103int_port_event): | |
447 | (mn103int_io_read_buffer): | |
448 | (mn103int_io_write_buffer): | |
449 | ||
450 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Drop CPU/CIA args. | |
451 | (mn103cpu_port_event): Ditto. | |
452 | (mn103cpu_io_read_buffer): Ditto. | |
453 | (mn103cpu_io_write_buffer): Ditto. | |
454 | ||
455 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> | |
456 | ||
457 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
458 | ||
459 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> | |
460 | ||
461 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
462 | * config.in: Ditto. | |
463 | ||
464 | Sun Apr 26 15:19:55 1998 Tom Tromey <tromey@cygnus.com> | |
465 | ||
466 | * acconfig.h: New file. | |
467 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
468 | ||
469 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> | |
470 | ||
471 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
472 | * config.in: Ditto. | |
473 | ||
474 | Fri Apr 24 11:19:07 1998 Tom Tromey <tromey@cygnus.com> | |
475 | ||
476 | * configure.in: Don't call sinclude. | |
477 | ||
478 | Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
479 | ||
480 | * mn10300_sim.h: Declare all functions in op_utils.c using | |
481 | INLINE_SIM_MAIN. | |
482 | * op_utils.c: Ditto. | |
483 | * sim-main.c: New file. Include op_utils.c. | |
484 | ||
485 | * mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to | |
486 | differentiate between MOV/CMP immediate/register instructions. | |
487 | ||
488 | * configure.in (SIM_AC_OPTION_INLINE): Add and enable. | |
489 | * configure: Regenerate. | |
490 | ||
491 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
492 | ||
493 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
494 | ||
495 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
496 | ||
497 | * interp.c (hw): Delete variable, moved to SIM_DESC. | |
498 | (sim_open): Delete calls to hw_tree_create, hw_tree_finish. | |
499 | Handled by sim-module. | |
500 | (sim_open): Do not anotate tree with trace properties, handled by | |
501 | sim-hw.c | |
502 | (sim_open): Call sim_hw_parse instead of hw_tree_parse. | |
503 | ||
504 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
505 | ||
506 | Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> | |
507 | ||
508 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC | |
509 | on the stack when delivering interrupts (not just the lower | |
510 | half)... | |
511 | * mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were | |
512 | specified in the wrong order. | |
513 | ||
514 | Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
515 | ||
516 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of | |
517 | succeeding interrupts, clear pending_handler when the handler | |
518 | isn't re-scheduled. | |
519 | ||
520 | Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> | |
521 | ||
522 | * Makefile.in (tmp-igen): Prefix all usage of move-if-change | |
523 | script with $(SHELL) to make NT native builds happy. | |
524 | * configure: Regenerate because of change to ../common/aclocal.m4. | |
525 | ||
526 | Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
527 | ||
528 | * configure.in: Make --enable-sim-common the default. | |
529 | * configure: Re-generate. | |
530 | ||
531 | * sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction | |
532 | address into Sate.regs[REG_PC] instead of common struct. | |
533 | ||
534 | Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
535 | ||
536 | * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value. | |
537 | ||
538 | Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
539 | ||
540 | * simops.c (OP_F0FD): Initialise variable 'sp'. | |
541 | ||
542 | Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
543 | ||
544 | * dv-mn103int.c (decode_group): A group register every 4 bytes not | |
545 | 8. | |
546 | (write_icr): Rewrite equation updating request field. | |
547 | (read_iagr): Fix check that interrupt is still pending. | |
548 | ||
549 | Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
550 | ||
551 | * interp.c (sim_open): Tidy up device creation. | |
552 | ||
553 | * dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero | |
554 | value. | |
555 | (mn103int_io_read_buffer): Convert absolute address to register | |
556 | block offsets. | |
557 | (read_icr, write_icr): Convert block offset into group offset. | |
558 | ||
559 | Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
560 | ||
561 | * interp.c (sim_open): Create second 1mb memory region at | |
562 | 0x40000000. | |
563 | (sim_open): Create a device tree. | |
564 | (sim-hw.h): Include. | |
565 | (do_interrupt): Delete, needs to use dv-mn103cpu.c | |
566 | ||
567 | * dv-mn103int.c, dv-mn103cpu.c: New files. | |
568 | ||
569 | Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
570 | ||
571 | * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM): | |
572 | Define. | |
573 | (SP): Define. | |
574 | ||
575 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
576 | ||
577 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
578 | ||
579 | Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
580 | ||
581 | * interp.c (sim-options.h): Include. | |
582 | (sim_kind, myname): Declare when not using common framework. | |
583 | ||
584 | * mn10300_sim.h (do_syscall, generic*): Provide prototypes for | |
585 | functions found in op_utils.c | |
586 | ||
587 | * mn10300.igen (add): Discard unused variables. | |
588 | ||
589 | * configure, config.in: Re-generate with autoconf 2.12.1. | |
590 | ||
591 | Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
592 | ||
593 | Add support for --enable-sim-common option. | |
594 | * Makefile.in (WITHOUT_COMMON_OBJS): Files included if | |
595 | ! --enable-sim-common | |
596 | (WITH_COMMON_OBJS): Files included if --enable-sim-common. | |
597 | (MN10300_OBJS,MN10300_INTERP_DEP): New variables. | |
598 | (SIM_OBJS): Rewrite. | |
599 | ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables. | |
600 | (SIM_EXTRA_CFLAGS): New variable. | |
601 | (clean-extra): Clean up igen files. | |
602 | (../igen/igen,clean-igen,tmp-igen): New rules. | |
603 | * configure.in: Add support for common framework via | |
604 | --enable-sim-common. | |
605 | * configure: Regenerate. | |
606 | * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h. | |
607 | (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON. | |
608 | (init_system,sim_write,compare_simops): Likewise. | |
609 | (sim_set_profile,sim_set_profile_size): Likewise. | |
610 | (sim_stop,sim_resume,sim_trace,sim_info): Likewise. | |
611 | (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise. | |
612 | (enum interrupt_type): New enum. | |
613 | (interrupt_names): New global. | |
614 | (do_interrupt): New function. | |
615 | (sim_open): Define differently if WITH_COMMON. | |
616 | (sim_close,sim_create_inferior,sim_do_command): Likewise. | |
617 | * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions | |
618 | for WITH_COMMON. | |
619 | * mn10300.igen: New file. | |
620 | * mn10300.dc: New file. | |
621 | * op_utils.c: New file. | |
622 | * sim-main.h: New file. | |
623 | ||
624 | Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
625 | ||
626 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
627 | ||
628 | Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com) | |
629 | ||
630 | * simops.c (inc): Fix typo. | |
631 | ||
632 | Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com) | |
633 | ||
634 | * simops.c (signed multiply instructions): Cast input operands to | |
635 | signed32 before casting them to signed64 so that the sign bit | |
636 | is propagated properly. | |
637 | ||
638 | Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com> | |
639 | ||
640 | * Makefile.in: Last change was bad. Define NL_TARGET | |
641 | so that targ-vals.h will be used instead of syscall.h. | |
642 | * simops.c: Use targ-vals.h instead of syscall.h. | |
643 | (OP_F020): Disable unsupported system calls. | |
644 | ||
645 | Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com> | |
646 | ||
647 | * Makefile.in: Get header files from libgloss/mn10300/sys. | |
648 | ||
649 | Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com) | |
650 | ||
651 | * simops.c: Include sim-types.h. | |
652 | ||
653 | Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com) | |
654 | ||
655 | * simops.c (multiply instructions): Cast input operands to a | |
656 | signed64/unsigned64 type as appropriate. | |
657 | ||
658 | Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
659 | ||
660 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
661 | length parameter. Return -1. | |
662 | ||
663 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
664 | ||
665 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
666 | ||
667 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
668 | ||
669 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
670 | ||
671 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> | |
672 | ||
673 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
674 | ||
675 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
676 | ||
677 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
678 | * config.in: Ditto. | |
679 | ||
680 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
681 | ||
682 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
683 | ||
684 | Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com) | |
685 | ||
686 | * simops.c (call:16 call:32): Stack adjustment is determined solely | |
687 | by the imm8 field. | |
688 | ||
689 | Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
690 | ||
691 | * interp.c (sim_load): Pass lma_p and sim_write args to | |
692 | sim_load_file. | |
693 | ||
694 | Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com) | |
695 | ||
696 | * simops.c: Correctly handle register restores for "ret" and "retf" | |
697 | instructions. | |
698 | ||
699 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
700 | ||
701 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
702 | ||
703 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
704 | ||
705 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
706 | ||
707 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
708 | ||
709 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
710 | ||
711 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
712 | ||
713 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
714 | ||
715 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
716 | ||
717 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
718 | ||
719 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
720 | ||
721 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
722 | ||
723 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> | |
724 | ||
725 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
726 | ||
727 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
728 | ||
729 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
730 | * config.in: Ditto. | |
731 | ||
732 | Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
733 | ||
734 | * interp.c (sim_kill): Delete. | |
735 | (sim_create_inferior): Add ABFD argument. | |
736 | (sim_load): Move setting of PC from here. | |
737 | (sim_create_inferior): To here. | |
738 | ||
739 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
740 | ||
741 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
742 | * config.in: Ditto. | |
743 | ||
744 | Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
745 | ||
746 | * interp.c (sim_open): Add ABFD argument. | |
747 | ||
748 | Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com) | |
749 | ||
750 | * interp.c (sim_resume): Clear State.exited. | |
751 | (sim_stop_reason): If State.exited is nonzero, then indicate that | |
752 | the simulator exited instead of stopped. | |
753 | * mn10300_sim.h (struct _state): Add exited field. | |
754 | * simops.c (syscall): Set State.exited for SYS_exit. | |
755 | ||
756 | Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com) | |
757 | ||
758 | * simops.c: Fix thinko in last change. | |
759 | ||
760 | Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com) | |
761 | ||
762 | * simops.c: "call" stores the callee saved registers into the | |
763 | stack! Update the stack pointer properly when done with | |
764 | register saves. | |
765 | ||
766 | * simops.c: Fix return address computation for "call" instructions. | |
767 | ||
768 | Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com) | |
769 | ||
770 | * interp.c (sim_open): Fix typo. | |
771 | ||
772 | Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com) | |
773 | ||
774 | * interp.c (sim_resume): Add missing case in big switch | |
775 | statement (for extb instruction). | |
776 | ||
777 | Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com) | |
778 | ||
779 | * interp.c: Replace all references to load_mem and store_mem | |
780 | with references to load_byte, load_half, load_3_byte, load_word | |
781 | and store_byte, store_half, store_3_byte, store_word. | |
782 | (INLINE): Delete definition. | |
783 | (load_mem_big): Likewise. | |
784 | (max_mem): Make it global. | |
785 | (dispatch): Make this function inline. | |
786 | (load_mem, store_mem): Delete functions. | |
787 | * mn10300_sim.h (INLINE): Define. | |
788 | (RLW): Delete unused definition. | |
789 | (load_mem, store_mem): Delete declarations. | |
790 | (load_mem_big): New definition. | |
791 | (load_byte, load_half, load_3_byte, load_word): New functions. | |
792 | (store_byte, store_half, store_3_byte, store_word): New functions. | |
793 | * simops.c: Replace all references to load_mem and store_mem | |
794 | with references to load_byte, load_half, load_3_byte, load_word | |
795 | and store_byte, store_half, store_3_byte, store_word. | |
796 | ||
797 | Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
798 | ||
799 | * interp.c (sim_open): Add callback to arguments. | |
800 | (sim_set_callbacks): Delete SIM_DESC argument. | |
801 | ||
802 | Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com) | |
803 | ||
804 | * interp.c (dispatch): Make this an inline function. | |
805 | ||
806 | * simops.c (syscall): Use callback->write regardless of | |
807 | what file descriptor we're writing too. | |
808 | ||
809 | Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com) | |
810 | ||
811 | * interp.c (load_mem_big): Remove function. It's now a macro | |
812 | defined elsewhere. | |
813 | (compare_simops): New function. | |
814 | (sim_open): Sort the Simops table before inserting entries | |
815 | into the hash table. | |
816 | * mn10300_sim.h: Remove unused #defines. | |
817 | (load_mem_big): Define. | |
818 | ||
819 | Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com) | |
820 | ||
821 | * interp.c (load_mem): If we get a load from an out of range | |
822 | address, abort. | |
823 | (store_mem): Likewise for stores. | |
824 | (max_mem): New variable. | |
825 | ||
826 | Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com) | |
827 | ||
828 | * mn10300_sim.h: Fix ordering of bits in the PSW. | |
829 | ||
830 | * interp.c: Improve hashing routine to avoid long list | |
831 | traversals for common instructions. Add HASH_STAT support. | |
832 | Rewrite opcode dispatch code using a big switch instead of | |
833 | cascaded if/else statements. Avoid useless calls to load_mem. | |
834 | ||
835 | Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com) | |
836 | ||
837 | * mn10300_sim.h (struct _state): Add space for mdrq register. | |
838 | (REG_MDRQ): Define. | |
839 | * simops.c: Don't abort for trap. Add support for the extended | |
840 | instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24", | |
841 | and "bsch". | |
842 | ||
843 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
844 | ||
845 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
846 | ||
847 | Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
848 | ||
849 | * interp.c (sim_stop): Add stub function. | |
850 | ||
851 | Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com> | |
852 | ||
853 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
854 | * interp.c (sim_kind, myname): New static locals. | |
855 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
856 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
857 | load file into simulator. Set start address from bfd. | |
858 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
859 | ||
860 | Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
861 | ||
862 | * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime | |
863 | only include if implemented by host. | |
864 | (OP_F020): Typecast arg passed to time function; | |
865 | ||
866 | Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com) | |
867 | ||
868 | * simops.c (syscall): Handle new mn10300 calling conventions. | |
869 | ||
870 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
871 | ||
872 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
873 | * config.in: Ditto. | |
874 | ||
875 | Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com> | |
876 | ||
877 | * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match | |
878 | corresponding change in opcodes directory. | |
879 | ||
880 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> | |
881 | ||
882 | * interp.c (sim_open): New arg `kind'. | |
883 | ||
884 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
885 | ||
886 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
887 | ||
888 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
889 | ||
890 | Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com) | |
891 | ||
892 | * simops.c: Fix register extraction for a two "movbu" variants. | |
893 | Somewhat simplify "sub" instructions. | |
894 | Correctly sign extend operands for "mul". Put the correct | |
895 | half of the result in MDR for "mul" and "mulu". | |
896 | Implement remaining instructions. | |
897 | Tweak opcode for "syscall". | |
898 | ||
899 | Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com) | |
900 | ||
901 | * simops.c: Do syscall emulation in "syscall" instruction. Add | |
902 | dummy "trap" instruction. | |
903 | ||
904 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
905 | ||
906 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
907 | ||
908 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
909 | ||
910 | * configure: Re-generate. | |
911 | ||
912 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> | |
913 | ||
914 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
915 | ||
916 | Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com> | |
917 | ||
918 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
919 | in argv form. | |
920 | (other sim_*): New SIM_DESC argument. | |
921 | ||
922 | Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com) | |
923 | ||
924 | * simops.c: Fix carry bit computation for "add" instructions. | |
925 | ||
926 | * simops.c: Fix typos in bset insns. Fix arguments to store_mem | |
927 | for bset imm8,(d8,an) and bclr imm8,(d8,an). | |
928 | ||
929 | Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com) | |
930 | ||
931 | * simops.c: Fix register references when computing Z and N bits | |
932 | for lsr imm8,dn. | |
933 | ||
934 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
935 | ||
936 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
937 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
938 | * configure.in: sinclude ../common/aclocal.m4. | |
939 | * configure: Regenerated. | |
940 | ||
941 | Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com) | |
942 | ||
943 | * interp.c (init_system): Allocate 2^19 bytes of space for the | |
944 | simulator. | |
945 | ||
946 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) | |
947 | ||
948 | * configure configure.in Makefile.in: Update to new configure | |
949 | scheme which is more compatible with WinGDB builds. | |
950 | * configure.in: Improve comment on how to run autoconf. | |
951 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
952 | * Makefile.in: Use autoconf substitution to install common | |
953 | makefile fragment. | |
954 | ||
955 | Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com) | |
956 | ||
957 | * simops.c: Undo last change to "rol" and "ror", original code | |
958 | was correct! | |
959 | ||
960 | Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com) | |
961 | ||
962 | * simops.c: Fix "rol" and "ror". | |
963 | ||
964 | Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com) | |
965 | ||
966 | * simops.c: Fix typo in last change. | |
967 | ||
968 | Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com) | |
969 | ||
970 | * simops.c: Use REG macros in few places not using them yet. | |
971 | ||
972 | Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com) | |
973 | ||
974 | * mn10300_sim.h (struct _state): Fix number of registers! | |
975 | ||
976 | Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com) | |
977 | ||
978 | * mn10300_sim.h (struct _state): Put all registers into a single | |
979 | array to make gdb implementation easier. | |
980 | (REG_*): Add definitions for all registers in the state array. | |
981 | (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros. | |
982 | * simops.c: Related changes. | |
983 | ||
984 | Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com) | |
985 | ||
986 | * interp.c (sim_resume): Handle 0xff as a single byte insn. | |
987 | ||
988 | * simops.c: Fix overflow computation for "add" and "inc" | |
989 | instructions. | |
990 | ||
991 | Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com) | |
992 | ||
993 | * simops.c: Handle "break" instruction. | |
994 | ||
995 | * simops.c: Fix restoring the PC for "ret" and "retf" instructions. | |
996 | ||
997 | Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com) | |
998 | ||
999 | * gencode.c (write_opcodes): Also write out the format of the | |
1000 | opcode. | |
1001 | * mn10300_sim.h (simops): Add "format" field. | |
1002 | * interp.c (sim_resume): Deal with endianness issues here. | |
1003 | ||
1004 | Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com) | |
1005 | ||
1006 | * simops.c (REG0_4): Define. | |
1007 | Use REG0_4 for indexed loads/stores. | |
1008 | ||
1009 | Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com) | |
1010 | ||
1011 | * simops.c (REG0_16): Fix typo. | |
1012 | ||
1013 | Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com) | |
1014 | ||
1015 | * simops.c: Call abort for any instruction that's not currently | |
1016 | simulated. | |
1017 | ||
1018 | * simops.c: Define accessor macros to extract register | |
1019 | values from instructions. Use them consistently. | |
1020 | ||
1021 | * interp.c: Delete unused global variable "OP". | |
1022 | (sim_resume): Remove unused variable "opcode". | |
1023 | * simops.c: Fix some uninitialized variable problems, add | |
1024 | parens to fix various -Wall warnings. | |
1025 | ||
1026 | * gencode.c (write_header): Add "insn" and "extension" arguments | |
1027 | to the OP_* declarations. | |
1028 | (write_template): Similarly for function templates. | |
1029 | * interp.c (insn, extension): Remove global variables. Instead | |
1030 | pass them as arguments to the OP_* functions. | |
1031 | * mn10300_sim.h: Remove decls for "insn" and "extension". | |
1032 | * simops.c (OP_*): Accept "insn" and "extension" as arguments | |
1033 | instead of using globals. | |
1034 | ||
1035 | Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com) | |
1036 | ||
1037 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" | |
1038 | ||
1039 | * simops.c: Fix thinkos in last change to "inc dn". | |
1040 | ||
1041 | Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com) | |
1042 | ||
1043 | * simops.c: "add imm,sp" does not effect the condition codes. | |
1044 | "inc dn" does effect the condition codes. | |
1045 | ||
1046 | Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com) | |
1047 | ||
1048 | * simops.c: Treat both operands as signed values for | |
1049 | "div" instruction. | |
1050 | ||
1051 | * simops.c: Fix simulation of division instructions. | |
1052 | Fix typos/thinkos in several "cmp" and "sub" instructions. | |
1053 | ||
1054 | Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com) | |
1055 | ||
1056 | * simops.c: Fix carry bit handling in "sub" and "cmp" | |
1057 | instructions. | |
1058 | ||
1059 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". | |
1060 | ||
1061 | Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com) | |
1062 | ||
1063 | * simops.c: Fix overflow computation for many instructions. | |
1064 | ||
1065 | * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)". | |
1066 | ||
1067 | * simops.c: Fix "mov am, dn". | |
1068 | ||
1069 | * simops.c: Fix more bugs in "add imm,an" and | |
1070 | "add imm,dn". | |
1071 | ||
1072 | Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com) | |
1073 | ||
1074 | * simops.c: Fix bugs in "movm" and "add imm,an". | |
1075 | ||
1076 | * simops.c: Don't lose the upper 24 bits of the return | |
1077 | pointer in "call" and "calls" instructions. Rough cut | |
1078 | at emulated system calls. | |
1079 | ||
1080 | * simops.c: Implement the remaining 5, 6 and 7 byte instructions. | |
1081 | ||
1082 | * simops.c: Implement remaining 4 byte instructions. | |
1083 | ||
1084 | * simops.c: Implement remaining 3 byte instructions. | |
1085 | ||
1086 | * simops.c: Implement remaining 2 byte instructions. Call | |
1087 | abort for instructions we're not implementing now. | |
1088 | ||
1089 | Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com) | |
1090 | ||
1091 | * simops.c: Implement lots of random instructions. | |
1092 | ||
1093 | * simops.c: Implement "movm" and "bCC" insns. | |
1094 | ||
1095 | * mn10300_sim.h (_state): Add another register (MDR). | |
1096 | (REG_MDR): Define. | |
1097 | * simops.c: Implement "cmp", "calls", "rets", "jmp" and | |
1098 | a few additional random insns. | |
1099 | ||
1100 | * mn10300_sim.h (PSW_*): Define for CC status tracking. | |
1101 | (REG_D0, REG_A0, REG_SP): Define. | |
1102 | * simops.c: Implement "add", "addc" and a few other random | |
1103 | instructions. | |
1104 | ||
1105 | * gencode.c, interp.c: Snapshot current simulator code. | |
1106 | ||
1107 | Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com) | |
1108 | ||
1109 | * Makefile.in, config.in, configure, configure.in: New files. | |
1110 | * gencode.c, interp.c, mn10300_sim.h, simops.c: New files. | |
1111 |