[deliverable/binutils-gdb.git] / sim / mn10300 / mn10300_sim.h

#include <stdio.h>
#include <ctype.h>
#include "ansidecl.h"
#include "callback.h"
#include "opcode/mn10300.h"
#include <limits.h>
#include "remote-sim.h"
#include "bfd.h"

#ifndef INLINE
#ifdef __GNUC__
#define INLINE inline
#else
#define INLINE
#endif
#endif

extern host_callback *mn10300_callback;
extern SIM_DESC simulator;

#define DEBUG_TRACE		0x00000001
#define DEBUG_VALUES		0x00000002

extern int mn10300_debug;

#if UCHAR_MAX == 255
typedef unsigned char uint8;
typedef signed char int8;
#else
#error "Char is not an 8-bit type"
#endif

#if SHRT_MAX == 32767
typedef unsigned short uint16;
typedef signed short int16;
#else
#error "Short is not a 16-bit type"
#endif

#if INT_MAX == 2147483647

typedef unsigned int uint32;
typedef signed int int32;

#else
#  if LONG_MAX == 2147483647

typedef unsigned long uint32;
typedef signed long int32;

#  else
#  error "Neither int nor long is a 32-bit type"
#  endif
#endif

typedef uint32 reg_t;

struct simops 
{
  long opcode;
  long mask;
  void (*func)();
  int length;
  int format;
  int numops;
  int operands[16];
};

/* The current state of the processor; registers, memory, etc.  */

struct _state
{
  reg_t regs[32];		/* registers, d0-d3, a0-a3, sp, pc, mdr, psw,
				   lir, lar, mdrq, plus some room for processor
				   specific regs.  */
  uint8 *mem;			/* main memory */
  int exception;
  int exited;
} State;

extern uint32 OP[4];
extern struct simops Simops[];

#define PC	(State.regs[REG_PC])
#define SP	(State.regs[REG_SP])

#define PSW (State.regs[11])
#define PSW_Z 0x1
#define PSW_N 0x2
#define PSW_C 0x4
#define PSW_V 0x8
#define PSW_IE LSBIT (11)
#define PSW_LM LSMASK (10, 8)

#define EXTRACT_PSW_LM LSEXTRACTED16 (PSW, 10, 8)
#define INSERT_PSW_LM(l) LSINSERTED16 ((l), 10, 8)

#define REG_D0 0
#define REG_A0 4
#define REG_SP 8
#define REG_PC 9
#define REG_MDR 10
#define REG_PSW 11
#define REG_LIR 12
#define REG_LAR 13
#define REG_MDRQ 14
/* start-sanitize-am33 */
#define REG_E0 15
/* end-sanitize-am33 */

#if WITH_COMMON
/* These definitions conflict with similar macros in common.  */
#else
#define SEXT3(x)	((((x)&0x7)^(~0x3))+0x4)	

/* sign-extend a 4-bit number */
#define SEXT4(x)	((((x)&0xf)^(~0x7))+0x8)	

/* sign-extend a 5-bit number */
#define SEXT5(x)	((((x)&0x1f)^(~0xf))+0x10)	

/* sign-extend an 8-bit number */
#define SEXT8(x)	((((x)&0xff)^(~0x7f))+0x80)

/* sign-extend a 9-bit number */
#define SEXT9(x)	((((x)&0x1ff)^(~0xff))+0x100)

/* sign-extend a 16-bit number */
#define SEXT16(x)	((((x)&0xffff)^(~0x7fff))+0x8000)

/* sign-extend a 22-bit number */
#define SEXT22(x)	((((x)&0x3fffff)^(~0x1fffff))+0x200000)

#define MAX32	0x7fffffffLL
#define MIN32	0xff80000000LL
#define MASK32	0xffffffffLL
#define MASK40	0xffffffffffLL
#endif  /* not WITH_COMMON */

#ifdef _WIN32
#define SIGTRAP 5
#define SIGQUIT 3
#endif

#if WITH_COMMON

#define FETCH32(a,b,c,d) \
 ((a)+((b)<<8)+((c)<<16)+((d)<<24))

#define FETCH16(a,b) ((a)+((b)<<8))

#define load_byte(ADDR) \
sim_core_read_unaligned_1 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))

#define load_half(ADDR) \
sim_core_read_unaligned_2 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))

#define load_word(ADDR) \
sim_core_read_unaligned_4 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))

#define store_byte(ADDR, DATA) \
sim_core_write_unaligned_1 (STATE_CPU (simulator, 0), \
			    PC, write_map, (ADDR), (DATA))


#define store_half(ADDR, DATA) \
sim_core_write_unaligned_2 (STATE_CPU (simulator, 0), \
			    PC, write_map, (ADDR), (DATA))


#define store_word(ADDR, DATA) \
sim_core_write_unaligned_4 (STATE_CPU (simulator, 0), \
			    PC, write_map, (ADDR), (DATA))
#endif  /* WITH_COMMON */

#if WITH_COMMON
#else
#define load_mem_big(addr,len) \
  (len == 1 ? *((addr) + State.mem) : \
   len == 2 ? ((*((addr) + State.mem) << 8) \
	       | *(((addr) + 1) + State.mem)) : \
   len == 3 ? ((*((addr) + State.mem) << 16) \
	       | (*(((addr) + 1) + State.mem) << 8) \
	       | *(((addr) + 2) + State.mem)) : \
	      ((*((addr) + State.mem) << 24) \
	       | (*(((addr) + 1) + State.mem) << 16) \
	       | (*(((addr) + 2) + State.mem) << 8) \
	       | *(((addr) + 3) + State.mem)))

static INLINE uint32
load_byte (addr)
     SIM_ADDR addr;
{
  uint8 *p = (addr & 0xffffff) + State.mem;

#ifdef CHECK_ADDR
  if ((addr & 0xffffff) > max_mem)
    abort ();
#endif

  return p[0];
}

static INLINE uint32
load_half (addr)
     SIM_ADDR addr;
{
  uint8 *p = (addr & 0xffffff) + State.mem;

#ifdef CHECK_ADDR
  if ((addr & 0xffffff) > max_mem)
    abort ();
#endif

  return p[1] << 8 | p[0];
}

static INLINE uint32
load_3_byte (addr)
     SIM_ADDR addr;
{
  uint8 *p = (addr & 0xffffff) + State.mem;

#ifdef CHECK_ADDR
  if ((addr & 0xffffff) > max_mem)
    abort ();
#endif

  return p[2] << 16 | p[1] << 8 | p[0];
}

static INLINE uint32
load_word (addr)
     SIM_ADDR addr;
{
  uint8 *p = (addr & 0xffffff) + State.mem;

#ifdef CHECK_ADDR
  if ((addr & 0xffffff) > max_mem)
    abort ();
#endif

  return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
}

static INLINE uint32
load_mem (addr, len)
     SIM_ADDR addr;
     int len;
{
  uint8 *p = (addr & 0xffffff) + State.mem;

#ifdef CHECK_ADDR
  if ((addr & 0xffffff) > max_mem)
    abort ();
#endif

  switch (len)
    {
    case 1:
      return p[0];
    case 2:
      return p[1] << 8 | p[0];
    case 3:
      return p[2] << 16 | p[1] << 8 | p[0];
    case 4:
      return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
    default:
      abort ();
    }
}

static INLINE void
store_byte (addr, data)
     SIM_ADDR addr;
     uint32 data;
{
  uint8 *p = (addr & 0xffffff) + State.mem;

#ifdef CHECK_ADDR
  if ((addr & 0xffffff) > max_mem)
    abort ();
#endif

  p[0] = data;
}

static INLINE void
store_half (addr, data)
     SIM_ADDR addr;
     uint32 data;
{
  uint8 *p = (addr & 0xffffff) + State.mem;

#ifdef CHECK_ADDR
  if ((addr & 0xffffff) > max_mem)
    abort ();
#endif

  p[0] = data;
  p[1] = data >> 8;
}

static INLINE void
store_3_byte (addr, data)
     SIM_ADDR addr;
     uint32 data;
{
  uint8 *p = (addr & 0xffffff) + State.mem;

#ifdef CHECK_ADDR
  if ((addr & 0xffffff) > max_mem)
    abort ();
#endif

  p[0] = data;
  p[1] = data >> 8;
  p[2] = data >> 16;
}

static INLINE void
store_word (addr, data)
     SIM_ADDR addr;
     uint32 data;
{
  uint8 *p = (addr & 0xffffff) + State.mem;

#ifdef CHECK_ADDR
  if ((addr & 0xffffff) > max_mem)
    abort ();
#endif

  p[0] = data;
  p[1] = data >> 8;
  p[2] = data >> 16;
  p[3] = data >> 24;
}
#endif  /* not WITH_COMMON */

/* Function declarations.  */

uint32 get_word PARAMS ((uint8 *));
uint16 get_half PARAMS ((uint8 *));
uint8 get_byte PARAMS ((uint8 *));
void put_word PARAMS ((uint8 *, uint32));
void put_half PARAMS ((uint8 *, uint16));
void put_byte PARAMS ((uint8 *, uint8));

extern uint8 *map PARAMS ((SIM_ADDR addr));

INLINE_SIM_MAIN (void) genericAdd PARAMS ((unsigned long source, unsigned long destReg));
INLINE_SIM_MAIN (void) genericSub PARAMS ((unsigned long source, unsigned long destReg));
INLINE_SIM_MAIN (void) genericCmp PARAMS ((unsigned long leftOpnd, unsigned long rightOpnd));
INLINE_SIM_MAIN (void) genericOr PARAMS ((unsigned long source, unsigned long destReg));
INLINE_SIM_MAIN (void) genericXor PARAMS ((unsigned long source, unsigned long destReg));
INLINE_SIM_MAIN (void) genericBtst PARAMS ((unsigned long leftOpnd, unsigned long rightOpnd));
INLINE_SIM_MAIN (void) do_syscall PARAMS ((void));
Commit	Line	Data
05ccbdfd JL	1	#include <stdio.h>
	2	#include <ctype.h>
	3	#include "ansidecl.h"
	4	#include "callback.h"
	5	#include "opcode/mn10300.h"
	6	#include <limits.h>
	7	#include "remote-sim.h"
a6cbaa65	8	#include "bfd.h"
05ccbdfd	9
13e0e254 JJ	10	#ifndef INLINE
	11	#ifdef __GNUC__
	12	#define INLINE inline
	13	#else
	14	#define INLINE
	15	#endif
	16	#endif
	17
05ccbdfd	18	extern host_callback *mn10300_callback;
13e0e254	19	extern SIM_DESC simulator;
05ccbdfd JL	20
	21	#define DEBUG_TRACE 0x00000001
	22	#define DEBUG_VALUES 0x00000002
	23
	24	extern int mn10300_debug;
	25
	26	#if UCHAR_MAX == 255
	27	typedef unsigned char uint8;
	28	typedef signed char int8;
	29	#else
	30	#error "Char is not an 8-bit type"
	31	#endif
	32
	33	#if SHRT_MAX == 32767
	34	typedef unsigned short uint16;
	35	typedef signed short int16;
	36	#else
	37	#error "Short is not a 16-bit type"
	38	#endif
	39
	40	#if INT_MAX == 2147483647
	41
	42	typedef unsigned int uint32;
	43	typedef signed int int32;
	44
	45	#else
	46	# if LONG_MAX == 2147483647
	47
	48	typedef unsigned long uint32;
	49	typedef signed long int32;
	50
	51	# else
	52	# error "Neither int nor long is a 32-bit type"
	53	# endif
	54	#endif
	55
	56	typedef uint32 reg_t;
	57
	58	struct simops
	59	{
	60	long opcode;
	61	long mask;
	62	void (*func)();
b5f831ac	63	int length;
b774c0e4	64	int format;
05ccbdfd JL	65	int numops;
	66	int operands[16];
	67	};
	68
	69	/* The current state of the processor; registers, memory, etc. */
	70
	71	struct _state
	72	{
a6cbaa65 JL	73	reg_t regs[32]; /* registers, d0-d3, a0-a3, sp, pc, mdr, psw,
	74	lir, lar, mdrq, plus some room for processor
	75	specific regs. */
05ccbdfd JL	76	uint8 mem; / main memory */
05ccbdfd JL	77	int exception;
13e0e254	78	int exited;
05ccbdfd JL	79	} State;
	80
	81	extern uint32 OP[4];
	82	extern struct simops Simops[];
	83
a6cbaa65 JL	84	#define PC (State.regs[REG_PC])
a6cbaa65 JL	85	#define SP (State.regs[REG_SP])
05ccbdfd	86
b774c0e4	87	#define PSW (State.regs[11])
8def9220 JL	88	#define PSW_Z 0x1
	89	#define PSW_N 0x2
	90	#define PSW_C 0x4
	91	#define PSW_V 0x8
a6cbaa65 JL	92	#define PSW_IE LSBIT (11)
	93	#define PSW_LM LSMASK (10, 8)
	94
	95	#define EXTRACT_PSW_LM LSEXTRACTED16 (PSW, 10, 8)
	96	#define INSERT_PSW_LM(l) LSINSERTED16 ((l), 10, 8)
73e65298 JL	97
	98	#define REG_D0 0
	99	#define REG_A0 4
	100	#define REG_SP 8
b774c0e4 JL	101	#define REG_PC 9
	102	#define REG_MDR 10
	103	#define REG_PSW 11
	104	#define REG_LIR 12
	105	#define REG_LAR 13
26e9f63c	106	#define REG_MDRQ 14
a6cbaa65 JL	107	/* start-sanitize-am33 */
	108	#define REG_E0 15
	109	/* end-sanitize-am33 */
05ccbdfd	110
13e0e254 JJ	111	#if WITH_COMMON
	112	/* These definitions conflict with similar macros in common. */
	113	#else
05ccbdfd JL	114	#define SEXT3(x) ((((x)&0x7)^(~0x3))+0x4)
	115
	116	/* sign-extend a 4-bit number */
	117	#define SEXT4(x) ((((x)&0xf)^(~0x7))+0x8)
	118
	119	/* sign-extend a 5-bit number */
	120	#define SEXT5(x) ((((x)&0x1f)^(~0xf))+0x10)
	121
	122	/* sign-extend an 8-bit number */
	123	#define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
	124
	125	/* sign-extend a 9-bit number */
	126	#define SEXT9(x) ((((x)&0x1ff)^(~0xff))+0x100)
	127
	128	/* sign-extend a 16-bit number */
	129	#define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
	130
	131	/* sign-extend a 22-bit number */
	132	#define SEXT22(x) ((((x)&0x3fffff)^(~0x1fffff))+0x200000)
	133
05ccbdfd JL	134	#define MAX32 0x7fffffffLL
	135	#define MIN32 0xff80000000LL
	136	#define MASK32 0xffffffffLL
	137	#define MASK40 0xffffffffffLL
13e0e254	138	#endif /* not WITH_COMMON */
05ccbdfd JL	139
	140	#ifdef _WIN32
	141	#define SIGTRAP 5
	142	#define SIGQUIT 3
	143	#endif
	144
13e0e254 JJ	145	#if WITH_COMMON
	146
	147	#define FETCH32(a,b,c,d) \
	148	((a)+((b)<<8)+((c)<<16)+((d)<<24))
	149
	150	#define FETCH16(a,b) ((a)+((b)<<8))
	151
	152	#define load_byte(ADDR) \
	153	sim_core_read_unaligned_1 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
	154
	155	#define load_half(ADDR) \
	156	sim_core_read_unaligned_2 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
	157
	158	#define load_word(ADDR) \
	159	sim_core_read_unaligned_4 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
	160
	161	#define store_byte(ADDR, DATA) \
	162	sim_core_write_unaligned_1 (STATE_CPU (simulator, 0), \
	163	PC, write_map, (ADDR), (DATA))
	164
	165
	166	#define store_half(ADDR, DATA) \
	167	sim_core_write_unaligned_2 (STATE_CPU (simulator, 0), \
	168	PC, write_map, (ADDR), (DATA))
	169
	170
	171	#define store_word(ADDR, DATA) \
	172	sim_core_write_unaligned_4 (STATE_CPU (simulator, 0), \
	173	PC, write_map, (ADDR), (DATA))
	174	#endif /* WITH_COMMON */
	175
	176	#if WITH_COMMON
	177	#else
	178	#define load_mem_big(addr,len) \
	179	(len == 1 ? *((addr) + State.mem) : \
	180	len == 2 ? ((*((addr) + State.mem) << 8) \
	181	\| *(((addr) + 1) + State.mem)) : \
	182	len == 3 ? ((*((addr) + State.mem) << 16) \
	183	\| (*(((addr) + 1) + State.mem) << 8) \
	184	\| *(((addr) + 2) + State.mem)) : \
	185	((*((addr) + State.mem) << 24) \
	186	\| (*(((addr) + 1) + State.mem) << 16) \
	187	\| (*(((addr) + 2) + State.mem) << 8) \
	188	\| *(((addr) + 3) + State.mem)))
	189
	190	static INLINE uint32
	191	load_byte (addr)
	192	SIM_ADDR addr;
	193	{
	194	uint8 *p = (addr & 0xffffff) + State.mem;
	195
	196	#ifdef CHECK_ADDR
	197	if ((addr & 0xffffff) > max_mem)
	198	abort ();
	199	#endif
	200
	201	return p[0];
	202	}
	203
	204	static INLINE uint32
	205	load_half (addr)
	206	SIM_ADDR addr;
	207	{
	208	uint8 *p = (addr & 0xffffff) + State.mem;
209
210	#ifdef CHECK_ADDR
211	if ((addr & 0xffffff) > max_mem)
212	abort ();
213	#endif
214
215	return p[1] << 8 \| p[0];
216	}
217
218	static INLINE uint32
219	load_3_byte (addr)
220	SIM_ADDR addr;
221	{
222	uint8 *p = (addr & 0xffffff) + State.mem;
223
224	#ifdef CHECK_ADDR
225	if ((addr & 0xffffff) > max_mem)
226	abort ();
227	#endif
228
229	return p[2] << 16 \| p[1] << 8 \| p[0];
230	}
231
232	static INLINE uint32
233	load_word (addr)
234	SIM_ADDR addr;
235	{
236	uint8 *p = (addr & 0xffffff) + State.mem;
237
238	#ifdef CHECK_ADDR
239	if ((addr & 0xffffff) > max_mem)
240	abort ();
241	#endif
242
243	return p[3] << 24 \| p[2] << 16 \| p[1] << 8 \| p[0];
244	}
245
246	static INLINE uint32
247	load_mem (addr, len)
248	SIM_ADDR addr;
249	int len;
250	{
251	uint8 *p = (addr & 0xffffff) + State.mem;
252
253	#ifdef CHECK_ADDR
254	if ((addr & 0xffffff) > max_mem)
255	abort ();
256	#endif
257
258	switch (len)
259	{
260	case 1:
261	return p[0];
262	case 2:
263	return p[1] << 8 \| p[0];
264	case 3:
265	return p[2] << 16 \| p[1] << 8 \| p[0];
266	case 4:
267	return p[3] << 24 \| p[2] << 16 \| p[1] << 8 \| p[0];
268	default:
269	abort ();
270	}
271	}
272
273	static INLINE void
274	store_byte (addr, data)
275	SIM_ADDR addr;
276	uint32 data;
277	{
278	uint8 *p = (addr & 0xffffff) + State.mem;
279
280	#ifdef CHECK_ADDR
281	if ((addr & 0xffffff) > max_mem)
282	abort ();
283	#endif
284
285	p[0] = data;
286	}
287
288	static INLINE void
289	store_half (addr, data)
290	SIM_ADDR addr;
291	uint32 data;
292	{
293	uint8 *p = (addr & 0xffffff) + State.mem;
294
295	#ifdef CHECK_ADDR
296	if ((addr & 0xffffff) > max_mem)
297	abort ();
298	#endif
299
300	p[0] = data;
301	p[1] = data >> 8;
302	}
303
304	static INLINE void
305	store_3_byte (addr, data)
306	SIM_ADDR addr;
307	uint32 data;
308	{
309	uint8 *p = (addr & 0xffffff) + State.mem;
310
311	#ifdef CHECK_ADDR
312	if ((addr & 0xffffff) > max_mem)
313	abort ();
314	#endif
315
316	p[0] = data;
317	p[1] = data >> 8;
318	p[2] = data >> 16;
319	}
320
321	static INLINE void
322	store_word (addr, data)
323	SIM_ADDR addr;
324	uint32 data;
325	{
326	uint8 *p = (addr & 0xffffff) + State.mem;
327
328	#ifdef CHECK_ADDR
329	if ((addr & 0xffffff) > max_mem)
330	abort ();
331	#endif
332
333	p[0] = data;
334	p[1] = data >> 8;
335	p[2] = data >> 16;
336	p[3] = data >> 24;
337	}
338	#endif /* not WITH_COMMON */
339
05ccbdfd JL	340	/* Function declarations. */
	341
	342	uint32 get_word PARAMS ((uint8 *));
	343	uint16 get_half PARAMS ((uint8 *));
	344	uint8 get_byte PARAMS ((uint8 *));
	345	void put_word PARAMS ((uint8 *, uint32));
	346	void put_half PARAMS ((uint8 *, uint16));
	347	void put_byte PARAMS ((uint8 *, uint8));
	348
05ccbdfd	349	extern uint8 *map PARAMS ((SIM_ADDR addr));
e855e576	350
a6cbaa65 JL	351	INLINE_SIM_MAIN (void) genericAdd PARAMS ((unsigned long source, unsigned long destReg));
	352	INLINE_SIM_MAIN (void) genericSub PARAMS ((unsigned long source, unsigned long destReg));
	353	INLINE_SIM_MAIN (void) genericCmp PARAMS ((unsigned long leftOpnd, unsigned long rightOpnd));
	354	INLINE_SIM_MAIN (void) genericOr PARAMS ((unsigned long source, unsigned long destReg));
	355	INLINE_SIM_MAIN (void) genericXor PARAMS ((unsigned long source, unsigned long destReg));
	356	INLINE_SIM_MAIN (void) genericBtst PARAMS ((unsigned long leftOpnd, unsigned long rightOpnd));
	357	INLINE_SIM_MAIN (void) do_syscall PARAMS ((void));