Commit | Line | Data |
---|---|---|
db2e4d67 MF |
1 | 2011-12-03 Mike Frysinger <vapier@gentoo.org> |
2 | ||
3 | * aclocal.m4: New file. | |
4 | * configure: Regenerate. | |
5 | ||
9c082ca8 MF |
6 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
7 | ||
8 | * configure.ac: Change include to common/acinclude.m4. | |
9 | ||
6ffe910a MF |
10 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
11 | ||
12 | * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER | |
13 | call. Replace common.m4 include with SIM_AC_COMMON. | |
14 | * configure: Regenerate. | |
15 | ||
5558e7e6 MF |
16 | 2010-04-14 Mike Frysinger <vapier@gentoo.org> |
17 | ||
18 | * interp.c (sim_write): Add const to buffer arg. | |
19 | ||
bc56c8fa JK |
20 | 2010-02-27 Jan Kratochvil <jan.kratochvil@redhat.com> |
21 | ||
22 | * interp.c (sim_create_inferior): Fix crashes on zero PROG_BFD or ARGV. | |
23 | ||
32d49b7b AG |
24 | 2010-02-03 Anthony Green <green@moxielogic.com> |
25 | ||
26 | * interp.c (sim_resume): nop is 0x0f, and 0x00 is an illegal | |
27 | instruction. | |
28 | ||
11db68fd AG |
29 | 2010-01-13 Anthony Green <green@moxielogic.com> |
30 | ||
31 | * interp.c (sim_open): Add period to end of sentence in comment. | |
32 | ||
b8dcd182 AG |
33 | 2010-01-13 Anthony Green <green@moxielogic.com> |
34 | ||
35 | * interp.c (sim_open): Initialize the SIM_DESC object properly | |
36 | with sim_config() and sim_post_argv_init(). | |
37 | ||
3725885a RW |
38 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
39 | ||
40 | * configure: Regenerate. | |
41 | ||
5c27d164 AG |
42 | 2009-09-10 Anthony Green <green@moxielogic.com> |
43 | ||
44 | * Makefile.in (install-dtb): New target. | |
45 | (moxie-gdb.dtb): New target. | |
46 | (SIM_CFLAGS): Define DTB macro on command line. | |
47 | (SIM_OBJS): Use common infrastructire. | |
48 | (dtbdir): Define install location for dtb file. | |
49 | ||
50 | * sim-main.h: New file. | |
51 | * moxie-gdb.dts: New file. | |
52 | * configure.ac: Check for dtc. Install dtb file. Remove some old | |
53 | cruft. | |
54 | * configure: Regenerate. | |
55 | * interp.c: Many changes to use common memory infrastructure. | |
56 | (load_dtb): New function. | |
57 | (sim_create_inferior): Call it. | |
58 | ||
d6416cdc RW |
59 | 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
60 | ||
81ecdfbb RW |
61 | * config.in: Regenerate. |
62 | * configure: Likewise. | |
63 | ||
d6416cdc RW |
64 | * configure: Regenerate. |
65 | ||
7a321525 AG |
66 | 2009-07-31 Anthony Green <green@moxielogic.com> |
67 | ||
68 | * interp.c: Increase simulated memory to 16MB. | |
69 | (sim_resume): Tweak swi system calls to support new ABI (up to 5 | |
70 | args in regs). Also simluate proper exception processing for | |
71 | Linux system calls. | |
72 | ||
73 | 2009-07-30 Anthony Green <green@moxielogic.com> | |
74 | ||
75 | * interp.c (sim_resume): Add system call software interrupt support. | |
76 | ||
86566200 AG |
77 | 2009-06-11 Anthony Green <green@moxielogic.com> |
78 | ||
79 | * interp.c (INST2OFFSET): Define. | |
80 | (sim_resume): Support new PC relative branch instructions. | |
81 | ||
77176dfc AG |
82 | 2009-05-09 Anthony Green <green@moxielogic.com> |
83 | ||
84 | * interp.c (sim_resume): Add missing breaks in switch. | |
85 | ||
fdd6fa61 AG |
86 | 2008-10-03 Anthony Green <green@moxielogic.com> |
87 | ||
88 | * interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s. | |
89 | ||
90 | 2008-09-10 Anthony Green <green@moxielogic.com> | |
91 | ||
92 | * interp.c (NUM_SPRO_SREGS): New. | |
93 | (struct moxie_regset): Add sregs. | |
94 | (set_initial_gprs): Initialize sregs. | |
95 | (sim_resume): Add gsr and ssr support. | |
96 | ||
97 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
98 | ||
99 | * interp.c (sim_resume): Add inc and dec instructions. | |
100 | ||
101 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
102 | ||
103 | * interp.c (struct moxie_regset): Use an unsigned long long to keep | |
104 | track of instruction trace counts. | |
105 | * interp.c (sim_resume): Ditto. | |
106 | (sim_info): Ditto. | |
107 | ||
108 | 2008-08-22 Anthony Green <green@moxielogic.com> | |
109 | ||
110 | * interp.c (sim_resume): Remove debugging code. | |
111 | ||
112 | 2008-08-20 Anthony Green <green@moxielogic.com> | |
113 | ||
114 | * interp.c (TRACE): Add new tracing infrastructure. | |
115 | (sim_resume): Use it. | |
116 | (reg_names): Add new registers. | |
117 | (NUM_MOXIE_REGS): New registers. | |
118 | (PC_REGNO): New registers. | |
119 | (sim_resume): New instruction encodings. | |
120 | ||
121 | 2008-08-16 Anthony Green <green@moxielogic.com> | |
122 | ||
123 | * interp.c (sim_resume): Add SYS_read, and fix SYS_open and SYS_write. | |
124 | (convert_target_flags): New function. | |
125 | ||
126 | 2008-08-08 Anthony Green <green@moxielogic.com> | |
127 | ||
128 | * interp.c (sim_resume): Add SYS_open and SYS_write system call support. | |
129 | ||
130 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
131 | ||
132 | * Makefile.in (SIM_EXTRA_LIBS): Add -lz. | |
133 | ||
134 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
135 | ||
136 | * interp.c (sim_create_inferior): Set argc & argv in the target. | |
137 | ||
138 | 2008-04-12 Anthony Green <green@moxielogic.com> | |
139 | ||
140 | * interp.c (sim_resume): Add brk. | |
141 | ||
142 | 2008-04-10 Anthony Green <green@moxielogic.com> | |
143 | ||
144 | * interp.c (sim_resume): Add static chain pointer to call frame. | |
145 | ||
146 | 2008-03-24 Anthony Green <green@moxielogic.com> | |
147 | ||
148 | * interp.c (sim_resume): Add missing breaks. | |
149 | (sim_resume): Fix neg implementation. | |
150 | ||
151 | 2008-03-23 Anthony Green <green@moxielogic.com> | |
152 | ||
153 | * interp.c (sim_load): Don't require a .bss section. | |
154 | ||
155 | 2008-03-21 Anthony Green <green@moxielogic.com> | |
156 | ||
157 | * interp.c (sim_resume): Add swi, and, lshr, ashl, sub.l, neg, or, | |
158 | not, ashr, xor. | |
159 | ||
160 | 2008-03-20 Anthony Green <green@moxielogic.com> | |
161 | ||
162 | * interp.c (struct moxie_regset): Add condition code, cc. | |
163 | (CC_GT, CC_LT, CC_EQ, CC_GTU, CC_LTU): Define. | |
164 | (sim_resume): Add jmpa, jsr, cmp, beq, bne, blt, bgt, bltu, bgtu, | |
165 | bge, ble, bgeu, and bleu. | |
166 | (rbat, rsat, wbat, wsat): New functions. | |
167 | (sim_resume): Add ld.b, lda.b, ldi.b, ld.s, lda.s, ldi.s, st.b, | |
168 | sta.b, st.s, sta.s, jmp. | |
169 | ||
170 | 2008-03-19 Anthony Green <green@moxielogic.com> | |
171 | ||
172 | * interp.c (sim_resume): Add ld.l, st.l, lda.l, sta.l. | |
173 | jsra should set $fp == $sp. | |
174 | Fix jsra and ret semantics. | |
175 | ||
176 | 2008-03-18 Anthony Green <green@moxielogic.com> | |
177 | ||
178 | * interp.c (sim_resume): Add push, pop and add.l. | |
179 | ||
180 | 2008-03-16 Anthony Green <green@moxielogic.com> | |
181 | ||
182 | * interp.c (EXTRACT_WORD): Define. | |
183 | (rlat): Use EXTRACT_WORD. | |
184 | (sim_resume): Add jsra and ret. | |
185 | ||
186 | 2008-02-22 Anthony Green <green@moxielogic.com> | |
187 | ||
188 | * interp.c (reg_names): Define. | |
189 | (sim_resume): Use reg_names. | |
190 | ||
191 | 2008-02-21 Anthony Green <green@moxielogic.com> | |
192 | ||
193 | * config.in, configure, configure.ac, interp.c, Makefile.in, | |
194 | sysdep.h: Created. |