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5c27d164 | 1 | /* Moxie Simulator definition. |
32d0add0 | 2 | Copyright (C) 2009-2015 Free Software Foundation, Inc. |
5c27d164 AG |
3 | Contributed by Anthony Green <green@moxielogic.com> |
4 | ||
5 | This file is part of GDB, the GNU debugger. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #ifndef SIM_MAIN_H | |
21 | #define SIM_MAIN_H | |
22 | ||
5c27d164 AG |
23 | #include "sim-basics.h" |
24 | ||
25 | typedef address_word sim_cia; | |
26 | ||
27 | #include "sim-base.h" | |
28 | #include "bfd.h" | |
29 | ||
30 | #define PCIDX 17 | |
31 | ||
32 | struct _sim_cpu { | |
33 | ||
34 | /* The following are internal simulator state variables: */ | |
35 | #define CIA_GET(CPU) ((CPU)->registers[PCIDX] + 0) | |
36 | #define CIA_SET(CPU,CIA) ((CPU)->registers[PCIDX] = (CIA)) | |
37 | ||
38 | /* To keep this default simulator simple, and fast, we use a direct | |
39 | vector of registers. The internal simulator engine then uses | |
40 | manifests to access the correct slot. */ | |
41 | ||
42 | unsigned_word registers[19]; | |
43 | ||
44 | sim_cpu_base base; | |
45 | }; | |
46 | ||
47 | struct sim_state { | |
48 | ||
cc8ab1de | 49 | sim_cpu *cpu[MAX_NR_PROCESSORS]; |
5c27d164 | 50 | #if (WITH_SMP) |
cc8ab1de | 51 | #define STATE_CPU(sd,n) ((sd)->cpu[n]) |
5c27d164 | 52 | #else |
cc8ab1de | 53 | #define STATE_CPU(sd,n) ((sd)->cpu[0]) |
5c27d164 AG |
54 | #endif |
55 | ||
56 | sim_state_base base; | |
57 | }; | |
58 | ||
59 | #endif | |
60 |