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cb7a6892 MM |
1 | # |
2 | # This file is part of the program psim. | |
3 | # | |
4 | # Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au> | |
5 | # | |
6 | # This program is free software; you can redistribute it and/or modify | |
7 | # it under the terms of the GNU General Public License as published by | |
8 | # the Free Software Foundation; either version 2 of the License, or | |
9 | # (at your option) any later version. | |
10 | # | |
11 | # This program is distributed in the hope that it will be useful, | |
12 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | # GNU General Public License for more details. | |
15 | # | |
16 | # You should have received a copy of the GNU General Public License | |
17 | # along with this program; if not, write to the Free Software | |
18 | # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | # | |
20 | ||
8e20a3ac MM |
21 | default: all |
22 | ||
cb7a6892 MM |
23 | VPATH = @srcdir@ |
24 | srcdir = @srcdir@ | |
25 | srcroot = $(srcdir)/../.. | |
26 | ||
27 | prefix = @prefix@ | |
28 | exec_prefix = @exec_prefix@ | |
29 | ||
30 | host_alias = @host_alias@ | |
31 | target_alias = @target_alias@ | |
32 | program_transform_name = @program_transform_name@ | |
33 | bindir = $(exec_prefix)/bin | |
34 | libdir = $(exec_prefix)/lib | |
35 | tooldir = $(libdir)/$(target_alias) | |
36 | ||
37 | datadir = $(prefix)/lib | |
38 | mandir = $(prefix)/man | |
39 | man1dir = $(mandir)/man1 | |
40 | man2dir = $(mandir)/man2 | |
41 | man3dir = $(mandir)/man3 | |
42 | man4dir = $(mandir)/man4 | |
43 | man5dir = $(mandir)/man5 | |
44 | man6dir = $(mandir)/man6 | |
45 | man7dir = $(mandir)/man7 | |
46 | man8dir = $(mandir)/man8 | |
47 | man9dir = $(mandir)/man9 | |
48 | infodir = $(prefix)/info | |
49 | includedir = $(prefix)/include | |
50 | docdir = $(datadir)/doc | |
51 | ||
52 | SHELL = /bin/sh | |
53 | ||
cb7a6892 MM |
54 | INSTALL = $(srcroot)/install.sh -c |
55 | INSTALL_PROGRAM = $(INSTALL) | |
56 | INSTALL_DATA = $(INSTALL) | |
57 | INSTALL_XFORM = $(INSTALL) -t='$(program_transform_name)' | |
58 | INSTALL_XFORM1= $(INSTALL_XFORM) -b=.1 | |
59 | ||
8b3797aa | 60 | AR = @AR@ |
cb7a6892 | 61 | AR_FLAGS = rc |
8b3797aa MM |
62 | CC = @CC@ |
63 | CFLAGS = @CFLAGS@ | |
64 | CC_FOR_BUILD = @CC_FOR_BUILD@ | |
cb7a6892 MM |
65 | BISON = bison |
66 | MAKEINFO = makeinfo | |
8b3797aa MM |
67 | RANLIB = @RANLIB@ |
68 | ||
c494cadd MM |
69 | SIM_CFLAGS = @sim_cflags@ |
70 | INLINE_CFLAGS = @sim_inline@ | |
71 | BSWAP_CFLAGS = @sim_bswap@ | |
72 | ENDIAN_CFLAGS = @sim_endian@ | |
73 | HOSTENDIAN_CFLAGS = @sim_hostendian@ | |
74 | SMP_CFLAGS = @sim_smp@ | |
1dc7c0ed | 75 | XOR_ENDIAN_CFLAGS = @sim_xor_endian@ |
c494cadd MM |
76 | BITSIZE_CFLAGS = @sim_bitsize@ |
77 | HOSTBITSIZE_CFLAGS = @sim_hostbitsize@ | |
78 | ENV_CFLAGS = @sim_env@ | |
79 | TIMEBASE_CFLAGS = @sim_timebase@ | |
80 | ALIGNMENT_CFLAGS = @sim_alignment@ | |
81 | FLOAT_CFLAGS = @sim_float@ | |
82 | TRACE_CFLAGS = @sim_trace@ | |
83 | ASSERT_CFLAGS = @sim_assert@ | |
28816f45 | 84 | RESERVED_CFLAGS = @sim_reserved@ |
c494cadd | 85 | MONITOR_CFLAGS = @sim_monitor@ |
73c4941b MM |
86 | FUNC_CFLAGS = @sim_func@ |
87 | MODEL_CFLAGS = @sim_model@ @sim_default_model@ | |
88 | WARNING_CFLAGS = @sim_warnings@ | |
c494cadd MM |
89 | CONFIG_CFLAGS = $(BSWAP_CFLAGS) \ |
90 | $(ENDIAN_CFLAGS) \ | |
91 | $(HOSTENDIAN_CFLAGS) \ | |
92 | $(SMP_CFLAGS) \ | |
1dc7c0ed | 93 | $(XOR_ENDIAN_CFLAGS) \ |
c494cadd MM |
94 | $(BITSIZE_CFLAGS) \ |
95 | $(HOSTBITSIZE_CFLAGS) \ | |
96 | $(ENV_CFLAGS) \ | |
056e975c MM |
97 | $(TIMEBASE_CFLAGS) \ |
98 | $(ALIGNMENT_CFLAGS) \ | |
c494cadd MM |
99 | $(FLOAT_CFLAGS) \ |
100 | $(TRACE_CFLAGS) \ | |
101 | $(ASSERT_CFLAGS) \ | |
28816f45 | 102 | $(RESERVED_CFLAGS) \ |
73c4941b MM |
103 | $(MONITOR_CFLAGS) \ |
104 | $(FUNC_CFLAGS) \ | |
105 | $(MODEL_CFLAGS) | |
c494cadd | 106 | |
ba62bb1c MM |
107 | STD_CFLAGS = $(CFLAGS) $(INLINE_CFLAGS) $(CONFIG_CFLAGS) $(WARNING_CFLAGS) $(SIM_CFLAGS) $(HDEFINES) $(TDEFINES) $(INCLUDES) |
108 | NOWARN_CFLAGS = $(CFLAGS) $(INLINE_CFLAGS) $(CONFIG_CFLAGS) $(SIM_CFLAGS) $(HDEFINES) $(TDEFINES) $(INCLUDES) | |
109 | ||
c494cadd MM |
110 | CONFIG_FILE = @sim_config@ |
111 | IGEN_OPCODE_RULES = @sim_opcode@ | |
112 | IGEN_DUPLICATE = @sim_dup@ | |
113 | IGEN_FILTER = @sim_filter@ | |
114 | IGEN_ICACHE = @sim_icache@ | |
115 | DGEN_FLAGS = @sim_switch@ | |
116 | ||
8b3797aa MM |
117 | HDEFINES = @HDEFINES@ |
118 | TDEFINES = | |
a983c8f0 | 119 | IGEN_FLAGS = $(IGEN_DUPLICATE) $(IGEN_FILTER) $(IGEN_ICACHE) |
cb7a6892 MM |
120 | |
121 | .NOEXPORT: | |
122 | MAKEOVERRIDES= | |
123 | ||
124 | LIB_INCLUDES = -I$(srcdir)/../../include | |
125 | BFD_INCLUDES = -I../../bfd -I$(srcdir)/../../bfd | |
126 | GDB_INCLUDES = -I../../gdb -I$(srcdir)/../../gdb -I$(srcdir)/../../gdb/config -I$(srcdir)/../../mmalloc | |
127 | INCLUDES = -I. -I$(srcdir) $(LIB_INCLUDES) $(BFD_INCLUDES) $(GDB_INCLUDES) | |
128 | ||
cb7a6892 MM |
129 | LIBIBERTY_LIB = ../../libiberty/libiberty.a |
130 | BFD_LIB = ../../bfd/libbfd.a | |
131 | ||
c143ef62 | 132 | TARGETLIB = libsim.a |
cb7a6892 | 133 | |
8e20a3ac | 134 | all: run $(TARGETLIB) $(GDB_OBJ) |
cb7a6892 MM |
135 | |
136 | .c.o: | |
ba62bb1c | 137 | $(CC) -c $(STD_CFLAGS) $< |
cb7a6892 MM |
138 | |
139 | ||
140 | ||
141 | BASICS_H = \ | |
cb7a6892 | 142 | config.h \ |
8b3797aa | 143 | ppc-config.h \ |
cb7a6892 | 144 | words.h \ |
73c4941b | 145 | sim-endian.h \ |
cb7a6892 | 146 | debug.h \ |
c143ef62 | 147 | filter_filename.h \ |
cb7a6892 MM |
148 | bits.h \ |
149 | sim_callbacks.h | |
150 | ||
151 | PSIM_H = \ | |
152 | psim.h \ | |
153 | $(BASICS_H) | |
154 | ||
155 | IDECODE_H = \ | |
156 | idecode.h \ | |
cb7a6892 MM |
157 | idecode_expression.h \ |
158 | idecode_branch.h \ | |
159 | idecode_fields.h \ | |
160 | icache.h | |
161 | ||
162 | REGISTERS_H = \ | |
163 | registers.h \ | |
164 | spreg.h | |
165 | ||
166 | CPU_H = \ | |
167 | cpu.h \ | |
168 | $(BASICS_H) \ | |
169 | $(REGISTERS_H) \ | |
170 | device_tree.h \ | |
01860b7e | 171 | corefile.h \ |
cb7a6892 MM |
172 | vm.h \ |
173 | events.h \ | |
174 | interrupts.h \ | |
175 | psim.h \ | |
5b4d72dd MM |
176 | icache.h \ |
177 | itable.h \ | |
73c4941b | 178 | mon.h \ |
28816f45 MM |
179 | function_unit.h \ |
180 | model.h | |
5b4d72dd MM |
181 | |
182 | EMUL_GENERIC_H = \ | |
183 | $(CPU_H) \ | |
184 | $(IDECODE_H) \ | |
185 | emul_generic.h \ | |
186 | os_emul.h | |
cb7a6892 MM |
187 | |
188 | ||
189 | INLINE = \ | |
190 | inline.h \ | |
191 | inline.c | |
192 | ||
73c4941b | 193 | BUILT_SRC_WO_CONFIG = \ |
cb7a6892 MM |
194 | icache.h \ |
195 | idecode.h idecode.c \ | |
196 | semantics.h semantics.c \ | |
5b4d72dd | 197 | itable.h itable.c \ |
28816f45 MM |
198 | spreg.h spreg.c \ |
199 | model.h model.c | |
73c4941b MM |
200 | |
201 | BUILT_SRC = \ | |
202 | $(BUILT_SRC_WO_CONFIG) \ | |
8b3797aa | 203 | config.h \ |
5b4d72dd | 204 | ppc-config.h |
cb7a6892 MM |
205 | |
206 | LIB_SRC = \ | |
207 | psim.c \ | |
208 | bits.c \ | |
cb7a6892 | 209 | debug.c \ |
73c4941b MM |
210 | sim-endian.c \ |
211 | sim-endian.h \ | |
212 | sim-endian-n.h \ | |
cb7a6892 | 213 | vm.c \ |
73c4941b | 214 | vm_n.h \ |
01860b7e | 215 | corefile.c \ |
73c4941b | 216 | function_unit.c \ |
cb7a6892 | 217 | events.c \ |
5b4d72dd MM |
218 | os_emul.c \ |
219 | emul_generic.c \ | |
220 | emul_netbsd.c \ | |
cb7a6892 MM |
221 | registers.c \ |
222 | cpu.c \ | |
223 | interrupts.c \ | |
224 | devices.c \ | |
5b4d72dd | 225 | device_tree.c \ |
c5addc19 MM |
226 | mon.c \ |
227 | options.c | |
cb7a6892 MM |
228 | |
229 | MAIN_SRC = \ | |
230 | main.c \ | |
231 | sim_calls.c | |
232 | ||
233 | ||
5b4d72dd MM |
234 | # NOTE: semantics, idecode and psim put last so smaller files are compiled |
235 | # first | |
cb7a6892 MM |
236 | LIB_OBJ = \ |
237 | debug.o \ | |
c5addc19 | 238 | options.o \ |
c143ef62 | 239 | filter_filename.o \ |
cb7a6892 | 240 | bits.o \ |
73c4941b | 241 | sim-endian.o \ |
5b4d72dd MM |
242 | os_emul.o \ |
243 | emul_generic.o \ | |
244 | emul_netbsd.o \ | |
cb7a6892 | 245 | registers.o \ |
cb7a6892 | 246 | vm.o \ |
01860b7e | 247 | corefile.o \ |
28816f45 | 248 | model.o \ |
73c4941b | 249 | function_unit.o \ |
cb7a6892 MM |
250 | spreg.o \ |
251 | cpu.o \ | |
252 | interrupts.o \ | |
253 | events.o \ | |
254 | devices.o \ | |
255 | device_tree.o \ | |
5b4d72dd MM |
256 | itable.o \ |
257 | mon.o \ | |
cb7a6892 MM |
258 | semantics.o \ |
259 | idecode.o \ | |
260 | psim.o | |
261 | ||
262 | ||
263 | GDB_OBJ = sim_calls.o | |
264 | ||
265 | ||
8e20a3ac | 266 | psim: $(TARGETLIB) main.o $(LIBIBERTY_LIB) $(BFD_LIB) $(LIBS) |
ba62bb1c | 267 | $(CC) $(CFLAGS) $(SIM_CFLAGS) $(LDFLAGS) -o psim main.o $(TARGETLIB) $(BFD_LIB) $(LIBIBERTY_LIB) $(LIBS) |
cb7a6892 MM |
268 | |
269 | run: psim | |
270 | rm -f run | |
271 | ln psim run | |
272 | ||
5b4d72dd | 273 | $(TARGETLIB): tmp-igen tmp-dgen $(LIB_OBJ) $(GDB_OBJ) |
cb7a6892 MM |
274 | rm -f $(TARGETLIB) |
275 | $(AR) $(AR_FLAGS) $(TARGETLIB) $(LIB_OBJ) $(GDB_OBJ) | |
276 | $(RANLIB) $(TARGETLIB) | |
277 | ||
9f5912cb MM |
278 | # Given that inlines are turned on now, rebuild psim whenever |
279 | # anything changes. | |
c143ef62 | 280 | psim.o: psim.c psim.h $(CPU_H) $(IDECODE_H) $(INLINE) $(LIB_SRC) $(BUILT_SRC) |
ba62bb1c | 281 | $(CC) -c $(NOWARN_CFLAGS) $< |
cb7a6892 | 282 | |
5b4d72dd | 283 | bits.o: bits.c $(BASICS_H) |
cb7a6892 MM |
284 | |
285 | debug.o: debug.c $(BASICS_H) | |
1dc7c0ed | 286 | filter_filename.o: filter_filename.c filter_filename.h config.h ppc-config.h |
cb7a6892 | 287 | |
73c4941b | 288 | sim-endian.o: sim-endian.c sim-endian-n.h $(BASICS_H) |
cb7a6892 | 289 | |
5b4d72dd MM |
290 | os_emul.o: os_emul.c $(EMUL_GENERIC_H) |
291 | emul_generic.o: emul_generic.c $(EMUL_GENERIC_H) | |
292 | emul_netbsd.o: emul_netbsd.c emul_netbsd.h $(EMUL_GENERIC_H) | |
cb7a6892 MM |
293 | |
294 | registers.o: registers.c $(REGISTERS_H) $(BASICS_H) | |
295 | ||
296 | cpu.o: cpu.c $(CPU_H) $(IDECODE_H) | |
297 | ||
5b4d72dd | 298 | interrupts.o: interrupts.c $(CPU_H) $(IDECODE_H) os_emul.h |
cb7a6892 MM |
299 | |
300 | idecode.o: idecode.c $(CPU_H) $(IDECODE_H) semantics.h | |
ba62bb1c | 301 | $(CC) -c $(NOWARN_CFLAGS) $< |
cb7a6892 | 302 | |
cb7a6892 MM |
303 | # double.o: double.c dp-bit.c |
304 | ||
8e20a3ac | 305 | vm.o: vm.c vm.h vm_n.h $(BASICS_H) $(REGISTERS_H) \ |
01860b7e | 306 | device_tree.h corefile.h interrupts.h itable.h mon.h |
cb7a6892 | 307 | |
01860b7e | 308 | corefile.o: corefile.c corefile.h $(BASICS_H) device_tree.h |
cb7a6892 | 309 | |
73c4941b MM |
310 | function_unit.o: function_unit.c $(CPU_H) |
311 | ||
28816f45 MM |
312 | model.o: model.c $(CPU_H) |
313 | ||
cb7a6892 MM |
314 | events.o: events.c events.h $(BASICS_H) |
315 | ||
28816f45 | 316 | sim_calls.o: sim_calls.c $(CPU_H) $(PSIM_H) ../../gdb/tm.h devices.h options.h |
cb7a6892 MM |
317 | |
318 | spreg.o: spreg.h spreg.c words.h | |
319 | ||
c5addc19 | 320 | main.o: main.c $(PSIM_H) function_unit.h itable.h options.h |
cb7a6892 | 321 | |
ac79ccd4 | 322 | devices.o: devices.c devices.h $(CPU_H) \ |
cb7a6892 MM |
323 | device_tree.h events.h |
324 | ||
325 | device_tree.o: device_tree.c device_tree.h devices.h $(BASICS_H) | |
326 | ||
327 | semantics.o: semantics.c semantics.h $(CPU_H) $(IDECODE_H) | |
ba62bb1c | 328 | $(CC) -c $(NOWARN_CFLAGS) $< |
cb7a6892 | 329 | |
5b4d72dd MM |
330 | itable.o: itable.c itable.h |
331 | ||
73c4941b | 332 | mon.o: mon.c $(CPU_H) |
cb7a6892 | 333 | |
ba62bb1c MM |
334 | # Rebuild options whenever something changes so the date/time is up to date. |
335 | options.o: options.c $(BASICS_H) $(CPU_H) $(IDECODE_H) $(INLINE) $(LIB_SRC) $(BUILT_SRC) config.status Makefile | |
336 | $(CC) -c $(STD_CFLAGS) '-DOPCODE_RULES="@sim_opcode@"' '-DIGEN_FLAGS="$(IGEN_FLAGS)"' '-DDGEN_FLAGS="$(DGEN_FLAGS)"' $< | |
c5addc19 | 337 | |
cb7a6892 MM |
338 | # |
339 | # Rules to create the built c source code files | |
340 | # | |
341 | ||
8b3797aa MM |
342 | ppc-config.h: $(CONFIG_FILE) |
343 | cp $(srcdir)/$(CONFIG_FILE) ppc-config.h | |
cb7a6892 MM |
344 | |
345 | ||
5b4d72dd MM |
346 | tmp-dgen: dgen ppc-spr-table $(srcdir)/../../move-if-change |
347 | ./dgen $(DGEN_FLAGS) \ | |
348 | -r $(srcdir)/ppc-spr-table \ | |
8e20a3ac | 349 | -n spreg.h -P tmp-spreg.h \ |
5b4d72dd MM |
350 | -n spreg.c -p tmp-spreg.c |
351 | $(srcdir)/../../move-if-change tmp-spreg.h spreg.h | |
352 | $(srcdir)/../../move-if-change tmp-spreg.c spreg.c | |
353 | touch tmp-dgen | |
354 | ||
355 | ||
356 | tmp-igen: igen ppc-instructions $(IGEN_OPCODE_RULES) ppc-cache-rules $(srcdir)/../../move-if-change | |
357 | ./igen $(IGEN_FLAGS) \ | |
358 | -o $(srcdir)/$(IGEN_OPCODE_RULES) \ | |
359 | -k $(srcdir)/ppc-cache-rules \ | |
360 | -i $(srcdir)/ppc-instructions \ | |
8e20a3ac MM |
361 | -n icache.h -C tmp-icache.h \ |
362 | -n semantics.h -S tmp-semantics.h \ | |
363 | -n semantics.c -s tmp-semantics.c \ | |
364 | -n idecode.h -D tmp-idecode.h \ | |
5b4d72dd MM |
365 | -n idecode.c -d tmp-idecode.c \ |
366 | -n itable.h -T tmp-itable.h \ | |
28816f45 MM |
367 | -n itable.c -t tmp-itable.c \ |
368 | -n model.h -M tmp-model.h \ | |
369 | -n model.c -m tmp-model.c | |
cb7a6892 MM |
370 | $(srcdir)/../../move-if-change tmp-icache.h icache.h |
371 | $(srcdir)/../../move-if-change tmp-idecode.h idecode.h | |
372 | $(srcdir)/../../move-if-change tmp-idecode.c idecode.c | |
373 | $(srcdir)/../../move-if-change tmp-semantics.h semantics.h | |
374 | $(srcdir)/../../move-if-change tmp-semantics.c semantics.c | |
5b4d72dd MM |
375 | $(srcdir)/../../move-if-change tmp-itable.h itable.h |
376 | $(srcdir)/../../move-if-change tmp-itable.c itable.c | |
28816f45 MM |
377 | $(srcdir)/../../move-if-change tmp-model.h model.h |
378 | $(srcdir)/../../move-if-change tmp-model.c model.c | |
5b4d72dd | 379 | touch tmp-igen |
cb7a6892 | 380 | |
8e20a3ac MM |
381 | # NOTE: Some versions of make don't handle files created as side-effects |
382 | # uncomment the below if that is the case. | |
e61900e6 MM |
383 | |
384 | $(TARGETLIB): tmp-igen tmp-dgen | |
28816f45 | 385 | itable.h itable.c icache.h idecode.h idecode.c semantics.h semantics.c model.h model.c: tmp-igen |
e61900e6 | 386 | spreg.h spreg.c: tmp-dgen |
cb7a6892 | 387 | |
c143ef62 | 388 | dgen: dgen.o table.o lf.o misc.o filter_filename.o |
ba62bb1c | 389 | $(CC_FOR_BUILD) $(CFLAGS) $(SIM_CFLAGS) $(LDFLAGS) -o dgen dgen.o table.o lf.o misc.o filter_filename.o $(LIBIBERTY_LIB) $(LIBS) |
cb7a6892 | 390 | |
c143ef62 | 391 | igen: igen.o table.o lf.o misc.o filter_filename.o |
ba62bb1c | 392 | $(CC_FOR_BUILD) $(CFLAGS) $(SIM_CFLAGS) $(LDFLAGS) -o igen igen.o table.o lf.o misc.o filter_filename.o $(LIBIBERTY_LIB) $(LIBS) |
64415b76 | 393 | |
c143ef62 MM |
394 | table.o: misc.h filter_filename.h lf.h table.h |
395 | lf.o: misc.h filter_filename.h lf.h | |
396 | dgen.o igen.o: misc.h filter_filename.h lf.h table.h | |
397 | misc.o: misc.h filter_filename.h | |
5b4d72dd | 398 | # With out this #, make thinks that misc.o doesn't have a rule |
cb7a6892 MM |
399 | |
400 | tags etags: TAGS | |
401 | ||
73c4941b | 402 | TAGS: $(BUILT_SRC) |
cb7a6892 MM |
403 | etags $(srcdir)/*.h $(srcdir)/*.c $(BUILT_SRC) |
404 | ||
8b3797aa | 405 | clean mostlyclean: |
73c4941b | 406 | rm -f tmp-* *.[oasi] core psim run igen dgen config.log $(BUILT_SRC_WO_CONFIG) |
8b3797aa | 407 | |
8e20a3ac | 408 | distclean maintainer-clean realclean: clean |
c494cadd | 409 | rm -f TAGS Makefile config.cache config.status config.h stamp-h |
cb7a6892 | 410 | |
8b3797aa MM |
411 | Makefile: Makefile.in config.status |
412 | CONFIG_FILES=Makefile CONFIG_HEADERS= $(SHELL) ./config.status | |
cb7a6892 | 413 | |
8b3797aa MM |
414 | config.h: stamp-h ; @true |
415 | stamp-h: config.in config.status | |
416 | CONFIG_FILES= CONFIG_HEADERS=config.h:config.in $(SHELL) ./config.status | |
cb7a6892 | 417 | |
bea95815 | 418 | config.status: configure |
cb7a6892 MM |
419 | $(SHELL) ./config.status --recheck |
420 | ||
421 | install: | |
4f965b81 MM |
422 | $(INSTALL_XFORM) run $(bindir)/run |
423 |