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1 | /* This file is part of the program psim. |
2 | ||
3 | Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au> | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
18 | ||
19 | */ | |
20 | ||
21 | ||
22 | #ifndef _CPU_H_ | |
23 | #define _CPU_H_ | |
24 | ||
25 | #ifndef INLINE_CPU | |
26 | #define INLINE_CPU | |
27 | #endif | |
28 | ||
29 | #include "basics.h" | |
30 | #include "registers.h" | |
31 | #include "device_tree.h" | |
32 | #include "memory_map.h" | |
33 | #include "core.h" | |
34 | #include "vm.h" | |
35 | #include "events.h" | |
36 | #include "interrupts.h" | |
37 | #include "psim.h" | |
38 | #include "icache.h" | |
39 | ||
40 | ||
41 | /* typedef struct _cpu cpu; | |
42 | ||
43 | Declared in basics.h because it is used opaquely throughout the | |
44 | code */ | |
45 | ||
46 | ||
47 | /* Create a cpu object */ | |
48 | ||
49 | INLINE_CPU cpu *cpu_create | |
50 | (psim *system, | |
51 | core *memory, | |
52 | event_queue *events, | |
53 | int cpu_nr); | |
54 | ||
55 | ||
56 | /* Find our way home */ | |
57 | ||
58 | INLINE_CPU psim *cpu_system | |
59 | (cpu *processor); | |
60 | ||
61 | INLINE_CPU int cpu_nr | |
62 | (cpu *processor); | |
63 | ||
64 | INLINE_CPU event_queue *cpu_event_queue | |
65 | (cpu *processor); | |
66 | ||
67 | ||
68 | /* The processors local concept of time */ | |
69 | ||
70 | INLINE_CPU signed64 cpu_get_time_base | |
71 | (cpu *processor); | |
72 | ||
73 | INLINE_CPU void cpu_set_time_base | |
74 | (cpu *processor, | |
75 | signed64 time_base); | |
76 | ||
77 | INLINE_CPU signed32 cpu_get_decrementer | |
78 | (cpu *processor); | |
79 | ||
80 | INLINE_CPU void cpu_set_decrementer | |
81 | (cpu *processor, | |
82 | signed32 decrementer); | |
83 | ||
84 | ||
85 | /* manipulate the program counter | |
86 | ||
87 | The program counter is not included in the register file. Instead | |
88 | it is extracted and then later restored (set, reset, halt). This | |
89 | is to give the user of the cpu (and the compiler) the chance to | |
90 | minimize the need to load/store the cpu's PC value. (Especially in | |
91 | the case of a single processor) */ | |
92 | ||
93 | INLINE_CPU void cpu_set_program_counter | |
94 | (cpu *processor, | |
95 | unsigned_word new_program_counter); | |
96 | ||
97 | INLINE_CPU unsigned_word cpu_get_program_counter | |
98 | (cpu *processor); | |
99 | ||
100 | INLINE_CPU void cpu_restart | |
101 | (cpu *processor, | |
102 | unsigned_word nia); | |
103 | ||
104 | INLINE_CPU void cpu_halt | |
105 | (cpu *processor, | |
106 | unsigned_word nia, | |
107 | stop_reason reason, | |
108 | int signal); | |
109 | ||
110 | ||
111 | #if WITH_IDECODE_CACHE | |
112 | /* gain acces to the processors instruction cracking cache | |
113 | ||
114 | Only useful (and visable) if we're cracking the cache */ | |
115 | INLINE_CPU idecode_cache *cpu_icache | |
116 | (cpu *processor); | |
117 | #endif | |
118 | ||
119 | ||
120 | /* reveal the processor address maps | |
121 | ||
122 | At first sight it may seem better to, instead of exposing the cpu's | |
123 | inner vm maps, to have the cpu its self provide memory manipulation | |
124 | functions. (eg cpu_instruction_fetch() cpu_data_read_4()) | |
125 | ||
126 | Unfortunatly in addition to these functions is the need (for the | |
127 | debugger) to be able to read/write to memory in ways that violate | |
128 | the vm protection (eg store breakpoint instruction in the | |
129 | instruction map). */ | |
130 | ||
131 | INLINE_CPU vm_instruction_map *cpu_instruction_map | |
132 | (cpu *processor); | |
133 | ||
134 | INLINE_CPU vm_data_map *cpu_data_map | |
135 | (cpu *processor); | |
136 | ||
137 | INLINE_CPU core *cpu_core | |
138 | (cpu *processor); | |
139 | ||
140 | ||
141 | /* grant access to the reservation information */ | |
142 | typedef struct _memory_reservation { | |
143 | int valid; | |
144 | unsigned_word addr; | |
145 | unsigned_word data; | |
146 | } memory_reservation; | |
147 | ||
148 | INLINE_CPU memory_reservation *cpu_reservation | |
149 | (cpu *processor); | |
150 | ||
151 | ||
152 | INLINE_CPU void cpu_increment_number_of_insns | |
153 | (cpu *processor); | |
154 | ||
155 | INLINE_CPU long cpu_get_number_of_insns | |
156 | (cpu *processor); | |
157 | ||
158 | INLINE_CPU void cpu_print_info | |
159 | (cpu *processor, | |
160 | int verbose); | |
161 | ||
162 | /* Registers: | |
163 | ||
164 | This model exploits the PowerPC's requirement for a synchronization | |
165 | to occure after (or before) the update of any context controlling | |
166 | register. All context sync points must call the sync function | |
167 | below to when ever a synchronization point is reached */ | |
168 | ||
169 | INLINE_CPU registers *cpu_registers | |
170 | (cpu *processor); | |
171 | ||
172 | INLINE_CPU void cpu_synchronize_context | |
173 | (cpu *processor); | |
174 | ||
175 | #define IS_PROBLEM_STATE(PROCESSOR) \ | |
176 | (CURRENT_ENVIRONMENT == VIRTUAL_ENVIRONMENT \ | |
177 | || (cpu_registers(PROCESSOR)->msr & msr_problem_state)) | |
178 | ||
179 | #define IS_64BIT_MODE(PROCESSOR) \ | |
180 | ((CURRENT_ENVIRONMENT == VIRTUAL_ENVIRONMENT && WITH_64BIT_TARGET) \ | |
181 | || (cpu_registers(PROCESSOR)->msr & msr_64bit_mode)) | |
182 | ||
183 | #define IS_FP_AVAILABLE(PROCESSOR) \ | |
184 | (CURRENT_ENVIRONMENT == VIRTUAL_ENVIRONMENT \ | |
185 | || (cpu_registers(PROCESSOR)->msr & msr_floating_point_available)) | |
186 | ||
187 | #endif |