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cb7a6892 MM |
1 | /* This file is part of the program psim. |
2 | ||
3 | Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au> | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
18 | ||
19 | */ | |
20 | ||
21 | ||
22 | /* Instruction field macros: | |
23 | ||
24 | The macro's below greatly simplify the process of translating the | |
25 | pseudo code found in the PowerPC manual into C. | |
26 | ||
27 | In addition to the below, more will be found in the gen program's | |
28 | cache table */ | |
29 | ||
30 | ||
31 | /* map some statements and variables directly across */ | |
32 | ||
33 | #define then /*then*/ | |
34 | #define is_64bit_implementation WITH_64BIT_TARGET | |
35 | #define is_64bit_mode IS_64BIT_MODE(processor) | |
36 | ||
37 | #define NIA nia | |
38 | #define CIA cia | |
39 | ||
40 | ||
41 | /* reservation */ | |
42 | ||
43 | #define RESERVE cpu_reservation(processor)->valid | |
44 | #define RESERVE_ADDR cpu_reservation(processor)->addr | |
45 | #define RESERVE_DATA cpu_reservation(processor)->data | |
46 | ||
47 | #define real_addr(EA, IS_READ) vm_real_data_addr(cpu_data_map(processor), \ | |
48 | EA, \ | |
49 | IS_READ, \ | |
50 | processor, \ | |
51 | cia) | |
52 | ||
53 | ||
54 | /* depending on mode return a 32 or 64bit number */ | |
55 | ||
56 | #define IEA(X) (is_64bit_mode \ | |
57 | ? (X) \ | |
58 | : MASKED((X), 32, 63)) | |
59 | ||
60 | /* Expand argument to current architecture size */ | |
61 | ||
62 | #define EXTS(X) EXTS_##X | |
63 | ||
64 | ||
65 | /* Gen translates text of the form A{XX:YY} into A_XX_YY_ the macro's | |
66 | below define such translated text into real expressions */ | |
67 | ||
68 | /* the spr field as it normally is used */ | |
69 | ||
70 | #define spr_5_9_ (spr & 0x1f) | |
71 | #define spr_0_4_ (spr >> 5) | |
72 | #define spr_0_ ((spr & BIT10(0)) != 0) | |
73 | ||
74 | #define tbr_5_9_ (tbr & 0x1f) | |
75 | #define tbr_0_4_ (tbr >> 5) | |
76 | ||
77 | ||
78 | #define TB cpu_get_time_base(processor) | |
79 | ||
80 | ||
81 | /* various registers with important masks */ | |
82 | ||
83 | #define LR_0b00 (LR & ~3) | |
84 | #define CTR_0b00 (CTR & ~3) | |
85 | ||
86 | #define CR_BI_ ((CR & BIT32_BI) != 0) | |
87 | #define CR_BA_ ((CR & BIT32_BA) != 0) | |
88 | #define CR_BB_ ((CR & BIT32_BB) != 0) | |
89 | ||
90 | ||
91 | /* extended extracted fields */ | |
92 | ||
93 | #define TO_0_ ((TO & BIT5(0)) != 0) | |
94 | #define TO_1_ ((TO & BIT5(1)) != 0) | |
95 | #define TO_2_ ((TO & BIT5(2)) != 0) | |
96 | #define TO_3_ ((TO & BIT5(3)) != 0) | |
97 | #define TO_4_ ((TO & BIT5(4)) != 0) | |
98 | ||
99 | #define BO_0_ ((BO & BIT5(0)) != 0) | |
100 | #define BO_1_ ((BO & BIT5(1)) != 0) | |
101 | #define BO_2_ ((BO & BIT5(2)) != 0) | |
102 | #define BO_3_ ((BO & BIT5(3)) != 0) | |
103 | #define BO_4_ ((BO & BIT5(4)) != 0) |