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4f8d4a38 DD |
1 | /* cpu.h --- declarations for the RX core. |
2 | ||
dc3cf14f | 3 | Copyright (C) 2005, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
4f8d4a38 DD |
4 | Contributed by Red Hat, Inc. |
5 | ||
6 | This file is part of the GNU simulators. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include <stdint.h> | |
22 | #include <setjmp.h> | |
23 | ||
24 | extern int verbose; | |
25 | extern int trace; | |
26 | extern int enable_counting; | |
27 | ||
28 | typedef uint8_t QI; | |
29 | typedef uint16_t HI; | |
30 | typedef uint32_t SI; | |
31 | typedef uint64_t DI; | |
32 | ||
33 | extern int rx_in_gdb; | |
34 | extern int rx_big_endian; | |
35 | ||
36 | typedef struct | |
37 | { | |
38 | SI r[16]; | |
39 | ||
40 | SI r_psw; | |
41 | SI r_pc; | |
42 | SI r_usp; | |
43 | SI r_fpsw; | |
44 | SI r__reserved_cr_4; | |
45 | SI r__reserved_cr_5; | |
46 | SI r__reserved_cr_6; | |
47 | SI r__reserved_cr_7; | |
48 | ||
49 | SI r_bpsw; | |
50 | SI r_bpc; | |
51 | SI r_isp; | |
52 | SI r_fintv; | |
53 | SI r_intb; | |
54 | SI r__reserved_cr_13; | |
55 | SI r__reserved_cr_14; | |
56 | SI r__reserved_cr_15; | |
57 | ||
58 | SI r__reserved_cr_16; | |
59 | SI r__reserved_cr_17; | |
60 | SI r__reserved_cr_18; | |
61 | SI r__reserved_cr_19; | |
62 | SI r__reserved_cr_20; | |
63 | SI r__reserved_cr_21; | |
64 | SI r__reserved_cr_22; | |
65 | SI r__reserved_cr_23; | |
66 | ||
67 | SI r__reserved_cr_24; | |
68 | SI r__reserved_cr_25; | |
69 | SI r__reserved_cr_26; | |
70 | SI r__reserved_cr_27; | |
71 | SI r__reserved_cr_28; | |
72 | SI r__reserved_cr_29; | |
73 | SI r__reserved_cr_30; | |
74 | SI r__reserved_cr_31; | |
75 | ||
76 | SI r_temp; | |
77 | ||
78 | DI r_acc; | |
79 | } regs_type; | |
80 | ||
81 | #define sp 0 | |
82 | #define psw 16 | |
83 | #define pc 17 | |
84 | #define usp 18 | |
85 | #define fpsw 19 | |
86 | ||
87 | #define bpsw 24 | |
88 | #define bpc 25 | |
89 | #define isp 26 | |
90 | #define fintv 27 | |
91 | #define intb 28 | |
92 | ||
93 | #define r_temp_idx 48 | |
94 | #define acc64 49 | |
95 | #define acchi 50 | |
96 | #define accmi 51 | |
97 | #define acclo 52 | |
98 | ||
99 | extern regs_type regs; | |
100 | ||
101 | #define FLAGBIT_C 0x00000001 | |
102 | #define FLAGBIT_Z 0x00000002 | |
103 | #define FLAGBIT_S 0x00000004 | |
104 | #define FLAGBIT_O 0x00000008 | |
105 | #define FLAGBIT_I 0x00010000 | |
106 | #define FLAGBIT_U 0x00020000 | |
107 | #define FLAGBIT_PM 0x00100000 | |
108 | #define FLAGBITS_IPL 0x0f000000 | |
109 | #define FLAGSHIFT_IPL 24 | |
110 | ||
111 | #define FPSWBITS_RM 0x00000003 | |
112 | #define FPSWBITS_CV 0x00000004 /* invalid operation */ | |
113 | #define FPSWBITS_CO 0x00000008 /* overflow */ | |
114 | #define FPSWBITS_CZ 0x00000010 /* divide-by-zero */ | |
115 | #define FPSWBITS_CU 0x00000020 /* underflow */ | |
116 | #define FPSWBITS_CX 0x00000040 /* inexact */ | |
117 | #define FPSWBITS_CE 0x00000080 /* unimplemented processing */ | |
118 | #define FPSWBITS_CMASK 0x000000fc /* all the above */ | |
119 | #define FPSWBITS_DN 0x00000100 | |
120 | #define FPSW_CESH 8 | |
121 | #define FPSWBITS_EV 0x00000400 | |
122 | #define FPSWBITS_EO 0x00000800 | |
123 | #define FPSWBITS_EZ 0x00001000 | |
124 | #define FPSWBITS_EU 0x00002000 | |
125 | #define FPSWBITS_EX 0x00004000 | |
126 | #define FPSW_EFSH 16 | |
127 | #define FPSW_CFSH 24 | |
128 | #define FPSWBITS_FV 0x04000000 | |
129 | #define FPSWBITS_FO 0x08000000 | |
130 | #define FPSWBITS_FZ 0x10000000 | |
131 | #define FPSWBITS_FU 0x20000000 | |
132 | #define FPSWBITS_FX 0x40000000 | |
133 | #define FPSWBITS_FSUM 0x80000000 | |
134 | #define FPSWBITS_FMASK 0x7c000000 | |
135 | #define FPSWBITS_CLEAR 0xffffff03 /* masked at start of any FP opcode */ | |
136 | ||
137 | #define FPRM_NEAREST 0 | |
138 | #define FPRM_ZERO 1 | |
139 | #define FPRM_PINF 2 | |
140 | #define FPRM_NINF 3 | |
141 | ||
142 | extern char *reg_names[]; | |
143 | ||
144 | extern int rx_flagmask; | |
145 | extern int rx_flagand; | |
146 | extern int rx_flagor; | |
147 | ||
148 | extern unsigned int b2mask[]; | |
149 | extern unsigned int b2signbit[]; | |
150 | extern int b2maxsigned[]; | |
151 | extern int b2minsigned[]; | |
152 | ||
153 | void init_regs (void); | |
154 | void stack_heap_stats (void); | |
155 | void set_pointer_width (int bytes); | |
156 | unsigned int get_reg (int id); | |
157 | unsigned long long get_reg64 (int id); | |
158 | void put_reg (int id, unsigned int value); | |
159 | void put_reg64 (int id, unsigned long long value); | |
160 | ||
161 | void set_flags (int mask, int newbits); | |
162 | void set_oszc (long long value, int bytes, int c); | |
163 | void set_szc (long long value, int bytes, int c); | |
164 | void set_osz (long long value, int bytes); | |
165 | void set_sz (long long value, int bytes); | |
166 | void set_zc (int z, int c); | |
167 | void set_c (int c); | |
168 | ||
169 | const char *bits (int v, int b); | |
170 | ||
171 | int condition_true (int cond_id); | |
172 | ||
173 | #define FLAG(f) ((regs.r_psw & f) ? 1 : 0) | |
174 | #define FLAG_C FLAG(FLAGBIT_C) | |
175 | #define FLAG_D FLAG(FLAGBIT_D) | |
176 | #define FLAG_Z FLAG(FLAGBIT_Z) | |
177 | #define FLAG_S FLAG(FLAGBIT_S) | |
178 | #define FLAG_B FLAG(FLAGBIT_B) | |
179 | #define FLAG_O FLAG(FLAGBIT_O) | |
180 | #define FLAG_I FLAG(FLAGBIT_I) | |
181 | #define FLAG_U FLAG(FLAGBIT_U) | |
182 | #define FLAG_PM FLAG(FLAGBIT_PM) | |
183 | ||
184 | /* Instruction step return codes. | |
185 | Suppose one of the decode_* functions below returns a value R: | |
186 | - If RX_STEPPED (R), then the single-step completed normally. | |
187 | - If RX_HIT_BREAK (R), then the program hit a breakpoint. | |
188 | - If RX_EXITED (R), then the program has done an 'exit' system | |
189 | call, and the exit code is RX_EXIT_STATUS (R). | |
190 | - If RX_STOPPED (R), then a signal (number RX_STOP_SIG (R)) was | |
191 | generated. | |
192 | ||
193 | For building step return codes: | |
194 | - RX_MAKE_STEPPED is the return code for finishing a normal step. | |
195 | - RX_MAKE_HIT_BREAK is the return code for hitting a breakpoint. | |
196 | - RX_MAKE_EXITED (C) is the return code for exiting with status C. | |
197 | - RX_MAKE_STOPPED (S) is the return code for stopping on signal S. */ | |
198 | #define RX_MAKE_STEPPED() (0) | |
199 | #define RX_MAKE_HIT_BREAK() (1) | |
200 | #define RX_MAKE_EXITED(c) (((int) (c) << 8) + 2) | |
201 | #define RX_MAKE_STOPPED(s) (((int) (s) << 8) + 3) | |
202 | ||
203 | #define RX_STEPPED(r) ((r) == RX_MAKE_STEPPED ()) | |
204 | #define RX_HIT_BREAK(r) ((r) == RX_MAKE_HIT_BREAK ()) | |
205 | #define RX_EXITED(r) (((r) & 0xff) == 2) | |
206 | #define RX_EXIT_STATUS(r) ((r) >> 8) | |
207 | #define RX_STOPPED(r) (((r) & 0xff) == 3) | |
208 | #define RX_STOP_SIG(r) ((r) >> 8) | |
209 | ||
210 | /* The step result for the current step. Global to allow | |
211 | communication between the stepping function and the system | |
212 | calls. */ | |
213 | extern int step_result; | |
214 | ||
215 | extern unsigned int rx_cycles; | |
216 | ||
217 | /* Used to detect heap/stack collisions. */ | |
218 | extern unsigned int heaptop; | |
219 | extern unsigned int heapbottom; | |
220 | ||
221 | extern int decode_opcode (void); | |
222 | ||
223 | extern void trace_register_changes (); | |
224 | extern void generate_access_exception (void); | |
225 | extern jmp_buf decode_jmp_buf; |