Commit | Line | Data |
---|---|---|
cbb38b47 BE |
1 | /* Simulator instruction semantics for sh64. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
0f51e9bf | 5 | Copyright 1996-2010 Free Software Foundation, Inc. |
cbb38b47 | 6 | |
c7e628df | 7 | This file is part of the GNU simulators. |
cbb38b47 | 8 | |
fda1c30b DE |
9 | This file is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 3, or (at your option) | |
12 | any later version. | |
cbb38b47 | 13 | |
fda1c30b DE |
14 | It is distributed in the hope that it will be useful, but WITHOUT |
15 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
16 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
17 | License for more details. | |
cbb38b47 | 18 | |
fda1c30b DE |
19 | You should have received a copy of the GNU General Public License along |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. | |
cbb38b47 BE |
22 | |
23 | */ | |
24 | ||
25 | #ifdef DEFINE_LABELS | |
26 | ||
27 | /* The labels have the case they have because the enum of insn types | |
28 | is all uppercase and in the non-stdc case the insn symbol is built | |
29 | into the enum name. */ | |
30 | ||
31 | static struct { | |
32 | int index; | |
33 | void *label; | |
34 | } labels[] = { | |
35 | { SH64_COMPACT_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, | |
36 | { SH64_COMPACT_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, | |
37 | { SH64_COMPACT_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, | |
38 | { SH64_COMPACT_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, | |
39 | { SH64_COMPACT_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, | |
40 | { SH64_COMPACT_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, | |
41 | { SH64_COMPACT_INSN_ADD_COMPACT, && case_sem_INSN_ADD_COMPACT }, | |
42 | { SH64_COMPACT_INSN_ADDI_COMPACT, && case_sem_INSN_ADDI_COMPACT }, | |
43 | { SH64_COMPACT_INSN_ADDC_COMPACT, && case_sem_INSN_ADDC_COMPACT }, | |
44 | { SH64_COMPACT_INSN_ADDV_COMPACT, && case_sem_INSN_ADDV_COMPACT }, | |
45 | { SH64_COMPACT_INSN_AND_COMPACT, && case_sem_INSN_AND_COMPACT }, | |
46 | { SH64_COMPACT_INSN_ANDI_COMPACT, && case_sem_INSN_ANDI_COMPACT }, | |
47 | { SH64_COMPACT_INSN_ANDB_COMPACT, && case_sem_INSN_ANDB_COMPACT }, | |
48 | { SH64_COMPACT_INSN_BF_COMPACT, && case_sem_INSN_BF_COMPACT }, | |
49 | { SH64_COMPACT_INSN_BFS_COMPACT, && case_sem_INSN_BFS_COMPACT }, | |
50 | { SH64_COMPACT_INSN_BRA_COMPACT, && case_sem_INSN_BRA_COMPACT }, | |
51 | { SH64_COMPACT_INSN_BRAF_COMPACT, && case_sem_INSN_BRAF_COMPACT }, | |
52 | { SH64_COMPACT_INSN_BRK_COMPACT, && case_sem_INSN_BRK_COMPACT }, | |
53 | { SH64_COMPACT_INSN_BSR_COMPACT, && case_sem_INSN_BSR_COMPACT }, | |
54 | { SH64_COMPACT_INSN_BSRF_COMPACT, && case_sem_INSN_BSRF_COMPACT }, | |
55 | { SH64_COMPACT_INSN_BT_COMPACT, && case_sem_INSN_BT_COMPACT }, | |
56 | { SH64_COMPACT_INSN_BTS_COMPACT, && case_sem_INSN_BTS_COMPACT }, | |
57 | { SH64_COMPACT_INSN_CLRMAC_COMPACT, && case_sem_INSN_CLRMAC_COMPACT }, | |
58 | { SH64_COMPACT_INSN_CLRS_COMPACT, && case_sem_INSN_CLRS_COMPACT }, | |
59 | { SH64_COMPACT_INSN_CLRT_COMPACT, && case_sem_INSN_CLRT_COMPACT }, | |
60 | { SH64_COMPACT_INSN_CMPEQ_COMPACT, && case_sem_INSN_CMPEQ_COMPACT }, | |
61 | { SH64_COMPACT_INSN_CMPEQI_COMPACT, && case_sem_INSN_CMPEQI_COMPACT }, | |
62 | { SH64_COMPACT_INSN_CMPGE_COMPACT, && case_sem_INSN_CMPGE_COMPACT }, | |
63 | { SH64_COMPACT_INSN_CMPGT_COMPACT, && case_sem_INSN_CMPGT_COMPACT }, | |
64 | { SH64_COMPACT_INSN_CMPHI_COMPACT, && case_sem_INSN_CMPHI_COMPACT }, | |
65 | { SH64_COMPACT_INSN_CMPHS_COMPACT, && case_sem_INSN_CMPHS_COMPACT }, | |
66 | { SH64_COMPACT_INSN_CMPPL_COMPACT, && case_sem_INSN_CMPPL_COMPACT }, | |
67 | { SH64_COMPACT_INSN_CMPPZ_COMPACT, && case_sem_INSN_CMPPZ_COMPACT }, | |
68 | { SH64_COMPACT_INSN_CMPSTR_COMPACT, && case_sem_INSN_CMPSTR_COMPACT }, | |
69 | { SH64_COMPACT_INSN_DIV0S_COMPACT, && case_sem_INSN_DIV0S_COMPACT }, | |
70 | { SH64_COMPACT_INSN_DIV0U_COMPACT, && case_sem_INSN_DIV0U_COMPACT }, | |
71 | { SH64_COMPACT_INSN_DIV1_COMPACT, && case_sem_INSN_DIV1_COMPACT }, | |
c7e628df DB |
72 | { SH64_COMPACT_INSN_DIVU_COMPACT, && case_sem_INSN_DIVU_COMPACT }, |
73 | { SH64_COMPACT_INSN_MULR_COMPACT, && case_sem_INSN_MULR_COMPACT }, | |
cbb38b47 BE |
74 | { SH64_COMPACT_INSN_DMULSL_COMPACT, && case_sem_INSN_DMULSL_COMPACT }, |
75 | { SH64_COMPACT_INSN_DMULUL_COMPACT, && case_sem_INSN_DMULUL_COMPACT }, | |
76 | { SH64_COMPACT_INSN_DT_COMPACT, && case_sem_INSN_DT_COMPACT }, | |
77 | { SH64_COMPACT_INSN_EXTSB_COMPACT, && case_sem_INSN_EXTSB_COMPACT }, | |
78 | { SH64_COMPACT_INSN_EXTSW_COMPACT, && case_sem_INSN_EXTSW_COMPACT }, | |
79 | { SH64_COMPACT_INSN_EXTUB_COMPACT, && case_sem_INSN_EXTUB_COMPACT }, | |
80 | { SH64_COMPACT_INSN_EXTUW_COMPACT, && case_sem_INSN_EXTUW_COMPACT }, | |
81 | { SH64_COMPACT_INSN_FABS_COMPACT, && case_sem_INSN_FABS_COMPACT }, | |
82 | { SH64_COMPACT_INSN_FADD_COMPACT, && case_sem_INSN_FADD_COMPACT }, | |
83 | { SH64_COMPACT_INSN_FCMPEQ_COMPACT, && case_sem_INSN_FCMPEQ_COMPACT }, | |
84 | { SH64_COMPACT_INSN_FCMPGT_COMPACT, && case_sem_INSN_FCMPGT_COMPACT }, | |
85 | { SH64_COMPACT_INSN_FCNVDS_COMPACT, && case_sem_INSN_FCNVDS_COMPACT }, | |
86 | { SH64_COMPACT_INSN_FCNVSD_COMPACT, && case_sem_INSN_FCNVSD_COMPACT }, | |
87 | { SH64_COMPACT_INSN_FDIV_COMPACT, && case_sem_INSN_FDIV_COMPACT }, | |
88 | { SH64_COMPACT_INSN_FIPR_COMPACT, && case_sem_INSN_FIPR_COMPACT }, | |
89 | { SH64_COMPACT_INSN_FLDS_COMPACT, && case_sem_INSN_FLDS_COMPACT }, | |
90 | { SH64_COMPACT_INSN_FLDI0_COMPACT, && case_sem_INSN_FLDI0_COMPACT }, | |
91 | { SH64_COMPACT_INSN_FLDI1_COMPACT, && case_sem_INSN_FLDI1_COMPACT }, | |
92 | { SH64_COMPACT_INSN_FLOAT_COMPACT, && case_sem_INSN_FLOAT_COMPACT }, | |
93 | { SH64_COMPACT_INSN_FMAC_COMPACT, && case_sem_INSN_FMAC_COMPACT }, | |
94 | { SH64_COMPACT_INSN_FMOV1_COMPACT, && case_sem_INSN_FMOV1_COMPACT }, | |
95 | { SH64_COMPACT_INSN_FMOV2_COMPACT, && case_sem_INSN_FMOV2_COMPACT }, | |
96 | { SH64_COMPACT_INSN_FMOV3_COMPACT, && case_sem_INSN_FMOV3_COMPACT }, | |
97 | { SH64_COMPACT_INSN_FMOV4_COMPACT, && case_sem_INSN_FMOV4_COMPACT }, | |
98 | { SH64_COMPACT_INSN_FMOV5_COMPACT, && case_sem_INSN_FMOV5_COMPACT }, | |
99 | { SH64_COMPACT_INSN_FMOV6_COMPACT, && case_sem_INSN_FMOV6_COMPACT }, | |
100 | { SH64_COMPACT_INSN_FMOV7_COMPACT, && case_sem_INSN_FMOV7_COMPACT }, | |
c7e628df DB |
101 | { SH64_COMPACT_INSN_FMOV8_COMPACT, && case_sem_INSN_FMOV8_COMPACT }, |
102 | { SH64_COMPACT_INSN_FMOV9_COMPACT, && case_sem_INSN_FMOV9_COMPACT }, | |
cbb38b47 BE |
103 | { SH64_COMPACT_INSN_FMUL_COMPACT, && case_sem_INSN_FMUL_COMPACT }, |
104 | { SH64_COMPACT_INSN_FNEG_COMPACT, && case_sem_INSN_FNEG_COMPACT }, | |
105 | { SH64_COMPACT_INSN_FRCHG_COMPACT, && case_sem_INSN_FRCHG_COMPACT }, | |
106 | { SH64_COMPACT_INSN_FSCHG_COMPACT, && case_sem_INSN_FSCHG_COMPACT }, | |
107 | { SH64_COMPACT_INSN_FSQRT_COMPACT, && case_sem_INSN_FSQRT_COMPACT }, | |
108 | { SH64_COMPACT_INSN_FSTS_COMPACT, && case_sem_INSN_FSTS_COMPACT }, | |
109 | { SH64_COMPACT_INSN_FSUB_COMPACT, && case_sem_INSN_FSUB_COMPACT }, | |
110 | { SH64_COMPACT_INSN_FTRC_COMPACT, && case_sem_INSN_FTRC_COMPACT }, | |
111 | { SH64_COMPACT_INSN_FTRV_COMPACT, && case_sem_INSN_FTRV_COMPACT }, | |
112 | { SH64_COMPACT_INSN_JMP_COMPACT, && case_sem_INSN_JMP_COMPACT }, | |
113 | { SH64_COMPACT_INSN_JSR_COMPACT, && case_sem_INSN_JSR_COMPACT }, | |
c7e628df DB |
114 | { SH64_COMPACT_INSN_LDC_GBR_COMPACT, && case_sem_INSN_LDC_GBR_COMPACT }, |
115 | { SH64_COMPACT_INSN_LDC_VBR_COMPACT, && case_sem_INSN_LDC_VBR_COMPACT }, | |
116 | { SH64_COMPACT_INSN_LDC_SR_COMPACT, && case_sem_INSN_LDC_SR_COMPACT }, | |
117 | { SH64_COMPACT_INSN_LDCL_GBR_COMPACT, && case_sem_INSN_LDCL_GBR_COMPACT }, | |
118 | { SH64_COMPACT_INSN_LDCL_VBR_COMPACT, && case_sem_INSN_LDCL_VBR_COMPACT }, | |
cbb38b47 BE |
119 | { SH64_COMPACT_INSN_LDS_FPSCR_COMPACT, && case_sem_INSN_LDS_FPSCR_COMPACT }, |
120 | { SH64_COMPACT_INSN_LDSL_FPSCR_COMPACT, && case_sem_INSN_LDSL_FPSCR_COMPACT }, | |
121 | { SH64_COMPACT_INSN_LDS_FPUL_COMPACT, && case_sem_INSN_LDS_FPUL_COMPACT }, | |
122 | { SH64_COMPACT_INSN_LDSL_FPUL_COMPACT, && case_sem_INSN_LDSL_FPUL_COMPACT }, | |
123 | { SH64_COMPACT_INSN_LDS_MACH_COMPACT, && case_sem_INSN_LDS_MACH_COMPACT }, | |
124 | { SH64_COMPACT_INSN_LDSL_MACH_COMPACT, && case_sem_INSN_LDSL_MACH_COMPACT }, | |
125 | { SH64_COMPACT_INSN_LDS_MACL_COMPACT, && case_sem_INSN_LDS_MACL_COMPACT }, | |
126 | { SH64_COMPACT_INSN_LDSL_MACL_COMPACT, && case_sem_INSN_LDSL_MACL_COMPACT }, | |
127 | { SH64_COMPACT_INSN_LDS_PR_COMPACT, && case_sem_INSN_LDS_PR_COMPACT }, | |
128 | { SH64_COMPACT_INSN_LDSL_PR_COMPACT, && case_sem_INSN_LDSL_PR_COMPACT }, | |
129 | { SH64_COMPACT_INSN_MACL_COMPACT, && case_sem_INSN_MACL_COMPACT }, | |
130 | { SH64_COMPACT_INSN_MACW_COMPACT, && case_sem_INSN_MACW_COMPACT }, | |
131 | { SH64_COMPACT_INSN_MOV_COMPACT, && case_sem_INSN_MOV_COMPACT }, | |
132 | { SH64_COMPACT_INSN_MOVI_COMPACT, && case_sem_INSN_MOVI_COMPACT }, | |
c7e628df | 133 | { SH64_COMPACT_INSN_MOVI20_COMPACT, && case_sem_INSN_MOVI20_COMPACT }, |
cbb38b47 BE |
134 | { SH64_COMPACT_INSN_MOVB1_COMPACT, && case_sem_INSN_MOVB1_COMPACT }, |
135 | { SH64_COMPACT_INSN_MOVB2_COMPACT, && case_sem_INSN_MOVB2_COMPACT }, | |
136 | { SH64_COMPACT_INSN_MOVB3_COMPACT, && case_sem_INSN_MOVB3_COMPACT }, | |
137 | { SH64_COMPACT_INSN_MOVB4_COMPACT, && case_sem_INSN_MOVB4_COMPACT }, | |
138 | { SH64_COMPACT_INSN_MOVB5_COMPACT, && case_sem_INSN_MOVB5_COMPACT }, | |
139 | { SH64_COMPACT_INSN_MOVB6_COMPACT, && case_sem_INSN_MOVB6_COMPACT }, | |
140 | { SH64_COMPACT_INSN_MOVB7_COMPACT, && case_sem_INSN_MOVB7_COMPACT }, | |
141 | { SH64_COMPACT_INSN_MOVB8_COMPACT, && case_sem_INSN_MOVB8_COMPACT }, | |
142 | { SH64_COMPACT_INSN_MOVB9_COMPACT, && case_sem_INSN_MOVB9_COMPACT }, | |
143 | { SH64_COMPACT_INSN_MOVB10_COMPACT, && case_sem_INSN_MOVB10_COMPACT }, | |
144 | { SH64_COMPACT_INSN_MOVL1_COMPACT, && case_sem_INSN_MOVL1_COMPACT }, | |
145 | { SH64_COMPACT_INSN_MOVL2_COMPACT, && case_sem_INSN_MOVL2_COMPACT }, | |
146 | { SH64_COMPACT_INSN_MOVL3_COMPACT, && case_sem_INSN_MOVL3_COMPACT }, | |
147 | { SH64_COMPACT_INSN_MOVL4_COMPACT, && case_sem_INSN_MOVL4_COMPACT }, | |
148 | { SH64_COMPACT_INSN_MOVL5_COMPACT, && case_sem_INSN_MOVL5_COMPACT }, | |
149 | { SH64_COMPACT_INSN_MOVL6_COMPACT, && case_sem_INSN_MOVL6_COMPACT }, | |
150 | { SH64_COMPACT_INSN_MOVL7_COMPACT, && case_sem_INSN_MOVL7_COMPACT }, | |
151 | { SH64_COMPACT_INSN_MOVL8_COMPACT, && case_sem_INSN_MOVL8_COMPACT }, | |
152 | { SH64_COMPACT_INSN_MOVL9_COMPACT, && case_sem_INSN_MOVL9_COMPACT }, | |
153 | { SH64_COMPACT_INSN_MOVL10_COMPACT, && case_sem_INSN_MOVL10_COMPACT }, | |
154 | { SH64_COMPACT_INSN_MOVL11_COMPACT, && case_sem_INSN_MOVL11_COMPACT }, | |
c7e628df DB |
155 | { SH64_COMPACT_INSN_MOVL12_COMPACT, && case_sem_INSN_MOVL12_COMPACT }, |
156 | { SH64_COMPACT_INSN_MOVL13_COMPACT, && case_sem_INSN_MOVL13_COMPACT }, | |
cbb38b47 BE |
157 | { SH64_COMPACT_INSN_MOVW1_COMPACT, && case_sem_INSN_MOVW1_COMPACT }, |
158 | { SH64_COMPACT_INSN_MOVW2_COMPACT, && case_sem_INSN_MOVW2_COMPACT }, | |
159 | { SH64_COMPACT_INSN_MOVW3_COMPACT, && case_sem_INSN_MOVW3_COMPACT }, | |
160 | { SH64_COMPACT_INSN_MOVW4_COMPACT, && case_sem_INSN_MOVW4_COMPACT }, | |
161 | { SH64_COMPACT_INSN_MOVW5_COMPACT, && case_sem_INSN_MOVW5_COMPACT }, | |
162 | { SH64_COMPACT_INSN_MOVW6_COMPACT, && case_sem_INSN_MOVW6_COMPACT }, | |
163 | { SH64_COMPACT_INSN_MOVW7_COMPACT, && case_sem_INSN_MOVW7_COMPACT }, | |
164 | { SH64_COMPACT_INSN_MOVW8_COMPACT, && case_sem_INSN_MOVW8_COMPACT }, | |
165 | { SH64_COMPACT_INSN_MOVW9_COMPACT, && case_sem_INSN_MOVW9_COMPACT }, | |
166 | { SH64_COMPACT_INSN_MOVW10_COMPACT, && case_sem_INSN_MOVW10_COMPACT }, | |
167 | { SH64_COMPACT_INSN_MOVW11_COMPACT, && case_sem_INSN_MOVW11_COMPACT }, | |
168 | { SH64_COMPACT_INSN_MOVA_COMPACT, && case_sem_INSN_MOVA_COMPACT }, | |
169 | { SH64_COMPACT_INSN_MOVCAL_COMPACT, && case_sem_INSN_MOVCAL_COMPACT }, | |
c7e628df | 170 | { SH64_COMPACT_INSN_MOVCOL_COMPACT, && case_sem_INSN_MOVCOL_COMPACT }, |
cbb38b47 | 171 | { SH64_COMPACT_INSN_MOVT_COMPACT, && case_sem_INSN_MOVT_COMPACT }, |
c7e628df DB |
172 | { SH64_COMPACT_INSN_MOVUAL_COMPACT, && case_sem_INSN_MOVUAL_COMPACT }, |
173 | { SH64_COMPACT_INSN_MOVUAL2_COMPACT, && case_sem_INSN_MOVUAL2_COMPACT }, | |
cbb38b47 BE |
174 | { SH64_COMPACT_INSN_MULL_COMPACT, && case_sem_INSN_MULL_COMPACT }, |
175 | { SH64_COMPACT_INSN_MULSW_COMPACT, && case_sem_INSN_MULSW_COMPACT }, | |
176 | { SH64_COMPACT_INSN_MULUW_COMPACT, && case_sem_INSN_MULUW_COMPACT }, | |
177 | { SH64_COMPACT_INSN_NEG_COMPACT, && case_sem_INSN_NEG_COMPACT }, | |
178 | { SH64_COMPACT_INSN_NEGC_COMPACT, && case_sem_INSN_NEGC_COMPACT }, | |
179 | { SH64_COMPACT_INSN_NOP_COMPACT, && case_sem_INSN_NOP_COMPACT }, | |
180 | { SH64_COMPACT_INSN_NOT_COMPACT, && case_sem_INSN_NOT_COMPACT }, | |
181 | { SH64_COMPACT_INSN_OCBI_COMPACT, && case_sem_INSN_OCBI_COMPACT }, | |
182 | { SH64_COMPACT_INSN_OCBP_COMPACT, && case_sem_INSN_OCBP_COMPACT }, | |
183 | { SH64_COMPACT_INSN_OCBWB_COMPACT, && case_sem_INSN_OCBWB_COMPACT }, | |
184 | { SH64_COMPACT_INSN_OR_COMPACT, && case_sem_INSN_OR_COMPACT }, | |
185 | { SH64_COMPACT_INSN_ORI_COMPACT, && case_sem_INSN_ORI_COMPACT }, | |
186 | { SH64_COMPACT_INSN_ORB_COMPACT, && case_sem_INSN_ORB_COMPACT }, | |
187 | { SH64_COMPACT_INSN_PREF_COMPACT, && case_sem_INSN_PREF_COMPACT }, | |
188 | { SH64_COMPACT_INSN_ROTCL_COMPACT, && case_sem_INSN_ROTCL_COMPACT }, | |
189 | { SH64_COMPACT_INSN_ROTCR_COMPACT, && case_sem_INSN_ROTCR_COMPACT }, | |
190 | { SH64_COMPACT_INSN_ROTL_COMPACT, && case_sem_INSN_ROTL_COMPACT }, | |
191 | { SH64_COMPACT_INSN_ROTR_COMPACT, && case_sem_INSN_ROTR_COMPACT }, | |
192 | { SH64_COMPACT_INSN_RTS_COMPACT, && case_sem_INSN_RTS_COMPACT }, | |
193 | { SH64_COMPACT_INSN_SETS_COMPACT, && case_sem_INSN_SETS_COMPACT }, | |
194 | { SH64_COMPACT_INSN_SETT_COMPACT, && case_sem_INSN_SETT_COMPACT }, | |
195 | { SH64_COMPACT_INSN_SHAD_COMPACT, && case_sem_INSN_SHAD_COMPACT }, | |
196 | { SH64_COMPACT_INSN_SHAL_COMPACT, && case_sem_INSN_SHAL_COMPACT }, | |
197 | { SH64_COMPACT_INSN_SHAR_COMPACT, && case_sem_INSN_SHAR_COMPACT }, | |
198 | { SH64_COMPACT_INSN_SHLD_COMPACT, && case_sem_INSN_SHLD_COMPACT }, | |
199 | { SH64_COMPACT_INSN_SHLL_COMPACT, && case_sem_INSN_SHLL_COMPACT }, | |
200 | { SH64_COMPACT_INSN_SHLL2_COMPACT, && case_sem_INSN_SHLL2_COMPACT }, | |
201 | { SH64_COMPACT_INSN_SHLL8_COMPACT, && case_sem_INSN_SHLL8_COMPACT }, | |
202 | { SH64_COMPACT_INSN_SHLL16_COMPACT, && case_sem_INSN_SHLL16_COMPACT }, | |
203 | { SH64_COMPACT_INSN_SHLR_COMPACT, && case_sem_INSN_SHLR_COMPACT }, | |
204 | { SH64_COMPACT_INSN_SHLR2_COMPACT, && case_sem_INSN_SHLR2_COMPACT }, | |
205 | { SH64_COMPACT_INSN_SHLR8_COMPACT, && case_sem_INSN_SHLR8_COMPACT }, | |
206 | { SH64_COMPACT_INSN_SHLR16_COMPACT, && case_sem_INSN_SHLR16_COMPACT }, | |
207 | { SH64_COMPACT_INSN_STC_GBR_COMPACT, && case_sem_INSN_STC_GBR_COMPACT }, | |
c7e628df | 208 | { SH64_COMPACT_INSN_STC_VBR_COMPACT, && case_sem_INSN_STC_VBR_COMPACT }, |
cbb38b47 | 209 | { SH64_COMPACT_INSN_STCL_GBR_COMPACT, && case_sem_INSN_STCL_GBR_COMPACT }, |
c7e628df | 210 | { SH64_COMPACT_INSN_STCL_VBR_COMPACT, && case_sem_INSN_STCL_VBR_COMPACT }, |
cbb38b47 BE |
211 | { SH64_COMPACT_INSN_STS_FPSCR_COMPACT, && case_sem_INSN_STS_FPSCR_COMPACT }, |
212 | { SH64_COMPACT_INSN_STSL_FPSCR_COMPACT, && case_sem_INSN_STSL_FPSCR_COMPACT }, | |
213 | { SH64_COMPACT_INSN_STS_FPUL_COMPACT, && case_sem_INSN_STS_FPUL_COMPACT }, | |
214 | { SH64_COMPACT_INSN_STSL_FPUL_COMPACT, && case_sem_INSN_STSL_FPUL_COMPACT }, | |
215 | { SH64_COMPACT_INSN_STS_MACH_COMPACT, && case_sem_INSN_STS_MACH_COMPACT }, | |
216 | { SH64_COMPACT_INSN_STSL_MACH_COMPACT, && case_sem_INSN_STSL_MACH_COMPACT }, | |
217 | { SH64_COMPACT_INSN_STS_MACL_COMPACT, && case_sem_INSN_STS_MACL_COMPACT }, | |
218 | { SH64_COMPACT_INSN_STSL_MACL_COMPACT, && case_sem_INSN_STSL_MACL_COMPACT }, | |
219 | { SH64_COMPACT_INSN_STS_PR_COMPACT, && case_sem_INSN_STS_PR_COMPACT }, | |
220 | { SH64_COMPACT_INSN_STSL_PR_COMPACT, && case_sem_INSN_STSL_PR_COMPACT }, | |
221 | { SH64_COMPACT_INSN_SUB_COMPACT, && case_sem_INSN_SUB_COMPACT }, | |
222 | { SH64_COMPACT_INSN_SUBC_COMPACT, && case_sem_INSN_SUBC_COMPACT }, | |
223 | { SH64_COMPACT_INSN_SUBV_COMPACT, && case_sem_INSN_SUBV_COMPACT }, | |
224 | { SH64_COMPACT_INSN_SWAPB_COMPACT, && case_sem_INSN_SWAPB_COMPACT }, | |
225 | { SH64_COMPACT_INSN_SWAPW_COMPACT, && case_sem_INSN_SWAPW_COMPACT }, | |
226 | { SH64_COMPACT_INSN_TASB_COMPACT, && case_sem_INSN_TASB_COMPACT }, | |
227 | { SH64_COMPACT_INSN_TRAPA_COMPACT, && case_sem_INSN_TRAPA_COMPACT }, | |
228 | { SH64_COMPACT_INSN_TST_COMPACT, && case_sem_INSN_TST_COMPACT }, | |
229 | { SH64_COMPACT_INSN_TSTI_COMPACT, && case_sem_INSN_TSTI_COMPACT }, | |
230 | { SH64_COMPACT_INSN_TSTB_COMPACT, && case_sem_INSN_TSTB_COMPACT }, | |
231 | { SH64_COMPACT_INSN_XOR_COMPACT, && case_sem_INSN_XOR_COMPACT }, | |
232 | { SH64_COMPACT_INSN_XORI_COMPACT, && case_sem_INSN_XORI_COMPACT }, | |
233 | { SH64_COMPACT_INSN_XORB_COMPACT, && case_sem_INSN_XORB_COMPACT }, | |
234 | { SH64_COMPACT_INSN_XTRCT_COMPACT, && case_sem_INSN_XTRCT_COMPACT }, | |
235 | { 0, 0 } | |
236 | }; | |
237 | int i; | |
238 | ||
239 | for (i = 0; labels[i].label != 0; ++i) | |
240 | { | |
241 | #if FAST_P | |
242 | CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; | |
243 | #else | |
244 | CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; | |
245 | #endif | |
246 | } | |
247 | ||
248 | #undef DEFINE_LABELS | |
249 | #endif /* DEFINE_LABELS */ | |
250 | ||
251 | #ifdef DEFINE_SWITCH | |
252 | ||
253 | /* If hyper-fast [well not unnecessarily slow] execution is selected, turn | |
254 | off frills like tracing and profiling. */ | |
255 | /* FIXME: A better way would be to have TRACE_RESULT check for something | |
256 | that can cause it to be optimized out. Another way would be to emit | |
257 | special handlers into the instruction "stream". */ | |
258 | ||
259 | #if FAST_P | |
260 | #undef TRACE_RESULT | |
261 | #define TRACE_RESULT(cpu, abuf, name, type, val) | |
262 | #endif | |
263 | ||
264 | #undef GET_ATTR | |
cbb38b47 | 265 | #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) |
cbb38b47 BE |
266 | |
267 | { | |
268 | ||
269 | #if WITH_SCACHE_PBB | |
270 | ||
271 | /* Branch to next handler without going around main loop. */ | |
272 | #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case | |
273 | SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) | |
274 | ||
275 | #else /* ! WITH_SCACHE_PBB */ | |
276 | ||
277 | #define NEXT(vpc) BREAK (sem) | |
278 | #ifdef __GNUC__ | |
279 | #if FAST_P | |
280 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) | |
281 | #else | |
282 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) | |
283 | #endif | |
284 | #else | |
285 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) | |
286 | #endif | |
287 | ||
288 | #endif /* ! WITH_SCACHE_PBB */ | |
289 | ||
290 | { | |
291 | ||
292 | CASE (sem, INSN_X_INVALID) : /* --invalid-- */ | |
293 | { | |
294 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
295 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 296 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
297 | int UNUSED written = 0; |
298 | IADDR UNUSED pc = abuf->addr; | |
299 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
300 | ||
301 | { | |
302 | /* Update the recorded pc in the cpu state struct. | |
303 | Only necessary for WITH_SCACHE case, but to avoid the | |
304 | conditional compilation .... */ | |
305 | SET_H_PC (pc); | |
306 | /* Virtual insns have zero size. Overwrite vpc with address of next insn | |
307 | using the default-insn-bitsize spec. When executing insns in parallel | |
308 | we may want to queue the fault and continue execution. */ | |
309 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
310 | vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); | |
311 | } | |
312 | ||
313 | #undef FLD | |
314 | } | |
315 | NEXT (vpc); | |
316 | ||
317 | CASE (sem, INSN_X_AFTER) : /* --after-- */ | |
318 | { | |
319 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
320 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 321 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
322 | int UNUSED written = 0; |
323 | IADDR UNUSED pc = abuf->addr; | |
324 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
325 | ||
326 | { | |
327 | #if WITH_SCACHE_PBB_SH64_COMPACT | |
328 | sh64_compact_pbb_after (current_cpu, sem_arg); | |
329 | #endif | |
330 | } | |
331 | ||
332 | #undef FLD | |
333 | } | |
334 | NEXT (vpc); | |
335 | ||
336 | CASE (sem, INSN_X_BEFORE) : /* --before-- */ | |
337 | { | |
338 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
339 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 340 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
341 | int UNUSED written = 0; |
342 | IADDR UNUSED pc = abuf->addr; | |
343 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
344 | ||
345 | { | |
346 | #if WITH_SCACHE_PBB_SH64_COMPACT | |
347 | sh64_compact_pbb_before (current_cpu, sem_arg); | |
348 | #endif | |
349 | } | |
350 | ||
351 | #undef FLD | |
352 | } | |
353 | NEXT (vpc); | |
354 | ||
355 | CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ | |
356 | { | |
357 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
358 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 359 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
360 | int UNUSED written = 0; |
361 | IADDR UNUSED pc = abuf->addr; | |
362 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
363 | ||
364 | { | |
365 | #if WITH_SCACHE_PBB_SH64_COMPACT | |
366 | #ifdef DEFINE_SWITCH | |
367 | vpc = sh64_compact_pbb_cti_chain (current_cpu, sem_arg, | |
368 | pbb_br_type, pbb_br_npc); | |
369 | BREAK (sem); | |
370 | #else | |
371 | /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ | |
372 | vpc = sh64_compact_pbb_cti_chain (current_cpu, sem_arg, | |
373 | CPU_PBB_BR_TYPE (current_cpu), | |
374 | CPU_PBB_BR_NPC (current_cpu)); | |
375 | #endif | |
376 | #endif | |
377 | } | |
378 | ||
379 | #undef FLD | |
380 | } | |
381 | NEXT (vpc); | |
382 | ||
383 | CASE (sem, INSN_X_CHAIN) : /* --chain-- */ | |
384 | { | |
385 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
386 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 387 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
388 | int UNUSED written = 0; |
389 | IADDR UNUSED pc = abuf->addr; | |
390 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
391 | ||
392 | { | |
393 | #if WITH_SCACHE_PBB_SH64_COMPACT | |
394 | vpc = sh64_compact_pbb_chain (current_cpu, sem_arg); | |
395 | #ifdef DEFINE_SWITCH | |
396 | BREAK (sem); | |
397 | #endif | |
398 | #endif | |
399 | } | |
400 | ||
401 | #undef FLD | |
402 | } | |
403 | NEXT (vpc); | |
404 | ||
405 | CASE (sem, INSN_X_BEGIN) : /* --begin-- */ | |
406 | { | |
407 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
408 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 409 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
410 | int UNUSED written = 0; |
411 | IADDR UNUSED pc = abuf->addr; | |
412 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
413 | ||
414 | { | |
415 | #if WITH_SCACHE_PBB_SH64_COMPACT | |
416 | #if defined DEFINE_SWITCH || defined FAST_P | |
417 | /* In the switch case FAST_P is a constant, allowing several optimizations | |
418 | in any called inline functions. */ | |
419 | vpc = sh64_compact_pbb_begin (current_cpu, FAST_P); | |
420 | #else | |
421 | #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ | |
422 | vpc = sh64_compact_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); | |
423 | #else | |
424 | vpc = sh64_compact_pbb_begin (current_cpu, 0); | |
425 | #endif | |
426 | #endif | |
427 | #endif | |
428 | } | |
429 | ||
430 | #undef FLD | |
431 | } | |
432 | NEXT (vpc); | |
433 | ||
434 | CASE (sem, INSN_ADD_COMPACT) : /* add $rm, $rn */ | |
435 | { | |
436 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
437 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 438 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
439 | int UNUSED written = 0; |
440 | IADDR UNUSED pc = abuf->addr; | |
441 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
442 | ||
443 | { | |
444 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
445 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 446 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
447 | } |
448 | ||
449 | #undef FLD | |
450 | } | |
451 | NEXT (vpc); | |
452 | ||
453 | CASE (sem, INSN_ADDI_COMPACT) : /* add #$imm8, $rn */ | |
454 | { | |
455 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
456 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
457 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
458 | int UNUSED written = 0; | |
459 | IADDR UNUSED pc = abuf->addr; | |
460 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
461 | ||
462 | { | |
463 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), EXTQISI (ANDQI (FLD (f_imm8), 255))); | |
464 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 465 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
466 | } |
467 | ||
468 | #undef FLD | |
469 | } | |
470 | NEXT (vpc); | |
471 | ||
472 | CASE (sem, INSN_ADDC_COMPACT) : /* addc $rm, $rn */ | |
473 | { | |
474 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
475 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 476 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
477 | int UNUSED written = 0; |
478 | IADDR UNUSED pc = abuf->addr; | |
479 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
480 | ||
481 | { | |
482 | BI tmp_flag; | |
483 | tmp_flag = ADDCFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
484 | { | |
485 | SI opval = ADDCSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
486 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 487 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
488 | } |
489 | { | |
490 | BI opval = tmp_flag; | |
491 | SET_H_TBIT (opval); | |
492 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
493 | } | |
494 | } | |
495 | ||
496 | #undef FLD | |
497 | } | |
498 | NEXT (vpc); | |
499 | ||
500 | CASE (sem, INSN_ADDV_COMPACT) : /* addv $rm, $rn */ | |
501 | { | |
502 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
503 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 504 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
505 | int UNUSED written = 0; |
506 | IADDR UNUSED pc = abuf->addr; | |
507 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
508 | ||
509 | { | |
510 | BI tmp_t; | |
511 | tmp_t = ADDOFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), 0); | |
512 | { | |
513 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
514 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 515 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
516 | } |
517 | { | |
518 | BI opval = tmp_t; | |
519 | SET_H_TBIT (opval); | |
520 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
521 | } | |
522 | } | |
523 | ||
524 | #undef FLD | |
525 | } | |
526 | NEXT (vpc); | |
527 | ||
528 | CASE (sem, INSN_AND_COMPACT) : /* and $rm64, $rn64 */ | |
529 | { | |
530 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
531 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 532 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
533 | int UNUSED written = 0; |
534 | IADDR UNUSED pc = abuf->addr; | |
535 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
536 | ||
537 | { | |
538 | DI opval = ANDDI (GET_H_GR (FLD (f_rm)), GET_H_GR (FLD (f_rn))); | |
539 | SET_H_GR (FLD (f_rn), opval); | |
c7e628df | 540 | TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); |
cbb38b47 BE |
541 | } |
542 | ||
543 | #undef FLD | |
544 | } | |
545 | NEXT (vpc); | |
546 | ||
547 | CASE (sem, INSN_ANDI_COMPACT) : /* and #$uimm8, r0 */ | |
548 | { | |
549 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
550 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
551 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
552 | int UNUSED written = 0; | |
553 | IADDR UNUSED pc = abuf->addr; | |
554 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
555 | ||
556 | { | |
557 | SI opval = ANDSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); | |
558 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 559 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
560 | } |
561 | ||
562 | #undef FLD | |
563 | } | |
564 | NEXT (vpc); | |
565 | ||
566 | CASE (sem, INSN_ANDB_COMPACT) : /* and.b #$imm8, @(r0, gbr) */ | |
567 | { | |
568 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
569 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
570 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
571 | int UNUSED written = 0; | |
572 | IADDR UNUSED pc = abuf->addr; | |
573 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
574 | ||
575 | { | |
576 | DI tmp_addr; | |
577 | UQI tmp_data; | |
578 | tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); | |
579 | tmp_data = ANDQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); | |
580 | { | |
581 | UQI opval = tmp_data; | |
582 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
583 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
584 | } | |
585 | } | |
586 | ||
587 | #undef FLD | |
588 | } | |
589 | NEXT (vpc); | |
590 | ||
591 | CASE (sem, INSN_BF_COMPACT) : /* bf $disp8 */ | |
592 | { | |
593 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
594 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
595 | #define FLD(f) abuf->fields.sfmt_bf_compact.f | |
596 | int UNUSED written = 0; | |
597 | IADDR UNUSED pc = abuf->addr; | |
598 | SEM_BRANCH_INIT | |
599 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
600 | ||
601 | if (NOTBI (GET_H_TBIT ())) { | |
602 | { | |
603 | UDI opval = FLD (i_disp8); | |
604 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
605 | written |= (1 << 2); | |
606 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
607 | } | |
608 | } | |
609 | ||
610 | abuf->written = written; | |
611 | SEM_BRANCH_FINI (vpc); | |
612 | #undef FLD | |
613 | } | |
614 | NEXT (vpc); | |
615 | ||
616 | CASE (sem, INSN_BFS_COMPACT) : /* bf/s $disp8 */ | |
617 | { | |
618 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
619 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
620 | #define FLD(f) abuf->fields.sfmt_bf_compact.f | |
621 | int UNUSED written = 0; | |
622 | IADDR UNUSED pc = abuf->addr; | |
623 | SEM_BRANCH_INIT | |
624 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
625 | ||
626 | if (NOTBI (GET_H_TBIT ())) { | |
c7e628df DB |
627 | { |
628 | { | |
629 | UDI opval = ADDDI (pc, 2); | |
630 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
631 | written |= (1 << 3); | |
632 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
633 | } | |
634 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
635 | { |
636 | { | |
637 | UDI opval = FLD (i_disp8); | |
638 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
c7e628df | 639 | written |= (1 << 3); |
cbb38b47 BE |
640 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); |
641 | } | |
642 | } | |
c7e628df | 643 | } |
cbb38b47 BE |
644 | } |
645 | ||
646 | abuf->written = written; | |
647 | SEM_BRANCH_FINI (vpc); | |
648 | #undef FLD | |
649 | } | |
650 | NEXT (vpc); | |
651 | ||
652 | CASE (sem, INSN_BRA_COMPACT) : /* bra $disp12 */ | |
653 | { | |
654 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
655 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
656 | #define FLD(f) abuf->fields.sfmt_bra_compact.f | |
657 | int UNUSED written = 0; | |
658 | IADDR UNUSED pc = abuf->addr; | |
659 | SEM_BRANCH_INIT | |
660 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
661 | ||
c7e628df DB |
662 | { |
663 | { | |
664 | UDI opval = ADDDI (pc, 2); | |
665 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
666 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
667 | } | |
668 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
669 | { |
670 | { | |
671 | UDI opval = FLD (i_disp12); | |
672 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
673 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
674 | } | |
c7e628df | 675 | } |
cbb38b47 BE |
676 | } |
677 | ||
678 | SEM_BRANCH_FINI (vpc); | |
679 | #undef FLD | |
680 | } | |
681 | NEXT (vpc); | |
682 | ||
683 | CASE (sem, INSN_BRAF_COMPACT) : /* braf $rn */ | |
684 | { | |
685 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
686 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
687 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
688 | int UNUSED written = 0; | |
689 | IADDR UNUSED pc = abuf->addr; | |
690 | SEM_BRANCH_INIT | |
691 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
692 | ||
c7e628df DB |
693 | { |
694 | { | |
695 | UDI opval = ADDDI (pc, 2); | |
696 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
697 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
698 | } | |
699 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
700 | { |
701 | { | |
702 | UDI opval = ADDDI (EXTSIDI (GET_H_GRC (FLD (f_rn))), ADDDI (pc, 4)); | |
703 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
704 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
705 | } | |
c7e628df | 706 | } |
cbb38b47 BE |
707 | } |
708 | ||
709 | SEM_BRANCH_FINI (vpc); | |
710 | #undef FLD | |
711 | } | |
712 | NEXT (vpc); | |
713 | ||
714 | CASE (sem, INSN_BRK_COMPACT) : /* brk */ | |
715 | { | |
716 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
717 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 718 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
719 | int UNUSED written = 0; |
720 | IADDR UNUSED pc = abuf->addr; | |
721 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
722 | ||
723 | sh64_break (current_cpu, pc); | |
724 | ||
725 | #undef FLD | |
726 | } | |
727 | NEXT (vpc); | |
728 | ||
729 | CASE (sem, INSN_BSR_COMPACT) : /* bsr $disp12 */ | |
730 | { | |
731 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
732 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
733 | #define FLD(f) abuf->fields.sfmt_bra_compact.f | |
734 | int UNUSED written = 0; | |
735 | IADDR UNUSED pc = abuf->addr; | |
736 | SEM_BRANCH_INIT | |
737 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
738 | ||
739 | { | |
740 | { | |
741 | { | |
742 | SI opval = ADDDI (pc, 4); | |
743 | SET_H_PR (opval); | |
744 | TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); | |
745 | } | |
c7e628df DB |
746 | } |
747 | { | |
748 | UDI opval = ADDDI (pc, 2); | |
749 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
750 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
751 | } | |
752 | ((void) 0); /*nop*/ | |
753 | { | |
cbb38b47 BE |
754 | { |
755 | UDI opval = FLD (i_disp12); | |
756 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
757 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
758 | } | |
759 | } | |
760 | } | |
761 | ||
762 | SEM_BRANCH_FINI (vpc); | |
763 | #undef FLD | |
764 | } | |
765 | NEXT (vpc); | |
766 | ||
767 | CASE (sem, INSN_BSRF_COMPACT) : /* bsrf $rn */ | |
768 | { | |
769 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
770 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
771 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
772 | int UNUSED written = 0; | |
773 | IADDR UNUSED pc = abuf->addr; | |
774 | SEM_BRANCH_INIT | |
775 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
776 | ||
777 | { | |
778 | { | |
779 | { | |
780 | SI opval = ADDDI (pc, 4); | |
781 | SET_H_PR (opval); | |
782 | TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); | |
783 | } | |
c7e628df DB |
784 | } |
785 | { | |
786 | UDI opval = ADDDI (pc, 2); | |
787 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
788 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
789 | } | |
790 | ((void) 0); /*nop*/ | |
791 | { | |
cbb38b47 BE |
792 | { |
793 | UDI opval = ADDDI (EXTSIDI (GET_H_GRC (FLD (f_rn))), ADDDI (pc, 4)); | |
794 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
795 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
796 | } | |
797 | } | |
798 | } | |
799 | ||
800 | SEM_BRANCH_FINI (vpc); | |
801 | #undef FLD | |
802 | } | |
803 | NEXT (vpc); | |
804 | ||
805 | CASE (sem, INSN_BT_COMPACT) : /* bt $disp8 */ | |
806 | { | |
807 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
808 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
809 | #define FLD(f) abuf->fields.sfmt_bf_compact.f | |
810 | int UNUSED written = 0; | |
811 | IADDR UNUSED pc = abuf->addr; | |
812 | SEM_BRANCH_INIT | |
813 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
814 | ||
815 | if (GET_H_TBIT ()) { | |
816 | { | |
817 | UDI opval = FLD (i_disp8); | |
818 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
819 | written |= (1 << 2); | |
820 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
821 | } | |
822 | } | |
823 | ||
824 | abuf->written = written; | |
825 | SEM_BRANCH_FINI (vpc); | |
826 | #undef FLD | |
827 | } | |
828 | NEXT (vpc); | |
829 | ||
830 | CASE (sem, INSN_BTS_COMPACT) : /* bt/s $disp8 */ | |
831 | { | |
832 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
833 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
834 | #define FLD(f) abuf->fields.sfmt_bf_compact.f | |
835 | int UNUSED written = 0; | |
836 | IADDR UNUSED pc = abuf->addr; | |
837 | SEM_BRANCH_INIT | |
838 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
839 | ||
840 | if (GET_H_TBIT ()) { | |
c7e628df DB |
841 | { |
842 | { | |
843 | UDI opval = ADDDI (pc, 2); | |
844 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
845 | written |= (1 << 3); | |
846 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
847 | } | |
848 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
849 | { |
850 | { | |
851 | UDI opval = FLD (i_disp8); | |
852 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
c7e628df | 853 | written |= (1 << 3); |
cbb38b47 BE |
854 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); |
855 | } | |
856 | } | |
c7e628df | 857 | } |
cbb38b47 BE |
858 | } |
859 | ||
860 | abuf->written = written; | |
861 | SEM_BRANCH_FINI (vpc); | |
862 | #undef FLD | |
863 | } | |
864 | NEXT (vpc); | |
865 | ||
866 | CASE (sem, INSN_CLRMAC_COMPACT) : /* clrmac */ | |
867 | { | |
868 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
869 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 870 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
871 | int UNUSED written = 0; |
872 | IADDR UNUSED pc = abuf->addr; | |
873 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
874 | ||
875 | { | |
876 | { | |
877 | SI opval = 0; | |
878 | SET_H_MACL (opval); | |
879 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
880 | } | |
881 | { | |
882 | SI opval = 0; | |
883 | SET_H_MACH (opval); | |
884 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
885 | } | |
886 | } | |
887 | ||
888 | #undef FLD | |
889 | } | |
890 | NEXT (vpc); | |
891 | ||
892 | CASE (sem, INSN_CLRS_COMPACT) : /* clrs */ | |
893 | { | |
894 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
895 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 896 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
897 | int UNUSED written = 0; |
898 | IADDR UNUSED pc = abuf->addr; | |
899 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
900 | ||
901 | { | |
902 | BI opval = 0; | |
903 | SET_H_SBIT (opval); | |
904 | TRACE_RESULT (current_cpu, abuf, "sbit", 'x', opval); | |
905 | } | |
906 | ||
907 | #undef FLD | |
908 | } | |
909 | NEXT (vpc); | |
910 | ||
911 | CASE (sem, INSN_CLRT_COMPACT) : /* clrt */ | |
912 | { | |
913 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
914 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 915 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
916 | int UNUSED written = 0; |
917 | IADDR UNUSED pc = abuf->addr; | |
918 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
919 | ||
920 | { | |
921 | BI opval = 0; | |
922 | SET_H_TBIT (opval); | |
923 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
924 | } | |
925 | ||
926 | #undef FLD | |
927 | } | |
928 | NEXT (vpc); | |
929 | ||
930 | CASE (sem, INSN_CMPEQ_COMPACT) : /* cmp/eq $rm, $rn */ | |
931 | { | |
932 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
933 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 934 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
935 | int UNUSED written = 0; |
936 | IADDR UNUSED pc = abuf->addr; | |
937 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
938 | ||
939 | { | |
940 | BI opval = EQSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); | |
941 | SET_H_TBIT (opval); | |
942 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
943 | } | |
944 | ||
945 | #undef FLD | |
946 | } | |
947 | NEXT (vpc); | |
948 | ||
949 | CASE (sem, INSN_CMPEQI_COMPACT) : /* cmp/eq #$imm8, r0 */ | |
950 | { | |
951 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
952 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
953 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
954 | int UNUSED written = 0; | |
955 | IADDR UNUSED pc = abuf->addr; | |
956 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
957 | ||
958 | { | |
959 | BI opval = EQSI (GET_H_GRC (((UINT) 0)), EXTQISI (ANDQI (FLD (f_imm8), 255))); | |
960 | SET_H_TBIT (opval); | |
961 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
962 | } | |
963 | ||
964 | #undef FLD | |
965 | } | |
966 | NEXT (vpc); | |
967 | ||
968 | CASE (sem, INSN_CMPGE_COMPACT) : /* cmp/ge $rm, $rn */ | |
969 | { | |
970 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
971 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 972 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
973 | int UNUSED written = 0; |
974 | IADDR UNUSED pc = abuf->addr; | |
975 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
976 | ||
977 | { | |
978 | BI opval = GESI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
979 | SET_H_TBIT (opval); | |
980 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
981 | } | |
982 | ||
983 | #undef FLD | |
984 | } | |
985 | NEXT (vpc); | |
986 | ||
987 | CASE (sem, INSN_CMPGT_COMPACT) : /* cmp/gt $rm, $rn */ | |
988 | { | |
989 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
990 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 991 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
992 | int UNUSED written = 0; |
993 | IADDR UNUSED pc = abuf->addr; | |
994 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
995 | ||
996 | { | |
997 | BI opval = GTSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
998 | SET_H_TBIT (opval); | |
999 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1000 | } | |
1001 | ||
1002 | #undef FLD | |
1003 | } | |
1004 | NEXT (vpc); | |
1005 | ||
1006 | CASE (sem, INSN_CMPHI_COMPACT) : /* cmp/hi $rm, $rn */ | |
1007 | { | |
1008 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1009 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1010 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1011 | int UNUSED written = 0; |
1012 | IADDR UNUSED pc = abuf->addr; | |
1013 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1014 | ||
1015 | { | |
1016 | BI opval = GTUSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
1017 | SET_H_TBIT (opval); | |
1018 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1019 | } | |
1020 | ||
1021 | #undef FLD | |
1022 | } | |
1023 | NEXT (vpc); | |
1024 | ||
1025 | CASE (sem, INSN_CMPHS_COMPACT) : /* cmp/hs $rm, $rn */ | |
1026 | { | |
1027 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1028 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1029 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1030 | int UNUSED written = 0; |
1031 | IADDR UNUSED pc = abuf->addr; | |
1032 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1033 | ||
1034 | { | |
1035 | BI opval = GEUSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
1036 | SET_H_TBIT (opval); | |
1037 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1038 | } | |
1039 | ||
1040 | #undef FLD | |
1041 | } | |
1042 | NEXT (vpc); | |
1043 | ||
1044 | CASE (sem, INSN_CMPPL_COMPACT) : /* cmp/pl $rn */ | |
1045 | { | |
1046 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1047 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1048 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1049 | int UNUSED written = 0; | |
1050 | IADDR UNUSED pc = abuf->addr; | |
1051 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1052 | ||
1053 | { | |
1054 | BI opval = GTSI (GET_H_GRC (FLD (f_rn)), 0); | |
1055 | SET_H_TBIT (opval); | |
1056 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1057 | } | |
1058 | ||
1059 | #undef FLD | |
1060 | } | |
1061 | NEXT (vpc); | |
1062 | ||
1063 | CASE (sem, INSN_CMPPZ_COMPACT) : /* cmp/pz $rn */ | |
1064 | { | |
1065 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1066 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1067 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1068 | int UNUSED written = 0; | |
1069 | IADDR UNUSED pc = abuf->addr; | |
1070 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1071 | ||
1072 | { | |
1073 | BI opval = GESI (GET_H_GRC (FLD (f_rn)), 0); | |
1074 | SET_H_TBIT (opval); | |
1075 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1076 | } | |
1077 | ||
1078 | #undef FLD | |
1079 | } | |
1080 | NEXT (vpc); | |
1081 | ||
1082 | CASE (sem, INSN_CMPSTR_COMPACT) : /* cmp/str $rm, $rn */ | |
1083 | { | |
1084 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1085 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1086 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1087 | int UNUSED written = 0; |
1088 | IADDR UNUSED pc = abuf->addr; | |
1089 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1090 | ||
1091 | { | |
1092 | BI tmp_t; | |
1093 | SI tmp_temp; | |
1094 | tmp_temp = XORSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); | |
1095 | tmp_t = EQSI (ANDSI (tmp_temp, 0xff000000), 0); | |
1096 | tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 16711680), 0), tmp_t); | |
1097 | tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 65280), 0), tmp_t); | |
1098 | tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 255), 0), tmp_t); | |
1099 | { | |
1100 | BI opval = ((GTUBI (tmp_t, 0)) ? (1) : (0)); | |
1101 | SET_H_TBIT (opval); | |
1102 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1103 | } | |
1104 | } | |
1105 | ||
1106 | #undef FLD | |
1107 | } | |
1108 | NEXT (vpc); | |
1109 | ||
1110 | CASE (sem, INSN_DIV0S_COMPACT) : /* div0s $rm, $rn */ | |
1111 | { | |
1112 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1113 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1114 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1115 | int UNUSED written = 0; |
1116 | IADDR UNUSED pc = abuf->addr; | |
1117 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1118 | ||
1119 | { | |
1120 | { | |
1121 | BI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
1122 | SET_H_QBIT (opval); | |
1123 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1124 | } | |
1125 | { | |
1126 | BI opval = SRLSI (GET_H_GRC (FLD (f_rm)), 31); | |
1127 | SET_H_MBIT (opval); | |
1128 | TRACE_RESULT (current_cpu, abuf, "mbit", 'x', opval); | |
1129 | } | |
1130 | { | |
1131 | BI opval = ((EQSI (SRLSI (GET_H_GRC (FLD (f_rm)), 31), SRLSI (GET_H_GRC (FLD (f_rn)), 31))) ? (0) : (1)); | |
1132 | SET_H_TBIT (opval); | |
1133 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1134 | } | |
1135 | } | |
1136 | ||
1137 | #undef FLD | |
1138 | } | |
1139 | NEXT (vpc); | |
1140 | ||
1141 | CASE (sem, INSN_DIV0U_COMPACT) : /* div0u */ | |
1142 | { | |
1143 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1144 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 1145 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
1146 | int UNUSED written = 0; |
1147 | IADDR UNUSED pc = abuf->addr; | |
1148 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1149 | ||
1150 | { | |
1151 | { | |
1152 | BI opval = 0; | |
1153 | SET_H_TBIT (opval); | |
1154 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1155 | } | |
1156 | { | |
1157 | BI opval = 0; | |
1158 | SET_H_QBIT (opval); | |
1159 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1160 | } | |
1161 | { | |
1162 | BI opval = 0; | |
1163 | SET_H_MBIT (opval); | |
1164 | TRACE_RESULT (current_cpu, abuf, "mbit", 'x', opval); | |
1165 | } | |
1166 | } | |
1167 | ||
1168 | #undef FLD | |
1169 | } | |
1170 | NEXT (vpc); | |
1171 | ||
1172 | CASE (sem, INSN_DIV1_COMPACT) : /* div1 $rm, $rn */ | |
1173 | { | |
1174 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1175 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1176 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1177 | int UNUSED written = 0; |
1178 | IADDR UNUSED pc = abuf->addr; | |
1179 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1180 | ||
1181 | { | |
1182 | BI tmp_oldq; | |
1183 | SI tmp_tmp0; | |
1184 | UQI tmp_tmp1; | |
1185 | tmp_oldq = GET_H_QBIT (); | |
1186 | { | |
1187 | BI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
1188 | SET_H_QBIT (opval); | |
1189 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1190 | } | |
1191 | { | |
1192 | SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), ZEXTBISI (GET_H_TBIT ())); | |
1193 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1194 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1195 | } |
1196 | if (NOTBI (tmp_oldq)) { | |
1197 | if (NOTBI (GET_H_MBIT ())) { | |
1198 | { | |
1199 | tmp_tmp0 = GET_H_GRC (FLD (f_rn)); | |
1200 | { | |
1201 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
1202 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1203 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1204 | } |
1205 | tmp_tmp1 = GTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); | |
1206 | if (NOTBI (GET_H_QBIT ())) { | |
1207 | { | |
1208 | BI opval = ((tmp_tmp1) ? (1) : (0)); | |
1209 | SET_H_QBIT (opval); | |
1210 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1211 | } | |
1212 | } else { | |
1213 | { | |
1214 | BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); | |
1215 | SET_H_QBIT (opval); | |
1216 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1217 | } | |
1218 | } | |
1219 | } | |
1220 | } else { | |
1221 | { | |
1222 | tmp_tmp0 = GET_H_GRC (FLD (f_rn)); | |
1223 | { | |
1224 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
1225 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1226 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1227 | } |
1228 | tmp_tmp1 = LTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); | |
1229 | if (NOTBI (GET_H_QBIT ())) { | |
1230 | { | |
1231 | BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); | |
1232 | SET_H_QBIT (opval); | |
1233 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1234 | } | |
1235 | } else { | |
1236 | { | |
1237 | BI opval = ((tmp_tmp1) ? (1) : (0)); | |
1238 | SET_H_QBIT (opval); | |
1239 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1240 | } | |
1241 | } | |
1242 | } | |
1243 | } | |
1244 | } else { | |
1245 | if (NOTBI (GET_H_MBIT ())) { | |
1246 | { | |
1247 | tmp_tmp0 = GET_H_GRC (FLD (f_rn)); | |
1248 | { | |
1249 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); | |
1250 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1251 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1252 | } |
1253 | tmp_tmp1 = LTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); | |
1254 | if (NOTBI (GET_H_QBIT ())) { | |
1255 | { | |
1256 | BI opval = ((tmp_tmp1) ? (1) : (0)); | |
1257 | SET_H_QBIT (opval); | |
1258 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1259 | } | |
1260 | } else { | |
1261 | { | |
1262 | BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); | |
1263 | SET_H_QBIT (opval); | |
1264 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1265 | } | |
1266 | } | |
1267 | } | |
1268 | } else { | |
1269 | { | |
1270 | tmp_tmp0 = GET_H_GRC (FLD (f_rn)); | |
1271 | { | |
1272 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
1273 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1274 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1275 | } |
1276 | tmp_tmp1 = GTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); | |
1277 | if (NOTBI (GET_H_QBIT ())) { | |
1278 | { | |
1279 | BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); | |
1280 | SET_H_QBIT (opval); | |
1281 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1282 | } | |
1283 | } else { | |
1284 | { | |
1285 | BI opval = ((tmp_tmp1) ? (1) : (0)); | |
1286 | SET_H_QBIT (opval); | |
1287 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1288 | } | |
1289 | } | |
1290 | } | |
1291 | } | |
1292 | } | |
1293 | { | |
1294 | BI opval = ((EQBI (GET_H_QBIT (), GET_H_MBIT ())) ? (1) : (0)); | |
1295 | SET_H_TBIT (opval); | |
1296 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1297 | } | |
1298 | } | |
1299 | ||
c7e628df DB |
1300 | #undef FLD |
1301 | } | |
1302 | NEXT (vpc); | |
1303 | ||
1304 | CASE (sem, INSN_DIVU_COMPACT) : /* divu r0, $rn */ | |
1305 | { | |
1306 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1307 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1308 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1309 | int UNUSED written = 0; | |
1310 | IADDR UNUSED pc = abuf->addr; | |
1311 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1312 | ||
1313 | { | |
1314 | SI opval = UDIVSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (((UINT) 0))); | |
1315 | SET_H_GRC (FLD (f_rn), opval); | |
1316 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
1317 | } | |
1318 | ||
1319 | #undef FLD | |
1320 | } | |
1321 | NEXT (vpc); | |
1322 | ||
1323 | CASE (sem, INSN_MULR_COMPACT) : /* mulr r0, $rn */ | |
1324 | { | |
1325 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1326 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1327 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1328 | int UNUSED written = 0; | |
1329 | IADDR UNUSED pc = abuf->addr; | |
1330 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1331 | ||
1332 | { | |
1333 | SI opval = MULSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (((UINT) 0))); | |
1334 | SET_H_GRC (FLD (f_rn), opval); | |
1335 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
1336 | } | |
1337 | ||
cbb38b47 BE |
1338 | #undef FLD |
1339 | } | |
1340 | NEXT (vpc); | |
1341 | ||
1342 | CASE (sem, INSN_DMULSL_COMPACT) : /* dmuls.l $rm, $rn */ | |
1343 | { | |
1344 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1345 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1346 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1347 | int UNUSED written = 0; |
1348 | IADDR UNUSED pc = abuf->addr; | |
1349 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1350 | ||
1351 | { | |
1352 | DI tmp_result; | |
1353 | tmp_result = MULDI (EXTSIDI (GET_H_GRC (FLD (f_rm))), EXTSIDI (GET_H_GRC (FLD (f_rn)))); | |
1354 | { | |
1355 | SI opval = SUBWORDDISI (tmp_result, 0); | |
1356 | SET_H_MACH (opval); | |
1357 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
1358 | } | |
1359 | { | |
1360 | SI opval = SUBWORDDISI (tmp_result, 1); | |
1361 | SET_H_MACL (opval); | |
1362 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
1363 | } | |
1364 | } | |
1365 | ||
1366 | #undef FLD | |
1367 | } | |
1368 | NEXT (vpc); | |
1369 | ||
1370 | CASE (sem, INSN_DMULUL_COMPACT) : /* dmulu.l $rm, $rn */ | |
1371 | { | |
1372 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1373 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1374 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1375 | int UNUSED written = 0; |
1376 | IADDR UNUSED pc = abuf->addr; | |
1377 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1378 | ||
1379 | { | |
1380 | DI tmp_result; | |
1381 | tmp_result = MULDI (ZEXTSIDI (GET_H_GRC (FLD (f_rm))), ZEXTSIDI (GET_H_GRC (FLD (f_rn)))); | |
1382 | { | |
1383 | SI opval = SUBWORDDISI (tmp_result, 0); | |
1384 | SET_H_MACH (opval); | |
1385 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
1386 | } | |
1387 | { | |
1388 | SI opval = SUBWORDDISI (tmp_result, 1); | |
1389 | SET_H_MACL (opval); | |
1390 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
1391 | } | |
1392 | } | |
1393 | ||
1394 | #undef FLD | |
1395 | } | |
1396 | NEXT (vpc); | |
1397 | ||
1398 | CASE (sem, INSN_DT_COMPACT) : /* dt $rn */ | |
1399 | { | |
1400 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1401 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1402 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1403 | int UNUSED written = 0; | |
1404 | IADDR UNUSED pc = abuf->addr; | |
1405 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1406 | ||
1407 | { | |
1408 | { | |
1409 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 1); | |
1410 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1411 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1412 | } |
1413 | { | |
1414 | BI opval = EQSI (GET_H_GRC (FLD (f_rn)), 0); | |
1415 | SET_H_TBIT (opval); | |
1416 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1417 | } | |
1418 | } | |
1419 | ||
1420 | #undef FLD | |
1421 | } | |
1422 | NEXT (vpc); | |
1423 | ||
1424 | CASE (sem, INSN_EXTSB_COMPACT) : /* exts.b $rm, $rn */ | |
1425 | { | |
1426 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1427 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1428 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1429 | int UNUSED written = 0; |
1430 | IADDR UNUSED pc = abuf->addr; | |
1431 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1432 | ||
1433 | { | |
1434 | SI opval = EXTQISI (SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3)); | |
1435 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1436 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1437 | } |
1438 | ||
1439 | #undef FLD | |
1440 | } | |
1441 | NEXT (vpc); | |
1442 | ||
1443 | CASE (sem, INSN_EXTSW_COMPACT) : /* exts.w $rm, $rn */ | |
1444 | { | |
1445 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1446 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1447 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1448 | int UNUSED written = 0; |
1449 | IADDR UNUSED pc = abuf->addr; | |
1450 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1451 | ||
1452 | { | |
1453 | SI opval = EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)); | |
1454 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1455 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1456 | } |
1457 | ||
1458 | #undef FLD | |
1459 | } | |
1460 | NEXT (vpc); | |
1461 | ||
1462 | CASE (sem, INSN_EXTUB_COMPACT) : /* extu.b $rm, $rn */ | |
1463 | { | |
1464 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1465 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1466 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1467 | int UNUSED written = 0; |
1468 | IADDR UNUSED pc = abuf->addr; | |
1469 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1470 | ||
1471 | { | |
1472 | SI opval = ZEXTQISI (SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3)); | |
1473 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1474 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1475 | } |
1476 | ||
1477 | #undef FLD | |
1478 | } | |
1479 | NEXT (vpc); | |
1480 | ||
1481 | CASE (sem, INSN_EXTUW_COMPACT) : /* extu.w $rm, $rn */ | |
1482 | { | |
1483 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1484 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1485 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1486 | int UNUSED written = 0; |
1487 | IADDR UNUSED pc = abuf->addr; | |
1488 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1489 | ||
1490 | { | |
1491 | SI opval = ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)); | |
1492 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1493 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1494 | } |
1495 | ||
1496 | #undef FLD | |
1497 | } | |
1498 | NEXT (vpc); | |
1499 | ||
1500 | CASE (sem, INSN_FABS_COMPACT) : /* fabs $fsdn */ | |
1501 | { | |
1502 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1503 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1504 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1505 | int UNUSED written = 0; | |
1506 | IADDR UNUSED pc = abuf->addr; | |
1507 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1508 | ||
1509 | if (GET_H_PRBIT ()) { | |
1510 | { | |
c7e628df DB |
1511 | DF opval = sh64_fabsd (current_cpu, GET_H_FSD (FLD (f_rn))); |
1512 | SET_H_FSD (FLD (f_rn), opval); | |
1513 | written |= (1 << 2); | |
1514 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1515 | } |
1516 | } else { | |
1517 | { | |
c7e628df DB |
1518 | DF opval = sh64_fabss (current_cpu, GET_H_FSD (FLD (f_rn))); |
1519 | SET_H_FSD (FLD (f_rn), opval); | |
1520 | written |= (1 << 2); | |
1521 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1522 | } |
1523 | } | |
1524 | ||
1525 | abuf->written = written; | |
1526 | #undef FLD | |
1527 | } | |
1528 | NEXT (vpc); | |
1529 | ||
1530 | CASE (sem, INSN_FADD_COMPACT) : /* fadd $fsdm, $fsdn */ | |
1531 | { | |
1532 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1533 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1534 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1535 | int UNUSED written = 0; |
1536 | IADDR UNUSED pc = abuf->addr; | |
1537 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1538 | ||
1539 | if (GET_H_PRBIT ()) { | |
1540 | { | |
c7e628df DB |
1541 | DF opval = sh64_faddd (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
1542 | SET_H_FSD (FLD (f_rn), opval); | |
1543 | written |= (1 << 3); | |
1544 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1545 | } |
1546 | } else { | |
1547 | { | |
c7e628df DB |
1548 | DF opval = sh64_fadds (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
1549 | SET_H_FSD (FLD (f_rn), opval); | |
1550 | written |= (1 << 3); | |
1551 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1552 | } |
1553 | } | |
1554 | ||
1555 | abuf->written = written; | |
1556 | #undef FLD | |
1557 | } | |
1558 | NEXT (vpc); | |
1559 | ||
1560 | CASE (sem, INSN_FCMPEQ_COMPACT) : /* fcmp/eq $fsdm, $fsdn */ | |
1561 | { | |
1562 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1563 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1564 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1565 | int UNUSED written = 0; |
1566 | IADDR UNUSED pc = abuf->addr; | |
1567 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1568 | ||
1569 | if (GET_H_PRBIT ()) { | |
1570 | { | |
c7e628df | 1571 | BI opval = sh64_fcmpeqd (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
cbb38b47 | 1572 | SET_H_TBIT (opval); |
c7e628df | 1573 | written |= (1 << 3); |
cbb38b47 BE |
1574 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); |
1575 | } | |
1576 | } else { | |
1577 | { | |
c7e628df | 1578 | BI opval = sh64_fcmpeqs (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
cbb38b47 | 1579 | SET_H_TBIT (opval); |
c7e628df | 1580 | written |= (1 << 3); |
cbb38b47 BE |
1581 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); |
1582 | } | |
1583 | } | |
1584 | ||
1585 | abuf->written = written; | |
1586 | #undef FLD | |
1587 | } | |
1588 | NEXT (vpc); | |
1589 | ||
1590 | CASE (sem, INSN_FCMPGT_COMPACT) : /* fcmp/gt $fsdm, $fsdn */ | |
1591 | { | |
1592 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1593 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1594 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1595 | int UNUSED written = 0; |
1596 | IADDR UNUSED pc = abuf->addr; | |
1597 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1598 | ||
1599 | if (GET_H_PRBIT ()) { | |
1600 | { | |
c7e628df | 1601 | BI opval = sh64_fcmpgtd (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
cbb38b47 | 1602 | SET_H_TBIT (opval); |
c7e628df | 1603 | written |= (1 << 3); |
cbb38b47 BE |
1604 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); |
1605 | } | |
1606 | } else { | |
1607 | { | |
c7e628df | 1608 | BI opval = sh64_fcmpgts (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
cbb38b47 | 1609 | SET_H_TBIT (opval); |
c7e628df | 1610 | written |= (1 << 3); |
cbb38b47 BE |
1611 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); |
1612 | } | |
1613 | } | |
1614 | ||
1615 | abuf->written = written; | |
1616 | #undef FLD | |
1617 | } | |
1618 | NEXT (vpc); | |
1619 | ||
1620 | CASE (sem, INSN_FCNVDS_COMPACT) : /* fcnvds $drn, fpul */ | |
1621 | { | |
1622 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1623 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1624 | #define FLD(f) abuf->fields.sfmt_fmov8_compact.f |
cbb38b47 BE |
1625 | int UNUSED written = 0; |
1626 | IADDR UNUSED pc = abuf->addr; | |
1627 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1628 | ||
1629 | { | |
1630 | SF opval = sh64_fcnvds (current_cpu, GET_H_DRC (FLD (f_dn))); | |
1631 | CPU (h_fr[((UINT) 32)]) = opval; | |
c7e628df | 1632 | TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); |
cbb38b47 BE |
1633 | } |
1634 | ||
1635 | #undef FLD | |
1636 | } | |
1637 | NEXT (vpc); | |
1638 | ||
1639 | CASE (sem, INSN_FCNVSD_COMPACT) : /* fcnvsd fpul, $drn */ | |
1640 | { | |
1641 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1642 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1643 | #define FLD(f) abuf->fields.sfmt_fmov8_compact.f |
cbb38b47 BE |
1644 | int UNUSED written = 0; |
1645 | IADDR UNUSED pc = abuf->addr; | |
1646 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1647 | ||
1648 | { | |
1649 | DF opval = sh64_fcnvsd (current_cpu, CPU (h_fr[((UINT) 32)])); | |
1650 | SET_H_DRC (FLD (f_dn), opval); | |
c7e628df | 1651 | TRACE_RESULT (current_cpu, abuf, "drc", 'f', opval); |
cbb38b47 BE |
1652 | } |
1653 | ||
1654 | #undef FLD | |
1655 | } | |
1656 | NEXT (vpc); | |
1657 | ||
1658 | CASE (sem, INSN_FDIV_COMPACT) : /* fdiv $fsdm, $fsdn */ | |
1659 | { | |
1660 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1661 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1662 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1663 | int UNUSED written = 0; |
1664 | IADDR UNUSED pc = abuf->addr; | |
1665 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1666 | ||
1667 | if (GET_H_PRBIT ()) { | |
1668 | { | |
c7e628df DB |
1669 | DF opval = sh64_fdivd (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
1670 | SET_H_FSD (FLD (f_rn), opval); | |
1671 | written |= (1 << 3); | |
1672 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1673 | } |
1674 | } else { | |
1675 | { | |
c7e628df DB |
1676 | DF opval = sh64_fdivs (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
1677 | SET_H_FSD (FLD (f_rn), opval); | |
1678 | written |= (1 << 3); | |
1679 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1680 | } |
1681 | } | |
1682 | ||
1683 | abuf->written = written; | |
1684 | #undef FLD | |
1685 | } | |
1686 | NEXT (vpc); | |
1687 | ||
1688 | CASE (sem, INSN_FIPR_COMPACT) : /* fipr $fvm, $fvn */ | |
1689 | { | |
1690 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1691 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1692 | #define FLD(f) abuf->fields.sfmt_fipr_compact.f | |
1693 | int UNUSED written = 0; | |
1694 | IADDR UNUSED pc = abuf->addr; | |
1695 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1696 | ||
c7e628df | 1697 | sh64_fipr (current_cpu, FLD (f_vm), FLD (f_vn)); |
cbb38b47 BE |
1698 | |
1699 | #undef FLD | |
1700 | } | |
1701 | NEXT (vpc); | |
1702 | ||
c7e628df | 1703 | CASE (sem, INSN_FLDS_COMPACT) : /* flds $frn, fpul */ |
cbb38b47 BE |
1704 | { |
1705 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1706 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1707 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1708 | int UNUSED written = 0; | |
1709 | IADDR UNUSED pc = abuf->addr; | |
1710 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1711 | ||
1712 | { | |
1713 | SF opval = GET_H_FRC (FLD (f_rn)); | |
1714 | CPU (h_fr[((UINT) 32)]) = opval; | |
c7e628df | 1715 | TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); |
cbb38b47 BE |
1716 | } |
1717 | ||
1718 | #undef FLD | |
1719 | } | |
1720 | NEXT (vpc); | |
1721 | ||
1722 | CASE (sem, INSN_FLDI0_COMPACT) : /* fldi0 $frn */ | |
1723 | { | |
1724 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1725 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1726 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1727 | int UNUSED written = 0; | |
1728 | IADDR UNUSED pc = abuf->addr; | |
1729 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1730 | ||
1731 | { | |
1732 | SF opval = sh64_fldi0 (current_cpu); | |
1733 | SET_H_FRC (FLD (f_rn), opval); | |
c7e628df | 1734 | TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); |
cbb38b47 BE |
1735 | } |
1736 | ||
1737 | #undef FLD | |
1738 | } | |
1739 | NEXT (vpc); | |
1740 | ||
1741 | CASE (sem, INSN_FLDI1_COMPACT) : /* fldi1 $frn */ | |
1742 | { | |
1743 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1744 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1745 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1746 | int UNUSED written = 0; | |
1747 | IADDR UNUSED pc = abuf->addr; | |
1748 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1749 | ||
1750 | { | |
1751 | SF opval = sh64_fldi1 (current_cpu); | |
1752 | SET_H_FRC (FLD (f_rn), opval); | |
c7e628df | 1753 | TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); |
cbb38b47 BE |
1754 | } |
1755 | ||
1756 | #undef FLD | |
1757 | } | |
1758 | NEXT (vpc); | |
1759 | ||
1760 | CASE (sem, INSN_FLOAT_COMPACT) : /* float fpul, $fsdn */ | |
1761 | { | |
1762 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1763 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1764 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1765 | int UNUSED written = 0; | |
1766 | IADDR UNUSED pc = abuf->addr; | |
1767 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1768 | ||
1769 | if (GET_H_PRBIT ()) { | |
1770 | { | |
1771 | DF opval = sh64_floatld (current_cpu, CPU (h_fr[((UINT) 32)])); | |
c7e628df DB |
1772 | SET_H_FSD (FLD (f_rn), opval); |
1773 | written |= (1 << 2); | |
1774 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1775 | } |
1776 | } else { | |
1777 | { | |
c7e628df DB |
1778 | DF opval = sh64_floatls (current_cpu, CPU (h_fr[((UINT) 32)])); |
1779 | SET_H_FSD (FLD (f_rn), opval); | |
1780 | written |= (1 << 2); | |
1781 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1782 | } |
1783 | } | |
1784 | ||
1785 | abuf->written = written; | |
1786 | #undef FLD | |
1787 | } | |
1788 | NEXT (vpc); | |
1789 | ||
1790 | CASE (sem, INSN_FMAC_COMPACT) : /* fmac fr0, $frm, $frn */ | |
1791 | { | |
1792 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1793 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1794 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1795 | int UNUSED written = 0; |
1796 | IADDR UNUSED pc = abuf->addr; | |
1797 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1798 | ||
1799 | { | |
1800 | SF opval = sh64_fmacs (current_cpu, GET_H_FRC (((UINT) 0)), GET_H_FRC (FLD (f_rm)), GET_H_FRC (FLD (f_rn))); | |
1801 | SET_H_FRC (FLD (f_rn), opval); | |
c7e628df | 1802 | TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); |
cbb38b47 BE |
1803 | } |
1804 | ||
1805 | #undef FLD | |
1806 | } | |
1807 | NEXT (vpc); | |
1808 | ||
c7e628df | 1809 | CASE (sem, INSN_FMOV1_COMPACT) : /* fmov $fmovm, $fmovn */ |
cbb38b47 BE |
1810 | { |
1811 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1812 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1813 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1814 | int UNUSED written = 0; |
1815 | IADDR UNUSED pc = abuf->addr; | |
1816 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1817 | ||
cbb38b47 | 1818 | { |
c7e628df DB |
1819 | DF opval = GET_H_FMOV (FLD (f_rm)); |
1820 | SET_H_FMOV (FLD (f_rn), opval); | |
1821 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 | 1822 | } |
cbb38b47 | 1823 | |
cbb38b47 BE |
1824 | #undef FLD |
1825 | } | |
1826 | NEXT (vpc); | |
1827 | ||
c7e628df | 1828 | CASE (sem, INSN_FMOV2_COMPACT) : /* fmov @$rm, $fmovn */ |
cbb38b47 BE |
1829 | { |
1830 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1831 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1832 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1833 | int UNUSED written = 0; |
1834 | IADDR UNUSED pc = abuf->addr; | |
1835 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1836 | ||
1837 | if (NOTBI (GET_H_SZBIT ())) { | |
1838 | { | |
c7e628df DB |
1839 | DF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); |
1840 | SET_H_FMOV (FLD (f_rn), opval); | |
1841 | written |= (1 << 4); | |
1842 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 BE |
1843 | } |
1844 | } else { | |
1845 | { | |
1846 | DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
c7e628df DB |
1847 | SET_H_FMOV (FLD (f_rn), opval); |
1848 | written |= (1 << 4); | |
1849 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 | 1850 | } |
cbb38b47 BE |
1851 | } |
1852 | ||
1853 | abuf->written = written; | |
1854 | #undef FLD | |
1855 | } | |
1856 | NEXT (vpc); | |
1857 | ||
c7e628df | 1858 | CASE (sem, INSN_FMOV3_COMPACT) : /* fmov @${rm}+, fmovn */ |
cbb38b47 BE |
1859 | { |
1860 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1861 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1862 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1863 | int UNUSED written = 0; |
1864 | IADDR UNUSED pc = abuf->addr; | |
1865 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1866 | ||
1867 | if (NOTBI (GET_H_SZBIT ())) { | |
1868 | { | |
1869 | { | |
c7e628df DB |
1870 | DF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); |
1871 | SET_H_FMOV (FLD (f_rn), opval); | |
1872 | written |= (1 << 4); | |
1873 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 BE |
1874 | } |
1875 | { | |
1876 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); | |
1877 | SET_H_GRC (FLD (f_rm), opval); | |
c7e628df DB |
1878 | written |= (1 << 5); |
1879 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
1880 | } |
1881 | } | |
1882 | } else { | |
1883 | { | |
cbb38b47 BE |
1884 | { |
1885 | DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
c7e628df DB |
1886 | SET_H_FMOV (FLD (f_rn), opval); |
1887 | written |= (1 << 4); | |
1888 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 | 1889 | } |
cbb38b47 BE |
1890 | { |
1891 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 8); | |
1892 | SET_H_GRC (FLD (f_rm), opval); | |
c7e628df DB |
1893 | written |= (1 << 5); |
1894 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
1895 | } |
1896 | } | |
1897 | } | |
1898 | ||
1899 | abuf->written = written; | |
1900 | #undef FLD | |
1901 | } | |
1902 | NEXT (vpc); | |
1903 | ||
c7e628df | 1904 | CASE (sem, INSN_FMOV4_COMPACT) : /* fmov @(r0, $rm), $fmovn */ |
cbb38b47 BE |
1905 | { |
1906 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1907 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1908 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1909 | int UNUSED written = 0; |
1910 | IADDR UNUSED pc = abuf->addr; | |
1911 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1912 | ||
1913 | if (NOTBI (GET_H_SZBIT ())) { | |
1914 | { | |
c7e628df DB |
1915 | DF opval = GETMEMSF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); |
1916 | SET_H_FMOV (FLD (f_rn), opval); | |
1917 | written |= (1 << 5); | |
1918 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 BE |
1919 | } |
1920 | } else { | |
1921 | { | |
1922 | DF opval = GETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); | |
c7e628df DB |
1923 | SET_H_FMOV (FLD (f_rn), opval); |
1924 | written |= (1 << 5); | |
1925 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 | 1926 | } |
cbb38b47 BE |
1927 | } |
1928 | ||
1929 | abuf->written = written; | |
1930 | #undef FLD | |
1931 | } | |
1932 | NEXT (vpc); | |
1933 | ||
c7e628df | 1934 | CASE (sem, INSN_FMOV5_COMPACT) : /* fmov $fmovm, @$rn */ |
cbb38b47 BE |
1935 | { |
1936 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1937 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1938 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1939 | int UNUSED written = 0; |
1940 | IADDR UNUSED pc = abuf->addr; | |
1941 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1942 | ||
1943 | if (NOTBI (GET_H_SZBIT ())) { | |
1944 | { | |
c7e628df | 1945 | SF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 1946 | SETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); |
c7e628df | 1947 | written |= (1 << 4); |
cbb38b47 BE |
1948 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
1949 | } | |
1950 | } else { | |
1951 | { | |
c7e628df | 1952 | DF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 1953 | SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); |
c7e628df | 1954 | written |= (1 << 3); |
cbb38b47 BE |
1955 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
1956 | } | |
cbb38b47 BE |
1957 | } |
1958 | ||
1959 | abuf->written = written; | |
1960 | #undef FLD | |
1961 | } | |
1962 | NEXT (vpc); | |
1963 | ||
c7e628df | 1964 | CASE (sem, INSN_FMOV6_COMPACT) : /* fmov $fmovm, @-$rn */ |
cbb38b47 BE |
1965 | { |
1966 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1967 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1968 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1969 | int UNUSED written = 0; |
1970 | IADDR UNUSED pc = abuf->addr; | |
1971 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1972 | ||
1973 | if (NOTBI (GET_H_SZBIT ())) { | |
1974 | { | |
1975 | { | |
1976 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
1977 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
1978 | written |= (1 << 5); |
1979 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
1980 | } |
1981 | { | |
c7e628df | 1982 | SF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 1983 | SETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); |
c7e628df | 1984 | written |= (1 << 4); |
cbb38b47 BE |
1985 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
1986 | } | |
1987 | } | |
1988 | } else { | |
1989 | { | |
1990 | { | |
1991 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 8); | |
1992 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
1993 | written |= (1 << 5); |
1994 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 | 1995 | } |
cbb38b47 | 1996 | { |
c7e628df | 1997 | DF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 1998 | SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); |
c7e628df | 1999 | written |= (1 << 3); |
cbb38b47 BE |
2000 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
2001 | } | |
2002 | } | |
cbb38b47 BE |
2003 | } |
2004 | ||
2005 | abuf->written = written; | |
2006 | #undef FLD | |
2007 | } | |
2008 | NEXT (vpc); | |
2009 | ||
c7e628df | 2010 | CASE (sem, INSN_FMOV7_COMPACT) : /* fmov $fmovm, @(r0, $rn) */ |
cbb38b47 BE |
2011 | { |
2012 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2013 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2014 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2015 | int UNUSED written = 0; |
2016 | IADDR UNUSED pc = abuf->addr; | |
2017 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2018 | ||
2019 | if (NOTBI (GET_H_SZBIT ())) { | |
2020 | { | |
c7e628df | 2021 | SF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 2022 | SETMEMSF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); |
c7e628df | 2023 | written |= (1 << 5); |
cbb38b47 BE |
2024 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
2025 | } | |
2026 | } else { | |
cbb38b47 | 2027 | { |
c7e628df | 2028 | DF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 2029 | SETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); |
c7e628df | 2030 | written |= (1 << 4); |
cbb38b47 BE |
2031 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
2032 | } | |
c7e628df DB |
2033 | } |
2034 | ||
2035 | abuf->written = written; | |
2036 | #undef FLD | |
2037 | } | |
2038 | NEXT (vpc); | |
2039 | ||
2040 | CASE (sem, INSN_FMOV8_COMPACT) : /* fmov.d @($imm12x8, $rm), $drn */ | |
2041 | { | |
2042 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2043 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2044 | #define FLD(f) abuf->fields.sfmt_fmov8_compact.f | |
2045 | int UNUSED written = 0; | |
2046 | IADDR UNUSED pc = abuf->addr; | |
2047 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2048 | ||
cbb38b47 | 2049 | { |
c7e628df DB |
2050 | DF opval = GETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm12x8))); |
2051 | SET_H_DRC (FLD (f_dn), opval); | |
2052 | TRACE_RESULT (current_cpu, abuf, "drc", 'f', opval); | |
cbb38b47 | 2053 | } |
c7e628df DB |
2054 | |
2055 | #undef FLD | |
cbb38b47 | 2056 | } |
c7e628df DB |
2057 | NEXT (vpc); |
2058 | ||
2059 | CASE (sem, INSN_FMOV9_COMPACT) : /* mov.l $drm, @($imm12x8, $rn) */ | |
2060 | { | |
2061 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2062 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2063 | #define FLD(f) abuf->fields.sfmt_fmov9_compact.f | |
2064 | int UNUSED written = 0; | |
2065 | IADDR UNUSED pc = abuf->addr; | |
2066 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2067 | ||
2068 | { | |
2069 | DF opval = GET_H_DRC (FLD (f_dm)); | |
2070 | SETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm12x8)), opval); | |
2071 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); | |
2072 | } | |
cbb38b47 | 2073 | |
cbb38b47 BE |
2074 | #undef FLD |
2075 | } | |
2076 | NEXT (vpc); | |
2077 | ||
2078 | CASE (sem, INSN_FMUL_COMPACT) : /* fmul $fsdm, $fsdn */ | |
2079 | { | |
2080 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2081 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2082 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2083 | int UNUSED written = 0; |
2084 | IADDR UNUSED pc = abuf->addr; | |
2085 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2086 | ||
2087 | if (GET_H_PRBIT ()) { | |
2088 | { | |
c7e628df DB |
2089 | DF opval = sh64_fmuld (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
2090 | SET_H_FSD (FLD (f_rn), opval); | |
2091 | written |= (1 << 3); | |
2092 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2093 | } |
2094 | } else { | |
2095 | { | |
c7e628df DB |
2096 | DF opval = sh64_fmuls (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
2097 | SET_H_FSD (FLD (f_rn), opval); | |
2098 | written |= (1 << 3); | |
2099 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2100 | } |
2101 | } | |
2102 | ||
2103 | abuf->written = written; | |
2104 | #undef FLD | |
2105 | } | |
2106 | NEXT (vpc); | |
2107 | ||
2108 | CASE (sem, INSN_FNEG_COMPACT) : /* fneg $fsdn */ | |
2109 | { | |
2110 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2111 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2112 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2113 | int UNUSED written = 0; | |
2114 | IADDR UNUSED pc = abuf->addr; | |
2115 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2116 | ||
2117 | if (GET_H_PRBIT ()) { | |
2118 | { | |
c7e628df DB |
2119 | DF opval = sh64_fnegd (current_cpu, GET_H_FSD (FLD (f_rn))); |
2120 | SET_H_FSD (FLD (f_rn), opval); | |
2121 | written |= (1 << 2); | |
2122 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2123 | } |
2124 | } else { | |
2125 | { | |
c7e628df DB |
2126 | DF opval = sh64_fnegs (current_cpu, GET_H_FSD (FLD (f_rn))); |
2127 | SET_H_FSD (FLD (f_rn), opval); | |
2128 | written |= (1 << 2); | |
2129 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2130 | } |
2131 | } | |
2132 | ||
2133 | abuf->written = written; | |
2134 | #undef FLD | |
2135 | } | |
2136 | NEXT (vpc); | |
2137 | ||
2138 | CASE (sem, INSN_FRCHG_COMPACT) : /* frchg */ | |
2139 | { | |
2140 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2141 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 2142 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
2143 | int UNUSED written = 0; |
2144 | IADDR UNUSED pc = abuf->addr; | |
2145 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2146 | ||
2147 | { | |
2148 | BI opval = NOTBI (GET_H_FRBIT ()); | |
2149 | SET_H_FRBIT (opval); | |
2150 | TRACE_RESULT (current_cpu, abuf, "frbit", 'x', opval); | |
2151 | } | |
2152 | ||
2153 | #undef FLD | |
2154 | } | |
2155 | NEXT (vpc); | |
2156 | ||
2157 | CASE (sem, INSN_FSCHG_COMPACT) : /* fschg */ | |
2158 | { | |
2159 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2160 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 2161 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
2162 | int UNUSED written = 0; |
2163 | IADDR UNUSED pc = abuf->addr; | |
2164 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2165 | ||
2166 | { | |
2167 | BI opval = NOTBI (GET_H_SZBIT ()); | |
2168 | SET_H_SZBIT (opval); | |
2169 | TRACE_RESULT (current_cpu, abuf, "szbit", 'x', opval); | |
2170 | } | |
2171 | ||
2172 | #undef FLD | |
2173 | } | |
2174 | NEXT (vpc); | |
2175 | ||
2176 | CASE (sem, INSN_FSQRT_COMPACT) : /* fsqrt $fsdn */ | |
2177 | { | |
2178 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2179 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2180 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2181 | int UNUSED written = 0; | |
2182 | IADDR UNUSED pc = abuf->addr; | |
2183 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2184 | ||
2185 | if (GET_H_PRBIT ()) { | |
2186 | { | |
c7e628df DB |
2187 | DF opval = sh64_fsqrtd (current_cpu, GET_H_FSD (FLD (f_rn))); |
2188 | SET_H_FSD (FLD (f_rn), opval); | |
2189 | written |= (1 << 2); | |
2190 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2191 | } |
2192 | } else { | |
2193 | { | |
c7e628df DB |
2194 | DF opval = sh64_fsqrts (current_cpu, GET_H_FSD (FLD (f_rn))); |
2195 | SET_H_FSD (FLD (f_rn), opval); | |
2196 | written |= (1 << 2); | |
2197 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2198 | } |
2199 | } | |
2200 | ||
2201 | abuf->written = written; | |
2202 | #undef FLD | |
2203 | } | |
2204 | NEXT (vpc); | |
2205 | ||
2206 | CASE (sem, INSN_FSTS_COMPACT) : /* fsts fpul, $frn */ | |
2207 | { | |
2208 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2209 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2210 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2211 | int UNUSED written = 0; | |
2212 | IADDR UNUSED pc = abuf->addr; | |
2213 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2214 | ||
2215 | { | |
2216 | SF opval = CPU (h_fr[((UINT) 32)]); | |
2217 | SET_H_FRC (FLD (f_rn), opval); | |
c7e628df | 2218 | TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); |
cbb38b47 BE |
2219 | } |
2220 | ||
2221 | #undef FLD | |
2222 | } | |
2223 | NEXT (vpc); | |
2224 | ||
2225 | CASE (sem, INSN_FSUB_COMPACT) : /* fsub $fsdm, $fsdn */ | |
2226 | { | |
2227 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2228 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2229 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2230 | int UNUSED written = 0; |
2231 | IADDR UNUSED pc = abuf->addr; | |
2232 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2233 | ||
2234 | if (GET_H_PRBIT ()) { | |
2235 | { | |
c7e628df DB |
2236 | DF opval = sh64_fsubd (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
2237 | SET_H_FSD (FLD (f_rn), opval); | |
2238 | written |= (1 << 3); | |
2239 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2240 | } |
2241 | } else { | |
2242 | { | |
c7e628df DB |
2243 | DF opval = sh64_fsubs (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
2244 | SET_H_FSD (FLD (f_rn), opval); | |
2245 | written |= (1 << 3); | |
2246 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2247 | } |
2248 | } | |
2249 | ||
2250 | abuf->written = written; | |
2251 | #undef FLD | |
2252 | } | |
2253 | NEXT (vpc); | |
2254 | ||
2255 | CASE (sem, INSN_FTRC_COMPACT) : /* ftrc $fsdn, fpul */ | |
2256 | { | |
2257 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2258 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2259 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2260 | int UNUSED written = 0; | |
2261 | IADDR UNUSED pc = abuf->addr; | |
2262 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2263 | ||
2264 | { | |
c7e628df | 2265 | SF opval = ((GET_H_PRBIT ()) ? (sh64_ftrcdl (current_cpu, GET_H_FSD (FLD (f_rn)))) : (sh64_ftrcsl (current_cpu, GET_H_FSD (FLD (f_rn))))); |
cbb38b47 | 2266 | CPU (h_fr[((UINT) 32)]) = opval; |
c7e628df | 2267 | TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); |
cbb38b47 BE |
2268 | } |
2269 | ||
2270 | #undef FLD | |
2271 | } | |
2272 | NEXT (vpc); | |
2273 | ||
2274 | CASE (sem, INSN_FTRV_COMPACT) : /* ftrv xmtrx, $fvn */ | |
2275 | { | |
2276 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2277 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2278 | #define FLD(f) abuf->fields.sfmt_fipr_compact.f | |
2279 | int UNUSED written = 0; | |
2280 | IADDR UNUSED pc = abuf->addr; | |
2281 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2282 | ||
c7e628df DB |
2283 | sh64_ftrv (current_cpu, FLD (f_vn)); |
2284 | ||
2285 | #undef FLD | |
2286 | } | |
2287 | NEXT (vpc); | |
2288 | ||
2289 | CASE (sem, INSN_JMP_COMPACT) : /* jmp @$rn */ | |
2290 | { | |
2291 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2292 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2293 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2294 | int UNUSED written = 0; | |
2295 | IADDR UNUSED pc = abuf->addr; | |
2296 | SEM_BRANCH_INIT | |
2297 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2298 | ||
cbb38b47 | 2299 | { |
cbb38b47 | 2300 | { |
c7e628df DB |
2301 | UDI opval = ADDDI (pc, 2); |
2302 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2303 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
cbb38b47 | 2304 | } |
c7e628df DB |
2305 | ((void) 0); /*nop*/ |
2306 | { | |
cbb38b47 | 2307 | { |
c7e628df DB |
2308 | UDI opval = GET_H_GRC (FLD (f_rn)); |
2309 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2310 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
cbb38b47 | 2311 | } |
c7e628df DB |
2312 | } |
2313 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
2314 | } |
2315 | ||
c7e628df | 2316 | SEM_BRANCH_FINI (vpc); |
cbb38b47 BE |
2317 | #undef FLD |
2318 | } | |
2319 | NEXT (vpc); | |
2320 | ||
c7e628df | 2321 | CASE (sem, INSN_JSR_COMPACT) : /* jsr @$rn */ |
cbb38b47 BE |
2322 | { |
2323 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2324 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2325 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2326 | int UNUSED written = 0; | |
2327 | IADDR UNUSED pc = abuf->addr; | |
2328 | SEM_BRANCH_INIT | |
2329 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2330 | ||
c7e628df DB |
2331 | { |
2332 | { | |
2333 | { | |
2334 | SI opval = ADDDI (pc, 4); | |
2335 | SET_H_PR (opval); | |
2336 | TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); | |
2337 | } | |
2338 | } | |
2339 | { | |
2340 | UDI opval = ADDDI (pc, 2); | |
2341 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2342 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2343 | } | |
2344 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
2345 | { |
2346 | { | |
2347 | UDI opval = GET_H_GRC (FLD (f_rn)); | |
2348 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2349 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2350 | } | |
c7e628df DB |
2351 | } |
2352 | ((void) 0); /*nop*/ | |
2353 | } | |
2354 | ||
2355 | SEM_BRANCH_FINI (vpc); | |
2356 | #undef FLD | |
2357 | } | |
2358 | NEXT (vpc); | |
2359 | ||
2360 | CASE (sem, INSN_LDC_GBR_COMPACT) : /* ldc $rn, gbr */ | |
2361 | { | |
2362 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2363 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2364 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2365 | int UNUSED written = 0; | |
2366 | IADDR UNUSED pc = abuf->addr; | |
2367 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2368 | ||
2369 | { | |
2370 | SI opval = GET_H_GRC (FLD (f_rn)); | |
2371 | SET_H_GBR (opval); | |
2372 | TRACE_RESULT (current_cpu, abuf, "gbr", 'x', opval); | |
2373 | } | |
2374 | ||
2375 | #undef FLD | |
2376 | } | |
2377 | NEXT (vpc); | |
2378 | ||
2379 | CASE (sem, INSN_LDC_VBR_COMPACT) : /* ldc $rn, vbr */ | |
2380 | { | |
2381 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2382 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2383 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2384 | int UNUSED written = 0; | |
2385 | IADDR UNUSED pc = abuf->addr; | |
2386 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2387 | ||
2388 | { | |
2389 | SI opval = GET_H_GRC (FLD (f_rn)); | |
2390 | SET_H_VBR (opval); | |
2391 | TRACE_RESULT (current_cpu, abuf, "vbr", 'x', opval); | |
2392 | } | |
cbb38b47 | 2393 | |
cbb38b47 BE |
2394 | #undef FLD |
2395 | } | |
2396 | NEXT (vpc); | |
2397 | ||
c7e628df | 2398 | CASE (sem, INSN_LDC_SR_COMPACT) : /* ldc $rn, sr */ |
cbb38b47 BE |
2399 | { |
2400 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2401 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2402 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2403 | int UNUSED written = 0; | |
2404 | IADDR UNUSED pc = abuf->addr; | |
cbb38b47 BE |
2405 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
2406 | ||
cbb38b47 | 2407 | { |
c7e628df DB |
2408 | SI opval = GET_H_GRC (FLD (f_rn)); |
2409 | CPU (h_sr) = opval; | |
2410 | TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); | |
cbb38b47 | 2411 | } |
cbb38b47 | 2412 | |
cbb38b47 BE |
2413 | #undef FLD |
2414 | } | |
2415 | NEXT (vpc); | |
2416 | ||
c7e628df | 2417 | CASE (sem, INSN_LDCL_GBR_COMPACT) : /* ldc.l @${rn}+, gbr */ |
cbb38b47 BE |
2418 | { |
2419 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2420 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2421 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2422 | int UNUSED written = 0; | |
2423 | IADDR UNUSED pc = abuf->addr; | |
2424 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2425 | ||
c7e628df | 2426 | { |
cbb38b47 | 2427 | { |
c7e628df | 2428 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); |
cbb38b47 BE |
2429 | SET_H_GBR (opval); |
2430 | TRACE_RESULT (current_cpu, abuf, "gbr", 'x', opval); | |
2431 | } | |
c7e628df DB |
2432 | { |
2433 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2434 | SET_H_GRC (FLD (f_rn), opval); | |
2435 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
2436 | } | |
2437 | } | |
cbb38b47 BE |
2438 | |
2439 | #undef FLD | |
2440 | } | |
2441 | NEXT (vpc); | |
2442 | ||
c7e628df | 2443 | CASE (sem, INSN_LDCL_VBR_COMPACT) : /* ldc.l @${rn}+, vbr */ |
cbb38b47 BE |
2444 | { |
2445 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2446 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2447 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2448 | int UNUSED written = 0; | |
2449 | IADDR UNUSED pc = abuf->addr; | |
2450 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2451 | ||
2452 | { | |
2453 | { | |
2454 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
c7e628df DB |
2455 | SET_H_VBR (opval); |
2456 | TRACE_RESULT (current_cpu, abuf, "vbr", 'x', opval); | |
cbb38b47 BE |
2457 | } |
2458 | { | |
2459 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2460 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2461 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2462 | } |
2463 | } | |
2464 | ||
2465 | #undef FLD | |
2466 | } | |
2467 | NEXT (vpc); | |
2468 | ||
2469 | CASE (sem, INSN_LDS_FPSCR_COMPACT) : /* lds $rn, fpscr */ | |
2470 | { | |
2471 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2472 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2473 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2474 | int UNUSED written = 0; | |
2475 | IADDR UNUSED pc = abuf->addr; | |
2476 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2477 | ||
2478 | { | |
2479 | SI opval = GET_H_GRC (FLD (f_rn)); | |
c7e628df | 2480 | CPU (h_fpscr) = opval; |
cbb38b47 BE |
2481 | TRACE_RESULT (current_cpu, abuf, "fpscr", 'x', opval); |
2482 | } | |
2483 | ||
2484 | #undef FLD | |
2485 | } | |
2486 | NEXT (vpc); | |
2487 | ||
2488 | CASE (sem, INSN_LDSL_FPSCR_COMPACT) : /* lds.l @${rn}+, fpscr */ | |
2489 | { | |
2490 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2491 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2492 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2493 | int UNUSED written = 0; | |
2494 | IADDR UNUSED pc = abuf->addr; | |
2495 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2496 | ||
2497 | { | |
2498 | { | |
2499 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
c7e628df | 2500 | CPU (h_fpscr) = opval; |
cbb38b47 BE |
2501 | TRACE_RESULT (current_cpu, abuf, "fpscr", 'x', opval); |
2502 | } | |
2503 | { | |
2504 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2505 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2506 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2507 | } |
2508 | } | |
2509 | ||
2510 | #undef FLD | |
2511 | } | |
2512 | NEXT (vpc); | |
2513 | ||
2514 | CASE (sem, INSN_LDS_FPUL_COMPACT) : /* lds $rn, fpul */ | |
2515 | { | |
2516 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2517 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2518 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2519 | int UNUSED written = 0; | |
2520 | IADDR UNUSED pc = abuf->addr; | |
2521 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2522 | ||
2523 | { | |
2524 | SF opval = SUBWORDSISF (GET_H_GRC (FLD (f_rn))); | |
2525 | CPU (h_fr[((UINT) 32)]) = opval; | |
c7e628df | 2526 | TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); |
cbb38b47 BE |
2527 | } |
2528 | ||
2529 | #undef FLD | |
2530 | } | |
2531 | NEXT (vpc); | |
2532 | ||
2533 | CASE (sem, INSN_LDSL_FPUL_COMPACT) : /* lds.l @${rn}+, fpul */ | |
2534 | { | |
2535 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2536 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2537 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2538 | int UNUSED written = 0; | |
2539 | IADDR UNUSED pc = abuf->addr; | |
2540 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2541 | ||
2542 | { | |
2543 | { | |
2544 | SF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2545 | CPU (h_fr[((UINT) 32)]) = opval; | |
c7e628df | 2546 | TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); |
cbb38b47 BE |
2547 | } |
2548 | { | |
2549 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2550 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2551 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2552 | } |
2553 | } | |
2554 | ||
2555 | #undef FLD | |
2556 | } | |
2557 | NEXT (vpc); | |
2558 | ||
2559 | CASE (sem, INSN_LDS_MACH_COMPACT) : /* lds $rn, mach */ | |
2560 | { | |
2561 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2562 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2563 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2564 | int UNUSED written = 0; | |
2565 | IADDR UNUSED pc = abuf->addr; | |
2566 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2567 | ||
2568 | { | |
2569 | SI opval = GET_H_GRC (FLD (f_rn)); | |
2570 | SET_H_MACH (opval); | |
2571 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
2572 | } | |
2573 | ||
2574 | #undef FLD | |
2575 | } | |
2576 | NEXT (vpc); | |
2577 | ||
2578 | CASE (sem, INSN_LDSL_MACH_COMPACT) : /* lds.l @${rn}+, mach */ | |
2579 | { | |
2580 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2581 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2582 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2583 | int UNUSED written = 0; | |
2584 | IADDR UNUSED pc = abuf->addr; | |
2585 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2586 | ||
2587 | { | |
2588 | { | |
2589 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2590 | SET_H_MACH (opval); | |
2591 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
2592 | } | |
2593 | { | |
2594 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2595 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2596 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2597 | } |
2598 | } | |
2599 | ||
2600 | #undef FLD | |
2601 | } | |
2602 | NEXT (vpc); | |
2603 | ||
2604 | CASE (sem, INSN_LDS_MACL_COMPACT) : /* lds $rn, macl */ | |
2605 | { | |
2606 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2607 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2608 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2609 | int UNUSED written = 0; | |
2610 | IADDR UNUSED pc = abuf->addr; | |
2611 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2612 | ||
2613 | { | |
2614 | SI opval = GET_H_GRC (FLD (f_rn)); | |
2615 | SET_H_MACL (opval); | |
2616 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
2617 | } | |
2618 | ||
2619 | #undef FLD | |
2620 | } | |
2621 | NEXT (vpc); | |
2622 | ||
2623 | CASE (sem, INSN_LDSL_MACL_COMPACT) : /* lds.l @${rn}+, macl */ | |
2624 | { | |
2625 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2626 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2627 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2628 | int UNUSED written = 0; | |
2629 | IADDR UNUSED pc = abuf->addr; | |
2630 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2631 | ||
2632 | { | |
2633 | { | |
2634 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2635 | SET_H_MACL (opval); | |
2636 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
2637 | } | |
2638 | { | |
2639 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2640 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2641 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2642 | } |
2643 | } | |
2644 | ||
2645 | #undef FLD | |
2646 | } | |
2647 | NEXT (vpc); | |
2648 | ||
2649 | CASE (sem, INSN_LDS_PR_COMPACT) : /* lds $rn, pr */ | |
2650 | { | |
2651 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2652 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2653 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2654 | int UNUSED written = 0; | |
2655 | IADDR UNUSED pc = abuf->addr; | |
2656 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2657 | ||
2658 | { | |
2659 | SI opval = GET_H_GRC (FLD (f_rn)); | |
2660 | SET_H_PR (opval); | |
2661 | TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); | |
2662 | } | |
2663 | ||
2664 | #undef FLD | |
2665 | } | |
2666 | NEXT (vpc); | |
2667 | ||
2668 | CASE (sem, INSN_LDSL_PR_COMPACT) : /* lds.l @${rn}+, pr */ | |
2669 | { | |
2670 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2671 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2672 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2673 | int UNUSED written = 0; | |
2674 | IADDR UNUSED pc = abuf->addr; | |
2675 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2676 | ||
2677 | { | |
2678 | { | |
2679 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2680 | SET_H_PR (opval); | |
2681 | TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); | |
2682 | } | |
2683 | { | |
2684 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2685 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2686 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2687 | } |
2688 | } | |
2689 | ||
2690 | #undef FLD | |
2691 | } | |
2692 | NEXT (vpc); | |
2693 | ||
2694 | CASE (sem, INSN_MACL_COMPACT) : /* mac.l @${rm}+, @${rn}+ */ | |
2695 | { | |
2696 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2697 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2698 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2699 | int UNUSED written = 0; |
2700 | IADDR UNUSED pc = abuf->addr; | |
2701 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2702 | ||
2703 | { | |
2704 | DI tmp_tmpry; | |
2705 | DI tmp_mac; | |
2706 | DI tmp_result; | |
2707 | SI tmp_x; | |
2708 | SI tmp_y; | |
2709 | tmp_x = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2710 | { | |
2711 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2712 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2713 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2714 | } |
2715 | if (EQSI (FLD (f_rn), FLD (f_rm))) { | |
2716 | { | |
2717 | { | |
2718 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2719 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2720 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2721 | } |
2722 | { | |
2723 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); | |
2724 | SET_H_GRC (FLD (f_rm), opval); | |
2725 | written |= (1 << 11); | |
c7e628df | 2726 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2727 | } |
2728 | } | |
2729 | } | |
2730 | tmp_y = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
2731 | { | |
2732 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); | |
2733 | SET_H_GRC (FLD (f_rm), opval); | |
2734 | written |= (1 << 11); | |
c7e628df | 2735 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2736 | } |
2737 | tmp_tmpry = MULDI (ZEXTSIDI (tmp_x), ZEXTSIDI (tmp_y)); | |
2738 | tmp_mac = ORDI (SLLDI (ZEXTSIDI (GET_H_MACH ()), 32), ZEXTSIDI (GET_H_MACL ())); | |
2739 | tmp_result = ADDDI (tmp_mac, tmp_tmpry); | |
2740 | { | |
2741 | if (GET_H_SBIT ()) { | |
2742 | { | |
2743 | SI tmp_min; | |
2744 | SI tmp_max; | |
2745 | tmp_max = SRLDI (INVDI (0), 16); | |
2746 | tmp_min = SRLDI (INVDI (0), 15); | |
2747 | if (GTDI (tmp_result, tmp_max)) { | |
2748 | tmp_result = tmp_max; | |
2749 | } else { | |
2750 | if (LTDI (tmp_result, tmp_min)) { | |
2751 | tmp_result = tmp_min; | |
2752 | } | |
2753 | } | |
2754 | } | |
2755 | } | |
2756 | { | |
2757 | SI opval = SUBWORDDISI (tmp_result, 0); | |
2758 | SET_H_MACH (opval); | |
2759 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
2760 | } | |
2761 | { | |
2762 | SI opval = SUBWORDDISI (tmp_result, 1); | |
2763 | SET_H_MACL (opval); | |
2764 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
2765 | } | |
2766 | } | |
2767 | } | |
2768 | ||
2769 | abuf->written = written; | |
2770 | #undef FLD | |
2771 | } | |
2772 | NEXT (vpc); | |
2773 | ||
2774 | CASE (sem, INSN_MACW_COMPACT) : /* mac.w @${rm}+, @${rn}+ */ | |
2775 | { | |
2776 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2777 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2778 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2779 | int UNUSED written = 0; |
2780 | IADDR UNUSED pc = abuf->addr; | |
2781 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2782 | ||
2783 | { | |
2784 | SI tmp_tmpry; | |
2785 | DI tmp_mac; | |
2786 | DI tmp_result; | |
2787 | HI tmp_x; | |
2788 | HI tmp_y; | |
2789 | tmp_x = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2790 | { | |
2791 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 2); | |
2792 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2793 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2794 | } |
2795 | if (EQSI (FLD (f_rn), FLD (f_rm))) { | |
2796 | { | |
2797 | { | |
2798 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 2); | |
2799 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2800 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2801 | } |
2802 | { | |
2803 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); | |
2804 | SET_H_GRC (FLD (f_rm), opval); | |
2805 | written |= (1 << 11); | |
c7e628df | 2806 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2807 | } |
2808 | } | |
2809 | } | |
2810 | tmp_y = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
2811 | { | |
2812 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); | |
2813 | SET_H_GRC (FLD (f_rm), opval); | |
2814 | written |= (1 << 11); | |
c7e628df | 2815 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2816 | } |
2817 | tmp_tmpry = MULSI (ZEXTHISI (tmp_x), ZEXTHISI (tmp_y)); | |
2818 | if (GET_H_SBIT ()) { | |
2819 | { | |
2820 | if (ADDOFSI (tmp_tmpry, GET_H_MACL (), 0)) { | |
2821 | { | |
2822 | SI opval = 1; | |
2823 | SET_H_MACH (opval); | |
2824 | written |= (1 << 9); | |
2825 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
2826 | } | |
2827 | } | |
2828 | { | |
2829 | SI opval = ADDSI (tmp_tmpry, GET_H_MACL ()); | |
2830 | SET_H_MACL (opval); | |
2831 | written |= (1 << 10); | |
2832 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
2833 | } | |
2834 | } | |
2835 | } else { | |
2836 | { | |
2837 | tmp_mac = ORDI (SLLDI (ZEXTSIDI (GET_H_MACH ()), 32), ZEXTSIDI (GET_H_MACL ())); | |
2838 | tmp_result = ADDDI (tmp_mac, EXTSIDI (tmp_tmpry)); | |
2839 | { | |
2840 | SI opval = SUBWORDDISI (tmp_result, 0); | |
2841 | SET_H_MACH (opval); | |
2842 | written |= (1 << 9); | |
2843 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
2844 | } | |
2845 | { | |
2846 | SI opval = SUBWORDDISI (tmp_result, 1); | |
2847 | SET_H_MACL (opval); | |
2848 | written |= (1 << 10); | |
2849 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
2850 | } | |
2851 | } | |
2852 | } | |
2853 | } | |
2854 | ||
2855 | abuf->written = written; | |
2856 | #undef FLD | |
2857 | } | |
2858 | NEXT (vpc); | |
2859 | ||
2860 | CASE (sem, INSN_MOV_COMPACT) : /* mov $rm64, $rn64 */ | |
2861 | { | |
2862 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2863 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2864 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2865 | int UNUSED written = 0; |
2866 | IADDR UNUSED pc = abuf->addr; | |
2867 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2868 | ||
2869 | { | |
2870 | DI opval = GET_H_GR (FLD (f_rm)); | |
2871 | SET_H_GR (FLD (f_rn), opval); | |
c7e628df | 2872 | TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); |
cbb38b47 BE |
2873 | } |
2874 | ||
2875 | #undef FLD | |
2876 | } | |
2877 | NEXT (vpc); | |
2878 | ||
2879 | CASE (sem, INSN_MOVI_COMPACT) : /* mov #$imm8, $rn */ | |
2880 | { | |
2881 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2882 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2883 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
2884 | int UNUSED written = 0; | |
2885 | IADDR UNUSED pc = abuf->addr; | |
2886 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2887 | ||
2888 | { | |
2889 | SI opval = EXTQIDI (ANDQI (FLD (f_imm8), 255)); | |
2890 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
2891 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
2892 | } | |
2893 | ||
2894 | #undef FLD | |
2895 | } | |
2896 | NEXT (vpc); | |
2897 | ||
2898 | CASE (sem, INSN_MOVI20_COMPACT) : /* movi20 #$imm20, $rn */ | |
2899 | { | |
2900 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2901 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2902 | #define FLD(f) abuf->fields.sfmt_movi20_compact.f | |
2903 | int UNUSED written = 0; | |
2904 | IADDR UNUSED pc = abuf->addr; | |
2905 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2906 | ||
2907 | { | |
2908 | SI opval = FLD (f_imm20); | |
2909 | SET_H_GRC (FLD (f_rn), opval); | |
2910 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
2911 | } |
2912 | ||
2913 | #undef FLD | |
2914 | } | |
2915 | NEXT (vpc); | |
2916 | ||
2917 | CASE (sem, INSN_MOVB1_COMPACT) : /* mov.b $rm, @$rn */ | |
2918 | { | |
2919 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2920 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2921 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2922 | int UNUSED written = 0; |
2923 | IADDR UNUSED pc = abuf->addr; | |
2924 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2925 | ||
2926 | { | |
2927 | UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); | |
2928 | SETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); | |
2929 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2930 | } | |
2931 | ||
2932 | #undef FLD | |
2933 | } | |
2934 | NEXT (vpc); | |
2935 | ||
2936 | CASE (sem, INSN_MOVB2_COMPACT) : /* mov.b $rm, @-$rn */ | |
2937 | { | |
2938 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2939 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2940 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2941 | int UNUSED written = 0; |
2942 | IADDR UNUSED pc = abuf->addr; | |
2943 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2944 | ||
2945 | { | |
2946 | DI tmp_addr; | |
2947 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 1); | |
2948 | { | |
2949 | UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); | |
2950 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
2951 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2952 | } | |
2953 | { | |
2954 | SI opval = tmp_addr; | |
2955 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2956 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2957 | } |
2958 | } | |
2959 | ||
2960 | #undef FLD | |
2961 | } | |
2962 | NEXT (vpc); | |
2963 | ||
2964 | CASE (sem, INSN_MOVB3_COMPACT) : /* mov.b $rm, @(r0,$rn) */ | |
2965 | { | |
2966 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2967 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2968 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2969 | int UNUSED written = 0; |
2970 | IADDR UNUSED pc = abuf->addr; | |
2971 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2972 | ||
2973 | { | |
2974 | UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); | |
2975 | SETMEMUQI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); | |
2976 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2977 | } | |
2978 | ||
2979 | #undef FLD | |
2980 | } | |
2981 | NEXT (vpc); | |
2982 | ||
2983 | CASE (sem, INSN_MOVB4_COMPACT) : /* mov.b r0, @($imm8, gbr) */ | |
2984 | { | |
2985 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2986 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2987 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
2988 | int UNUSED written = 0; | |
2989 | IADDR UNUSED pc = abuf->addr; | |
2990 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2991 | ||
2992 | { | |
2993 | DI tmp_addr; | |
2994 | tmp_addr = ADDSI (GET_H_GBR (), FLD (f_imm8)); | |
2995 | { | |
2996 | UQI opval = SUBWORDSIUQI (GET_H_GRC (((UINT) 0)), 3); | |
2997 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
2998 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2999 | } | |
3000 | } | |
3001 | ||
3002 | #undef FLD | |
3003 | } | |
3004 | NEXT (vpc); | |
3005 | ||
3006 | CASE (sem, INSN_MOVB5_COMPACT) : /* mov.b r0, @($imm4, $rm) */ | |
3007 | { | |
3008 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3009 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3010 | #define FLD(f) abuf->fields.sfmt_movb5_compact.f | |
3011 | int UNUSED written = 0; | |
3012 | IADDR UNUSED pc = abuf->addr; | |
3013 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3014 | ||
3015 | { | |
3016 | DI tmp_addr; | |
3017 | tmp_addr = ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4)); | |
3018 | { | |
3019 | UQI opval = SUBWORDSIUQI (GET_H_GRC (((UINT) 0)), 3); | |
3020 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
3021 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3022 | } | |
3023 | } | |
3024 | ||
3025 | #undef FLD | |
3026 | } | |
3027 | NEXT (vpc); | |
3028 | ||
3029 | CASE (sem, INSN_MOVB6_COMPACT) : /* mov.b @$rm, $rn */ | |
3030 | { | |
3031 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3032 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3033 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3034 | int UNUSED written = 0; |
3035 | IADDR UNUSED pc = abuf->addr; | |
3036 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3037 | ||
3038 | { | |
3039 | SI opval = EXTQISI (GETMEMQI (current_cpu, pc, GET_H_GRC (FLD (f_rm)))); | |
3040 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3041 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3042 | } |
3043 | ||
3044 | #undef FLD | |
3045 | } | |
3046 | NEXT (vpc); | |
3047 | ||
3048 | CASE (sem, INSN_MOVB7_COMPACT) : /* mov.b @${rm}+, $rn */ | |
3049 | { | |
3050 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3051 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3052 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3053 | int UNUSED written = 0; |
3054 | IADDR UNUSED pc = abuf->addr; | |
3055 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3056 | ||
3057 | { | |
3058 | QI tmp_data; | |
3059 | tmp_data = GETMEMQI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
3060 | if (EQSI (FLD (f_rm), FLD (f_rn))) { | |
3061 | { | |
3062 | SI opval = EXTQISI (tmp_data); | |
3063 | SET_H_GRC (FLD (f_rm), opval); | |
3064 | written |= (1 << 4); | |
c7e628df | 3065 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3066 | } |
3067 | } else { | |
3068 | { | |
3069 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 1); | |
3070 | SET_H_GRC (FLD (f_rm), opval); | |
3071 | written |= (1 << 4); | |
c7e628df | 3072 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3073 | } |
3074 | } | |
3075 | { | |
3076 | SI opval = EXTQISI (tmp_data); | |
3077 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3078 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3079 | } |
3080 | } | |
3081 | ||
3082 | abuf->written = written; | |
3083 | #undef FLD | |
3084 | } | |
3085 | NEXT (vpc); | |
3086 | ||
3087 | CASE (sem, INSN_MOVB8_COMPACT) : /* mov.b @(r0, $rm), $rn */ | |
3088 | { | |
3089 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3090 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3091 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3092 | int UNUSED written = 0; |
3093 | IADDR UNUSED pc = abuf->addr; | |
3094 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3095 | ||
3096 | { | |
3097 | SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm))))); | |
3098 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3099 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3100 | } |
3101 | ||
3102 | #undef FLD | |
3103 | } | |
3104 | NEXT (vpc); | |
3105 | ||
3106 | CASE (sem, INSN_MOVB9_COMPACT) : /* mov.b @($imm8, gbr), r0 */ | |
3107 | { | |
3108 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3109 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3110 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
3111 | int UNUSED written = 0; | |
3112 | IADDR UNUSED pc = abuf->addr; | |
3113 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3114 | ||
3115 | { | |
3116 | SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8)))); | |
3117 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3118 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3119 | } |
3120 | ||
3121 | #undef FLD | |
3122 | } | |
3123 | NEXT (vpc); | |
3124 | ||
3125 | CASE (sem, INSN_MOVB10_COMPACT) : /* mov.b @($imm4, $rm), r0 */ | |
3126 | { | |
3127 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3128 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3129 | #define FLD(f) abuf->fields.sfmt_movb5_compact.f | |
3130 | int UNUSED written = 0; | |
3131 | IADDR UNUSED pc = abuf->addr; | |
3132 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3133 | ||
3134 | { | |
3135 | SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4)))); | |
3136 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3137 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3138 | } |
3139 | ||
3140 | #undef FLD | |
3141 | } | |
3142 | NEXT (vpc); | |
3143 | ||
3144 | CASE (sem, INSN_MOVL1_COMPACT) : /* mov.l $rm, @$rn */ | |
3145 | { | |
3146 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3147 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3148 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3149 | int UNUSED written = 0; |
3150 | IADDR UNUSED pc = abuf->addr; | |
3151 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3152 | ||
3153 | { | |
3154 | SI opval = GET_H_GRC (FLD (f_rm)); | |
3155 | SETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); | |
3156 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3157 | } | |
3158 | ||
3159 | #undef FLD | |
3160 | } | |
3161 | NEXT (vpc); | |
3162 | ||
3163 | CASE (sem, INSN_MOVL2_COMPACT) : /* mov.l $rm, @-$rn */ | |
3164 | { | |
3165 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3166 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3167 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3168 | int UNUSED written = 0; |
3169 | IADDR UNUSED pc = abuf->addr; | |
3170 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3171 | ||
3172 | { | |
3173 | SI tmp_addr; | |
3174 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
3175 | { | |
3176 | SI opval = GET_H_GRC (FLD (f_rm)); | |
3177 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
3178 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3179 | } | |
3180 | { | |
3181 | SI opval = tmp_addr; | |
3182 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3183 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3184 | } |
3185 | } | |
3186 | ||
3187 | #undef FLD | |
3188 | } | |
3189 | NEXT (vpc); | |
3190 | ||
3191 | CASE (sem, INSN_MOVL3_COMPACT) : /* mov.l $rm, @(r0, $rn) */ | |
3192 | { | |
3193 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3194 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3195 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3196 | int UNUSED written = 0; |
3197 | IADDR UNUSED pc = abuf->addr; | |
3198 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3199 | ||
3200 | { | |
3201 | SI opval = GET_H_GRC (FLD (f_rm)); | |
3202 | SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); | |
3203 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3204 | } | |
3205 | ||
3206 | #undef FLD | |
3207 | } | |
3208 | NEXT (vpc); | |
3209 | ||
3210 | CASE (sem, INSN_MOVL4_COMPACT) : /* mov.l r0, @($imm8x4, gbr) */ | |
3211 | { | |
3212 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3213 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3214 | #define FLD(f) abuf->fields.sfmt_movl10_compact.f | |
3215 | int UNUSED written = 0; | |
3216 | IADDR UNUSED pc = abuf->addr; | |
3217 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3218 | ||
3219 | { | |
3220 | SI opval = GET_H_GRC (((UINT) 0)); | |
3221 | SETMEMSI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x4)), opval); | |
3222 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3223 | } | |
3224 | ||
3225 | #undef FLD | |
3226 | } | |
3227 | NEXT (vpc); | |
3228 | ||
3229 | CASE (sem, INSN_MOVL5_COMPACT) : /* mov.l $rm, @($imm4x4, $rn) */ | |
3230 | { | |
3231 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3232 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3233 | #define FLD(f) abuf->fields.sfmt_movl5_compact.f | |
3234 | int UNUSED written = 0; | |
3235 | IADDR UNUSED pc = abuf->addr; | |
3236 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3237 | ||
3238 | { | |
3239 | SI opval = GET_H_GRC (FLD (f_rm)); | |
3240 | SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm4x4)), opval); | |
3241 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3242 | } | |
3243 | ||
3244 | #undef FLD | |
3245 | } | |
3246 | NEXT (vpc); | |
3247 | ||
3248 | CASE (sem, INSN_MOVL6_COMPACT) : /* mov.l @$rm, $rn */ | |
3249 | { | |
3250 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3251 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3252 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3253 | int UNUSED written = 0; |
3254 | IADDR UNUSED pc = abuf->addr; | |
3255 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3256 | ||
3257 | { | |
3258 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
3259 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3260 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3261 | } |
3262 | ||
3263 | #undef FLD | |
3264 | } | |
3265 | NEXT (vpc); | |
3266 | ||
3267 | CASE (sem, INSN_MOVL7_COMPACT) : /* mov.l @${rm}+, $rn */ | |
3268 | { | |
3269 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3270 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3271 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3272 | int UNUSED written = 0; |
3273 | IADDR UNUSED pc = abuf->addr; | |
3274 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3275 | ||
3276 | { | |
3277 | { | |
3278 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
3279 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3280 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3281 | } |
3282 | if (EQSI (FLD (f_rm), FLD (f_rn))) { | |
3283 | { | |
3284 | SI opval = GET_H_GRC (FLD (f_rn)); | |
3285 | SET_H_GRC (FLD (f_rm), opval); | |
3286 | written |= (1 << 5); | |
c7e628df | 3287 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3288 | } |
3289 | } else { | |
3290 | { | |
3291 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); | |
3292 | SET_H_GRC (FLD (f_rm), opval); | |
3293 | written |= (1 << 5); | |
c7e628df | 3294 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3295 | } |
3296 | } | |
3297 | } | |
3298 | ||
3299 | abuf->written = written; | |
3300 | #undef FLD | |
3301 | } | |
3302 | NEXT (vpc); | |
3303 | ||
3304 | CASE (sem, INSN_MOVL8_COMPACT) : /* mov.l @(r0, $rm), $rn */ | |
3305 | { | |
3306 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3307 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3308 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3309 | int UNUSED written = 0; |
3310 | IADDR UNUSED pc = abuf->addr; | |
3311 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3312 | ||
3313 | { | |
3314 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); | |
3315 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3316 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3317 | } |
3318 | ||
3319 | #undef FLD | |
3320 | } | |
3321 | NEXT (vpc); | |
3322 | ||
3323 | CASE (sem, INSN_MOVL9_COMPACT) : /* mov.l @($imm8x4, gbr), r0 */ | |
3324 | { | |
3325 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3326 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3327 | #define FLD(f) abuf->fields.sfmt_movl10_compact.f | |
3328 | int UNUSED written = 0; | |
3329 | IADDR UNUSED pc = abuf->addr; | |
3330 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3331 | ||
3332 | { | |
3333 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x4))); | |
3334 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3335 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3336 | } |
3337 | ||
3338 | #undef FLD | |
3339 | } | |
3340 | NEXT (vpc); | |
3341 | ||
3342 | CASE (sem, INSN_MOVL10_COMPACT) : /* mov.l @($imm8x4, pc), $rn */ | |
3343 | { | |
3344 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3345 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3346 | #define FLD(f) abuf->fields.sfmt_movl10_compact.f | |
3347 | int UNUSED written = 0; | |
3348 | IADDR UNUSED pc = abuf->addr; | |
3349 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3350 | ||
3351 | { | |
3352 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_imm8x4), ANDDI (ADDDI (pc, 4), INVSI (3)))); | |
3353 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3354 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3355 | } |
3356 | ||
3357 | #undef FLD | |
3358 | } | |
3359 | NEXT (vpc); | |
3360 | ||
3361 | CASE (sem, INSN_MOVL11_COMPACT) : /* mov.l @($imm4x4, $rm), $rn */ | |
3362 | { | |
3363 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3364 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3365 | #define FLD(f) abuf->fields.sfmt_movl5_compact.f | |
3366 | int UNUSED written = 0; | |
3367 | IADDR UNUSED pc = abuf->addr; | |
3368 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3369 | ||
3370 | { | |
3371 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x4))); | |
3372 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
3373 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
3374 | } | |
3375 | ||
3376 | #undef FLD | |
3377 | } | |
3378 | NEXT (vpc); | |
3379 | ||
3380 | CASE (sem, INSN_MOVL12_COMPACT) : /* mov.l @($imm12x4, $rm), $rn */ | |
3381 | { | |
3382 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3383 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3384 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f | |
3385 | int UNUSED written = 0; | |
3386 | IADDR UNUSED pc = abuf->addr; | |
3387 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3388 | ||
3389 | { | |
3390 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm12x4))); | |
3391 | SET_H_GRC (FLD (f_rn), opval); | |
3392 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3393 | } | |
3394 | ||
3395 | #undef FLD | |
3396 | } | |
3397 | NEXT (vpc); | |
3398 | ||
3399 | CASE (sem, INSN_MOVL13_COMPACT) : /* mov.l $rm, @($imm12x4, $rn) */ | |
3400 | { | |
3401 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3402 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3403 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f | |
3404 | int UNUSED written = 0; | |
3405 | IADDR UNUSED pc = abuf->addr; | |
3406 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3407 | ||
3408 | { | |
3409 | SI opval = GET_H_GRC (FLD (f_rm)); | |
3410 | SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm12x4)), opval); | |
3411 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
cbb38b47 BE |
3412 | } |
3413 | ||
3414 | #undef FLD | |
3415 | } | |
3416 | NEXT (vpc); | |
3417 | ||
3418 | CASE (sem, INSN_MOVW1_COMPACT) : /* mov.w $rm, @$rn */ | |
3419 | { | |
3420 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3421 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3422 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3423 | int UNUSED written = 0; |
3424 | IADDR UNUSED pc = abuf->addr; | |
3425 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3426 | ||
3427 | { | |
3428 | HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); | |
3429 | SETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); | |
3430 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3431 | } | |
3432 | ||
3433 | #undef FLD | |
3434 | } | |
3435 | NEXT (vpc); | |
3436 | ||
3437 | CASE (sem, INSN_MOVW2_COMPACT) : /* mov.w $rm, @-$rn */ | |
3438 | { | |
3439 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3440 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3441 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3442 | int UNUSED written = 0; |
3443 | IADDR UNUSED pc = abuf->addr; | |
3444 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3445 | ||
3446 | { | |
3447 | DI tmp_addr; | |
3448 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 2); | |
3449 | { | |
3450 | HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); | |
3451 | SETMEMHI (current_cpu, pc, tmp_addr, opval); | |
3452 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3453 | } | |
3454 | { | |
3455 | SI opval = tmp_addr; | |
3456 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3457 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3458 | } |
3459 | } | |
3460 | ||
3461 | #undef FLD | |
3462 | } | |
3463 | NEXT (vpc); | |
3464 | ||
3465 | CASE (sem, INSN_MOVW3_COMPACT) : /* mov.w $rm, @(r0, $rn) */ | |
3466 | { | |
3467 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3468 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3469 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3470 | int UNUSED written = 0; |
3471 | IADDR UNUSED pc = abuf->addr; | |
3472 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3473 | ||
3474 | { | |
3475 | HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); | |
3476 | SETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); | |
3477 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3478 | } | |
3479 | ||
3480 | #undef FLD | |
3481 | } | |
3482 | NEXT (vpc); | |
3483 | ||
3484 | CASE (sem, INSN_MOVW4_COMPACT) : /* mov.w r0, @($imm8x2, gbr) */ | |
3485 | { | |
3486 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3487 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3488 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3489 | int UNUSED written = 0; | |
3490 | IADDR UNUSED pc = abuf->addr; | |
3491 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3492 | ||
3493 | { | |
3494 | HI opval = SUBWORDSIHI (GET_H_GRC (((UINT) 0)), 1); | |
3495 | SETMEMHI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x2)), opval); | |
3496 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3497 | } | |
3498 | ||
3499 | #undef FLD | |
3500 | } | |
3501 | NEXT (vpc); | |
3502 | ||
c7e628df | 3503 | CASE (sem, INSN_MOVW5_COMPACT) : /* mov.w r0, @($imm4x2, $rm) */ |
cbb38b47 BE |
3504 | { |
3505 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3506 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3507 | #define FLD(f) abuf->fields.sfmt_movw5_compact.f | |
3508 | int UNUSED written = 0; | |
3509 | IADDR UNUSED pc = abuf->addr; | |
3510 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3511 | ||
3512 | { | |
3513 | HI opval = SUBWORDSIHI (GET_H_GRC (((UINT) 0)), 1); | |
c7e628df | 3514 | SETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x2)), opval); |
cbb38b47 BE |
3515 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); |
3516 | } | |
3517 | ||
3518 | #undef FLD | |
3519 | } | |
3520 | NEXT (vpc); | |
3521 | ||
3522 | CASE (sem, INSN_MOVW6_COMPACT) : /* mov.w @$rm, $rn */ | |
3523 | { | |
3524 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3525 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3526 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3527 | int UNUSED written = 0; |
3528 | IADDR UNUSED pc = abuf->addr; | |
3529 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3530 | ||
3531 | { | |
3532 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm)))); | |
3533 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3534 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3535 | } |
3536 | ||
3537 | #undef FLD | |
3538 | } | |
3539 | NEXT (vpc); | |
3540 | ||
3541 | CASE (sem, INSN_MOVW7_COMPACT) : /* mov.w @${rm}+, $rn */ | |
3542 | { | |
3543 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3544 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3545 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3546 | int UNUSED written = 0; |
3547 | IADDR UNUSED pc = abuf->addr; | |
3548 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3549 | ||
3550 | { | |
3551 | HI tmp_data; | |
3552 | tmp_data = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
3553 | if (EQSI (FLD (f_rm), FLD (f_rn))) { | |
3554 | { | |
3555 | SI opval = EXTHISI (tmp_data); | |
3556 | SET_H_GRC (FLD (f_rm), opval); | |
3557 | written |= (1 << 4); | |
c7e628df | 3558 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3559 | } |
3560 | } else { | |
3561 | { | |
3562 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); | |
3563 | SET_H_GRC (FLD (f_rm), opval); | |
3564 | written |= (1 << 4); | |
c7e628df | 3565 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3566 | } |
3567 | } | |
3568 | { | |
3569 | SI opval = EXTHISI (tmp_data); | |
3570 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3571 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3572 | } |
3573 | } | |
3574 | ||
3575 | abuf->written = written; | |
3576 | #undef FLD | |
3577 | } | |
3578 | NEXT (vpc); | |
3579 | ||
3580 | CASE (sem, INSN_MOVW8_COMPACT) : /* mov.w @(r0, $rm), $rn */ | |
3581 | { | |
3582 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3583 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3584 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3585 | int UNUSED written = 0; |
3586 | IADDR UNUSED pc = abuf->addr; | |
3587 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3588 | ||
3589 | { | |
3590 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm))))); | |
3591 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3592 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3593 | } |
3594 | ||
3595 | #undef FLD | |
3596 | } | |
3597 | NEXT (vpc); | |
3598 | ||
3599 | CASE (sem, INSN_MOVW9_COMPACT) : /* mov.w @($imm8x2, gbr), r0 */ | |
3600 | { | |
3601 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3602 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3603 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3604 | int UNUSED written = 0; | |
3605 | IADDR UNUSED pc = abuf->addr; | |
3606 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3607 | ||
3608 | { | |
3609 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x2)))); | |
3610 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3611 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3612 | } |
3613 | ||
3614 | #undef FLD | |
3615 | } | |
3616 | NEXT (vpc); | |
3617 | ||
3618 | CASE (sem, INSN_MOVW10_COMPACT) : /* mov.w @($imm8x2, pc), $rn */ | |
3619 | { | |
3620 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3621 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3622 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3623 | int UNUSED written = 0; | |
3624 | IADDR UNUSED pc = abuf->addr; | |
3625 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3626 | ||
3627 | { | |
3628 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDDI (ADDDI (pc, 4), FLD (f_imm8x2)))); | |
3629 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3630 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3631 | } |
3632 | ||
3633 | #undef FLD | |
3634 | } | |
3635 | NEXT (vpc); | |
3636 | ||
3637 | CASE (sem, INSN_MOVW11_COMPACT) : /* mov.w @($imm4x2, $rm), r0 */ | |
3638 | { | |
3639 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3640 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3641 | #define FLD(f) abuf->fields.sfmt_movw5_compact.f |
cbb38b47 BE |
3642 | int UNUSED written = 0; |
3643 | IADDR UNUSED pc = abuf->addr; | |
3644 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3645 | ||
3646 | { | |
3647 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x2)))); | |
3648 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3649 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3650 | } |
3651 | ||
3652 | #undef FLD | |
3653 | } | |
3654 | NEXT (vpc); | |
3655 | ||
3656 | CASE (sem, INSN_MOVA_COMPACT) : /* mova @($imm8x4, pc), r0 */ | |
3657 | { | |
3658 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3659 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3660 | #define FLD(f) abuf->fields.sfmt_movl10_compact.f | |
3661 | int UNUSED written = 0; | |
3662 | IADDR UNUSED pc = abuf->addr; | |
3663 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3664 | ||
3665 | { | |
3666 | SI opval = ADDDI (ANDDI (ADDDI (pc, 4), INVSI (3)), FLD (f_imm8x4)); | |
3667 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3668 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3669 | } |
3670 | ||
3671 | #undef FLD | |
3672 | } | |
3673 | NEXT (vpc); | |
3674 | ||
3675 | CASE (sem, INSN_MOVCAL_COMPACT) : /* movca.l r0, @$rn */ | |
3676 | { | |
3677 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3678 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3679 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3680 | int UNUSED written = 0; | |
3681 | IADDR UNUSED pc = abuf->addr; | |
3682 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3683 | ||
3684 | { | |
3685 | SI opval = GET_H_GRC (((UINT) 0)); | |
3686 | SETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); | |
3687 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3688 | } | |
3689 | ||
c7e628df DB |
3690 | #undef FLD |
3691 | } | |
3692 | NEXT (vpc); | |
3693 | ||
3694 | CASE (sem, INSN_MOVCOL_COMPACT) : /* movco.l r0, @$rn */ | |
3695 | { | |
3696 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3697 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3698 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3699 | int UNUSED written = 0; | |
3700 | IADDR UNUSED pc = abuf->addr; | |
3701 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3702 | ||
3703 | { | |
3704 | SI opval = GET_H_GRC (FLD (f_rn)); | |
3705 | SET_H_GRC (FLD (f_rn), opval); | |
3706 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3707 | } | |
3708 | ||
cbb38b47 BE |
3709 | #undef FLD |
3710 | } | |
3711 | NEXT (vpc); | |
3712 | ||
3713 | CASE (sem, INSN_MOVT_COMPACT) : /* movt $rn */ | |
3714 | { | |
3715 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3716 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3717 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3718 | int UNUSED written = 0; | |
3719 | IADDR UNUSED pc = abuf->addr; | |
3720 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3721 | ||
3722 | { | |
3723 | SI opval = ZEXTBISI (GET_H_TBIT ()); | |
3724 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
3725 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
3726 | } | |
3727 | ||
3728 | #undef FLD | |
3729 | } | |
3730 | NEXT (vpc); | |
3731 | ||
3732 | CASE (sem, INSN_MOVUAL_COMPACT) : /* movua.l @$rn, r0 */ | |
3733 | { | |
3734 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3735 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3736 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3737 | int UNUSED written = 0; | |
3738 | IADDR UNUSED pc = abuf->addr; | |
3739 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3740 | ||
3741 | { | |
3742 | SI opval = sh64_movua (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
3743 | SET_H_GRC (((UINT) 0), opval); | |
3744 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3745 | } | |
3746 | ||
3747 | #undef FLD | |
3748 | } | |
3749 | NEXT (vpc); | |
3750 | ||
3751 | CASE (sem, INSN_MOVUAL2_COMPACT) : /* movua.l @$rn+, r0 */ | |
3752 | { | |
3753 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3754 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3755 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3756 | int UNUSED written = 0; | |
3757 | IADDR UNUSED pc = abuf->addr; | |
3758 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3759 | ||
3760 | { | |
3761 | { | |
3762 | SI opval = sh64_movua (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
3763 | SET_H_GRC (((UINT) 0), opval); | |
3764 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3765 | } | |
3766 | { | |
3767 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
3768 | SET_H_GRC (FLD (f_rn), opval); | |
3769 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 | 3770 | } |
c7e628df | 3771 | } |
cbb38b47 BE |
3772 | |
3773 | #undef FLD | |
3774 | } | |
3775 | NEXT (vpc); | |
3776 | ||
3777 | CASE (sem, INSN_MULL_COMPACT) : /* mul.l $rm, $rn */ | |
3778 | { | |
3779 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3780 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3781 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3782 | int UNUSED written = 0; |
3783 | IADDR UNUSED pc = abuf->addr; | |
3784 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3785 | ||
3786 | { | |
3787 | SI opval = MULSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); | |
3788 | SET_H_MACL (opval); | |
3789 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
3790 | } | |
3791 | ||
3792 | #undef FLD | |
3793 | } | |
3794 | NEXT (vpc); | |
3795 | ||
3796 | CASE (sem, INSN_MULSW_COMPACT) : /* muls.w $rm, $rn */ | |
3797 | { | |
3798 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3799 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3800 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3801 | int UNUSED written = 0; |
3802 | IADDR UNUSED pc = abuf->addr; | |
3803 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3804 | ||
3805 | { | |
3806 | SI opval = MULSI (EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)), EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rn)), 1))); | |
3807 | SET_H_MACL (opval); | |
3808 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
3809 | } | |
3810 | ||
3811 | #undef FLD | |
3812 | } | |
3813 | NEXT (vpc); | |
3814 | ||
3815 | CASE (sem, INSN_MULUW_COMPACT) : /* mulu.w $rm, $rn */ | |
3816 | { | |
3817 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3818 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3819 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3820 | int UNUSED written = 0; |
3821 | IADDR UNUSED pc = abuf->addr; | |
3822 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3823 | ||
3824 | { | |
3825 | SI opval = MULSI (ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)), ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rn)), 1))); | |
3826 | SET_H_MACL (opval); | |
3827 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
3828 | } | |
3829 | ||
3830 | #undef FLD | |
3831 | } | |
3832 | NEXT (vpc); | |
3833 | ||
3834 | CASE (sem, INSN_NEG_COMPACT) : /* neg $rm, $rn */ | |
3835 | { | |
3836 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3837 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3838 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3839 | int UNUSED written = 0; |
3840 | IADDR UNUSED pc = abuf->addr; | |
3841 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3842 | ||
3843 | { | |
3844 | SI opval = NEGSI (GET_H_GRC (FLD (f_rm))); | |
3845 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3846 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3847 | } |
3848 | ||
3849 | #undef FLD | |
3850 | } | |
3851 | NEXT (vpc); | |
3852 | ||
3853 | CASE (sem, INSN_NEGC_COMPACT) : /* negc $rm, $rn */ | |
3854 | { | |
3855 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3856 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3857 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3858 | int UNUSED written = 0; |
3859 | IADDR UNUSED pc = abuf->addr; | |
3860 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3861 | ||
3862 | { | |
3863 | BI tmp_flag; | |
3864 | tmp_flag = SUBCFSI (0, GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
3865 | { | |
3866 | SI opval = SUBCSI (0, GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
3867 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3868 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3869 | } |
3870 | { | |
3871 | BI opval = tmp_flag; | |
3872 | SET_H_TBIT (opval); | |
3873 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
3874 | } | |
3875 | } | |
3876 | ||
3877 | #undef FLD | |
3878 | } | |
3879 | NEXT (vpc); | |
3880 | ||
3881 | CASE (sem, INSN_NOP_COMPACT) : /* nop */ | |
3882 | { | |
3883 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3884 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 3885 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
3886 | int UNUSED written = 0; |
3887 | IADDR UNUSED pc = abuf->addr; | |
3888 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3889 | ||
3890 | ((void) 0); /*nop*/ | |
3891 | ||
3892 | #undef FLD | |
3893 | } | |
3894 | NEXT (vpc); | |
3895 | ||
3896 | CASE (sem, INSN_NOT_COMPACT) : /* not $rm64, $rn64 */ | |
3897 | { | |
3898 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3899 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3900 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3901 | int UNUSED written = 0; |
3902 | IADDR UNUSED pc = abuf->addr; | |
3903 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3904 | ||
3905 | { | |
3906 | DI opval = INVDI (GET_H_GR (FLD (f_rm))); | |
3907 | SET_H_GR (FLD (f_rn), opval); | |
c7e628df | 3908 | TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); |
cbb38b47 BE |
3909 | } |
3910 | ||
3911 | #undef FLD | |
3912 | } | |
3913 | NEXT (vpc); | |
3914 | ||
3915 | CASE (sem, INSN_OCBI_COMPACT) : /* ocbi @$rn */ | |
3916 | { | |
3917 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3918 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3919 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f |
cbb38b47 BE |
3920 | int UNUSED written = 0; |
3921 | IADDR UNUSED pc = abuf->addr; | |
3922 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3923 | ||
c7e628df DB |
3924 | { |
3925 | { | |
3926 | SI opval = GET_H_GRC (FLD (f_rn)); | |
3927 | SET_H_GRC (FLD (f_rn), opval); | |
3928 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3929 | } | |
cbb38b47 | 3930 | ((void) 0); /*nop*/ |
c7e628df | 3931 | } |
cbb38b47 BE |
3932 | |
3933 | #undef FLD | |
3934 | } | |
3935 | NEXT (vpc); | |
3936 | ||
3937 | CASE (sem, INSN_OCBP_COMPACT) : /* ocbp @$rn */ | |
3938 | { | |
3939 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3940 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3941 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f |
cbb38b47 BE |
3942 | int UNUSED written = 0; |
3943 | IADDR UNUSED pc = abuf->addr; | |
3944 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3945 | ||
c7e628df DB |
3946 | { |
3947 | { | |
3948 | SI opval = GET_H_GRC (FLD (f_rn)); | |
3949 | SET_H_GRC (FLD (f_rn), opval); | |
3950 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3951 | } | |
cbb38b47 | 3952 | ((void) 0); /*nop*/ |
c7e628df | 3953 | } |
cbb38b47 BE |
3954 | |
3955 | #undef FLD | |
3956 | } | |
3957 | NEXT (vpc); | |
3958 | ||
3959 | CASE (sem, INSN_OCBWB_COMPACT) : /* ocbwb @$rn */ | |
3960 | { | |
3961 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3962 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3963 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f |
cbb38b47 BE |
3964 | int UNUSED written = 0; |
3965 | IADDR UNUSED pc = abuf->addr; | |
3966 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3967 | ||
c7e628df DB |
3968 | { |
3969 | { | |
3970 | SI opval = GET_H_GRC (FLD (f_rn)); | |
3971 | SET_H_GRC (FLD (f_rn), opval); | |
3972 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3973 | } | |
cbb38b47 | 3974 | ((void) 0); /*nop*/ |
c7e628df | 3975 | } |
cbb38b47 BE |
3976 | |
3977 | #undef FLD | |
3978 | } | |
3979 | NEXT (vpc); | |
3980 | ||
3981 | CASE (sem, INSN_OR_COMPACT) : /* or $rm64, $rn64 */ | |
3982 | { | |
3983 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3984 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3985 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3986 | int UNUSED written = 0; |
3987 | IADDR UNUSED pc = abuf->addr; | |
3988 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3989 | ||
3990 | { | |
3991 | DI opval = ORDI (GET_H_GR (FLD (f_rm)), GET_H_GR (FLD (f_rn))); | |
3992 | SET_H_GR (FLD (f_rn), opval); | |
c7e628df | 3993 | TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); |
cbb38b47 BE |
3994 | } |
3995 | ||
3996 | #undef FLD | |
3997 | } | |
3998 | NEXT (vpc); | |
3999 | ||
4000 | CASE (sem, INSN_ORI_COMPACT) : /* or #$uimm8, r0 */ | |
4001 | { | |
4002 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4003 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4004 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
4005 | int UNUSED written = 0; | |
4006 | IADDR UNUSED pc = abuf->addr; | |
4007 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4008 | ||
4009 | { | |
4010 | SI opval = ORSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); | |
4011 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 4012 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4013 | } |
4014 | ||
4015 | #undef FLD | |
4016 | } | |
4017 | NEXT (vpc); | |
4018 | ||
4019 | CASE (sem, INSN_ORB_COMPACT) : /* or.b #$imm8, @(r0, gbr) */ | |
4020 | { | |
4021 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4022 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4023 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
4024 | int UNUSED written = 0; | |
4025 | IADDR UNUSED pc = abuf->addr; | |
4026 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4027 | ||
4028 | { | |
4029 | DI tmp_addr; | |
4030 | UQI tmp_data; | |
4031 | tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); | |
4032 | tmp_data = ORQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); | |
4033 | { | |
4034 | UQI opval = tmp_data; | |
4035 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
4036 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4037 | } | |
4038 | } | |
4039 | ||
4040 | #undef FLD | |
4041 | } | |
4042 | NEXT (vpc); | |
4043 | ||
4044 | CASE (sem, INSN_PREF_COMPACT) : /* pref @$rn */ | |
4045 | { | |
4046 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4047 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4048 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f |
cbb38b47 BE |
4049 | int UNUSED written = 0; |
4050 | IADDR UNUSED pc = abuf->addr; | |
4051 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4052 | ||
c7e628df | 4053 | sh64_pref (current_cpu, GET_H_GRC (FLD (f_rn))); |
cbb38b47 BE |
4054 | |
4055 | #undef FLD | |
4056 | } | |
4057 | NEXT (vpc); | |
4058 | ||
4059 | CASE (sem, INSN_ROTCL_COMPACT) : /* rotcl $rn */ | |
4060 | { | |
4061 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4062 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4063 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4064 | int UNUSED written = 0; | |
4065 | IADDR UNUSED pc = abuf->addr; | |
4066 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4067 | ||
4068 | { | |
4069 | BI tmp_temp; | |
4070 | tmp_temp = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
4071 | { | |
4072 | SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), GET_H_TBIT ()); | |
4073 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4074 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4075 | } |
4076 | { | |
4077 | BI opval = ((tmp_temp) ? (1) : (0)); | |
4078 | SET_H_TBIT (opval); | |
4079 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4080 | } | |
4081 | } | |
4082 | ||
4083 | #undef FLD | |
4084 | } | |
4085 | NEXT (vpc); | |
4086 | ||
4087 | CASE (sem, INSN_ROTCR_COMPACT) : /* rotcr $rn */ | |
4088 | { | |
4089 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4090 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4091 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4092 | int UNUSED written = 0; | |
4093 | IADDR UNUSED pc = abuf->addr; | |
4094 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4095 | ||
4096 | { | |
4097 | BI tmp_lsbit; | |
4098 | SI tmp_temp; | |
4099 | tmp_lsbit = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rn)), 1), 0)) ? (0) : (1)); | |
4100 | tmp_temp = GET_H_TBIT (); | |
4101 | { | |
4102 | SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rn)), 1), SLLSI (tmp_temp, 31)); | |
4103 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4104 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4105 | } |
4106 | { | |
4107 | BI opval = ((tmp_lsbit) ? (1) : (0)); | |
4108 | SET_H_TBIT (opval); | |
4109 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4110 | } | |
4111 | } | |
4112 | ||
4113 | #undef FLD | |
4114 | } | |
4115 | NEXT (vpc); | |
4116 | ||
4117 | CASE (sem, INSN_ROTL_COMPACT) : /* rotl $rn */ | |
4118 | { | |
4119 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4120 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4121 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4122 | int UNUSED written = 0; | |
4123 | IADDR UNUSED pc = abuf->addr; | |
4124 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4125 | ||
4126 | { | |
4127 | BI tmp_temp; | |
4128 | tmp_temp = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
4129 | { | |
4130 | SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), tmp_temp); | |
4131 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4132 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4133 | } |
4134 | { | |
4135 | BI opval = ((tmp_temp) ? (1) : (0)); | |
4136 | SET_H_TBIT (opval); | |
4137 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4138 | } | |
4139 | } | |
4140 | ||
4141 | #undef FLD | |
4142 | } | |
4143 | NEXT (vpc); | |
4144 | ||
4145 | CASE (sem, INSN_ROTR_COMPACT) : /* rotr $rn */ | |
4146 | { | |
4147 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4148 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4149 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4150 | int UNUSED written = 0; | |
4151 | IADDR UNUSED pc = abuf->addr; | |
4152 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4153 | ||
4154 | { | |
4155 | BI tmp_lsbit; | |
4156 | SI tmp_temp; | |
4157 | tmp_lsbit = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rn)), 1), 0)) ? (0) : (1)); | |
4158 | tmp_temp = tmp_lsbit; | |
4159 | { | |
4160 | SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rn)), 1), SLLSI (tmp_temp, 31)); | |
4161 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4162 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4163 | } |
4164 | { | |
4165 | BI opval = ((tmp_lsbit) ? (1) : (0)); | |
4166 | SET_H_TBIT (opval); | |
4167 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4168 | } | |
4169 | } | |
4170 | ||
4171 | #undef FLD | |
4172 | } | |
4173 | NEXT (vpc); | |
4174 | ||
4175 | CASE (sem, INSN_RTS_COMPACT) : /* rts */ | |
4176 | { | |
4177 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4178 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 4179 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
4180 | int UNUSED written = 0; |
4181 | IADDR UNUSED pc = abuf->addr; | |
4182 | SEM_BRANCH_INIT | |
4183 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4184 | ||
c7e628df DB |
4185 | { |
4186 | { | |
4187 | UDI opval = ADDDI (pc, 2); | |
4188 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
4189 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
4190 | } | |
4191 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
4192 | { |
4193 | { | |
4194 | UDI opval = GET_H_PR (); | |
4195 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
4196 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
4197 | } | |
c7e628df DB |
4198 | } |
4199 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
4200 | } |
4201 | ||
4202 | SEM_BRANCH_FINI (vpc); | |
4203 | #undef FLD | |
4204 | } | |
4205 | NEXT (vpc); | |
4206 | ||
4207 | CASE (sem, INSN_SETS_COMPACT) : /* sets */ | |
4208 | { | |
4209 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4210 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 4211 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
4212 | int UNUSED written = 0; |
4213 | IADDR UNUSED pc = abuf->addr; | |
4214 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4215 | ||
4216 | { | |
4217 | BI opval = 1; | |
4218 | SET_H_SBIT (opval); | |
4219 | TRACE_RESULT (current_cpu, abuf, "sbit", 'x', opval); | |
4220 | } | |
4221 | ||
4222 | #undef FLD | |
4223 | } | |
4224 | NEXT (vpc); | |
4225 | ||
4226 | CASE (sem, INSN_SETT_COMPACT) : /* sett */ | |
4227 | { | |
4228 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4229 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 4230 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
4231 | int UNUSED written = 0; |
4232 | IADDR UNUSED pc = abuf->addr; | |
4233 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4234 | ||
4235 | { | |
4236 | BI opval = 1; | |
4237 | SET_H_TBIT (opval); | |
4238 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4239 | } | |
4240 | ||
4241 | #undef FLD | |
4242 | } | |
4243 | NEXT (vpc); | |
4244 | ||
4245 | CASE (sem, INSN_SHAD_COMPACT) : /* shad $rm, $rn */ | |
4246 | { | |
4247 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4248 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4249 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4250 | int UNUSED written = 0; |
4251 | IADDR UNUSED pc = abuf->addr; | |
4252 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4253 | ||
4254 | { | |
c7e628df DB |
4255 | SI tmp_shamt; |
4256 | tmp_shamt = ANDSI (GET_H_GRC (FLD (f_rm)), 31); | |
cbb38b47 BE |
4257 | if (GESI (GET_H_GRC (FLD (f_rm)), 0)) { |
4258 | { | |
4259 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), tmp_shamt); | |
4260 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4261 | written |= (1 << 2); |
4262 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4263 | } |
4264 | } else { | |
c7e628df | 4265 | if (NESI (tmp_shamt, 0)) { |
cbb38b47 BE |
4266 | { |
4267 | SI opval = SRASI (GET_H_GRC (FLD (f_rn)), SUBSI (32, tmp_shamt)); | |
4268 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4269 | written |= (1 << 2); |
4270 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4271 | } |
4272 | } else { | |
4273 | if (LTSI (GET_H_GRC (FLD (f_rn)), 0)) { | |
4274 | { | |
4275 | SI opval = NEGSI (1); | |
4276 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4277 | written |= (1 << 2); |
4278 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4279 | } |
4280 | } else { | |
4281 | { | |
4282 | SI opval = 0; | |
4283 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4284 | written |= (1 << 2); |
4285 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4286 | } |
4287 | } | |
4288 | } | |
4289 | } | |
4290 | } | |
4291 | ||
4292 | abuf->written = written; | |
4293 | #undef FLD | |
4294 | } | |
4295 | NEXT (vpc); | |
4296 | ||
4297 | CASE (sem, INSN_SHAL_COMPACT) : /* shal $rn */ | |
4298 | { | |
4299 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4300 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4301 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4302 | int UNUSED written = 0; | |
4303 | IADDR UNUSED pc = abuf->addr; | |
4304 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4305 | ||
4306 | { | |
4307 | BI tmp_t; | |
4308 | tmp_t = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
4309 | { | |
4310 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 1); | |
4311 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4312 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4313 | } |
4314 | { | |
4315 | BI opval = ((tmp_t) ? (1) : (0)); | |
4316 | SET_H_TBIT (opval); | |
4317 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4318 | } | |
4319 | } | |
4320 | ||
4321 | #undef FLD | |
4322 | } | |
4323 | NEXT (vpc); | |
4324 | ||
4325 | CASE (sem, INSN_SHAR_COMPACT) : /* shar $rn */ | |
4326 | { | |
4327 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4328 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4329 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4330 | int UNUSED written = 0; | |
4331 | IADDR UNUSED pc = abuf->addr; | |
4332 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4333 | ||
4334 | { | |
4335 | BI tmp_t; | |
4336 | tmp_t = ANDSI (GET_H_GRC (FLD (f_rn)), 1); | |
4337 | { | |
4338 | SI opval = SRASI (GET_H_GRC (FLD (f_rn)), 1); | |
4339 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4340 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4341 | } |
4342 | { | |
4343 | BI opval = ((tmp_t) ? (1) : (0)); | |
4344 | SET_H_TBIT (opval); | |
4345 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4346 | } | |
4347 | } | |
4348 | ||
4349 | #undef FLD | |
4350 | } | |
4351 | NEXT (vpc); | |
4352 | ||
4353 | CASE (sem, INSN_SHLD_COMPACT) : /* shld $rm, $rn */ | |
4354 | { | |
4355 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4356 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4357 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4358 | int UNUSED written = 0; |
4359 | IADDR UNUSED pc = abuf->addr; | |
4360 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4361 | ||
4362 | { | |
c7e628df DB |
4363 | SI tmp_shamt; |
4364 | tmp_shamt = ANDSI (GET_H_GRC (FLD (f_rm)), 31); | |
cbb38b47 BE |
4365 | if (GESI (GET_H_GRC (FLD (f_rm)), 0)) { |
4366 | { | |
4367 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), tmp_shamt); | |
4368 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4369 | written |= (1 << 2); |
4370 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4371 | } |
4372 | } else { | |
c7e628df | 4373 | if (NESI (tmp_shamt, 0)) { |
cbb38b47 BE |
4374 | { |
4375 | SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), SUBSI (32, tmp_shamt)); | |
4376 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4377 | written |= (1 << 2); |
4378 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4379 | } |
4380 | } else { | |
4381 | { | |
4382 | SI opval = 0; | |
4383 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4384 | written |= (1 << 2); |
4385 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4386 | } |
4387 | } | |
4388 | } | |
4389 | } | |
4390 | ||
4391 | abuf->written = written; | |
4392 | #undef FLD | |
4393 | } | |
4394 | NEXT (vpc); | |
4395 | ||
4396 | CASE (sem, INSN_SHLL_COMPACT) : /* shll $rn */ | |
4397 | { | |
4398 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4399 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4400 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4401 | int UNUSED written = 0; | |
4402 | IADDR UNUSED pc = abuf->addr; | |
4403 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4404 | ||
4405 | { | |
4406 | BI tmp_t; | |
4407 | tmp_t = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
4408 | { | |
4409 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 1); | |
4410 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4411 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4412 | } |
4413 | { | |
4414 | BI opval = ((tmp_t) ? (1) : (0)); | |
4415 | SET_H_TBIT (opval); | |
4416 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4417 | } | |
4418 | } | |
4419 | ||
4420 | #undef FLD | |
4421 | } | |
4422 | NEXT (vpc); | |
4423 | ||
4424 | CASE (sem, INSN_SHLL2_COMPACT) : /* shll2 $rn */ | |
4425 | { | |
4426 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4427 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4428 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4429 | int UNUSED written = 0; | |
4430 | IADDR UNUSED pc = abuf->addr; | |
4431 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4432 | ||
4433 | { | |
4434 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 2); | |
4435 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4436 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4437 | } |
4438 | ||
4439 | #undef FLD | |
4440 | } | |
4441 | NEXT (vpc); | |
4442 | ||
4443 | CASE (sem, INSN_SHLL8_COMPACT) : /* shll8 $rn */ | |
4444 | { | |
4445 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4446 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4447 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4448 | int UNUSED written = 0; | |
4449 | IADDR UNUSED pc = abuf->addr; | |
4450 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4451 | ||
4452 | { | |
4453 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 8); | |
4454 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4455 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4456 | } |
4457 | ||
4458 | #undef FLD | |
4459 | } | |
4460 | NEXT (vpc); | |
4461 | ||
4462 | CASE (sem, INSN_SHLL16_COMPACT) : /* shll16 $rn */ | |
4463 | { | |
4464 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4465 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4466 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4467 | int UNUSED written = 0; | |
4468 | IADDR UNUSED pc = abuf->addr; | |
4469 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4470 | ||
4471 | { | |
4472 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 16); | |
4473 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4474 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4475 | } |
4476 | ||
4477 | #undef FLD | |
4478 | } | |
4479 | NEXT (vpc); | |
4480 | ||
4481 | CASE (sem, INSN_SHLR_COMPACT) : /* shlr $rn */ | |
4482 | { | |
4483 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4484 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4485 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4486 | int UNUSED written = 0; | |
4487 | IADDR UNUSED pc = abuf->addr; | |
4488 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4489 | ||
4490 | { | |
4491 | BI tmp_t; | |
4492 | tmp_t = ANDSI (GET_H_GRC (FLD (f_rn)), 1); | |
4493 | { | |
4494 | SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 1); | |
4495 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4496 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4497 | } |
4498 | { | |
4499 | BI opval = ((tmp_t) ? (1) : (0)); | |
4500 | SET_H_TBIT (opval); | |
4501 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4502 | } | |
4503 | } | |
4504 | ||
4505 | #undef FLD | |
4506 | } | |
4507 | NEXT (vpc); | |
4508 | ||
4509 | CASE (sem, INSN_SHLR2_COMPACT) : /* shlr2 $rn */ | |
4510 | { | |
4511 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4512 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4513 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4514 | int UNUSED written = 0; | |
4515 | IADDR UNUSED pc = abuf->addr; | |
4516 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4517 | ||
4518 | { | |
4519 | SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 2); | |
4520 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4521 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4522 | } |
4523 | ||
4524 | #undef FLD | |
4525 | } | |
4526 | NEXT (vpc); | |
4527 | ||
4528 | CASE (sem, INSN_SHLR8_COMPACT) : /* shlr8 $rn */ | |
4529 | { | |
4530 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4531 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4532 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4533 | int UNUSED written = 0; | |
4534 | IADDR UNUSED pc = abuf->addr; | |
4535 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4536 | ||
4537 | { | |
4538 | SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 8); | |
4539 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4540 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4541 | } |
4542 | ||
4543 | #undef FLD | |
4544 | } | |
4545 | NEXT (vpc); | |
4546 | ||
4547 | CASE (sem, INSN_SHLR16_COMPACT) : /* shlr16 $rn */ | |
4548 | { | |
4549 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4550 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4551 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4552 | int UNUSED written = 0; | |
4553 | IADDR UNUSED pc = abuf->addr; | |
4554 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4555 | ||
4556 | { | |
4557 | SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 16); | |
4558 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4559 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4560 | } |
4561 | ||
4562 | #undef FLD | |
4563 | } | |
4564 | NEXT (vpc); | |
4565 | ||
4566 | CASE (sem, INSN_STC_GBR_COMPACT) : /* stc gbr, $rn */ | |
4567 | { | |
4568 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4569 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4570 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4571 | int UNUSED written = 0; | |
4572 | IADDR UNUSED pc = abuf->addr; | |
4573 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4574 | ||
4575 | { | |
4576 | SI opval = GET_H_GBR (); | |
4577 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4578 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
4579 | } | |
4580 | ||
4581 | #undef FLD | |
4582 | } | |
4583 | NEXT (vpc); | |
4584 | ||
4585 | CASE (sem, INSN_STC_VBR_COMPACT) : /* stc vbr, $rn */ | |
4586 | { | |
4587 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4588 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4589 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4590 | int UNUSED written = 0; | |
4591 | IADDR UNUSED pc = abuf->addr; | |
4592 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4593 | ||
4594 | { | |
4595 | SI opval = GET_H_VBR (); | |
4596 | SET_H_GRC (FLD (f_rn), opval); | |
4597 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4598 | } |
4599 | ||
4600 | #undef FLD | |
4601 | } | |
4602 | NEXT (vpc); | |
4603 | ||
4604 | CASE (sem, INSN_STCL_GBR_COMPACT) : /* stc.l gbr, @-$rn */ | |
4605 | { | |
4606 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4607 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4608 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4609 | int UNUSED written = 0; | |
4610 | IADDR UNUSED pc = abuf->addr; | |
4611 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4612 | ||
4613 | { | |
4614 | DI tmp_addr; | |
4615 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4616 | { | |
4617 | SI opval = GET_H_GBR (); | |
4618 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
4619 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4620 | } | |
4621 | { | |
4622 | SI opval = tmp_addr; | |
4623 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4624 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
4625 | } | |
4626 | } | |
4627 | ||
4628 | #undef FLD | |
4629 | } | |
4630 | NEXT (vpc); | |
4631 | ||
4632 | CASE (sem, INSN_STCL_VBR_COMPACT) : /* stc.l vbr, @-$rn */ | |
4633 | { | |
4634 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4635 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4636 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4637 | int UNUSED written = 0; | |
4638 | IADDR UNUSED pc = abuf->addr; | |
4639 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4640 | ||
4641 | { | |
4642 | DI tmp_addr; | |
4643 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4644 | { | |
4645 | SI opval = GET_H_VBR (); | |
4646 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
4647 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4648 | } | |
4649 | { | |
4650 | SI opval = tmp_addr; | |
4651 | SET_H_GRC (FLD (f_rn), opval); | |
4652 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4653 | } |
4654 | } | |
4655 | ||
4656 | #undef FLD | |
4657 | } | |
4658 | NEXT (vpc); | |
4659 | ||
4660 | CASE (sem, INSN_STS_FPSCR_COMPACT) : /* sts fpscr, $rn */ | |
4661 | { | |
4662 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4663 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4664 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4665 | int UNUSED written = 0; | |
4666 | IADDR UNUSED pc = abuf->addr; | |
4667 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4668 | ||
4669 | { | |
c7e628df | 4670 | SI opval = CPU (h_fpscr); |
cbb38b47 | 4671 | SET_H_GRC (FLD (f_rn), opval); |
c7e628df | 4672 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4673 | } |
4674 | ||
4675 | #undef FLD | |
4676 | } | |
4677 | NEXT (vpc); | |
4678 | ||
4679 | CASE (sem, INSN_STSL_FPSCR_COMPACT) : /* sts.l fpscr, @-$rn */ | |
4680 | { | |
4681 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4682 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4683 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4684 | int UNUSED written = 0; | |
4685 | IADDR UNUSED pc = abuf->addr; | |
4686 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4687 | ||
4688 | { | |
4689 | DI tmp_addr; | |
4690 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4691 | { | |
c7e628df | 4692 | SI opval = CPU (h_fpscr); |
cbb38b47 BE |
4693 | SETMEMSI (current_cpu, pc, tmp_addr, opval); |
4694 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4695 | } | |
4696 | { | |
4697 | SI opval = tmp_addr; | |
4698 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4699 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4700 | } |
4701 | } | |
4702 | ||
4703 | #undef FLD | |
4704 | } | |
4705 | NEXT (vpc); | |
4706 | ||
4707 | CASE (sem, INSN_STS_FPUL_COMPACT) : /* sts fpul, $rn */ | |
4708 | { | |
4709 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4710 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4711 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4712 | int UNUSED written = 0; | |
4713 | IADDR UNUSED pc = abuf->addr; | |
4714 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4715 | ||
4716 | { | |
4717 | SI opval = SUBWORDSFSI (CPU (h_fr[((UINT) 32)])); | |
4718 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4719 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4720 | } |
4721 | ||
4722 | #undef FLD | |
4723 | } | |
4724 | NEXT (vpc); | |
4725 | ||
4726 | CASE (sem, INSN_STSL_FPUL_COMPACT) : /* sts.l fpul, @-$rn */ | |
4727 | { | |
4728 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4729 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4730 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4731 | int UNUSED written = 0; | |
4732 | IADDR UNUSED pc = abuf->addr; | |
4733 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4734 | ||
4735 | { | |
4736 | DI tmp_addr; | |
4737 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4738 | { | |
4739 | SF opval = CPU (h_fr[((UINT) 32)]); | |
4740 | SETMEMSF (current_cpu, pc, tmp_addr, opval); | |
4741 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); | |
4742 | } | |
4743 | { | |
4744 | SI opval = tmp_addr; | |
4745 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4746 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4747 | } |
4748 | } | |
4749 | ||
4750 | #undef FLD | |
4751 | } | |
4752 | NEXT (vpc); | |
4753 | ||
4754 | CASE (sem, INSN_STS_MACH_COMPACT) : /* sts mach, $rn */ | |
4755 | { | |
4756 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4757 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4758 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4759 | int UNUSED written = 0; | |
4760 | IADDR UNUSED pc = abuf->addr; | |
4761 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4762 | ||
4763 | { | |
4764 | SI opval = GET_H_MACH (); | |
4765 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4766 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4767 | } |
4768 | ||
4769 | #undef FLD | |
4770 | } | |
4771 | NEXT (vpc); | |
4772 | ||
4773 | CASE (sem, INSN_STSL_MACH_COMPACT) : /* sts.l mach, @-$rn */ | |
4774 | { | |
4775 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4776 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4777 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4778 | int UNUSED written = 0; | |
4779 | IADDR UNUSED pc = abuf->addr; | |
4780 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4781 | ||
4782 | { | |
4783 | DI tmp_addr; | |
4784 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4785 | { | |
4786 | SI opval = GET_H_MACH (); | |
4787 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
4788 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4789 | } | |
4790 | { | |
4791 | SI opval = tmp_addr; | |
4792 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4793 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4794 | } |
4795 | } | |
4796 | ||
4797 | #undef FLD | |
4798 | } | |
4799 | NEXT (vpc); | |
4800 | ||
4801 | CASE (sem, INSN_STS_MACL_COMPACT) : /* sts macl, $rn */ | |
4802 | { | |
4803 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4804 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4805 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4806 | int UNUSED written = 0; | |
4807 | IADDR UNUSED pc = abuf->addr; | |
4808 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4809 | ||
4810 | { | |
4811 | SI opval = GET_H_MACL (); | |
4812 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4813 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4814 | } |
4815 | ||
4816 | #undef FLD | |
4817 | } | |
4818 | NEXT (vpc); | |
4819 | ||
4820 | CASE (sem, INSN_STSL_MACL_COMPACT) : /* sts.l macl, @-$rn */ | |
4821 | { | |
4822 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4823 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4824 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4825 | int UNUSED written = 0; | |
4826 | IADDR UNUSED pc = abuf->addr; | |
4827 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4828 | ||
4829 | { | |
4830 | DI tmp_addr; | |
4831 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4832 | { | |
4833 | SI opval = GET_H_MACL (); | |
4834 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
4835 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4836 | } | |
4837 | { | |
4838 | SI opval = tmp_addr; | |
4839 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4840 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4841 | } |
4842 | } | |
4843 | ||
4844 | #undef FLD | |
4845 | } | |
4846 | NEXT (vpc); | |
4847 | ||
4848 | CASE (sem, INSN_STS_PR_COMPACT) : /* sts pr, $rn */ | |
4849 | { | |
4850 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4851 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4852 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4853 | int UNUSED written = 0; | |
4854 | IADDR UNUSED pc = abuf->addr; | |
4855 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4856 | ||
4857 | { | |
4858 | SI opval = GET_H_PR (); | |
4859 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4860 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4861 | } |
4862 | ||
4863 | #undef FLD | |
4864 | } | |
4865 | NEXT (vpc); | |
4866 | ||
4867 | CASE (sem, INSN_STSL_PR_COMPACT) : /* sts.l pr, @-$rn */ | |
4868 | { | |
4869 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4870 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4871 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4872 | int UNUSED written = 0; | |
4873 | IADDR UNUSED pc = abuf->addr; | |
4874 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4875 | ||
4876 | { | |
4877 | DI tmp_addr; | |
4878 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4879 | { | |
4880 | SI opval = GET_H_PR (); | |
4881 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
4882 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4883 | } | |
4884 | { | |
4885 | SI opval = tmp_addr; | |
4886 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4887 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4888 | } |
4889 | } | |
4890 | ||
4891 | #undef FLD | |
4892 | } | |
4893 | NEXT (vpc); | |
4894 | ||
4895 | CASE (sem, INSN_SUB_COMPACT) : /* sub $rm, $rn */ | |
4896 | { | |
4897 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4898 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4899 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4900 | int UNUSED written = 0; |
4901 | IADDR UNUSED pc = abuf->addr; | |
4902 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4903 | ||
4904 | { | |
4905 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
4906 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4907 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4908 | } |
4909 | ||
4910 | #undef FLD | |
4911 | } | |
4912 | NEXT (vpc); | |
4913 | ||
4914 | CASE (sem, INSN_SUBC_COMPACT) : /* subc $rm, $rn */ | |
4915 | { | |
4916 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4917 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4918 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4919 | int UNUSED written = 0; |
4920 | IADDR UNUSED pc = abuf->addr; | |
4921 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4922 | ||
4923 | { | |
4924 | BI tmp_flag; | |
4925 | tmp_flag = SUBCFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
4926 | { | |
4927 | SI opval = SUBCSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
4928 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4929 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4930 | } |
4931 | { | |
4932 | BI opval = tmp_flag; | |
4933 | SET_H_TBIT (opval); | |
4934 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4935 | } | |
4936 | } | |
4937 | ||
4938 | #undef FLD | |
4939 | } | |
4940 | NEXT (vpc); | |
4941 | ||
4942 | CASE (sem, INSN_SUBV_COMPACT) : /* subv $rm, $rn */ | |
4943 | { | |
4944 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4945 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4946 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4947 | int UNUSED written = 0; |
4948 | IADDR UNUSED pc = abuf->addr; | |
4949 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4950 | ||
4951 | { | |
4952 | BI tmp_t; | |
4953 | tmp_t = SUBOFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), 0); | |
4954 | { | |
4955 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
4956 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4957 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4958 | } |
4959 | { | |
4960 | BI opval = ((tmp_t) ? (1) : (0)); | |
4961 | SET_H_TBIT (opval); | |
4962 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4963 | } | |
4964 | } | |
4965 | ||
4966 | #undef FLD | |
4967 | } | |
4968 | NEXT (vpc); | |
4969 | ||
4970 | CASE (sem, INSN_SWAPB_COMPACT) : /* swap.b $rm, $rn */ | |
4971 | { | |
4972 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4973 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4974 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4975 | int UNUSED written = 0; |
4976 | IADDR UNUSED pc = abuf->addr; | |
4977 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4978 | ||
4979 | { | |
4980 | UHI tmp_top_half; | |
4981 | UQI tmp_byte1; | |
4982 | UQI tmp_byte0; | |
4983 | tmp_top_half = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 0); | |
4984 | tmp_byte1 = SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 2); | |
4985 | tmp_byte0 = SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3); | |
4986 | { | |
4987 | SI opval = ORSI (SLLSI (tmp_top_half, 16), ORSI (SLLSI (tmp_byte0, 8), tmp_byte1)); | |
4988 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4989 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4990 | } |
4991 | } | |
4992 | ||
4993 | #undef FLD | |
4994 | } | |
4995 | NEXT (vpc); | |
4996 | ||
4997 | CASE (sem, INSN_SWAPW_COMPACT) : /* swap.w $rm, $rn */ | |
4998 | { | |
4999 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5000 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 5001 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
5002 | int UNUSED written = 0; |
5003 | IADDR UNUSED pc = abuf->addr; | |
5004 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5005 | ||
5006 | { | |
5007 | SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rm)), 16), SLLSI (GET_H_GRC (FLD (f_rm)), 16)); | |
5008 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 5009 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
5010 | } |
5011 | ||
5012 | #undef FLD | |
5013 | } | |
5014 | NEXT (vpc); | |
5015 | ||
5016 | CASE (sem, INSN_TASB_COMPACT) : /* tas.b @$rn */ | |
5017 | { | |
5018 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5019 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5020 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
5021 | int UNUSED written = 0; | |
5022 | IADDR UNUSED pc = abuf->addr; | |
5023 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5024 | ||
5025 | { | |
5026 | UQI tmp_byte; | |
5027 | tmp_byte = GETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
5028 | { | |
5029 | BI opval = ((EQQI (tmp_byte, 0)) ? (1) : (0)); | |
5030 | SET_H_TBIT (opval); | |
5031 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
5032 | } | |
5033 | tmp_byte = ORQI (tmp_byte, 128); | |
5034 | { | |
5035 | UQI opval = tmp_byte; | |
5036 | SETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); | |
5037 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5038 | } | |
5039 | } | |
5040 | ||
5041 | #undef FLD | |
5042 | } | |
5043 | NEXT (vpc); | |
5044 | ||
5045 | CASE (sem, INSN_TRAPA_COMPACT) : /* trapa #$uimm8 */ | |
5046 | { | |
5047 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5048 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5049 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
5050 | int UNUSED written = 0; | |
5051 | IADDR UNUSED pc = abuf->addr; | |
5052 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5053 | ||
5054 | sh64_compact_trapa (current_cpu, FLD (f_imm8), pc); | |
5055 | ||
5056 | #undef FLD | |
5057 | } | |
5058 | NEXT (vpc); | |
5059 | ||
5060 | CASE (sem, INSN_TST_COMPACT) : /* tst $rm, $rn */ | |
5061 | { | |
5062 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5063 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 5064 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
5065 | int UNUSED written = 0; |
5066 | IADDR UNUSED pc = abuf->addr; | |
5067 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5068 | ||
5069 | { | |
5070 | BI opval = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))), 0)) ? (1) : (0)); | |
5071 | SET_H_TBIT (opval); | |
5072 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
5073 | } | |
5074 | ||
5075 | #undef FLD | |
5076 | } | |
5077 | NEXT (vpc); | |
5078 | ||
5079 | CASE (sem, INSN_TSTI_COMPACT) : /* tst #$uimm8, r0 */ | |
5080 | { | |
5081 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5082 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5083 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
5084 | int UNUSED written = 0; | |
5085 | IADDR UNUSED pc = abuf->addr; | |
5086 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5087 | ||
5088 | { | |
5089 | BI opval = ((EQSI (ANDSI (GET_H_GRC (((UINT) 0)), ZEXTSISI (FLD (f_imm8))), 0)) ? (1) : (0)); | |
5090 | SET_H_TBIT (opval); | |
5091 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
5092 | } | |
5093 | ||
5094 | #undef FLD | |
5095 | } | |
5096 | NEXT (vpc); | |
5097 | ||
5098 | CASE (sem, INSN_TSTB_COMPACT) : /* tst.b #$imm8, @(r0, gbr) */ | |
5099 | { | |
5100 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5101 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5102 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
5103 | int UNUSED written = 0; | |
5104 | IADDR UNUSED pc = abuf->addr; | |
5105 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5106 | ||
5107 | { | |
5108 | DI tmp_addr; | |
5109 | tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); | |
5110 | { | |
5111 | BI opval = ((EQQI (ANDQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)), 0)) ? (1) : (0)); | |
5112 | SET_H_TBIT (opval); | |
5113 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
5114 | } | |
5115 | } | |
5116 | ||
5117 | #undef FLD | |
5118 | } | |
5119 | NEXT (vpc); | |
5120 | ||
5121 | CASE (sem, INSN_XOR_COMPACT) : /* xor $rm64, $rn64 */ | |
5122 | { | |
5123 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5124 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 5125 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
5126 | int UNUSED written = 0; |
5127 | IADDR UNUSED pc = abuf->addr; | |
5128 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5129 | ||
5130 | { | |
5131 | DI opval = XORDI (GET_H_GR (FLD (f_rn)), GET_H_GR (FLD (f_rm))); | |
5132 | SET_H_GR (FLD (f_rn), opval); | |
c7e628df | 5133 | TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); |
cbb38b47 BE |
5134 | } |
5135 | ||
5136 | #undef FLD | |
5137 | } | |
5138 | NEXT (vpc); | |
5139 | ||
5140 | CASE (sem, INSN_XORI_COMPACT) : /* xor #$uimm8, r0 */ | |
5141 | { | |
5142 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5143 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5144 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
5145 | int UNUSED written = 0; | |
5146 | IADDR UNUSED pc = abuf->addr; | |
5147 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5148 | ||
5149 | { | |
c7e628df DB |
5150 | SI opval = XORSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); |
5151 | SET_H_GRC (((UINT) 0), opval); | |
5152 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
5153 | } |
5154 | ||
5155 | #undef FLD | |
5156 | } | |
5157 | NEXT (vpc); | |
5158 | ||
5159 | CASE (sem, INSN_XORB_COMPACT) : /* xor.b #$imm8, @(r0, gbr) */ | |
5160 | { | |
5161 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5162 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5163 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
5164 | int UNUSED written = 0; | |
5165 | IADDR UNUSED pc = abuf->addr; | |
5166 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5167 | ||
5168 | { | |
5169 | DI tmp_addr; | |
5170 | UQI tmp_data; | |
5171 | tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); | |
5172 | tmp_data = XORQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); | |
5173 | { | |
5174 | UQI opval = tmp_data; | |
5175 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
5176 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5177 | } | |
5178 | } | |
5179 | ||
5180 | #undef FLD | |
5181 | } | |
5182 | NEXT (vpc); | |
5183 | ||
5184 | CASE (sem, INSN_XTRCT_COMPACT) : /* xtrct $rm, $rn */ | |
5185 | { | |
5186 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5187 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 5188 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
5189 | int UNUSED written = 0; |
5190 | IADDR UNUSED pc = abuf->addr; | |
5191 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5192 | ||
5193 | { | |
5194 | SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rm)), 16), SRLSI (GET_H_GRC (FLD (f_rn)), 16)); | |
5195 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 5196 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
5197 | } |
5198 | ||
5199 | #undef FLD | |
5200 | } | |
5201 | NEXT (vpc); | |
5202 | ||
5203 | ||
5204 | } | |
5205 | ENDSWITCH (sem) /* End of semantic switch. */ | |
5206 | ||
5207 | /* At this point `vpc' contains the next insn to execute. */ | |
5208 | } | |
5209 | ||
5210 | #undef DEFINE_SWITCH | |
5211 | #endif /* DEFINE_SWITCH */ |