Commit | Line | Data |
---|---|---|
cbb38b47 BE |
1 | /* Simulator instruction semantics for sh64. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
ecd75fc8 | 5 | Copyright 1996-2014 Free Software Foundation, Inc. |
cbb38b47 | 6 | |
c7e628df | 7 | This file is part of the GNU simulators. |
cbb38b47 | 8 | |
fda1c30b DE |
9 | This file is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 3, or (at your option) | |
12 | any later version. | |
cbb38b47 | 13 | |
fda1c30b DE |
14 | It is distributed in the hope that it will be useful, but WITHOUT |
15 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
16 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
17 | License for more details. | |
cbb38b47 | 18 | |
fda1c30b | 19 | You should have received a copy of the GNU General Public License along |
51b318de | 20 | with this program; if not, see <http://www.gnu.org/licenses/>. |
cbb38b47 BE |
21 | |
22 | */ | |
23 | ||
24 | #ifdef DEFINE_LABELS | |
25 | ||
26 | /* The labels have the case they have because the enum of insn types | |
27 | is all uppercase and in the non-stdc case the insn symbol is built | |
28 | into the enum name. */ | |
29 | ||
30 | static struct { | |
31 | int index; | |
32 | void *label; | |
33 | } labels[] = { | |
34 | { SH64_COMPACT_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, | |
35 | { SH64_COMPACT_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, | |
36 | { SH64_COMPACT_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, | |
37 | { SH64_COMPACT_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, | |
38 | { SH64_COMPACT_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, | |
39 | { SH64_COMPACT_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, | |
40 | { SH64_COMPACT_INSN_ADD_COMPACT, && case_sem_INSN_ADD_COMPACT }, | |
41 | { SH64_COMPACT_INSN_ADDI_COMPACT, && case_sem_INSN_ADDI_COMPACT }, | |
42 | { SH64_COMPACT_INSN_ADDC_COMPACT, && case_sem_INSN_ADDC_COMPACT }, | |
43 | { SH64_COMPACT_INSN_ADDV_COMPACT, && case_sem_INSN_ADDV_COMPACT }, | |
44 | { SH64_COMPACT_INSN_AND_COMPACT, && case_sem_INSN_AND_COMPACT }, | |
45 | { SH64_COMPACT_INSN_ANDI_COMPACT, && case_sem_INSN_ANDI_COMPACT }, | |
46 | { SH64_COMPACT_INSN_ANDB_COMPACT, && case_sem_INSN_ANDB_COMPACT }, | |
47 | { SH64_COMPACT_INSN_BF_COMPACT, && case_sem_INSN_BF_COMPACT }, | |
48 | { SH64_COMPACT_INSN_BFS_COMPACT, && case_sem_INSN_BFS_COMPACT }, | |
49 | { SH64_COMPACT_INSN_BRA_COMPACT, && case_sem_INSN_BRA_COMPACT }, | |
50 | { SH64_COMPACT_INSN_BRAF_COMPACT, && case_sem_INSN_BRAF_COMPACT }, | |
51 | { SH64_COMPACT_INSN_BRK_COMPACT, && case_sem_INSN_BRK_COMPACT }, | |
52 | { SH64_COMPACT_INSN_BSR_COMPACT, && case_sem_INSN_BSR_COMPACT }, | |
53 | { SH64_COMPACT_INSN_BSRF_COMPACT, && case_sem_INSN_BSRF_COMPACT }, | |
54 | { SH64_COMPACT_INSN_BT_COMPACT, && case_sem_INSN_BT_COMPACT }, | |
55 | { SH64_COMPACT_INSN_BTS_COMPACT, && case_sem_INSN_BTS_COMPACT }, | |
56 | { SH64_COMPACT_INSN_CLRMAC_COMPACT, && case_sem_INSN_CLRMAC_COMPACT }, | |
57 | { SH64_COMPACT_INSN_CLRS_COMPACT, && case_sem_INSN_CLRS_COMPACT }, | |
58 | { SH64_COMPACT_INSN_CLRT_COMPACT, && case_sem_INSN_CLRT_COMPACT }, | |
59 | { SH64_COMPACT_INSN_CMPEQ_COMPACT, && case_sem_INSN_CMPEQ_COMPACT }, | |
60 | { SH64_COMPACT_INSN_CMPEQI_COMPACT, && case_sem_INSN_CMPEQI_COMPACT }, | |
61 | { SH64_COMPACT_INSN_CMPGE_COMPACT, && case_sem_INSN_CMPGE_COMPACT }, | |
62 | { SH64_COMPACT_INSN_CMPGT_COMPACT, && case_sem_INSN_CMPGT_COMPACT }, | |
63 | { SH64_COMPACT_INSN_CMPHI_COMPACT, && case_sem_INSN_CMPHI_COMPACT }, | |
64 | { SH64_COMPACT_INSN_CMPHS_COMPACT, && case_sem_INSN_CMPHS_COMPACT }, | |
65 | { SH64_COMPACT_INSN_CMPPL_COMPACT, && case_sem_INSN_CMPPL_COMPACT }, | |
66 | { SH64_COMPACT_INSN_CMPPZ_COMPACT, && case_sem_INSN_CMPPZ_COMPACT }, | |
67 | { SH64_COMPACT_INSN_CMPSTR_COMPACT, && case_sem_INSN_CMPSTR_COMPACT }, | |
68 | { SH64_COMPACT_INSN_DIV0S_COMPACT, && case_sem_INSN_DIV0S_COMPACT }, | |
69 | { SH64_COMPACT_INSN_DIV0U_COMPACT, && case_sem_INSN_DIV0U_COMPACT }, | |
70 | { SH64_COMPACT_INSN_DIV1_COMPACT, && case_sem_INSN_DIV1_COMPACT }, | |
c7e628df DB |
71 | { SH64_COMPACT_INSN_DIVU_COMPACT, && case_sem_INSN_DIVU_COMPACT }, |
72 | { SH64_COMPACT_INSN_MULR_COMPACT, && case_sem_INSN_MULR_COMPACT }, | |
cbb38b47 BE |
73 | { SH64_COMPACT_INSN_DMULSL_COMPACT, && case_sem_INSN_DMULSL_COMPACT }, |
74 | { SH64_COMPACT_INSN_DMULUL_COMPACT, && case_sem_INSN_DMULUL_COMPACT }, | |
75 | { SH64_COMPACT_INSN_DT_COMPACT, && case_sem_INSN_DT_COMPACT }, | |
76 | { SH64_COMPACT_INSN_EXTSB_COMPACT, && case_sem_INSN_EXTSB_COMPACT }, | |
77 | { SH64_COMPACT_INSN_EXTSW_COMPACT, && case_sem_INSN_EXTSW_COMPACT }, | |
78 | { SH64_COMPACT_INSN_EXTUB_COMPACT, && case_sem_INSN_EXTUB_COMPACT }, | |
79 | { SH64_COMPACT_INSN_EXTUW_COMPACT, && case_sem_INSN_EXTUW_COMPACT }, | |
80 | { SH64_COMPACT_INSN_FABS_COMPACT, && case_sem_INSN_FABS_COMPACT }, | |
81 | { SH64_COMPACT_INSN_FADD_COMPACT, && case_sem_INSN_FADD_COMPACT }, | |
82 | { SH64_COMPACT_INSN_FCMPEQ_COMPACT, && case_sem_INSN_FCMPEQ_COMPACT }, | |
83 | { SH64_COMPACT_INSN_FCMPGT_COMPACT, && case_sem_INSN_FCMPGT_COMPACT }, | |
84 | { SH64_COMPACT_INSN_FCNVDS_COMPACT, && case_sem_INSN_FCNVDS_COMPACT }, | |
85 | { SH64_COMPACT_INSN_FCNVSD_COMPACT, && case_sem_INSN_FCNVSD_COMPACT }, | |
86 | { SH64_COMPACT_INSN_FDIV_COMPACT, && case_sem_INSN_FDIV_COMPACT }, | |
87 | { SH64_COMPACT_INSN_FIPR_COMPACT, && case_sem_INSN_FIPR_COMPACT }, | |
88 | { SH64_COMPACT_INSN_FLDS_COMPACT, && case_sem_INSN_FLDS_COMPACT }, | |
89 | { SH64_COMPACT_INSN_FLDI0_COMPACT, && case_sem_INSN_FLDI0_COMPACT }, | |
90 | { SH64_COMPACT_INSN_FLDI1_COMPACT, && case_sem_INSN_FLDI1_COMPACT }, | |
91 | { SH64_COMPACT_INSN_FLOAT_COMPACT, && case_sem_INSN_FLOAT_COMPACT }, | |
92 | { SH64_COMPACT_INSN_FMAC_COMPACT, && case_sem_INSN_FMAC_COMPACT }, | |
93 | { SH64_COMPACT_INSN_FMOV1_COMPACT, && case_sem_INSN_FMOV1_COMPACT }, | |
94 | { SH64_COMPACT_INSN_FMOV2_COMPACT, && case_sem_INSN_FMOV2_COMPACT }, | |
95 | { SH64_COMPACT_INSN_FMOV3_COMPACT, && case_sem_INSN_FMOV3_COMPACT }, | |
96 | { SH64_COMPACT_INSN_FMOV4_COMPACT, && case_sem_INSN_FMOV4_COMPACT }, | |
97 | { SH64_COMPACT_INSN_FMOV5_COMPACT, && case_sem_INSN_FMOV5_COMPACT }, | |
98 | { SH64_COMPACT_INSN_FMOV6_COMPACT, && case_sem_INSN_FMOV6_COMPACT }, | |
99 | { SH64_COMPACT_INSN_FMOV7_COMPACT, && case_sem_INSN_FMOV7_COMPACT }, | |
c7e628df DB |
100 | { SH64_COMPACT_INSN_FMOV8_COMPACT, && case_sem_INSN_FMOV8_COMPACT }, |
101 | { SH64_COMPACT_INSN_FMOV9_COMPACT, && case_sem_INSN_FMOV9_COMPACT }, | |
cbb38b47 BE |
102 | { SH64_COMPACT_INSN_FMUL_COMPACT, && case_sem_INSN_FMUL_COMPACT }, |
103 | { SH64_COMPACT_INSN_FNEG_COMPACT, && case_sem_INSN_FNEG_COMPACT }, | |
104 | { SH64_COMPACT_INSN_FRCHG_COMPACT, && case_sem_INSN_FRCHG_COMPACT }, | |
105 | { SH64_COMPACT_INSN_FSCHG_COMPACT, && case_sem_INSN_FSCHG_COMPACT }, | |
106 | { SH64_COMPACT_INSN_FSQRT_COMPACT, && case_sem_INSN_FSQRT_COMPACT }, | |
107 | { SH64_COMPACT_INSN_FSTS_COMPACT, && case_sem_INSN_FSTS_COMPACT }, | |
108 | { SH64_COMPACT_INSN_FSUB_COMPACT, && case_sem_INSN_FSUB_COMPACT }, | |
109 | { SH64_COMPACT_INSN_FTRC_COMPACT, && case_sem_INSN_FTRC_COMPACT }, | |
110 | { SH64_COMPACT_INSN_FTRV_COMPACT, && case_sem_INSN_FTRV_COMPACT }, | |
111 | { SH64_COMPACT_INSN_JMP_COMPACT, && case_sem_INSN_JMP_COMPACT }, | |
112 | { SH64_COMPACT_INSN_JSR_COMPACT, && case_sem_INSN_JSR_COMPACT }, | |
c7e628df DB |
113 | { SH64_COMPACT_INSN_LDC_GBR_COMPACT, && case_sem_INSN_LDC_GBR_COMPACT }, |
114 | { SH64_COMPACT_INSN_LDC_VBR_COMPACT, && case_sem_INSN_LDC_VBR_COMPACT }, | |
115 | { SH64_COMPACT_INSN_LDC_SR_COMPACT, && case_sem_INSN_LDC_SR_COMPACT }, | |
116 | { SH64_COMPACT_INSN_LDCL_GBR_COMPACT, && case_sem_INSN_LDCL_GBR_COMPACT }, | |
117 | { SH64_COMPACT_INSN_LDCL_VBR_COMPACT, && case_sem_INSN_LDCL_VBR_COMPACT }, | |
cbb38b47 BE |
118 | { SH64_COMPACT_INSN_LDS_FPSCR_COMPACT, && case_sem_INSN_LDS_FPSCR_COMPACT }, |
119 | { SH64_COMPACT_INSN_LDSL_FPSCR_COMPACT, && case_sem_INSN_LDSL_FPSCR_COMPACT }, | |
120 | { SH64_COMPACT_INSN_LDS_FPUL_COMPACT, && case_sem_INSN_LDS_FPUL_COMPACT }, | |
121 | { SH64_COMPACT_INSN_LDSL_FPUL_COMPACT, && case_sem_INSN_LDSL_FPUL_COMPACT }, | |
122 | { SH64_COMPACT_INSN_LDS_MACH_COMPACT, && case_sem_INSN_LDS_MACH_COMPACT }, | |
123 | { SH64_COMPACT_INSN_LDSL_MACH_COMPACT, && case_sem_INSN_LDSL_MACH_COMPACT }, | |
124 | { SH64_COMPACT_INSN_LDS_MACL_COMPACT, && case_sem_INSN_LDS_MACL_COMPACT }, | |
125 | { SH64_COMPACT_INSN_LDSL_MACL_COMPACT, && case_sem_INSN_LDSL_MACL_COMPACT }, | |
126 | { SH64_COMPACT_INSN_LDS_PR_COMPACT, && case_sem_INSN_LDS_PR_COMPACT }, | |
127 | { SH64_COMPACT_INSN_LDSL_PR_COMPACT, && case_sem_INSN_LDSL_PR_COMPACT }, | |
128 | { SH64_COMPACT_INSN_MACL_COMPACT, && case_sem_INSN_MACL_COMPACT }, | |
129 | { SH64_COMPACT_INSN_MACW_COMPACT, && case_sem_INSN_MACW_COMPACT }, | |
130 | { SH64_COMPACT_INSN_MOV_COMPACT, && case_sem_INSN_MOV_COMPACT }, | |
131 | { SH64_COMPACT_INSN_MOVI_COMPACT, && case_sem_INSN_MOVI_COMPACT }, | |
c7e628df | 132 | { SH64_COMPACT_INSN_MOVI20_COMPACT, && case_sem_INSN_MOVI20_COMPACT }, |
cbb38b47 BE |
133 | { SH64_COMPACT_INSN_MOVB1_COMPACT, && case_sem_INSN_MOVB1_COMPACT }, |
134 | { SH64_COMPACT_INSN_MOVB2_COMPACT, && case_sem_INSN_MOVB2_COMPACT }, | |
135 | { SH64_COMPACT_INSN_MOVB3_COMPACT, && case_sem_INSN_MOVB3_COMPACT }, | |
136 | { SH64_COMPACT_INSN_MOVB4_COMPACT, && case_sem_INSN_MOVB4_COMPACT }, | |
137 | { SH64_COMPACT_INSN_MOVB5_COMPACT, && case_sem_INSN_MOVB5_COMPACT }, | |
138 | { SH64_COMPACT_INSN_MOVB6_COMPACT, && case_sem_INSN_MOVB6_COMPACT }, | |
139 | { SH64_COMPACT_INSN_MOVB7_COMPACT, && case_sem_INSN_MOVB7_COMPACT }, | |
140 | { SH64_COMPACT_INSN_MOVB8_COMPACT, && case_sem_INSN_MOVB8_COMPACT }, | |
141 | { SH64_COMPACT_INSN_MOVB9_COMPACT, && case_sem_INSN_MOVB9_COMPACT }, | |
142 | { SH64_COMPACT_INSN_MOVB10_COMPACT, && case_sem_INSN_MOVB10_COMPACT }, | |
143 | { SH64_COMPACT_INSN_MOVL1_COMPACT, && case_sem_INSN_MOVL1_COMPACT }, | |
144 | { SH64_COMPACT_INSN_MOVL2_COMPACT, && case_sem_INSN_MOVL2_COMPACT }, | |
145 | { SH64_COMPACT_INSN_MOVL3_COMPACT, && case_sem_INSN_MOVL3_COMPACT }, | |
146 | { SH64_COMPACT_INSN_MOVL4_COMPACT, && case_sem_INSN_MOVL4_COMPACT }, | |
147 | { SH64_COMPACT_INSN_MOVL5_COMPACT, && case_sem_INSN_MOVL5_COMPACT }, | |
148 | { SH64_COMPACT_INSN_MOVL6_COMPACT, && case_sem_INSN_MOVL6_COMPACT }, | |
149 | { SH64_COMPACT_INSN_MOVL7_COMPACT, && case_sem_INSN_MOVL7_COMPACT }, | |
150 | { SH64_COMPACT_INSN_MOVL8_COMPACT, && case_sem_INSN_MOVL8_COMPACT }, | |
151 | { SH64_COMPACT_INSN_MOVL9_COMPACT, && case_sem_INSN_MOVL9_COMPACT }, | |
152 | { SH64_COMPACT_INSN_MOVL10_COMPACT, && case_sem_INSN_MOVL10_COMPACT }, | |
153 | { SH64_COMPACT_INSN_MOVL11_COMPACT, && case_sem_INSN_MOVL11_COMPACT }, | |
c7e628df DB |
154 | { SH64_COMPACT_INSN_MOVL12_COMPACT, && case_sem_INSN_MOVL12_COMPACT }, |
155 | { SH64_COMPACT_INSN_MOVL13_COMPACT, && case_sem_INSN_MOVL13_COMPACT }, | |
cbb38b47 BE |
156 | { SH64_COMPACT_INSN_MOVW1_COMPACT, && case_sem_INSN_MOVW1_COMPACT }, |
157 | { SH64_COMPACT_INSN_MOVW2_COMPACT, && case_sem_INSN_MOVW2_COMPACT }, | |
158 | { SH64_COMPACT_INSN_MOVW3_COMPACT, && case_sem_INSN_MOVW3_COMPACT }, | |
159 | { SH64_COMPACT_INSN_MOVW4_COMPACT, && case_sem_INSN_MOVW4_COMPACT }, | |
160 | { SH64_COMPACT_INSN_MOVW5_COMPACT, && case_sem_INSN_MOVW5_COMPACT }, | |
161 | { SH64_COMPACT_INSN_MOVW6_COMPACT, && case_sem_INSN_MOVW6_COMPACT }, | |
162 | { SH64_COMPACT_INSN_MOVW7_COMPACT, && case_sem_INSN_MOVW7_COMPACT }, | |
163 | { SH64_COMPACT_INSN_MOVW8_COMPACT, && case_sem_INSN_MOVW8_COMPACT }, | |
164 | { SH64_COMPACT_INSN_MOVW9_COMPACT, && case_sem_INSN_MOVW9_COMPACT }, | |
165 | { SH64_COMPACT_INSN_MOVW10_COMPACT, && case_sem_INSN_MOVW10_COMPACT }, | |
166 | { SH64_COMPACT_INSN_MOVW11_COMPACT, && case_sem_INSN_MOVW11_COMPACT }, | |
167 | { SH64_COMPACT_INSN_MOVA_COMPACT, && case_sem_INSN_MOVA_COMPACT }, | |
168 | { SH64_COMPACT_INSN_MOVCAL_COMPACT, && case_sem_INSN_MOVCAL_COMPACT }, | |
c7e628df | 169 | { SH64_COMPACT_INSN_MOVCOL_COMPACT, && case_sem_INSN_MOVCOL_COMPACT }, |
cbb38b47 | 170 | { SH64_COMPACT_INSN_MOVT_COMPACT, && case_sem_INSN_MOVT_COMPACT }, |
c7e628df DB |
171 | { SH64_COMPACT_INSN_MOVUAL_COMPACT, && case_sem_INSN_MOVUAL_COMPACT }, |
172 | { SH64_COMPACT_INSN_MOVUAL2_COMPACT, && case_sem_INSN_MOVUAL2_COMPACT }, | |
cbb38b47 BE |
173 | { SH64_COMPACT_INSN_MULL_COMPACT, && case_sem_INSN_MULL_COMPACT }, |
174 | { SH64_COMPACT_INSN_MULSW_COMPACT, && case_sem_INSN_MULSW_COMPACT }, | |
175 | { SH64_COMPACT_INSN_MULUW_COMPACT, && case_sem_INSN_MULUW_COMPACT }, | |
176 | { SH64_COMPACT_INSN_NEG_COMPACT, && case_sem_INSN_NEG_COMPACT }, | |
177 | { SH64_COMPACT_INSN_NEGC_COMPACT, && case_sem_INSN_NEGC_COMPACT }, | |
178 | { SH64_COMPACT_INSN_NOP_COMPACT, && case_sem_INSN_NOP_COMPACT }, | |
179 | { SH64_COMPACT_INSN_NOT_COMPACT, && case_sem_INSN_NOT_COMPACT }, | |
180 | { SH64_COMPACT_INSN_OCBI_COMPACT, && case_sem_INSN_OCBI_COMPACT }, | |
181 | { SH64_COMPACT_INSN_OCBP_COMPACT, && case_sem_INSN_OCBP_COMPACT }, | |
182 | { SH64_COMPACT_INSN_OCBWB_COMPACT, && case_sem_INSN_OCBWB_COMPACT }, | |
183 | { SH64_COMPACT_INSN_OR_COMPACT, && case_sem_INSN_OR_COMPACT }, | |
184 | { SH64_COMPACT_INSN_ORI_COMPACT, && case_sem_INSN_ORI_COMPACT }, | |
185 | { SH64_COMPACT_INSN_ORB_COMPACT, && case_sem_INSN_ORB_COMPACT }, | |
186 | { SH64_COMPACT_INSN_PREF_COMPACT, && case_sem_INSN_PREF_COMPACT }, | |
187 | { SH64_COMPACT_INSN_ROTCL_COMPACT, && case_sem_INSN_ROTCL_COMPACT }, | |
188 | { SH64_COMPACT_INSN_ROTCR_COMPACT, && case_sem_INSN_ROTCR_COMPACT }, | |
189 | { SH64_COMPACT_INSN_ROTL_COMPACT, && case_sem_INSN_ROTL_COMPACT }, | |
190 | { SH64_COMPACT_INSN_ROTR_COMPACT, && case_sem_INSN_ROTR_COMPACT }, | |
191 | { SH64_COMPACT_INSN_RTS_COMPACT, && case_sem_INSN_RTS_COMPACT }, | |
192 | { SH64_COMPACT_INSN_SETS_COMPACT, && case_sem_INSN_SETS_COMPACT }, | |
193 | { SH64_COMPACT_INSN_SETT_COMPACT, && case_sem_INSN_SETT_COMPACT }, | |
194 | { SH64_COMPACT_INSN_SHAD_COMPACT, && case_sem_INSN_SHAD_COMPACT }, | |
195 | { SH64_COMPACT_INSN_SHAL_COMPACT, && case_sem_INSN_SHAL_COMPACT }, | |
196 | { SH64_COMPACT_INSN_SHAR_COMPACT, && case_sem_INSN_SHAR_COMPACT }, | |
197 | { SH64_COMPACT_INSN_SHLD_COMPACT, && case_sem_INSN_SHLD_COMPACT }, | |
198 | { SH64_COMPACT_INSN_SHLL_COMPACT, && case_sem_INSN_SHLL_COMPACT }, | |
199 | { SH64_COMPACT_INSN_SHLL2_COMPACT, && case_sem_INSN_SHLL2_COMPACT }, | |
200 | { SH64_COMPACT_INSN_SHLL8_COMPACT, && case_sem_INSN_SHLL8_COMPACT }, | |
201 | { SH64_COMPACT_INSN_SHLL16_COMPACT, && case_sem_INSN_SHLL16_COMPACT }, | |
202 | { SH64_COMPACT_INSN_SHLR_COMPACT, && case_sem_INSN_SHLR_COMPACT }, | |
203 | { SH64_COMPACT_INSN_SHLR2_COMPACT, && case_sem_INSN_SHLR2_COMPACT }, | |
204 | { SH64_COMPACT_INSN_SHLR8_COMPACT, && case_sem_INSN_SHLR8_COMPACT }, | |
205 | { SH64_COMPACT_INSN_SHLR16_COMPACT, && case_sem_INSN_SHLR16_COMPACT }, | |
206 | { SH64_COMPACT_INSN_STC_GBR_COMPACT, && case_sem_INSN_STC_GBR_COMPACT }, | |
c7e628df | 207 | { SH64_COMPACT_INSN_STC_VBR_COMPACT, && case_sem_INSN_STC_VBR_COMPACT }, |
cbb38b47 | 208 | { SH64_COMPACT_INSN_STCL_GBR_COMPACT, && case_sem_INSN_STCL_GBR_COMPACT }, |
c7e628df | 209 | { SH64_COMPACT_INSN_STCL_VBR_COMPACT, && case_sem_INSN_STCL_VBR_COMPACT }, |
cbb38b47 BE |
210 | { SH64_COMPACT_INSN_STS_FPSCR_COMPACT, && case_sem_INSN_STS_FPSCR_COMPACT }, |
211 | { SH64_COMPACT_INSN_STSL_FPSCR_COMPACT, && case_sem_INSN_STSL_FPSCR_COMPACT }, | |
212 | { SH64_COMPACT_INSN_STS_FPUL_COMPACT, && case_sem_INSN_STS_FPUL_COMPACT }, | |
213 | { SH64_COMPACT_INSN_STSL_FPUL_COMPACT, && case_sem_INSN_STSL_FPUL_COMPACT }, | |
214 | { SH64_COMPACT_INSN_STS_MACH_COMPACT, && case_sem_INSN_STS_MACH_COMPACT }, | |
215 | { SH64_COMPACT_INSN_STSL_MACH_COMPACT, && case_sem_INSN_STSL_MACH_COMPACT }, | |
216 | { SH64_COMPACT_INSN_STS_MACL_COMPACT, && case_sem_INSN_STS_MACL_COMPACT }, | |
217 | { SH64_COMPACT_INSN_STSL_MACL_COMPACT, && case_sem_INSN_STSL_MACL_COMPACT }, | |
218 | { SH64_COMPACT_INSN_STS_PR_COMPACT, && case_sem_INSN_STS_PR_COMPACT }, | |
219 | { SH64_COMPACT_INSN_STSL_PR_COMPACT, && case_sem_INSN_STSL_PR_COMPACT }, | |
220 | { SH64_COMPACT_INSN_SUB_COMPACT, && case_sem_INSN_SUB_COMPACT }, | |
221 | { SH64_COMPACT_INSN_SUBC_COMPACT, && case_sem_INSN_SUBC_COMPACT }, | |
222 | { SH64_COMPACT_INSN_SUBV_COMPACT, && case_sem_INSN_SUBV_COMPACT }, | |
223 | { SH64_COMPACT_INSN_SWAPB_COMPACT, && case_sem_INSN_SWAPB_COMPACT }, | |
224 | { SH64_COMPACT_INSN_SWAPW_COMPACT, && case_sem_INSN_SWAPW_COMPACT }, | |
225 | { SH64_COMPACT_INSN_TASB_COMPACT, && case_sem_INSN_TASB_COMPACT }, | |
226 | { SH64_COMPACT_INSN_TRAPA_COMPACT, && case_sem_INSN_TRAPA_COMPACT }, | |
227 | { SH64_COMPACT_INSN_TST_COMPACT, && case_sem_INSN_TST_COMPACT }, | |
228 | { SH64_COMPACT_INSN_TSTI_COMPACT, && case_sem_INSN_TSTI_COMPACT }, | |
229 | { SH64_COMPACT_INSN_TSTB_COMPACT, && case_sem_INSN_TSTB_COMPACT }, | |
230 | { SH64_COMPACT_INSN_XOR_COMPACT, && case_sem_INSN_XOR_COMPACT }, | |
231 | { SH64_COMPACT_INSN_XORI_COMPACT, && case_sem_INSN_XORI_COMPACT }, | |
232 | { SH64_COMPACT_INSN_XORB_COMPACT, && case_sem_INSN_XORB_COMPACT }, | |
233 | { SH64_COMPACT_INSN_XTRCT_COMPACT, && case_sem_INSN_XTRCT_COMPACT }, | |
234 | { 0, 0 } | |
235 | }; | |
236 | int i; | |
237 | ||
238 | for (i = 0; labels[i].label != 0; ++i) | |
239 | { | |
240 | #if FAST_P | |
241 | CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; | |
242 | #else | |
243 | CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; | |
244 | #endif | |
245 | } | |
246 | ||
247 | #undef DEFINE_LABELS | |
248 | #endif /* DEFINE_LABELS */ | |
249 | ||
250 | #ifdef DEFINE_SWITCH | |
251 | ||
252 | /* If hyper-fast [well not unnecessarily slow] execution is selected, turn | |
253 | off frills like tracing and profiling. */ | |
254 | /* FIXME: A better way would be to have TRACE_RESULT check for something | |
255 | that can cause it to be optimized out. Another way would be to emit | |
256 | special handlers into the instruction "stream". */ | |
257 | ||
258 | #if FAST_P | |
259 | #undef TRACE_RESULT | |
260 | #define TRACE_RESULT(cpu, abuf, name, type, val) | |
261 | #endif | |
262 | ||
263 | #undef GET_ATTR | |
cbb38b47 | 264 | #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) |
cbb38b47 BE |
265 | |
266 | { | |
267 | ||
268 | #if WITH_SCACHE_PBB | |
269 | ||
270 | /* Branch to next handler without going around main loop. */ | |
271 | #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case | |
272 | SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) | |
273 | ||
274 | #else /* ! WITH_SCACHE_PBB */ | |
275 | ||
276 | #define NEXT(vpc) BREAK (sem) | |
277 | #ifdef __GNUC__ | |
278 | #if FAST_P | |
279 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) | |
280 | #else | |
281 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) | |
282 | #endif | |
283 | #else | |
284 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) | |
285 | #endif | |
286 | ||
287 | #endif /* ! WITH_SCACHE_PBB */ | |
288 | ||
289 | { | |
290 | ||
291 | CASE (sem, INSN_X_INVALID) : /* --invalid-- */ | |
292 | { | |
293 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
294 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 295 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
296 | int UNUSED written = 0; |
297 | IADDR UNUSED pc = abuf->addr; | |
298 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
299 | ||
300 | { | |
301 | /* Update the recorded pc in the cpu state struct. | |
302 | Only necessary for WITH_SCACHE case, but to avoid the | |
303 | conditional compilation .... */ | |
304 | SET_H_PC (pc); | |
305 | /* Virtual insns have zero size. Overwrite vpc with address of next insn | |
306 | using the default-insn-bitsize spec. When executing insns in parallel | |
307 | we may want to queue the fault and continue execution. */ | |
308 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
309 | vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); | |
310 | } | |
311 | ||
312 | #undef FLD | |
313 | } | |
314 | NEXT (vpc); | |
315 | ||
316 | CASE (sem, INSN_X_AFTER) : /* --after-- */ | |
317 | { | |
318 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
319 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 320 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
321 | int UNUSED written = 0; |
322 | IADDR UNUSED pc = abuf->addr; | |
323 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
324 | ||
325 | { | |
326 | #if WITH_SCACHE_PBB_SH64_COMPACT | |
327 | sh64_compact_pbb_after (current_cpu, sem_arg); | |
328 | #endif | |
329 | } | |
330 | ||
331 | #undef FLD | |
332 | } | |
333 | NEXT (vpc); | |
334 | ||
335 | CASE (sem, INSN_X_BEFORE) : /* --before-- */ | |
336 | { | |
337 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
338 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 339 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
340 | int UNUSED written = 0; |
341 | IADDR UNUSED pc = abuf->addr; | |
342 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
343 | ||
344 | { | |
345 | #if WITH_SCACHE_PBB_SH64_COMPACT | |
346 | sh64_compact_pbb_before (current_cpu, sem_arg); | |
347 | #endif | |
348 | } | |
349 | ||
350 | #undef FLD | |
351 | } | |
352 | NEXT (vpc); | |
353 | ||
354 | CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ | |
355 | { | |
356 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
357 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 358 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
359 | int UNUSED written = 0; |
360 | IADDR UNUSED pc = abuf->addr; | |
361 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
362 | ||
363 | { | |
364 | #if WITH_SCACHE_PBB_SH64_COMPACT | |
365 | #ifdef DEFINE_SWITCH | |
366 | vpc = sh64_compact_pbb_cti_chain (current_cpu, sem_arg, | |
367 | pbb_br_type, pbb_br_npc); | |
368 | BREAK (sem); | |
369 | #else | |
370 | /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ | |
371 | vpc = sh64_compact_pbb_cti_chain (current_cpu, sem_arg, | |
372 | CPU_PBB_BR_TYPE (current_cpu), | |
373 | CPU_PBB_BR_NPC (current_cpu)); | |
374 | #endif | |
375 | #endif | |
376 | } | |
377 | ||
378 | #undef FLD | |
379 | } | |
380 | NEXT (vpc); | |
381 | ||
382 | CASE (sem, INSN_X_CHAIN) : /* --chain-- */ | |
383 | { | |
384 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
385 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 386 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
387 | int UNUSED written = 0; |
388 | IADDR UNUSED pc = abuf->addr; | |
389 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
390 | ||
391 | { | |
392 | #if WITH_SCACHE_PBB_SH64_COMPACT | |
393 | vpc = sh64_compact_pbb_chain (current_cpu, sem_arg); | |
394 | #ifdef DEFINE_SWITCH | |
395 | BREAK (sem); | |
396 | #endif | |
397 | #endif | |
398 | } | |
399 | ||
400 | #undef FLD | |
401 | } | |
402 | NEXT (vpc); | |
403 | ||
404 | CASE (sem, INSN_X_BEGIN) : /* --begin-- */ | |
405 | { | |
406 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
407 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 408 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
409 | int UNUSED written = 0; |
410 | IADDR UNUSED pc = abuf->addr; | |
411 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
412 | ||
413 | { | |
414 | #if WITH_SCACHE_PBB_SH64_COMPACT | |
415 | #if defined DEFINE_SWITCH || defined FAST_P | |
416 | /* In the switch case FAST_P is a constant, allowing several optimizations | |
417 | in any called inline functions. */ | |
418 | vpc = sh64_compact_pbb_begin (current_cpu, FAST_P); | |
419 | #else | |
420 | #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ | |
421 | vpc = sh64_compact_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); | |
422 | #else | |
423 | vpc = sh64_compact_pbb_begin (current_cpu, 0); | |
424 | #endif | |
425 | #endif | |
426 | #endif | |
427 | } | |
428 | ||
429 | #undef FLD | |
430 | } | |
431 | NEXT (vpc); | |
432 | ||
433 | CASE (sem, INSN_ADD_COMPACT) : /* add $rm, $rn */ | |
434 | { | |
435 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
436 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 437 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
438 | int UNUSED written = 0; |
439 | IADDR UNUSED pc = abuf->addr; | |
440 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
441 | ||
442 | { | |
443 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
444 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 445 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
446 | } |
447 | ||
448 | #undef FLD | |
449 | } | |
450 | NEXT (vpc); | |
451 | ||
452 | CASE (sem, INSN_ADDI_COMPACT) : /* add #$imm8, $rn */ | |
453 | { | |
454 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
455 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
456 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
457 | int UNUSED written = 0; | |
458 | IADDR UNUSED pc = abuf->addr; | |
459 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
460 | ||
461 | { | |
462 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), EXTQISI (ANDQI (FLD (f_imm8), 255))); | |
463 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 464 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
465 | } |
466 | ||
467 | #undef FLD | |
468 | } | |
469 | NEXT (vpc); | |
470 | ||
471 | CASE (sem, INSN_ADDC_COMPACT) : /* addc $rm, $rn */ | |
472 | { | |
473 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
474 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 475 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
476 | int UNUSED written = 0; |
477 | IADDR UNUSED pc = abuf->addr; | |
478 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
479 | ||
480 | { | |
481 | BI tmp_flag; | |
482 | tmp_flag = ADDCFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
483 | { | |
484 | SI opval = ADDCSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
485 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 486 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
487 | } |
488 | { | |
489 | BI opval = tmp_flag; | |
490 | SET_H_TBIT (opval); | |
491 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
492 | } | |
493 | } | |
494 | ||
495 | #undef FLD | |
496 | } | |
497 | NEXT (vpc); | |
498 | ||
499 | CASE (sem, INSN_ADDV_COMPACT) : /* addv $rm, $rn */ | |
500 | { | |
501 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
502 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 503 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
504 | int UNUSED written = 0; |
505 | IADDR UNUSED pc = abuf->addr; | |
506 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
507 | ||
508 | { | |
509 | BI tmp_t; | |
510 | tmp_t = ADDOFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), 0); | |
511 | { | |
512 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
513 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 514 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
515 | } |
516 | { | |
517 | BI opval = tmp_t; | |
518 | SET_H_TBIT (opval); | |
519 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
520 | } | |
521 | } | |
522 | ||
523 | #undef FLD | |
524 | } | |
525 | NEXT (vpc); | |
526 | ||
527 | CASE (sem, INSN_AND_COMPACT) : /* and $rm64, $rn64 */ | |
528 | { | |
529 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
530 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 531 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
532 | int UNUSED written = 0; |
533 | IADDR UNUSED pc = abuf->addr; | |
534 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
535 | ||
536 | { | |
537 | DI opval = ANDDI (GET_H_GR (FLD (f_rm)), GET_H_GR (FLD (f_rn))); | |
538 | SET_H_GR (FLD (f_rn), opval); | |
c7e628df | 539 | TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); |
cbb38b47 BE |
540 | } |
541 | ||
542 | #undef FLD | |
543 | } | |
544 | NEXT (vpc); | |
545 | ||
546 | CASE (sem, INSN_ANDI_COMPACT) : /* and #$uimm8, r0 */ | |
547 | { | |
548 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
549 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
550 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
551 | int UNUSED written = 0; | |
552 | IADDR UNUSED pc = abuf->addr; | |
553 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
554 | ||
555 | { | |
556 | SI opval = ANDSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); | |
557 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 558 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
559 | } |
560 | ||
561 | #undef FLD | |
562 | } | |
563 | NEXT (vpc); | |
564 | ||
565 | CASE (sem, INSN_ANDB_COMPACT) : /* and.b #$imm8, @(r0, gbr) */ | |
566 | { | |
567 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
568 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
569 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
570 | int UNUSED written = 0; | |
571 | IADDR UNUSED pc = abuf->addr; | |
572 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
573 | ||
574 | { | |
575 | DI tmp_addr; | |
576 | UQI tmp_data; | |
577 | tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); | |
578 | tmp_data = ANDQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); | |
579 | { | |
580 | UQI opval = tmp_data; | |
581 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
582 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
583 | } | |
584 | } | |
585 | ||
586 | #undef FLD | |
587 | } | |
588 | NEXT (vpc); | |
589 | ||
590 | CASE (sem, INSN_BF_COMPACT) : /* bf $disp8 */ | |
591 | { | |
592 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
593 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
594 | #define FLD(f) abuf->fields.sfmt_bf_compact.f | |
595 | int UNUSED written = 0; | |
596 | IADDR UNUSED pc = abuf->addr; | |
597 | SEM_BRANCH_INIT | |
598 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
599 | ||
600 | if (NOTBI (GET_H_TBIT ())) { | |
601 | { | |
602 | UDI opval = FLD (i_disp8); | |
603 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
604 | written |= (1 << 2); | |
605 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
606 | } | |
607 | } | |
608 | ||
609 | abuf->written = written; | |
610 | SEM_BRANCH_FINI (vpc); | |
611 | #undef FLD | |
612 | } | |
613 | NEXT (vpc); | |
614 | ||
615 | CASE (sem, INSN_BFS_COMPACT) : /* bf/s $disp8 */ | |
616 | { | |
617 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
618 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
619 | #define FLD(f) abuf->fields.sfmt_bf_compact.f | |
620 | int UNUSED written = 0; | |
621 | IADDR UNUSED pc = abuf->addr; | |
622 | SEM_BRANCH_INIT | |
623 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
624 | ||
625 | if (NOTBI (GET_H_TBIT ())) { | |
c7e628df DB |
626 | { |
627 | { | |
628 | UDI opval = ADDDI (pc, 2); | |
629 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
630 | written |= (1 << 3); | |
631 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
632 | } | |
633 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
634 | { |
635 | { | |
636 | UDI opval = FLD (i_disp8); | |
637 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
c7e628df | 638 | written |= (1 << 3); |
cbb38b47 BE |
639 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); |
640 | } | |
641 | } | |
c7e628df | 642 | } |
cbb38b47 BE |
643 | } |
644 | ||
645 | abuf->written = written; | |
646 | SEM_BRANCH_FINI (vpc); | |
647 | #undef FLD | |
648 | } | |
649 | NEXT (vpc); | |
650 | ||
651 | CASE (sem, INSN_BRA_COMPACT) : /* bra $disp12 */ | |
652 | { | |
653 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
654 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
655 | #define FLD(f) abuf->fields.sfmt_bra_compact.f | |
656 | int UNUSED written = 0; | |
657 | IADDR UNUSED pc = abuf->addr; | |
658 | SEM_BRANCH_INIT | |
659 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
660 | ||
c7e628df DB |
661 | { |
662 | { | |
663 | UDI opval = ADDDI (pc, 2); | |
664 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
665 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
666 | } | |
667 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
668 | { |
669 | { | |
670 | UDI opval = FLD (i_disp12); | |
671 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
672 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
673 | } | |
c7e628df | 674 | } |
cbb38b47 BE |
675 | } |
676 | ||
677 | SEM_BRANCH_FINI (vpc); | |
678 | #undef FLD | |
679 | } | |
680 | NEXT (vpc); | |
681 | ||
682 | CASE (sem, INSN_BRAF_COMPACT) : /* braf $rn */ | |
683 | { | |
684 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
685 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
686 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
687 | int UNUSED written = 0; | |
688 | IADDR UNUSED pc = abuf->addr; | |
689 | SEM_BRANCH_INIT | |
690 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
691 | ||
c7e628df DB |
692 | { |
693 | { | |
694 | UDI opval = ADDDI (pc, 2); | |
695 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
696 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
697 | } | |
698 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
699 | { |
700 | { | |
701 | UDI opval = ADDDI (EXTSIDI (GET_H_GRC (FLD (f_rn))), ADDDI (pc, 4)); | |
702 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
703 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
704 | } | |
c7e628df | 705 | } |
cbb38b47 BE |
706 | } |
707 | ||
708 | SEM_BRANCH_FINI (vpc); | |
709 | #undef FLD | |
710 | } | |
711 | NEXT (vpc); | |
712 | ||
713 | CASE (sem, INSN_BRK_COMPACT) : /* brk */ | |
714 | { | |
715 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
716 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 717 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
718 | int UNUSED written = 0; |
719 | IADDR UNUSED pc = abuf->addr; | |
720 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
721 | ||
722 | sh64_break (current_cpu, pc); | |
723 | ||
724 | #undef FLD | |
725 | } | |
726 | NEXT (vpc); | |
727 | ||
728 | CASE (sem, INSN_BSR_COMPACT) : /* bsr $disp12 */ | |
729 | { | |
730 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
731 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
732 | #define FLD(f) abuf->fields.sfmt_bra_compact.f | |
733 | int UNUSED written = 0; | |
734 | IADDR UNUSED pc = abuf->addr; | |
735 | SEM_BRANCH_INIT | |
736 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
737 | ||
738 | { | |
739 | { | |
740 | { | |
741 | SI opval = ADDDI (pc, 4); | |
742 | SET_H_PR (opval); | |
743 | TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); | |
744 | } | |
c7e628df DB |
745 | } |
746 | { | |
747 | UDI opval = ADDDI (pc, 2); | |
748 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
749 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
750 | } | |
751 | ((void) 0); /*nop*/ | |
752 | { | |
cbb38b47 BE |
753 | { |
754 | UDI opval = FLD (i_disp12); | |
755 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
756 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
757 | } | |
758 | } | |
759 | } | |
760 | ||
761 | SEM_BRANCH_FINI (vpc); | |
762 | #undef FLD | |
763 | } | |
764 | NEXT (vpc); | |
765 | ||
766 | CASE (sem, INSN_BSRF_COMPACT) : /* bsrf $rn */ | |
767 | { | |
768 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
769 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
770 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
771 | int UNUSED written = 0; | |
772 | IADDR UNUSED pc = abuf->addr; | |
773 | SEM_BRANCH_INIT | |
774 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
775 | ||
776 | { | |
777 | { | |
778 | { | |
779 | SI opval = ADDDI (pc, 4); | |
780 | SET_H_PR (opval); | |
781 | TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); | |
782 | } | |
c7e628df DB |
783 | } |
784 | { | |
785 | UDI opval = ADDDI (pc, 2); | |
786 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
787 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
788 | } | |
789 | ((void) 0); /*nop*/ | |
790 | { | |
cbb38b47 BE |
791 | { |
792 | UDI opval = ADDDI (EXTSIDI (GET_H_GRC (FLD (f_rn))), ADDDI (pc, 4)); | |
793 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
794 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
795 | } | |
796 | } | |
797 | } | |
798 | ||
799 | SEM_BRANCH_FINI (vpc); | |
800 | #undef FLD | |
801 | } | |
802 | NEXT (vpc); | |
803 | ||
804 | CASE (sem, INSN_BT_COMPACT) : /* bt $disp8 */ | |
805 | { | |
806 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
807 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
808 | #define FLD(f) abuf->fields.sfmt_bf_compact.f | |
809 | int UNUSED written = 0; | |
810 | IADDR UNUSED pc = abuf->addr; | |
811 | SEM_BRANCH_INIT | |
812 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
813 | ||
814 | if (GET_H_TBIT ()) { | |
815 | { | |
816 | UDI opval = FLD (i_disp8); | |
817 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
818 | written |= (1 << 2); | |
819 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
820 | } | |
821 | } | |
822 | ||
823 | abuf->written = written; | |
824 | SEM_BRANCH_FINI (vpc); | |
825 | #undef FLD | |
826 | } | |
827 | NEXT (vpc); | |
828 | ||
829 | CASE (sem, INSN_BTS_COMPACT) : /* bt/s $disp8 */ | |
830 | { | |
831 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
832 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
833 | #define FLD(f) abuf->fields.sfmt_bf_compact.f | |
834 | int UNUSED written = 0; | |
835 | IADDR UNUSED pc = abuf->addr; | |
836 | SEM_BRANCH_INIT | |
837 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
838 | ||
839 | if (GET_H_TBIT ()) { | |
c7e628df DB |
840 | { |
841 | { | |
842 | UDI opval = ADDDI (pc, 2); | |
843 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
844 | written |= (1 << 3); | |
845 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
846 | } | |
847 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
848 | { |
849 | { | |
850 | UDI opval = FLD (i_disp8); | |
851 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
c7e628df | 852 | written |= (1 << 3); |
cbb38b47 BE |
853 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); |
854 | } | |
855 | } | |
c7e628df | 856 | } |
cbb38b47 BE |
857 | } |
858 | ||
859 | abuf->written = written; | |
860 | SEM_BRANCH_FINI (vpc); | |
861 | #undef FLD | |
862 | } | |
863 | NEXT (vpc); | |
864 | ||
865 | CASE (sem, INSN_CLRMAC_COMPACT) : /* clrmac */ | |
866 | { | |
867 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
868 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 869 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
870 | int UNUSED written = 0; |
871 | IADDR UNUSED pc = abuf->addr; | |
872 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
873 | ||
874 | { | |
875 | { | |
876 | SI opval = 0; | |
877 | SET_H_MACL (opval); | |
878 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
879 | } | |
880 | { | |
881 | SI opval = 0; | |
882 | SET_H_MACH (opval); | |
883 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
884 | } | |
885 | } | |
886 | ||
887 | #undef FLD | |
888 | } | |
889 | NEXT (vpc); | |
890 | ||
891 | CASE (sem, INSN_CLRS_COMPACT) : /* clrs */ | |
892 | { | |
893 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
894 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 895 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
896 | int UNUSED written = 0; |
897 | IADDR UNUSED pc = abuf->addr; | |
898 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
899 | ||
900 | { | |
901 | BI opval = 0; | |
902 | SET_H_SBIT (opval); | |
903 | TRACE_RESULT (current_cpu, abuf, "sbit", 'x', opval); | |
904 | } | |
905 | ||
906 | #undef FLD | |
907 | } | |
908 | NEXT (vpc); | |
909 | ||
910 | CASE (sem, INSN_CLRT_COMPACT) : /* clrt */ | |
911 | { | |
912 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
913 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 914 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
915 | int UNUSED written = 0; |
916 | IADDR UNUSED pc = abuf->addr; | |
917 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
918 | ||
919 | { | |
920 | BI opval = 0; | |
921 | SET_H_TBIT (opval); | |
922 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
923 | } | |
924 | ||
925 | #undef FLD | |
926 | } | |
927 | NEXT (vpc); | |
928 | ||
929 | CASE (sem, INSN_CMPEQ_COMPACT) : /* cmp/eq $rm, $rn */ | |
930 | { | |
931 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
932 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 933 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
934 | int UNUSED written = 0; |
935 | IADDR UNUSED pc = abuf->addr; | |
936 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
937 | ||
938 | { | |
939 | BI opval = EQSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); | |
940 | SET_H_TBIT (opval); | |
941 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
942 | } | |
943 | ||
944 | #undef FLD | |
945 | } | |
946 | NEXT (vpc); | |
947 | ||
948 | CASE (sem, INSN_CMPEQI_COMPACT) : /* cmp/eq #$imm8, r0 */ | |
949 | { | |
950 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
951 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
952 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
953 | int UNUSED written = 0; | |
954 | IADDR UNUSED pc = abuf->addr; | |
955 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
956 | ||
957 | { | |
958 | BI opval = EQSI (GET_H_GRC (((UINT) 0)), EXTQISI (ANDQI (FLD (f_imm8), 255))); | |
959 | SET_H_TBIT (opval); | |
960 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
961 | } | |
962 | ||
963 | #undef FLD | |
964 | } | |
965 | NEXT (vpc); | |
966 | ||
967 | CASE (sem, INSN_CMPGE_COMPACT) : /* cmp/ge $rm, $rn */ | |
968 | { | |
969 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
970 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 971 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
972 | int UNUSED written = 0; |
973 | IADDR UNUSED pc = abuf->addr; | |
974 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
975 | ||
976 | { | |
977 | BI opval = GESI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
978 | SET_H_TBIT (opval); | |
979 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
980 | } | |
981 | ||
982 | #undef FLD | |
983 | } | |
984 | NEXT (vpc); | |
985 | ||
986 | CASE (sem, INSN_CMPGT_COMPACT) : /* cmp/gt $rm, $rn */ | |
987 | { | |
988 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
989 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 990 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
991 | int UNUSED written = 0; |
992 | IADDR UNUSED pc = abuf->addr; | |
993 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
994 | ||
995 | { | |
996 | BI opval = GTSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
997 | SET_H_TBIT (opval); | |
998 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
999 | } | |
1000 | ||
1001 | #undef FLD | |
1002 | } | |
1003 | NEXT (vpc); | |
1004 | ||
1005 | CASE (sem, INSN_CMPHI_COMPACT) : /* cmp/hi $rm, $rn */ | |
1006 | { | |
1007 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1008 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1009 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1010 | int UNUSED written = 0; |
1011 | IADDR UNUSED pc = abuf->addr; | |
1012 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1013 | ||
1014 | { | |
1015 | BI opval = GTUSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
1016 | SET_H_TBIT (opval); | |
1017 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1018 | } | |
1019 | ||
1020 | #undef FLD | |
1021 | } | |
1022 | NEXT (vpc); | |
1023 | ||
1024 | CASE (sem, INSN_CMPHS_COMPACT) : /* cmp/hs $rm, $rn */ | |
1025 | { | |
1026 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1027 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1028 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1029 | int UNUSED written = 0; |
1030 | IADDR UNUSED pc = abuf->addr; | |
1031 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1032 | ||
1033 | { | |
1034 | BI opval = GEUSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
1035 | SET_H_TBIT (opval); | |
1036 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1037 | } | |
1038 | ||
1039 | #undef FLD | |
1040 | } | |
1041 | NEXT (vpc); | |
1042 | ||
1043 | CASE (sem, INSN_CMPPL_COMPACT) : /* cmp/pl $rn */ | |
1044 | { | |
1045 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1046 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1047 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1048 | int UNUSED written = 0; | |
1049 | IADDR UNUSED pc = abuf->addr; | |
1050 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1051 | ||
1052 | { | |
1053 | BI opval = GTSI (GET_H_GRC (FLD (f_rn)), 0); | |
1054 | SET_H_TBIT (opval); | |
1055 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1056 | } | |
1057 | ||
1058 | #undef FLD | |
1059 | } | |
1060 | NEXT (vpc); | |
1061 | ||
1062 | CASE (sem, INSN_CMPPZ_COMPACT) : /* cmp/pz $rn */ | |
1063 | { | |
1064 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1065 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1066 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1067 | int UNUSED written = 0; | |
1068 | IADDR UNUSED pc = abuf->addr; | |
1069 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1070 | ||
1071 | { | |
1072 | BI opval = GESI (GET_H_GRC (FLD (f_rn)), 0); | |
1073 | SET_H_TBIT (opval); | |
1074 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1075 | } | |
1076 | ||
1077 | #undef FLD | |
1078 | } | |
1079 | NEXT (vpc); | |
1080 | ||
1081 | CASE (sem, INSN_CMPSTR_COMPACT) : /* cmp/str $rm, $rn */ | |
1082 | { | |
1083 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1084 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1085 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1086 | int UNUSED written = 0; |
1087 | IADDR UNUSED pc = abuf->addr; | |
1088 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1089 | ||
1090 | { | |
1091 | BI tmp_t; | |
1092 | SI tmp_temp; | |
1093 | tmp_temp = XORSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); | |
1094 | tmp_t = EQSI (ANDSI (tmp_temp, 0xff000000), 0); | |
1095 | tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 16711680), 0), tmp_t); | |
1096 | tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 65280), 0), tmp_t); | |
1097 | tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 255), 0), tmp_t); | |
1098 | { | |
1099 | BI opval = ((GTUBI (tmp_t, 0)) ? (1) : (0)); | |
1100 | SET_H_TBIT (opval); | |
1101 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1102 | } | |
1103 | } | |
1104 | ||
1105 | #undef FLD | |
1106 | } | |
1107 | NEXT (vpc); | |
1108 | ||
1109 | CASE (sem, INSN_DIV0S_COMPACT) : /* div0s $rm, $rn */ | |
1110 | { | |
1111 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1112 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1113 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1114 | int UNUSED written = 0; |
1115 | IADDR UNUSED pc = abuf->addr; | |
1116 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1117 | ||
1118 | { | |
1119 | { | |
1120 | BI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
1121 | SET_H_QBIT (opval); | |
1122 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1123 | } | |
1124 | { | |
1125 | BI opval = SRLSI (GET_H_GRC (FLD (f_rm)), 31); | |
1126 | SET_H_MBIT (opval); | |
1127 | TRACE_RESULT (current_cpu, abuf, "mbit", 'x', opval); | |
1128 | } | |
1129 | { | |
1130 | BI opval = ((EQSI (SRLSI (GET_H_GRC (FLD (f_rm)), 31), SRLSI (GET_H_GRC (FLD (f_rn)), 31))) ? (0) : (1)); | |
1131 | SET_H_TBIT (opval); | |
1132 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1133 | } | |
1134 | } | |
1135 | ||
1136 | #undef FLD | |
1137 | } | |
1138 | NEXT (vpc); | |
1139 | ||
1140 | CASE (sem, INSN_DIV0U_COMPACT) : /* div0u */ | |
1141 | { | |
1142 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1143 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 1144 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
1145 | int UNUSED written = 0; |
1146 | IADDR UNUSED pc = abuf->addr; | |
1147 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1148 | ||
1149 | { | |
1150 | { | |
1151 | BI opval = 0; | |
1152 | SET_H_TBIT (opval); | |
1153 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1154 | } | |
1155 | { | |
1156 | BI opval = 0; | |
1157 | SET_H_QBIT (opval); | |
1158 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1159 | } | |
1160 | { | |
1161 | BI opval = 0; | |
1162 | SET_H_MBIT (opval); | |
1163 | TRACE_RESULT (current_cpu, abuf, "mbit", 'x', opval); | |
1164 | } | |
1165 | } | |
1166 | ||
1167 | #undef FLD | |
1168 | } | |
1169 | NEXT (vpc); | |
1170 | ||
1171 | CASE (sem, INSN_DIV1_COMPACT) : /* div1 $rm, $rn */ | |
1172 | { | |
1173 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1174 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1175 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1176 | int UNUSED written = 0; |
1177 | IADDR UNUSED pc = abuf->addr; | |
1178 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1179 | ||
1180 | { | |
1181 | BI tmp_oldq; | |
1182 | SI tmp_tmp0; | |
1183 | UQI tmp_tmp1; | |
1184 | tmp_oldq = GET_H_QBIT (); | |
1185 | { | |
1186 | BI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
1187 | SET_H_QBIT (opval); | |
1188 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1189 | } | |
1190 | { | |
1191 | SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), ZEXTBISI (GET_H_TBIT ())); | |
1192 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1193 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1194 | } |
1195 | if (NOTBI (tmp_oldq)) { | |
1196 | if (NOTBI (GET_H_MBIT ())) { | |
1197 | { | |
1198 | tmp_tmp0 = GET_H_GRC (FLD (f_rn)); | |
1199 | { | |
1200 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
1201 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1202 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1203 | } |
1204 | tmp_tmp1 = GTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); | |
1205 | if (NOTBI (GET_H_QBIT ())) { | |
1206 | { | |
1207 | BI opval = ((tmp_tmp1) ? (1) : (0)); | |
1208 | SET_H_QBIT (opval); | |
1209 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1210 | } | |
1211 | } else { | |
1212 | { | |
1213 | BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); | |
1214 | SET_H_QBIT (opval); | |
1215 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1216 | } | |
1217 | } | |
1218 | } | |
1219 | } else { | |
1220 | { | |
1221 | tmp_tmp0 = GET_H_GRC (FLD (f_rn)); | |
1222 | { | |
1223 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
1224 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1225 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1226 | } |
1227 | tmp_tmp1 = LTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); | |
1228 | if (NOTBI (GET_H_QBIT ())) { | |
1229 | { | |
1230 | BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); | |
1231 | SET_H_QBIT (opval); | |
1232 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1233 | } | |
1234 | } else { | |
1235 | { | |
1236 | BI opval = ((tmp_tmp1) ? (1) : (0)); | |
1237 | SET_H_QBIT (opval); | |
1238 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1239 | } | |
1240 | } | |
1241 | } | |
1242 | } | |
1243 | } else { | |
1244 | if (NOTBI (GET_H_MBIT ())) { | |
1245 | { | |
1246 | tmp_tmp0 = GET_H_GRC (FLD (f_rn)); | |
1247 | { | |
1248 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); | |
1249 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1250 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1251 | } |
1252 | tmp_tmp1 = LTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); | |
1253 | if (NOTBI (GET_H_QBIT ())) { | |
1254 | { | |
1255 | BI opval = ((tmp_tmp1) ? (1) : (0)); | |
1256 | SET_H_QBIT (opval); | |
1257 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1258 | } | |
1259 | } else { | |
1260 | { | |
1261 | BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); | |
1262 | SET_H_QBIT (opval); | |
1263 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1264 | } | |
1265 | } | |
1266 | } | |
1267 | } else { | |
1268 | { | |
1269 | tmp_tmp0 = GET_H_GRC (FLD (f_rn)); | |
1270 | { | |
1271 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
1272 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1273 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1274 | } |
1275 | tmp_tmp1 = GTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); | |
1276 | if (NOTBI (GET_H_QBIT ())) { | |
1277 | { | |
1278 | BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); | |
1279 | SET_H_QBIT (opval); | |
1280 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1281 | } | |
1282 | } else { | |
1283 | { | |
1284 | BI opval = ((tmp_tmp1) ? (1) : (0)); | |
1285 | SET_H_QBIT (opval); | |
1286 | TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); | |
1287 | } | |
1288 | } | |
1289 | } | |
1290 | } | |
1291 | } | |
1292 | { | |
1293 | BI opval = ((EQBI (GET_H_QBIT (), GET_H_MBIT ())) ? (1) : (0)); | |
1294 | SET_H_TBIT (opval); | |
1295 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1296 | } | |
1297 | } | |
1298 | ||
c7e628df DB |
1299 | #undef FLD |
1300 | } | |
1301 | NEXT (vpc); | |
1302 | ||
1303 | CASE (sem, INSN_DIVU_COMPACT) : /* divu r0, $rn */ | |
1304 | { | |
1305 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1306 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1307 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1308 | int UNUSED written = 0; | |
1309 | IADDR UNUSED pc = abuf->addr; | |
1310 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1311 | ||
1312 | { | |
1313 | SI opval = UDIVSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (((UINT) 0))); | |
1314 | SET_H_GRC (FLD (f_rn), opval); | |
1315 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
1316 | } | |
1317 | ||
1318 | #undef FLD | |
1319 | } | |
1320 | NEXT (vpc); | |
1321 | ||
1322 | CASE (sem, INSN_MULR_COMPACT) : /* mulr r0, $rn */ | |
1323 | { | |
1324 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1325 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1326 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1327 | int UNUSED written = 0; | |
1328 | IADDR UNUSED pc = abuf->addr; | |
1329 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1330 | ||
1331 | { | |
1332 | SI opval = MULSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (((UINT) 0))); | |
1333 | SET_H_GRC (FLD (f_rn), opval); | |
1334 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
1335 | } | |
1336 | ||
cbb38b47 BE |
1337 | #undef FLD |
1338 | } | |
1339 | NEXT (vpc); | |
1340 | ||
1341 | CASE (sem, INSN_DMULSL_COMPACT) : /* dmuls.l $rm, $rn */ | |
1342 | { | |
1343 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1344 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1345 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1346 | int UNUSED written = 0; |
1347 | IADDR UNUSED pc = abuf->addr; | |
1348 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1349 | ||
1350 | { | |
1351 | DI tmp_result; | |
1352 | tmp_result = MULDI (EXTSIDI (GET_H_GRC (FLD (f_rm))), EXTSIDI (GET_H_GRC (FLD (f_rn)))); | |
1353 | { | |
1354 | SI opval = SUBWORDDISI (tmp_result, 0); | |
1355 | SET_H_MACH (opval); | |
1356 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
1357 | } | |
1358 | { | |
1359 | SI opval = SUBWORDDISI (tmp_result, 1); | |
1360 | SET_H_MACL (opval); | |
1361 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
1362 | } | |
1363 | } | |
1364 | ||
1365 | #undef FLD | |
1366 | } | |
1367 | NEXT (vpc); | |
1368 | ||
1369 | CASE (sem, INSN_DMULUL_COMPACT) : /* dmulu.l $rm, $rn */ | |
1370 | { | |
1371 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1372 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1373 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1374 | int UNUSED written = 0; |
1375 | IADDR UNUSED pc = abuf->addr; | |
1376 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1377 | ||
1378 | { | |
1379 | DI tmp_result; | |
1380 | tmp_result = MULDI (ZEXTSIDI (GET_H_GRC (FLD (f_rm))), ZEXTSIDI (GET_H_GRC (FLD (f_rn)))); | |
1381 | { | |
1382 | SI opval = SUBWORDDISI (tmp_result, 0); | |
1383 | SET_H_MACH (opval); | |
1384 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
1385 | } | |
1386 | { | |
1387 | SI opval = SUBWORDDISI (tmp_result, 1); | |
1388 | SET_H_MACL (opval); | |
1389 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
1390 | } | |
1391 | } | |
1392 | ||
1393 | #undef FLD | |
1394 | } | |
1395 | NEXT (vpc); | |
1396 | ||
1397 | CASE (sem, INSN_DT_COMPACT) : /* dt $rn */ | |
1398 | { | |
1399 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1400 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1401 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1402 | int UNUSED written = 0; | |
1403 | IADDR UNUSED pc = abuf->addr; | |
1404 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1405 | ||
1406 | { | |
1407 | { | |
1408 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 1); | |
1409 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1410 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1411 | } |
1412 | { | |
1413 | BI opval = EQSI (GET_H_GRC (FLD (f_rn)), 0); | |
1414 | SET_H_TBIT (opval); | |
1415 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
1416 | } | |
1417 | } | |
1418 | ||
1419 | #undef FLD | |
1420 | } | |
1421 | NEXT (vpc); | |
1422 | ||
1423 | CASE (sem, INSN_EXTSB_COMPACT) : /* exts.b $rm, $rn */ | |
1424 | { | |
1425 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1426 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1427 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1428 | int UNUSED written = 0; |
1429 | IADDR UNUSED pc = abuf->addr; | |
1430 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1431 | ||
1432 | { | |
1433 | SI opval = EXTQISI (SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3)); | |
1434 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1435 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1436 | } |
1437 | ||
1438 | #undef FLD | |
1439 | } | |
1440 | NEXT (vpc); | |
1441 | ||
1442 | CASE (sem, INSN_EXTSW_COMPACT) : /* exts.w $rm, $rn */ | |
1443 | { | |
1444 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1445 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1446 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1447 | int UNUSED written = 0; |
1448 | IADDR UNUSED pc = abuf->addr; | |
1449 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1450 | ||
1451 | { | |
1452 | SI opval = EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)); | |
1453 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1454 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1455 | } |
1456 | ||
1457 | #undef FLD | |
1458 | } | |
1459 | NEXT (vpc); | |
1460 | ||
1461 | CASE (sem, INSN_EXTUB_COMPACT) : /* extu.b $rm, $rn */ | |
1462 | { | |
1463 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1464 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1465 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1466 | int UNUSED written = 0; |
1467 | IADDR UNUSED pc = abuf->addr; | |
1468 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1469 | ||
1470 | { | |
1471 | SI opval = ZEXTQISI (SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3)); | |
1472 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1473 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1474 | } |
1475 | ||
1476 | #undef FLD | |
1477 | } | |
1478 | NEXT (vpc); | |
1479 | ||
1480 | CASE (sem, INSN_EXTUW_COMPACT) : /* extu.w $rm, $rn */ | |
1481 | { | |
1482 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1483 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1484 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1485 | int UNUSED written = 0; |
1486 | IADDR UNUSED pc = abuf->addr; | |
1487 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1488 | ||
1489 | { | |
1490 | SI opval = ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)); | |
1491 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 1492 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
1493 | } |
1494 | ||
1495 | #undef FLD | |
1496 | } | |
1497 | NEXT (vpc); | |
1498 | ||
1499 | CASE (sem, INSN_FABS_COMPACT) : /* fabs $fsdn */ | |
1500 | { | |
1501 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1502 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1503 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1504 | int UNUSED written = 0; | |
1505 | IADDR UNUSED pc = abuf->addr; | |
1506 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1507 | ||
1508 | if (GET_H_PRBIT ()) { | |
1509 | { | |
c7e628df DB |
1510 | DF opval = sh64_fabsd (current_cpu, GET_H_FSD (FLD (f_rn))); |
1511 | SET_H_FSD (FLD (f_rn), opval); | |
1512 | written |= (1 << 2); | |
1513 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1514 | } |
1515 | } else { | |
1516 | { | |
c7e628df DB |
1517 | DF opval = sh64_fabss (current_cpu, GET_H_FSD (FLD (f_rn))); |
1518 | SET_H_FSD (FLD (f_rn), opval); | |
1519 | written |= (1 << 2); | |
1520 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1521 | } |
1522 | } | |
1523 | ||
1524 | abuf->written = written; | |
1525 | #undef FLD | |
1526 | } | |
1527 | NEXT (vpc); | |
1528 | ||
1529 | CASE (sem, INSN_FADD_COMPACT) : /* fadd $fsdm, $fsdn */ | |
1530 | { | |
1531 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1532 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1533 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1534 | int UNUSED written = 0; |
1535 | IADDR UNUSED pc = abuf->addr; | |
1536 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1537 | ||
1538 | if (GET_H_PRBIT ()) { | |
1539 | { | |
c7e628df DB |
1540 | DF opval = sh64_faddd (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
1541 | SET_H_FSD (FLD (f_rn), opval); | |
1542 | written |= (1 << 3); | |
1543 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1544 | } |
1545 | } else { | |
1546 | { | |
c7e628df DB |
1547 | DF opval = sh64_fadds (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
1548 | SET_H_FSD (FLD (f_rn), opval); | |
1549 | written |= (1 << 3); | |
1550 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1551 | } |
1552 | } | |
1553 | ||
1554 | abuf->written = written; | |
1555 | #undef FLD | |
1556 | } | |
1557 | NEXT (vpc); | |
1558 | ||
1559 | CASE (sem, INSN_FCMPEQ_COMPACT) : /* fcmp/eq $fsdm, $fsdn */ | |
1560 | { | |
1561 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1562 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1563 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1564 | int UNUSED written = 0; |
1565 | IADDR UNUSED pc = abuf->addr; | |
1566 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1567 | ||
1568 | if (GET_H_PRBIT ()) { | |
1569 | { | |
c7e628df | 1570 | BI opval = sh64_fcmpeqd (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
cbb38b47 | 1571 | SET_H_TBIT (opval); |
c7e628df | 1572 | written |= (1 << 3); |
cbb38b47 BE |
1573 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); |
1574 | } | |
1575 | } else { | |
1576 | { | |
c7e628df | 1577 | BI opval = sh64_fcmpeqs (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
cbb38b47 | 1578 | SET_H_TBIT (opval); |
c7e628df | 1579 | written |= (1 << 3); |
cbb38b47 BE |
1580 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); |
1581 | } | |
1582 | } | |
1583 | ||
1584 | abuf->written = written; | |
1585 | #undef FLD | |
1586 | } | |
1587 | NEXT (vpc); | |
1588 | ||
1589 | CASE (sem, INSN_FCMPGT_COMPACT) : /* fcmp/gt $fsdm, $fsdn */ | |
1590 | { | |
1591 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1592 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1593 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1594 | int UNUSED written = 0; |
1595 | IADDR UNUSED pc = abuf->addr; | |
1596 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1597 | ||
1598 | if (GET_H_PRBIT ()) { | |
1599 | { | |
c7e628df | 1600 | BI opval = sh64_fcmpgtd (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
cbb38b47 | 1601 | SET_H_TBIT (opval); |
c7e628df | 1602 | written |= (1 << 3); |
cbb38b47 BE |
1603 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); |
1604 | } | |
1605 | } else { | |
1606 | { | |
c7e628df | 1607 | BI opval = sh64_fcmpgts (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
cbb38b47 | 1608 | SET_H_TBIT (opval); |
c7e628df | 1609 | written |= (1 << 3); |
cbb38b47 BE |
1610 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); |
1611 | } | |
1612 | } | |
1613 | ||
1614 | abuf->written = written; | |
1615 | #undef FLD | |
1616 | } | |
1617 | NEXT (vpc); | |
1618 | ||
1619 | CASE (sem, INSN_FCNVDS_COMPACT) : /* fcnvds $drn, fpul */ | |
1620 | { | |
1621 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1622 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1623 | #define FLD(f) abuf->fields.sfmt_fmov8_compact.f |
cbb38b47 BE |
1624 | int UNUSED written = 0; |
1625 | IADDR UNUSED pc = abuf->addr; | |
1626 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1627 | ||
1628 | { | |
1629 | SF opval = sh64_fcnvds (current_cpu, GET_H_DRC (FLD (f_dn))); | |
1630 | CPU (h_fr[((UINT) 32)]) = opval; | |
c7e628df | 1631 | TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); |
cbb38b47 BE |
1632 | } |
1633 | ||
1634 | #undef FLD | |
1635 | } | |
1636 | NEXT (vpc); | |
1637 | ||
1638 | CASE (sem, INSN_FCNVSD_COMPACT) : /* fcnvsd fpul, $drn */ | |
1639 | { | |
1640 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1641 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1642 | #define FLD(f) abuf->fields.sfmt_fmov8_compact.f |
cbb38b47 BE |
1643 | int UNUSED written = 0; |
1644 | IADDR UNUSED pc = abuf->addr; | |
1645 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1646 | ||
1647 | { | |
1648 | DF opval = sh64_fcnvsd (current_cpu, CPU (h_fr[((UINT) 32)])); | |
1649 | SET_H_DRC (FLD (f_dn), opval); | |
c7e628df | 1650 | TRACE_RESULT (current_cpu, abuf, "drc", 'f', opval); |
cbb38b47 BE |
1651 | } |
1652 | ||
1653 | #undef FLD | |
1654 | } | |
1655 | NEXT (vpc); | |
1656 | ||
1657 | CASE (sem, INSN_FDIV_COMPACT) : /* fdiv $fsdm, $fsdn */ | |
1658 | { | |
1659 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1660 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1661 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1662 | int UNUSED written = 0; |
1663 | IADDR UNUSED pc = abuf->addr; | |
1664 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1665 | ||
1666 | if (GET_H_PRBIT ()) { | |
1667 | { | |
c7e628df DB |
1668 | DF opval = sh64_fdivd (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
1669 | SET_H_FSD (FLD (f_rn), opval); | |
1670 | written |= (1 << 3); | |
1671 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1672 | } |
1673 | } else { | |
1674 | { | |
c7e628df DB |
1675 | DF opval = sh64_fdivs (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
1676 | SET_H_FSD (FLD (f_rn), opval); | |
1677 | written |= (1 << 3); | |
1678 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1679 | } |
1680 | } | |
1681 | ||
1682 | abuf->written = written; | |
1683 | #undef FLD | |
1684 | } | |
1685 | NEXT (vpc); | |
1686 | ||
1687 | CASE (sem, INSN_FIPR_COMPACT) : /* fipr $fvm, $fvn */ | |
1688 | { | |
1689 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1690 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1691 | #define FLD(f) abuf->fields.sfmt_fipr_compact.f | |
1692 | int UNUSED written = 0; | |
1693 | IADDR UNUSED pc = abuf->addr; | |
1694 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1695 | ||
c7e628df | 1696 | sh64_fipr (current_cpu, FLD (f_vm), FLD (f_vn)); |
cbb38b47 BE |
1697 | |
1698 | #undef FLD | |
1699 | } | |
1700 | NEXT (vpc); | |
1701 | ||
c7e628df | 1702 | CASE (sem, INSN_FLDS_COMPACT) : /* flds $frn, fpul */ |
cbb38b47 BE |
1703 | { |
1704 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1705 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1706 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1707 | int UNUSED written = 0; | |
1708 | IADDR UNUSED pc = abuf->addr; | |
1709 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1710 | ||
1711 | { | |
1712 | SF opval = GET_H_FRC (FLD (f_rn)); | |
1713 | CPU (h_fr[((UINT) 32)]) = opval; | |
c7e628df | 1714 | TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); |
cbb38b47 BE |
1715 | } |
1716 | ||
1717 | #undef FLD | |
1718 | } | |
1719 | NEXT (vpc); | |
1720 | ||
1721 | CASE (sem, INSN_FLDI0_COMPACT) : /* fldi0 $frn */ | |
1722 | { | |
1723 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1724 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1725 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1726 | int UNUSED written = 0; | |
1727 | IADDR UNUSED pc = abuf->addr; | |
1728 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1729 | ||
1730 | { | |
1731 | SF opval = sh64_fldi0 (current_cpu); | |
1732 | SET_H_FRC (FLD (f_rn), opval); | |
c7e628df | 1733 | TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); |
cbb38b47 BE |
1734 | } |
1735 | ||
1736 | #undef FLD | |
1737 | } | |
1738 | NEXT (vpc); | |
1739 | ||
1740 | CASE (sem, INSN_FLDI1_COMPACT) : /* fldi1 $frn */ | |
1741 | { | |
1742 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1743 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1744 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1745 | int UNUSED written = 0; | |
1746 | IADDR UNUSED pc = abuf->addr; | |
1747 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1748 | ||
1749 | { | |
1750 | SF opval = sh64_fldi1 (current_cpu); | |
1751 | SET_H_FRC (FLD (f_rn), opval); | |
c7e628df | 1752 | TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); |
cbb38b47 BE |
1753 | } |
1754 | ||
1755 | #undef FLD | |
1756 | } | |
1757 | NEXT (vpc); | |
1758 | ||
1759 | CASE (sem, INSN_FLOAT_COMPACT) : /* float fpul, $fsdn */ | |
1760 | { | |
1761 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1762 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1763 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
1764 | int UNUSED written = 0; | |
1765 | IADDR UNUSED pc = abuf->addr; | |
1766 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1767 | ||
1768 | if (GET_H_PRBIT ()) { | |
1769 | { | |
1770 | DF opval = sh64_floatld (current_cpu, CPU (h_fr[((UINT) 32)])); | |
c7e628df DB |
1771 | SET_H_FSD (FLD (f_rn), opval); |
1772 | written |= (1 << 2); | |
1773 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1774 | } |
1775 | } else { | |
1776 | { | |
c7e628df DB |
1777 | DF opval = sh64_floatls (current_cpu, CPU (h_fr[((UINT) 32)])); |
1778 | SET_H_FSD (FLD (f_rn), opval); | |
1779 | written |= (1 << 2); | |
1780 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
1781 | } |
1782 | } | |
1783 | ||
1784 | abuf->written = written; | |
1785 | #undef FLD | |
1786 | } | |
1787 | NEXT (vpc); | |
1788 | ||
1789 | CASE (sem, INSN_FMAC_COMPACT) : /* fmac fr0, $frm, $frn */ | |
1790 | { | |
1791 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1792 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1793 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1794 | int UNUSED written = 0; |
1795 | IADDR UNUSED pc = abuf->addr; | |
1796 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1797 | ||
1798 | { | |
1799 | SF opval = sh64_fmacs (current_cpu, GET_H_FRC (((UINT) 0)), GET_H_FRC (FLD (f_rm)), GET_H_FRC (FLD (f_rn))); | |
1800 | SET_H_FRC (FLD (f_rn), opval); | |
c7e628df | 1801 | TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); |
cbb38b47 BE |
1802 | } |
1803 | ||
1804 | #undef FLD | |
1805 | } | |
1806 | NEXT (vpc); | |
1807 | ||
c7e628df | 1808 | CASE (sem, INSN_FMOV1_COMPACT) : /* fmov $fmovm, $fmovn */ |
cbb38b47 BE |
1809 | { |
1810 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1811 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1812 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1813 | int UNUSED written = 0; |
1814 | IADDR UNUSED pc = abuf->addr; | |
1815 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1816 | ||
cbb38b47 | 1817 | { |
c7e628df DB |
1818 | DF opval = GET_H_FMOV (FLD (f_rm)); |
1819 | SET_H_FMOV (FLD (f_rn), opval); | |
1820 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 | 1821 | } |
cbb38b47 | 1822 | |
cbb38b47 BE |
1823 | #undef FLD |
1824 | } | |
1825 | NEXT (vpc); | |
1826 | ||
c7e628df | 1827 | CASE (sem, INSN_FMOV2_COMPACT) : /* fmov @$rm, $fmovn */ |
cbb38b47 BE |
1828 | { |
1829 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1830 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1831 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1832 | int UNUSED written = 0; |
1833 | IADDR UNUSED pc = abuf->addr; | |
1834 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1835 | ||
1836 | if (NOTBI (GET_H_SZBIT ())) { | |
1837 | { | |
c7e628df DB |
1838 | DF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); |
1839 | SET_H_FMOV (FLD (f_rn), opval); | |
1840 | written |= (1 << 4); | |
1841 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 BE |
1842 | } |
1843 | } else { | |
1844 | { | |
1845 | DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
c7e628df DB |
1846 | SET_H_FMOV (FLD (f_rn), opval); |
1847 | written |= (1 << 4); | |
1848 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 | 1849 | } |
cbb38b47 BE |
1850 | } |
1851 | ||
1852 | abuf->written = written; | |
1853 | #undef FLD | |
1854 | } | |
1855 | NEXT (vpc); | |
1856 | ||
c7e628df | 1857 | CASE (sem, INSN_FMOV3_COMPACT) : /* fmov @${rm}+, fmovn */ |
cbb38b47 BE |
1858 | { |
1859 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1860 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1861 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1862 | int UNUSED written = 0; |
1863 | IADDR UNUSED pc = abuf->addr; | |
1864 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1865 | ||
1866 | if (NOTBI (GET_H_SZBIT ())) { | |
1867 | { | |
1868 | { | |
c7e628df DB |
1869 | DF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); |
1870 | SET_H_FMOV (FLD (f_rn), opval); | |
1871 | written |= (1 << 4); | |
1872 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 BE |
1873 | } |
1874 | { | |
1875 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); | |
1876 | SET_H_GRC (FLD (f_rm), opval); | |
c7e628df DB |
1877 | written |= (1 << 5); |
1878 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
1879 | } |
1880 | } | |
1881 | } else { | |
1882 | { | |
cbb38b47 BE |
1883 | { |
1884 | DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
c7e628df DB |
1885 | SET_H_FMOV (FLD (f_rn), opval); |
1886 | written |= (1 << 4); | |
1887 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 | 1888 | } |
cbb38b47 BE |
1889 | { |
1890 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 8); | |
1891 | SET_H_GRC (FLD (f_rm), opval); | |
c7e628df DB |
1892 | written |= (1 << 5); |
1893 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
1894 | } |
1895 | } | |
1896 | } | |
1897 | ||
1898 | abuf->written = written; | |
1899 | #undef FLD | |
1900 | } | |
1901 | NEXT (vpc); | |
1902 | ||
c7e628df | 1903 | CASE (sem, INSN_FMOV4_COMPACT) : /* fmov @(r0, $rm), $fmovn */ |
cbb38b47 BE |
1904 | { |
1905 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1906 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1907 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1908 | int UNUSED written = 0; |
1909 | IADDR UNUSED pc = abuf->addr; | |
1910 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1911 | ||
1912 | if (NOTBI (GET_H_SZBIT ())) { | |
1913 | { | |
c7e628df DB |
1914 | DF opval = GETMEMSF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); |
1915 | SET_H_FMOV (FLD (f_rn), opval); | |
1916 | written |= (1 << 5); | |
1917 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 BE |
1918 | } |
1919 | } else { | |
1920 | { | |
1921 | DF opval = GETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); | |
c7e628df DB |
1922 | SET_H_FMOV (FLD (f_rn), opval); |
1923 | written |= (1 << 5); | |
1924 | TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); | |
cbb38b47 | 1925 | } |
cbb38b47 BE |
1926 | } |
1927 | ||
1928 | abuf->written = written; | |
1929 | #undef FLD | |
1930 | } | |
1931 | NEXT (vpc); | |
1932 | ||
c7e628df | 1933 | CASE (sem, INSN_FMOV5_COMPACT) : /* fmov $fmovm, @$rn */ |
cbb38b47 BE |
1934 | { |
1935 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1936 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1937 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1938 | int UNUSED written = 0; |
1939 | IADDR UNUSED pc = abuf->addr; | |
1940 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1941 | ||
1942 | if (NOTBI (GET_H_SZBIT ())) { | |
1943 | { | |
c7e628df | 1944 | SF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 1945 | SETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); |
c7e628df | 1946 | written |= (1 << 4); |
cbb38b47 BE |
1947 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
1948 | } | |
1949 | } else { | |
1950 | { | |
c7e628df | 1951 | DF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 1952 | SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); |
c7e628df | 1953 | written |= (1 << 3); |
cbb38b47 BE |
1954 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
1955 | } | |
cbb38b47 BE |
1956 | } |
1957 | ||
1958 | abuf->written = written; | |
1959 | #undef FLD | |
1960 | } | |
1961 | NEXT (vpc); | |
1962 | ||
c7e628df | 1963 | CASE (sem, INSN_FMOV6_COMPACT) : /* fmov $fmovm, @-$rn */ |
cbb38b47 BE |
1964 | { |
1965 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1966 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 1967 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
1968 | int UNUSED written = 0; |
1969 | IADDR UNUSED pc = abuf->addr; | |
1970 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1971 | ||
1972 | if (NOTBI (GET_H_SZBIT ())) { | |
1973 | { | |
1974 | { | |
1975 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
1976 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
1977 | written |= (1 << 5); |
1978 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
1979 | } |
1980 | { | |
c7e628df | 1981 | SF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 1982 | SETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); |
c7e628df | 1983 | written |= (1 << 4); |
cbb38b47 BE |
1984 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
1985 | } | |
1986 | } | |
1987 | } else { | |
1988 | { | |
1989 | { | |
1990 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 8); | |
1991 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
1992 | written |= (1 << 5); |
1993 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 | 1994 | } |
cbb38b47 | 1995 | { |
c7e628df | 1996 | DF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 1997 | SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); |
c7e628df | 1998 | written |= (1 << 3); |
cbb38b47 BE |
1999 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
2000 | } | |
2001 | } | |
cbb38b47 BE |
2002 | } |
2003 | ||
2004 | abuf->written = written; | |
2005 | #undef FLD | |
2006 | } | |
2007 | NEXT (vpc); | |
2008 | ||
c7e628df | 2009 | CASE (sem, INSN_FMOV7_COMPACT) : /* fmov $fmovm, @(r0, $rn) */ |
cbb38b47 BE |
2010 | { |
2011 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2012 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2013 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2014 | int UNUSED written = 0; |
2015 | IADDR UNUSED pc = abuf->addr; | |
2016 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2017 | ||
2018 | if (NOTBI (GET_H_SZBIT ())) { | |
2019 | { | |
c7e628df | 2020 | SF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 2021 | SETMEMSF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); |
c7e628df | 2022 | written |= (1 << 5); |
cbb38b47 BE |
2023 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
2024 | } | |
2025 | } else { | |
cbb38b47 | 2026 | { |
c7e628df | 2027 | DF opval = GET_H_FMOV (FLD (f_rm)); |
cbb38b47 | 2028 | SETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); |
c7e628df | 2029 | written |= (1 << 4); |
cbb38b47 BE |
2030 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); |
2031 | } | |
c7e628df DB |
2032 | } |
2033 | ||
2034 | abuf->written = written; | |
2035 | #undef FLD | |
2036 | } | |
2037 | NEXT (vpc); | |
2038 | ||
2039 | CASE (sem, INSN_FMOV8_COMPACT) : /* fmov.d @($imm12x8, $rm), $drn */ | |
2040 | { | |
2041 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2042 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2043 | #define FLD(f) abuf->fields.sfmt_fmov8_compact.f | |
2044 | int UNUSED written = 0; | |
2045 | IADDR UNUSED pc = abuf->addr; | |
2046 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2047 | ||
cbb38b47 | 2048 | { |
c7e628df DB |
2049 | DF opval = GETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm12x8))); |
2050 | SET_H_DRC (FLD (f_dn), opval); | |
2051 | TRACE_RESULT (current_cpu, abuf, "drc", 'f', opval); | |
cbb38b47 | 2052 | } |
c7e628df DB |
2053 | |
2054 | #undef FLD | |
cbb38b47 | 2055 | } |
c7e628df DB |
2056 | NEXT (vpc); |
2057 | ||
2058 | CASE (sem, INSN_FMOV9_COMPACT) : /* mov.l $drm, @($imm12x8, $rn) */ | |
2059 | { | |
2060 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2061 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2062 | #define FLD(f) abuf->fields.sfmt_fmov9_compact.f | |
2063 | int UNUSED written = 0; | |
2064 | IADDR UNUSED pc = abuf->addr; | |
2065 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2066 | ||
2067 | { | |
2068 | DF opval = GET_H_DRC (FLD (f_dm)); | |
2069 | SETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm12x8)), opval); | |
2070 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); | |
2071 | } | |
cbb38b47 | 2072 | |
cbb38b47 BE |
2073 | #undef FLD |
2074 | } | |
2075 | NEXT (vpc); | |
2076 | ||
2077 | CASE (sem, INSN_FMUL_COMPACT) : /* fmul $fsdm, $fsdn */ | |
2078 | { | |
2079 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2080 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2081 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2082 | int UNUSED written = 0; |
2083 | IADDR UNUSED pc = abuf->addr; | |
2084 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2085 | ||
2086 | if (GET_H_PRBIT ()) { | |
2087 | { | |
c7e628df DB |
2088 | DF opval = sh64_fmuld (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
2089 | SET_H_FSD (FLD (f_rn), opval); | |
2090 | written |= (1 << 3); | |
2091 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2092 | } |
2093 | } else { | |
2094 | { | |
c7e628df DB |
2095 | DF opval = sh64_fmuls (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); |
2096 | SET_H_FSD (FLD (f_rn), opval); | |
2097 | written |= (1 << 3); | |
2098 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2099 | } |
2100 | } | |
2101 | ||
2102 | abuf->written = written; | |
2103 | #undef FLD | |
2104 | } | |
2105 | NEXT (vpc); | |
2106 | ||
2107 | CASE (sem, INSN_FNEG_COMPACT) : /* fneg $fsdn */ | |
2108 | { | |
2109 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2110 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2111 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2112 | int UNUSED written = 0; | |
2113 | IADDR UNUSED pc = abuf->addr; | |
2114 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2115 | ||
2116 | if (GET_H_PRBIT ()) { | |
2117 | { | |
c7e628df DB |
2118 | DF opval = sh64_fnegd (current_cpu, GET_H_FSD (FLD (f_rn))); |
2119 | SET_H_FSD (FLD (f_rn), opval); | |
2120 | written |= (1 << 2); | |
2121 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2122 | } |
2123 | } else { | |
2124 | { | |
c7e628df DB |
2125 | DF opval = sh64_fnegs (current_cpu, GET_H_FSD (FLD (f_rn))); |
2126 | SET_H_FSD (FLD (f_rn), opval); | |
2127 | written |= (1 << 2); | |
2128 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2129 | } |
2130 | } | |
2131 | ||
2132 | abuf->written = written; | |
2133 | #undef FLD | |
2134 | } | |
2135 | NEXT (vpc); | |
2136 | ||
2137 | CASE (sem, INSN_FRCHG_COMPACT) : /* frchg */ | |
2138 | { | |
2139 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2140 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 2141 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
2142 | int UNUSED written = 0; |
2143 | IADDR UNUSED pc = abuf->addr; | |
2144 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2145 | ||
2146 | { | |
2147 | BI opval = NOTBI (GET_H_FRBIT ()); | |
2148 | SET_H_FRBIT (opval); | |
2149 | TRACE_RESULT (current_cpu, abuf, "frbit", 'x', opval); | |
2150 | } | |
2151 | ||
2152 | #undef FLD | |
2153 | } | |
2154 | NEXT (vpc); | |
2155 | ||
2156 | CASE (sem, INSN_FSCHG_COMPACT) : /* fschg */ | |
2157 | { | |
2158 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2159 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 2160 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
2161 | int UNUSED written = 0; |
2162 | IADDR UNUSED pc = abuf->addr; | |
2163 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2164 | ||
2165 | { | |
2166 | BI opval = NOTBI (GET_H_SZBIT ()); | |
2167 | SET_H_SZBIT (opval); | |
2168 | TRACE_RESULT (current_cpu, abuf, "szbit", 'x', opval); | |
2169 | } | |
2170 | ||
2171 | #undef FLD | |
2172 | } | |
2173 | NEXT (vpc); | |
2174 | ||
2175 | CASE (sem, INSN_FSQRT_COMPACT) : /* fsqrt $fsdn */ | |
2176 | { | |
2177 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2178 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2179 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2180 | int UNUSED written = 0; | |
2181 | IADDR UNUSED pc = abuf->addr; | |
2182 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2183 | ||
2184 | if (GET_H_PRBIT ()) { | |
2185 | { | |
c7e628df DB |
2186 | DF opval = sh64_fsqrtd (current_cpu, GET_H_FSD (FLD (f_rn))); |
2187 | SET_H_FSD (FLD (f_rn), opval); | |
2188 | written |= (1 << 2); | |
2189 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2190 | } |
2191 | } else { | |
2192 | { | |
c7e628df DB |
2193 | DF opval = sh64_fsqrts (current_cpu, GET_H_FSD (FLD (f_rn))); |
2194 | SET_H_FSD (FLD (f_rn), opval); | |
2195 | written |= (1 << 2); | |
2196 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2197 | } |
2198 | } | |
2199 | ||
2200 | abuf->written = written; | |
2201 | #undef FLD | |
2202 | } | |
2203 | NEXT (vpc); | |
2204 | ||
2205 | CASE (sem, INSN_FSTS_COMPACT) : /* fsts fpul, $frn */ | |
2206 | { | |
2207 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2208 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2209 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2210 | int UNUSED written = 0; | |
2211 | IADDR UNUSED pc = abuf->addr; | |
2212 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2213 | ||
2214 | { | |
2215 | SF opval = CPU (h_fr[((UINT) 32)]); | |
2216 | SET_H_FRC (FLD (f_rn), opval); | |
c7e628df | 2217 | TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); |
cbb38b47 BE |
2218 | } |
2219 | ||
2220 | #undef FLD | |
2221 | } | |
2222 | NEXT (vpc); | |
2223 | ||
2224 | CASE (sem, INSN_FSUB_COMPACT) : /* fsub $fsdm, $fsdn */ | |
2225 | { | |
2226 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2227 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2228 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2229 | int UNUSED written = 0; |
2230 | IADDR UNUSED pc = abuf->addr; | |
2231 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2232 | ||
2233 | if (GET_H_PRBIT ()) { | |
2234 | { | |
c7e628df DB |
2235 | DF opval = sh64_fsubd (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
2236 | SET_H_FSD (FLD (f_rn), opval); | |
2237 | written |= (1 << 3); | |
2238 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2239 | } |
2240 | } else { | |
2241 | { | |
c7e628df DB |
2242 | DF opval = sh64_fsubs (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); |
2243 | SET_H_FSD (FLD (f_rn), opval); | |
2244 | written |= (1 << 3); | |
2245 | TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); | |
cbb38b47 BE |
2246 | } |
2247 | } | |
2248 | ||
2249 | abuf->written = written; | |
2250 | #undef FLD | |
2251 | } | |
2252 | NEXT (vpc); | |
2253 | ||
2254 | CASE (sem, INSN_FTRC_COMPACT) : /* ftrc $fsdn, fpul */ | |
2255 | { | |
2256 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2257 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2258 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2259 | int UNUSED written = 0; | |
2260 | IADDR UNUSED pc = abuf->addr; | |
2261 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2262 | ||
2263 | { | |
c7e628df | 2264 | SF opval = ((GET_H_PRBIT ()) ? (sh64_ftrcdl (current_cpu, GET_H_FSD (FLD (f_rn)))) : (sh64_ftrcsl (current_cpu, GET_H_FSD (FLD (f_rn))))); |
cbb38b47 | 2265 | CPU (h_fr[((UINT) 32)]) = opval; |
c7e628df | 2266 | TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); |
cbb38b47 BE |
2267 | } |
2268 | ||
2269 | #undef FLD | |
2270 | } | |
2271 | NEXT (vpc); | |
2272 | ||
2273 | CASE (sem, INSN_FTRV_COMPACT) : /* ftrv xmtrx, $fvn */ | |
2274 | { | |
2275 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2276 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2277 | #define FLD(f) abuf->fields.sfmt_fipr_compact.f | |
2278 | int UNUSED written = 0; | |
2279 | IADDR UNUSED pc = abuf->addr; | |
2280 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2281 | ||
c7e628df DB |
2282 | sh64_ftrv (current_cpu, FLD (f_vn)); |
2283 | ||
2284 | #undef FLD | |
2285 | } | |
2286 | NEXT (vpc); | |
2287 | ||
2288 | CASE (sem, INSN_JMP_COMPACT) : /* jmp @$rn */ | |
2289 | { | |
2290 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2291 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2292 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2293 | int UNUSED written = 0; | |
2294 | IADDR UNUSED pc = abuf->addr; | |
2295 | SEM_BRANCH_INIT | |
2296 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2297 | ||
cbb38b47 | 2298 | { |
cbb38b47 | 2299 | { |
c7e628df DB |
2300 | UDI opval = ADDDI (pc, 2); |
2301 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2302 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
cbb38b47 | 2303 | } |
c7e628df DB |
2304 | ((void) 0); /*nop*/ |
2305 | { | |
cbb38b47 | 2306 | { |
c7e628df DB |
2307 | UDI opval = GET_H_GRC (FLD (f_rn)); |
2308 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2309 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
cbb38b47 | 2310 | } |
c7e628df DB |
2311 | } |
2312 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
2313 | } |
2314 | ||
c7e628df | 2315 | SEM_BRANCH_FINI (vpc); |
cbb38b47 BE |
2316 | #undef FLD |
2317 | } | |
2318 | NEXT (vpc); | |
2319 | ||
c7e628df | 2320 | CASE (sem, INSN_JSR_COMPACT) : /* jsr @$rn */ |
cbb38b47 BE |
2321 | { |
2322 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2323 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2324 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2325 | int UNUSED written = 0; | |
2326 | IADDR UNUSED pc = abuf->addr; | |
2327 | SEM_BRANCH_INIT | |
2328 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2329 | ||
c7e628df DB |
2330 | { |
2331 | { | |
2332 | { | |
2333 | SI opval = ADDDI (pc, 4); | |
2334 | SET_H_PR (opval); | |
2335 | TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); | |
2336 | } | |
2337 | } | |
2338 | { | |
2339 | UDI opval = ADDDI (pc, 2); | |
2340 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2341 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2342 | } | |
2343 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
2344 | { |
2345 | { | |
2346 | UDI opval = GET_H_GRC (FLD (f_rn)); | |
2347 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2348 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2349 | } | |
c7e628df DB |
2350 | } |
2351 | ((void) 0); /*nop*/ | |
2352 | } | |
2353 | ||
2354 | SEM_BRANCH_FINI (vpc); | |
2355 | #undef FLD | |
2356 | } | |
2357 | NEXT (vpc); | |
2358 | ||
2359 | CASE (sem, INSN_LDC_GBR_COMPACT) : /* ldc $rn, gbr */ | |
2360 | { | |
2361 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2362 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2363 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2364 | int UNUSED written = 0; | |
2365 | IADDR UNUSED pc = abuf->addr; | |
2366 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2367 | ||
2368 | { | |
2369 | SI opval = GET_H_GRC (FLD (f_rn)); | |
2370 | SET_H_GBR (opval); | |
2371 | TRACE_RESULT (current_cpu, abuf, "gbr", 'x', opval); | |
2372 | } | |
2373 | ||
2374 | #undef FLD | |
2375 | } | |
2376 | NEXT (vpc); | |
2377 | ||
2378 | CASE (sem, INSN_LDC_VBR_COMPACT) : /* ldc $rn, vbr */ | |
2379 | { | |
2380 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2381 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2382 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2383 | int UNUSED written = 0; | |
2384 | IADDR UNUSED pc = abuf->addr; | |
2385 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2386 | ||
2387 | { | |
2388 | SI opval = GET_H_GRC (FLD (f_rn)); | |
2389 | SET_H_VBR (opval); | |
2390 | TRACE_RESULT (current_cpu, abuf, "vbr", 'x', opval); | |
2391 | } | |
cbb38b47 | 2392 | |
cbb38b47 BE |
2393 | #undef FLD |
2394 | } | |
2395 | NEXT (vpc); | |
2396 | ||
c7e628df | 2397 | CASE (sem, INSN_LDC_SR_COMPACT) : /* ldc $rn, sr */ |
cbb38b47 BE |
2398 | { |
2399 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2400 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2401 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2402 | int UNUSED written = 0; | |
2403 | IADDR UNUSED pc = abuf->addr; | |
cbb38b47 BE |
2404 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); |
2405 | ||
cbb38b47 | 2406 | { |
c7e628df DB |
2407 | SI opval = GET_H_GRC (FLD (f_rn)); |
2408 | CPU (h_sr) = opval; | |
2409 | TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); | |
cbb38b47 | 2410 | } |
cbb38b47 | 2411 | |
cbb38b47 BE |
2412 | #undef FLD |
2413 | } | |
2414 | NEXT (vpc); | |
2415 | ||
c7e628df | 2416 | CASE (sem, INSN_LDCL_GBR_COMPACT) : /* ldc.l @${rn}+, gbr */ |
cbb38b47 BE |
2417 | { |
2418 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2419 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2420 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2421 | int UNUSED written = 0; | |
2422 | IADDR UNUSED pc = abuf->addr; | |
2423 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2424 | ||
c7e628df | 2425 | { |
cbb38b47 | 2426 | { |
c7e628df | 2427 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); |
cbb38b47 BE |
2428 | SET_H_GBR (opval); |
2429 | TRACE_RESULT (current_cpu, abuf, "gbr", 'x', opval); | |
2430 | } | |
c7e628df DB |
2431 | { |
2432 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2433 | SET_H_GRC (FLD (f_rn), opval); | |
2434 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
2435 | } | |
2436 | } | |
cbb38b47 BE |
2437 | |
2438 | #undef FLD | |
2439 | } | |
2440 | NEXT (vpc); | |
2441 | ||
c7e628df | 2442 | CASE (sem, INSN_LDCL_VBR_COMPACT) : /* ldc.l @${rn}+, vbr */ |
cbb38b47 BE |
2443 | { |
2444 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2445 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2446 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2447 | int UNUSED written = 0; | |
2448 | IADDR UNUSED pc = abuf->addr; | |
2449 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2450 | ||
2451 | { | |
2452 | { | |
2453 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
c7e628df DB |
2454 | SET_H_VBR (opval); |
2455 | TRACE_RESULT (current_cpu, abuf, "vbr", 'x', opval); | |
cbb38b47 BE |
2456 | } |
2457 | { | |
2458 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2459 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2460 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2461 | } |
2462 | } | |
2463 | ||
2464 | #undef FLD | |
2465 | } | |
2466 | NEXT (vpc); | |
2467 | ||
2468 | CASE (sem, INSN_LDS_FPSCR_COMPACT) : /* lds $rn, fpscr */ | |
2469 | { | |
2470 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2471 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2472 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2473 | int UNUSED written = 0; | |
2474 | IADDR UNUSED pc = abuf->addr; | |
2475 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2476 | ||
2477 | { | |
2478 | SI opval = GET_H_GRC (FLD (f_rn)); | |
c7e628df | 2479 | CPU (h_fpscr) = opval; |
cbb38b47 BE |
2480 | TRACE_RESULT (current_cpu, abuf, "fpscr", 'x', opval); |
2481 | } | |
2482 | ||
2483 | #undef FLD | |
2484 | } | |
2485 | NEXT (vpc); | |
2486 | ||
2487 | CASE (sem, INSN_LDSL_FPSCR_COMPACT) : /* lds.l @${rn}+, fpscr */ | |
2488 | { | |
2489 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2490 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2491 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2492 | int UNUSED written = 0; | |
2493 | IADDR UNUSED pc = abuf->addr; | |
2494 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2495 | ||
2496 | { | |
2497 | { | |
2498 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
c7e628df | 2499 | CPU (h_fpscr) = opval; |
cbb38b47 BE |
2500 | TRACE_RESULT (current_cpu, abuf, "fpscr", 'x', opval); |
2501 | } | |
2502 | { | |
2503 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2504 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2505 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2506 | } |
2507 | } | |
2508 | ||
2509 | #undef FLD | |
2510 | } | |
2511 | NEXT (vpc); | |
2512 | ||
2513 | CASE (sem, INSN_LDS_FPUL_COMPACT) : /* lds $rn, fpul */ | |
2514 | { | |
2515 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2516 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2517 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2518 | int UNUSED written = 0; | |
2519 | IADDR UNUSED pc = abuf->addr; | |
2520 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2521 | ||
2522 | { | |
2523 | SF opval = SUBWORDSISF (GET_H_GRC (FLD (f_rn))); | |
2524 | CPU (h_fr[((UINT) 32)]) = opval; | |
c7e628df | 2525 | TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); |
cbb38b47 BE |
2526 | } |
2527 | ||
2528 | #undef FLD | |
2529 | } | |
2530 | NEXT (vpc); | |
2531 | ||
2532 | CASE (sem, INSN_LDSL_FPUL_COMPACT) : /* lds.l @${rn}+, fpul */ | |
2533 | { | |
2534 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2535 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2536 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2537 | int UNUSED written = 0; | |
2538 | IADDR UNUSED pc = abuf->addr; | |
2539 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2540 | ||
2541 | { | |
2542 | { | |
2543 | SF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2544 | CPU (h_fr[((UINT) 32)]) = opval; | |
c7e628df | 2545 | TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); |
cbb38b47 BE |
2546 | } |
2547 | { | |
2548 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2549 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2550 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2551 | } |
2552 | } | |
2553 | ||
2554 | #undef FLD | |
2555 | } | |
2556 | NEXT (vpc); | |
2557 | ||
2558 | CASE (sem, INSN_LDS_MACH_COMPACT) : /* lds $rn, mach */ | |
2559 | { | |
2560 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2561 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2562 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2563 | int UNUSED written = 0; | |
2564 | IADDR UNUSED pc = abuf->addr; | |
2565 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2566 | ||
2567 | { | |
2568 | SI opval = GET_H_GRC (FLD (f_rn)); | |
2569 | SET_H_MACH (opval); | |
2570 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
2571 | } | |
2572 | ||
2573 | #undef FLD | |
2574 | } | |
2575 | NEXT (vpc); | |
2576 | ||
2577 | CASE (sem, INSN_LDSL_MACH_COMPACT) : /* lds.l @${rn}+, mach */ | |
2578 | { | |
2579 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2580 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2581 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2582 | int UNUSED written = 0; | |
2583 | IADDR UNUSED pc = abuf->addr; | |
2584 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2585 | ||
2586 | { | |
2587 | { | |
2588 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2589 | SET_H_MACH (opval); | |
2590 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
2591 | } | |
2592 | { | |
2593 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2594 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2595 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2596 | } |
2597 | } | |
2598 | ||
2599 | #undef FLD | |
2600 | } | |
2601 | NEXT (vpc); | |
2602 | ||
2603 | CASE (sem, INSN_LDS_MACL_COMPACT) : /* lds $rn, macl */ | |
2604 | { | |
2605 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2606 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2607 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2608 | int UNUSED written = 0; | |
2609 | IADDR UNUSED pc = abuf->addr; | |
2610 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2611 | ||
2612 | { | |
2613 | SI opval = GET_H_GRC (FLD (f_rn)); | |
2614 | SET_H_MACL (opval); | |
2615 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
2616 | } | |
2617 | ||
2618 | #undef FLD | |
2619 | } | |
2620 | NEXT (vpc); | |
2621 | ||
2622 | CASE (sem, INSN_LDSL_MACL_COMPACT) : /* lds.l @${rn}+, macl */ | |
2623 | { | |
2624 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2625 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2626 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2627 | int UNUSED written = 0; | |
2628 | IADDR UNUSED pc = abuf->addr; | |
2629 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2630 | ||
2631 | { | |
2632 | { | |
2633 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2634 | SET_H_MACL (opval); | |
2635 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
2636 | } | |
2637 | { | |
2638 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2639 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2640 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2641 | } |
2642 | } | |
2643 | ||
2644 | #undef FLD | |
2645 | } | |
2646 | NEXT (vpc); | |
2647 | ||
2648 | CASE (sem, INSN_LDS_PR_COMPACT) : /* lds $rn, pr */ | |
2649 | { | |
2650 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2651 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2652 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2653 | int UNUSED written = 0; | |
2654 | IADDR UNUSED pc = abuf->addr; | |
2655 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2656 | ||
2657 | { | |
2658 | SI opval = GET_H_GRC (FLD (f_rn)); | |
2659 | SET_H_PR (opval); | |
2660 | TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); | |
2661 | } | |
2662 | ||
2663 | #undef FLD | |
2664 | } | |
2665 | NEXT (vpc); | |
2666 | ||
2667 | CASE (sem, INSN_LDSL_PR_COMPACT) : /* lds.l @${rn}+, pr */ | |
2668 | { | |
2669 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2670 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2671 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
2672 | int UNUSED written = 0; | |
2673 | IADDR UNUSED pc = abuf->addr; | |
2674 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2675 | ||
2676 | { | |
2677 | { | |
2678 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2679 | SET_H_PR (opval); | |
2680 | TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); | |
2681 | } | |
2682 | { | |
2683 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2684 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2685 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2686 | } |
2687 | } | |
2688 | ||
2689 | #undef FLD | |
2690 | } | |
2691 | NEXT (vpc); | |
2692 | ||
2693 | CASE (sem, INSN_MACL_COMPACT) : /* mac.l @${rm}+, @${rn}+ */ | |
2694 | { | |
2695 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2696 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2697 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2698 | int UNUSED written = 0; |
2699 | IADDR UNUSED pc = abuf->addr; | |
2700 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2701 | ||
2702 | { | |
2703 | DI tmp_tmpry; | |
2704 | DI tmp_mac; | |
2705 | DI tmp_result; | |
2706 | SI tmp_x; | |
2707 | SI tmp_y; | |
2708 | tmp_x = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2709 | { | |
2710 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2711 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2712 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2713 | } |
2714 | if (EQSI (FLD (f_rn), FLD (f_rm))) { | |
2715 | { | |
2716 | { | |
2717 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
2718 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2719 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2720 | } |
2721 | { | |
2722 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); | |
2723 | SET_H_GRC (FLD (f_rm), opval); | |
2724 | written |= (1 << 11); | |
c7e628df | 2725 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2726 | } |
2727 | } | |
2728 | } | |
2729 | tmp_y = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
2730 | { | |
2731 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); | |
2732 | SET_H_GRC (FLD (f_rm), opval); | |
2733 | written |= (1 << 11); | |
c7e628df | 2734 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2735 | } |
2736 | tmp_tmpry = MULDI (ZEXTSIDI (tmp_x), ZEXTSIDI (tmp_y)); | |
2737 | tmp_mac = ORDI (SLLDI (ZEXTSIDI (GET_H_MACH ()), 32), ZEXTSIDI (GET_H_MACL ())); | |
2738 | tmp_result = ADDDI (tmp_mac, tmp_tmpry); | |
2739 | { | |
2740 | if (GET_H_SBIT ()) { | |
2741 | { | |
2742 | SI tmp_min; | |
2743 | SI tmp_max; | |
2744 | tmp_max = SRLDI (INVDI (0), 16); | |
2745 | tmp_min = SRLDI (INVDI (0), 15); | |
2746 | if (GTDI (tmp_result, tmp_max)) { | |
2747 | tmp_result = tmp_max; | |
2748 | } else { | |
2749 | if (LTDI (tmp_result, tmp_min)) { | |
2750 | tmp_result = tmp_min; | |
2751 | } | |
2752 | } | |
2753 | } | |
2754 | } | |
2755 | { | |
2756 | SI opval = SUBWORDDISI (tmp_result, 0); | |
2757 | SET_H_MACH (opval); | |
2758 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
2759 | } | |
2760 | { | |
2761 | SI opval = SUBWORDDISI (tmp_result, 1); | |
2762 | SET_H_MACL (opval); | |
2763 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
2764 | } | |
2765 | } | |
2766 | } | |
2767 | ||
2768 | abuf->written = written; | |
2769 | #undef FLD | |
2770 | } | |
2771 | NEXT (vpc); | |
2772 | ||
2773 | CASE (sem, INSN_MACW_COMPACT) : /* mac.w @${rm}+, @${rn}+ */ | |
2774 | { | |
2775 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2776 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2777 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2778 | int UNUSED written = 0; |
2779 | IADDR UNUSED pc = abuf->addr; | |
2780 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2781 | ||
2782 | { | |
2783 | SI tmp_tmpry; | |
2784 | DI tmp_mac; | |
2785 | DI tmp_result; | |
2786 | HI tmp_x; | |
2787 | HI tmp_y; | |
2788 | tmp_x = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
2789 | { | |
2790 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 2); | |
2791 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2792 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2793 | } |
2794 | if (EQSI (FLD (f_rn), FLD (f_rm))) { | |
2795 | { | |
2796 | { | |
2797 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 2); | |
2798 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2799 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2800 | } |
2801 | { | |
2802 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); | |
2803 | SET_H_GRC (FLD (f_rm), opval); | |
2804 | written |= (1 << 11); | |
c7e628df | 2805 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2806 | } |
2807 | } | |
2808 | } | |
2809 | tmp_y = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
2810 | { | |
2811 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); | |
2812 | SET_H_GRC (FLD (f_rm), opval); | |
2813 | written |= (1 << 11); | |
c7e628df | 2814 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2815 | } |
2816 | tmp_tmpry = MULSI (ZEXTHISI (tmp_x), ZEXTHISI (tmp_y)); | |
2817 | if (GET_H_SBIT ()) { | |
2818 | { | |
2819 | if (ADDOFSI (tmp_tmpry, GET_H_MACL (), 0)) { | |
2820 | { | |
2821 | SI opval = 1; | |
2822 | SET_H_MACH (opval); | |
2823 | written |= (1 << 9); | |
2824 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
2825 | } | |
2826 | } | |
2827 | { | |
2828 | SI opval = ADDSI (tmp_tmpry, GET_H_MACL ()); | |
2829 | SET_H_MACL (opval); | |
2830 | written |= (1 << 10); | |
2831 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
2832 | } | |
2833 | } | |
2834 | } else { | |
2835 | { | |
2836 | tmp_mac = ORDI (SLLDI (ZEXTSIDI (GET_H_MACH ()), 32), ZEXTSIDI (GET_H_MACL ())); | |
2837 | tmp_result = ADDDI (tmp_mac, EXTSIDI (tmp_tmpry)); | |
2838 | { | |
2839 | SI opval = SUBWORDDISI (tmp_result, 0); | |
2840 | SET_H_MACH (opval); | |
2841 | written |= (1 << 9); | |
2842 | TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); | |
2843 | } | |
2844 | { | |
2845 | SI opval = SUBWORDDISI (tmp_result, 1); | |
2846 | SET_H_MACL (opval); | |
2847 | written |= (1 << 10); | |
2848 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
2849 | } | |
2850 | } | |
2851 | } | |
2852 | } | |
2853 | ||
2854 | abuf->written = written; | |
2855 | #undef FLD | |
2856 | } | |
2857 | NEXT (vpc); | |
2858 | ||
2859 | CASE (sem, INSN_MOV_COMPACT) : /* mov $rm64, $rn64 */ | |
2860 | { | |
2861 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2862 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2863 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2864 | int UNUSED written = 0; |
2865 | IADDR UNUSED pc = abuf->addr; | |
2866 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2867 | ||
2868 | { | |
2869 | DI opval = GET_H_GR (FLD (f_rm)); | |
2870 | SET_H_GR (FLD (f_rn), opval); | |
c7e628df | 2871 | TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); |
cbb38b47 BE |
2872 | } |
2873 | ||
2874 | #undef FLD | |
2875 | } | |
2876 | NEXT (vpc); | |
2877 | ||
2878 | CASE (sem, INSN_MOVI_COMPACT) : /* mov #$imm8, $rn */ | |
2879 | { | |
2880 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2881 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2882 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
2883 | int UNUSED written = 0; | |
2884 | IADDR UNUSED pc = abuf->addr; | |
2885 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2886 | ||
2887 | { | |
2888 | SI opval = EXTQIDI (ANDQI (FLD (f_imm8), 255)); | |
2889 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
2890 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
2891 | } | |
2892 | ||
2893 | #undef FLD | |
2894 | } | |
2895 | NEXT (vpc); | |
2896 | ||
2897 | CASE (sem, INSN_MOVI20_COMPACT) : /* movi20 #$imm20, $rn */ | |
2898 | { | |
2899 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2900 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2901 | #define FLD(f) abuf->fields.sfmt_movi20_compact.f | |
2902 | int UNUSED written = 0; | |
2903 | IADDR UNUSED pc = abuf->addr; | |
2904 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2905 | ||
2906 | { | |
2907 | SI opval = FLD (f_imm20); | |
2908 | SET_H_GRC (FLD (f_rn), opval); | |
2909 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
2910 | } |
2911 | ||
2912 | #undef FLD | |
2913 | } | |
2914 | NEXT (vpc); | |
2915 | ||
2916 | CASE (sem, INSN_MOVB1_COMPACT) : /* mov.b $rm, @$rn */ | |
2917 | { | |
2918 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2919 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2920 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2921 | int UNUSED written = 0; |
2922 | IADDR UNUSED pc = abuf->addr; | |
2923 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2924 | ||
2925 | { | |
2926 | UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); | |
2927 | SETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); | |
2928 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2929 | } | |
2930 | ||
2931 | #undef FLD | |
2932 | } | |
2933 | NEXT (vpc); | |
2934 | ||
2935 | CASE (sem, INSN_MOVB2_COMPACT) : /* mov.b $rm, @-$rn */ | |
2936 | { | |
2937 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2938 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2939 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2940 | int UNUSED written = 0; |
2941 | IADDR UNUSED pc = abuf->addr; | |
2942 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2943 | ||
2944 | { | |
2945 | DI tmp_addr; | |
2946 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 1); | |
2947 | { | |
2948 | UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); | |
2949 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
2950 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2951 | } | |
2952 | { | |
2953 | SI opval = tmp_addr; | |
2954 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 2955 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
2956 | } |
2957 | } | |
2958 | ||
2959 | #undef FLD | |
2960 | } | |
2961 | NEXT (vpc); | |
2962 | ||
2963 | CASE (sem, INSN_MOVB3_COMPACT) : /* mov.b $rm, @(r0,$rn) */ | |
2964 | { | |
2965 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2966 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 2967 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
2968 | int UNUSED written = 0; |
2969 | IADDR UNUSED pc = abuf->addr; | |
2970 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2971 | ||
2972 | { | |
2973 | UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); | |
2974 | SETMEMUQI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); | |
2975 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2976 | } | |
2977 | ||
2978 | #undef FLD | |
2979 | } | |
2980 | NEXT (vpc); | |
2981 | ||
2982 | CASE (sem, INSN_MOVB4_COMPACT) : /* mov.b r0, @($imm8, gbr) */ | |
2983 | { | |
2984 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2985 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2986 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
2987 | int UNUSED written = 0; | |
2988 | IADDR UNUSED pc = abuf->addr; | |
2989 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2990 | ||
2991 | { | |
2992 | DI tmp_addr; | |
2993 | tmp_addr = ADDSI (GET_H_GBR (), FLD (f_imm8)); | |
2994 | { | |
2995 | UQI opval = SUBWORDSIUQI (GET_H_GRC (((UINT) 0)), 3); | |
2996 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
2997 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2998 | } | |
2999 | } | |
3000 | ||
3001 | #undef FLD | |
3002 | } | |
3003 | NEXT (vpc); | |
3004 | ||
3005 | CASE (sem, INSN_MOVB5_COMPACT) : /* mov.b r0, @($imm4, $rm) */ | |
3006 | { | |
3007 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3008 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3009 | #define FLD(f) abuf->fields.sfmt_movb5_compact.f | |
3010 | int UNUSED written = 0; | |
3011 | IADDR UNUSED pc = abuf->addr; | |
3012 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3013 | ||
3014 | { | |
3015 | DI tmp_addr; | |
3016 | tmp_addr = ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4)); | |
3017 | { | |
3018 | UQI opval = SUBWORDSIUQI (GET_H_GRC (((UINT) 0)), 3); | |
3019 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
3020 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3021 | } | |
3022 | } | |
3023 | ||
3024 | #undef FLD | |
3025 | } | |
3026 | NEXT (vpc); | |
3027 | ||
3028 | CASE (sem, INSN_MOVB6_COMPACT) : /* mov.b @$rm, $rn */ | |
3029 | { | |
3030 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3031 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3032 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3033 | int UNUSED written = 0; |
3034 | IADDR UNUSED pc = abuf->addr; | |
3035 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3036 | ||
3037 | { | |
3038 | SI opval = EXTQISI (GETMEMQI (current_cpu, pc, GET_H_GRC (FLD (f_rm)))); | |
3039 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3040 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3041 | } |
3042 | ||
3043 | #undef FLD | |
3044 | } | |
3045 | NEXT (vpc); | |
3046 | ||
3047 | CASE (sem, INSN_MOVB7_COMPACT) : /* mov.b @${rm}+, $rn */ | |
3048 | { | |
3049 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3050 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3051 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3052 | int UNUSED written = 0; |
3053 | IADDR UNUSED pc = abuf->addr; | |
3054 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3055 | ||
3056 | { | |
3057 | QI tmp_data; | |
3058 | tmp_data = GETMEMQI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
3059 | if (EQSI (FLD (f_rm), FLD (f_rn))) { | |
3060 | { | |
3061 | SI opval = EXTQISI (tmp_data); | |
3062 | SET_H_GRC (FLD (f_rm), opval); | |
3063 | written |= (1 << 4); | |
c7e628df | 3064 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3065 | } |
3066 | } else { | |
3067 | { | |
3068 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 1); | |
3069 | SET_H_GRC (FLD (f_rm), opval); | |
3070 | written |= (1 << 4); | |
c7e628df | 3071 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3072 | } |
3073 | } | |
3074 | { | |
3075 | SI opval = EXTQISI (tmp_data); | |
3076 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3077 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3078 | } |
3079 | } | |
3080 | ||
3081 | abuf->written = written; | |
3082 | #undef FLD | |
3083 | } | |
3084 | NEXT (vpc); | |
3085 | ||
3086 | CASE (sem, INSN_MOVB8_COMPACT) : /* mov.b @(r0, $rm), $rn */ | |
3087 | { | |
3088 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3089 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3090 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3091 | int UNUSED written = 0; |
3092 | IADDR UNUSED pc = abuf->addr; | |
3093 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3094 | ||
3095 | { | |
3096 | SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm))))); | |
3097 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3098 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3099 | } |
3100 | ||
3101 | #undef FLD | |
3102 | } | |
3103 | NEXT (vpc); | |
3104 | ||
3105 | CASE (sem, INSN_MOVB9_COMPACT) : /* mov.b @($imm8, gbr), r0 */ | |
3106 | { | |
3107 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3108 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3109 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
3110 | int UNUSED written = 0; | |
3111 | IADDR UNUSED pc = abuf->addr; | |
3112 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3113 | ||
3114 | { | |
3115 | SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8)))); | |
3116 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3117 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3118 | } |
3119 | ||
3120 | #undef FLD | |
3121 | } | |
3122 | NEXT (vpc); | |
3123 | ||
3124 | CASE (sem, INSN_MOVB10_COMPACT) : /* mov.b @($imm4, $rm), r0 */ | |
3125 | { | |
3126 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3127 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3128 | #define FLD(f) abuf->fields.sfmt_movb5_compact.f | |
3129 | int UNUSED written = 0; | |
3130 | IADDR UNUSED pc = abuf->addr; | |
3131 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3132 | ||
3133 | { | |
3134 | SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4)))); | |
3135 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3136 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3137 | } |
3138 | ||
3139 | #undef FLD | |
3140 | } | |
3141 | NEXT (vpc); | |
3142 | ||
3143 | CASE (sem, INSN_MOVL1_COMPACT) : /* mov.l $rm, @$rn */ | |
3144 | { | |
3145 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3146 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3147 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3148 | int UNUSED written = 0; |
3149 | IADDR UNUSED pc = abuf->addr; | |
3150 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3151 | ||
3152 | { | |
3153 | SI opval = GET_H_GRC (FLD (f_rm)); | |
3154 | SETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); | |
3155 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3156 | } | |
3157 | ||
3158 | #undef FLD | |
3159 | } | |
3160 | NEXT (vpc); | |
3161 | ||
3162 | CASE (sem, INSN_MOVL2_COMPACT) : /* mov.l $rm, @-$rn */ | |
3163 | { | |
3164 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3165 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3166 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3167 | int UNUSED written = 0; |
3168 | IADDR UNUSED pc = abuf->addr; | |
3169 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3170 | ||
3171 | { | |
3172 | SI tmp_addr; | |
3173 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
3174 | { | |
3175 | SI opval = GET_H_GRC (FLD (f_rm)); | |
3176 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
3177 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3178 | } | |
3179 | { | |
3180 | SI opval = tmp_addr; | |
3181 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3182 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3183 | } |
3184 | } | |
3185 | ||
3186 | #undef FLD | |
3187 | } | |
3188 | NEXT (vpc); | |
3189 | ||
3190 | CASE (sem, INSN_MOVL3_COMPACT) : /* mov.l $rm, @(r0, $rn) */ | |
3191 | { | |
3192 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3193 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3194 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3195 | int UNUSED written = 0; |
3196 | IADDR UNUSED pc = abuf->addr; | |
3197 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3198 | ||
3199 | { | |
3200 | SI opval = GET_H_GRC (FLD (f_rm)); | |
3201 | SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); | |
3202 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3203 | } | |
3204 | ||
3205 | #undef FLD | |
3206 | } | |
3207 | NEXT (vpc); | |
3208 | ||
3209 | CASE (sem, INSN_MOVL4_COMPACT) : /* mov.l r0, @($imm8x4, gbr) */ | |
3210 | { | |
3211 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3212 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3213 | #define FLD(f) abuf->fields.sfmt_movl10_compact.f | |
3214 | int UNUSED written = 0; | |
3215 | IADDR UNUSED pc = abuf->addr; | |
3216 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3217 | ||
3218 | { | |
3219 | SI opval = GET_H_GRC (((UINT) 0)); | |
3220 | SETMEMSI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x4)), opval); | |
3221 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3222 | } | |
3223 | ||
3224 | #undef FLD | |
3225 | } | |
3226 | NEXT (vpc); | |
3227 | ||
3228 | CASE (sem, INSN_MOVL5_COMPACT) : /* mov.l $rm, @($imm4x4, $rn) */ | |
3229 | { | |
3230 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3231 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3232 | #define FLD(f) abuf->fields.sfmt_movl5_compact.f | |
3233 | int UNUSED written = 0; | |
3234 | IADDR UNUSED pc = abuf->addr; | |
3235 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3236 | ||
3237 | { | |
3238 | SI opval = GET_H_GRC (FLD (f_rm)); | |
3239 | SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm4x4)), opval); | |
3240 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3241 | } | |
3242 | ||
3243 | #undef FLD | |
3244 | } | |
3245 | NEXT (vpc); | |
3246 | ||
3247 | CASE (sem, INSN_MOVL6_COMPACT) : /* mov.l @$rm, $rn */ | |
3248 | { | |
3249 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3250 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3251 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3252 | int UNUSED written = 0; |
3253 | IADDR UNUSED pc = abuf->addr; | |
3254 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3255 | ||
3256 | { | |
3257 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
3258 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3259 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3260 | } |
3261 | ||
3262 | #undef FLD | |
3263 | } | |
3264 | NEXT (vpc); | |
3265 | ||
3266 | CASE (sem, INSN_MOVL7_COMPACT) : /* mov.l @${rm}+, $rn */ | |
3267 | { | |
3268 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3269 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3270 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3271 | int UNUSED written = 0; |
3272 | IADDR UNUSED pc = abuf->addr; | |
3273 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3274 | ||
3275 | { | |
3276 | { | |
3277 | SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
3278 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3279 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3280 | } |
3281 | if (EQSI (FLD (f_rm), FLD (f_rn))) { | |
3282 | { | |
3283 | SI opval = GET_H_GRC (FLD (f_rn)); | |
3284 | SET_H_GRC (FLD (f_rm), opval); | |
3285 | written |= (1 << 5); | |
c7e628df | 3286 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3287 | } |
3288 | } else { | |
3289 | { | |
3290 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); | |
3291 | SET_H_GRC (FLD (f_rm), opval); | |
3292 | written |= (1 << 5); | |
c7e628df | 3293 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3294 | } |
3295 | } | |
3296 | } | |
3297 | ||
3298 | abuf->written = written; | |
3299 | #undef FLD | |
3300 | } | |
3301 | NEXT (vpc); | |
3302 | ||
3303 | CASE (sem, INSN_MOVL8_COMPACT) : /* mov.l @(r0, $rm), $rn */ | |
3304 | { | |
3305 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3306 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3307 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3308 | int UNUSED written = 0; |
3309 | IADDR UNUSED pc = abuf->addr; | |
3310 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3311 | ||
3312 | { | |
3313 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); | |
3314 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3315 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3316 | } |
3317 | ||
3318 | #undef FLD | |
3319 | } | |
3320 | NEXT (vpc); | |
3321 | ||
3322 | CASE (sem, INSN_MOVL9_COMPACT) : /* mov.l @($imm8x4, gbr), r0 */ | |
3323 | { | |
3324 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3325 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3326 | #define FLD(f) abuf->fields.sfmt_movl10_compact.f | |
3327 | int UNUSED written = 0; | |
3328 | IADDR UNUSED pc = abuf->addr; | |
3329 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3330 | ||
3331 | { | |
3332 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x4))); | |
3333 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3334 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3335 | } |
3336 | ||
3337 | #undef FLD | |
3338 | } | |
3339 | NEXT (vpc); | |
3340 | ||
3341 | CASE (sem, INSN_MOVL10_COMPACT) : /* mov.l @($imm8x4, pc), $rn */ | |
3342 | { | |
3343 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3344 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3345 | #define FLD(f) abuf->fields.sfmt_movl10_compact.f | |
3346 | int UNUSED written = 0; | |
3347 | IADDR UNUSED pc = abuf->addr; | |
3348 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3349 | ||
3350 | { | |
3351 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_imm8x4), ANDDI (ADDDI (pc, 4), INVSI (3)))); | |
3352 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3353 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3354 | } |
3355 | ||
3356 | #undef FLD | |
3357 | } | |
3358 | NEXT (vpc); | |
3359 | ||
3360 | CASE (sem, INSN_MOVL11_COMPACT) : /* mov.l @($imm4x4, $rm), $rn */ | |
3361 | { | |
3362 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3363 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3364 | #define FLD(f) abuf->fields.sfmt_movl5_compact.f | |
3365 | int UNUSED written = 0; | |
3366 | IADDR UNUSED pc = abuf->addr; | |
3367 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3368 | ||
3369 | { | |
3370 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x4))); | |
3371 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
3372 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
3373 | } | |
3374 | ||
3375 | #undef FLD | |
3376 | } | |
3377 | NEXT (vpc); | |
3378 | ||
3379 | CASE (sem, INSN_MOVL12_COMPACT) : /* mov.l @($imm12x4, $rm), $rn */ | |
3380 | { | |
3381 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3382 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3383 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f | |
3384 | int UNUSED written = 0; | |
3385 | IADDR UNUSED pc = abuf->addr; | |
3386 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3387 | ||
3388 | { | |
3389 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm12x4))); | |
3390 | SET_H_GRC (FLD (f_rn), opval); | |
3391 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3392 | } | |
3393 | ||
3394 | #undef FLD | |
3395 | } | |
3396 | NEXT (vpc); | |
3397 | ||
3398 | CASE (sem, INSN_MOVL13_COMPACT) : /* mov.l $rm, @($imm12x4, $rn) */ | |
3399 | { | |
3400 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3401 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3402 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f | |
3403 | int UNUSED written = 0; | |
3404 | IADDR UNUSED pc = abuf->addr; | |
3405 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3406 | ||
3407 | { | |
3408 | SI opval = GET_H_GRC (FLD (f_rm)); | |
3409 | SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm12x4)), opval); | |
3410 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
cbb38b47 BE |
3411 | } |
3412 | ||
3413 | #undef FLD | |
3414 | } | |
3415 | NEXT (vpc); | |
3416 | ||
3417 | CASE (sem, INSN_MOVW1_COMPACT) : /* mov.w $rm, @$rn */ | |
3418 | { | |
3419 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3420 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3421 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3422 | int UNUSED written = 0; |
3423 | IADDR UNUSED pc = abuf->addr; | |
3424 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3425 | ||
3426 | { | |
3427 | HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); | |
3428 | SETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); | |
3429 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3430 | } | |
3431 | ||
3432 | #undef FLD | |
3433 | } | |
3434 | NEXT (vpc); | |
3435 | ||
3436 | CASE (sem, INSN_MOVW2_COMPACT) : /* mov.w $rm, @-$rn */ | |
3437 | { | |
3438 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3439 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3440 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3441 | int UNUSED written = 0; |
3442 | IADDR UNUSED pc = abuf->addr; | |
3443 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3444 | ||
3445 | { | |
3446 | DI tmp_addr; | |
3447 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 2); | |
3448 | { | |
3449 | HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); | |
3450 | SETMEMHI (current_cpu, pc, tmp_addr, opval); | |
3451 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3452 | } | |
3453 | { | |
3454 | SI opval = tmp_addr; | |
3455 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3456 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3457 | } |
3458 | } | |
3459 | ||
3460 | #undef FLD | |
3461 | } | |
3462 | NEXT (vpc); | |
3463 | ||
3464 | CASE (sem, INSN_MOVW3_COMPACT) : /* mov.w $rm, @(r0, $rn) */ | |
3465 | { | |
3466 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3467 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3468 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3469 | int UNUSED written = 0; |
3470 | IADDR UNUSED pc = abuf->addr; | |
3471 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3472 | ||
3473 | { | |
3474 | HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); | |
3475 | SETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); | |
3476 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3477 | } | |
3478 | ||
3479 | #undef FLD | |
3480 | } | |
3481 | NEXT (vpc); | |
3482 | ||
3483 | CASE (sem, INSN_MOVW4_COMPACT) : /* mov.w r0, @($imm8x2, gbr) */ | |
3484 | { | |
3485 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3486 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3487 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3488 | int UNUSED written = 0; | |
3489 | IADDR UNUSED pc = abuf->addr; | |
3490 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3491 | ||
3492 | { | |
3493 | HI opval = SUBWORDSIHI (GET_H_GRC (((UINT) 0)), 1); | |
3494 | SETMEMHI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x2)), opval); | |
3495 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3496 | } | |
3497 | ||
3498 | #undef FLD | |
3499 | } | |
3500 | NEXT (vpc); | |
3501 | ||
c7e628df | 3502 | CASE (sem, INSN_MOVW5_COMPACT) : /* mov.w r0, @($imm4x2, $rm) */ |
cbb38b47 BE |
3503 | { |
3504 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3505 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3506 | #define FLD(f) abuf->fields.sfmt_movw5_compact.f | |
3507 | int UNUSED written = 0; | |
3508 | IADDR UNUSED pc = abuf->addr; | |
3509 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3510 | ||
3511 | { | |
3512 | HI opval = SUBWORDSIHI (GET_H_GRC (((UINT) 0)), 1); | |
c7e628df | 3513 | SETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x2)), opval); |
cbb38b47 BE |
3514 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); |
3515 | } | |
3516 | ||
3517 | #undef FLD | |
3518 | } | |
3519 | NEXT (vpc); | |
3520 | ||
3521 | CASE (sem, INSN_MOVW6_COMPACT) : /* mov.w @$rm, $rn */ | |
3522 | { | |
3523 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3524 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3525 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3526 | int UNUSED written = 0; |
3527 | IADDR UNUSED pc = abuf->addr; | |
3528 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3529 | ||
3530 | { | |
3531 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm)))); | |
3532 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3533 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3534 | } |
3535 | ||
3536 | #undef FLD | |
3537 | } | |
3538 | NEXT (vpc); | |
3539 | ||
3540 | CASE (sem, INSN_MOVW7_COMPACT) : /* mov.w @${rm}+, $rn */ | |
3541 | { | |
3542 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3543 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3544 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3545 | int UNUSED written = 0; |
3546 | IADDR UNUSED pc = abuf->addr; | |
3547 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3548 | ||
3549 | { | |
3550 | HI tmp_data; | |
3551 | tmp_data = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); | |
3552 | if (EQSI (FLD (f_rm), FLD (f_rn))) { | |
3553 | { | |
3554 | SI opval = EXTHISI (tmp_data); | |
3555 | SET_H_GRC (FLD (f_rm), opval); | |
3556 | written |= (1 << 4); | |
c7e628df | 3557 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3558 | } |
3559 | } else { | |
3560 | { | |
3561 | SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); | |
3562 | SET_H_GRC (FLD (f_rm), opval); | |
3563 | written |= (1 << 4); | |
c7e628df | 3564 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3565 | } |
3566 | } | |
3567 | { | |
3568 | SI opval = EXTHISI (tmp_data); | |
3569 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3570 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3571 | } |
3572 | } | |
3573 | ||
3574 | abuf->written = written; | |
3575 | #undef FLD | |
3576 | } | |
3577 | NEXT (vpc); | |
3578 | ||
3579 | CASE (sem, INSN_MOVW8_COMPACT) : /* mov.w @(r0, $rm), $rn */ | |
3580 | { | |
3581 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3582 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3583 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3584 | int UNUSED written = 0; |
3585 | IADDR UNUSED pc = abuf->addr; | |
3586 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3587 | ||
3588 | { | |
3589 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm))))); | |
3590 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3591 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3592 | } |
3593 | ||
3594 | #undef FLD | |
3595 | } | |
3596 | NEXT (vpc); | |
3597 | ||
3598 | CASE (sem, INSN_MOVW9_COMPACT) : /* mov.w @($imm8x2, gbr), r0 */ | |
3599 | { | |
3600 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3601 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3602 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3603 | int UNUSED written = 0; | |
3604 | IADDR UNUSED pc = abuf->addr; | |
3605 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3606 | ||
3607 | { | |
3608 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x2)))); | |
3609 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3610 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3611 | } |
3612 | ||
3613 | #undef FLD | |
3614 | } | |
3615 | NEXT (vpc); | |
3616 | ||
3617 | CASE (sem, INSN_MOVW10_COMPACT) : /* mov.w @($imm8x2, pc), $rn */ | |
3618 | { | |
3619 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3620 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3621 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3622 | int UNUSED written = 0; | |
3623 | IADDR UNUSED pc = abuf->addr; | |
3624 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3625 | ||
3626 | { | |
3627 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDDI (ADDDI (pc, 4), FLD (f_imm8x2)))); | |
3628 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3629 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3630 | } |
3631 | ||
3632 | #undef FLD | |
3633 | } | |
3634 | NEXT (vpc); | |
3635 | ||
3636 | CASE (sem, INSN_MOVW11_COMPACT) : /* mov.w @($imm4x2, $rm), r0 */ | |
3637 | { | |
3638 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3639 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3640 | #define FLD(f) abuf->fields.sfmt_movw5_compact.f |
cbb38b47 BE |
3641 | int UNUSED written = 0; |
3642 | IADDR UNUSED pc = abuf->addr; | |
3643 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3644 | ||
3645 | { | |
3646 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x2)))); | |
3647 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3648 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3649 | } |
3650 | ||
3651 | #undef FLD | |
3652 | } | |
3653 | NEXT (vpc); | |
3654 | ||
3655 | CASE (sem, INSN_MOVA_COMPACT) : /* mova @($imm8x4, pc), r0 */ | |
3656 | { | |
3657 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3658 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3659 | #define FLD(f) abuf->fields.sfmt_movl10_compact.f | |
3660 | int UNUSED written = 0; | |
3661 | IADDR UNUSED pc = abuf->addr; | |
3662 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3663 | ||
3664 | { | |
3665 | SI opval = ADDDI (ANDDI (ADDDI (pc, 4), INVSI (3)), FLD (f_imm8x4)); | |
3666 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 3667 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3668 | } |
3669 | ||
3670 | #undef FLD | |
3671 | } | |
3672 | NEXT (vpc); | |
3673 | ||
3674 | CASE (sem, INSN_MOVCAL_COMPACT) : /* movca.l r0, @$rn */ | |
3675 | { | |
3676 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3677 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3678 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3679 | int UNUSED written = 0; | |
3680 | IADDR UNUSED pc = abuf->addr; | |
3681 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3682 | ||
3683 | { | |
3684 | SI opval = GET_H_GRC (((UINT) 0)); | |
3685 | SETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); | |
3686 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3687 | } | |
3688 | ||
c7e628df DB |
3689 | #undef FLD |
3690 | } | |
3691 | NEXT (vpc); | |
3692 | ||
3693 | CASE (sem, INSN_MOVCOL_COMPACT) : /* movco.l r0, @$rn */ | |
3694 | { | |
3695 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3696 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3697 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3698 | int UNUSED written = 0; | |
3699 | IADDR UNUSED pc = abuf->addr; | |
3700 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3701 | ||
3702 | { | |
3703 | SI opval = GET_H_GRC (FLD (f_rn)); | |
3704 | SET_H_GRC (FLD (f_rn), opval); | |
3705 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3706 | } | |
3707 | ||
cbb38b47 BE |
3708 | #undef FLD |
3709 | } | |
3710 | NEXT (vpc); | |
3711 | ||
3712 | CASE (sem, INSN_MOVT_COMPACT) : /* movt $rn */ | |
3713 | { | |
3714 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3715 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3716 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3717 | int UNUSED written = 0; | |
3718 | IADDR UNUSED pc = abuf->addr; | |
3719 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3720 | ||
3721 | { | |
3722 | SI opval = ZEXTBISI (GET_H_TBIT ()); | |
3723 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
3724 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
3725 | } | |
3726 | ||
3727 | #undef FLD | |
3728 | } | |
3729 | NEXT (vpc); | |
3730 | ||
3731 | CASE (sem, INSN_MOVUAL_COMPACT) : /* movua.l @$rn, r0 */ | |
3732 | { | |
3733 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3734 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3735 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3736 | int UNUSED written = 0; | |
3737 | IADDR UNUSED pc = abuf->addr; | |
3738 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3739 | ||
3740 | { | |
3741 | SI opval = sh64_movua (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
3742 | SET_H_GRC (((UINT) 0), opval); | |
3743 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3744 | } | |
3745 | ||
3746 | #undef FLD | |
3747 | } | |
3748 | NEXT (vpc); | |
3749 | ||
3750 | CASE (sem, INSN_MOVUAL2_COMPACT) : /* movua.l @$rn+, r0 */ | |
3751 | { | |
3752 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3753 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3754 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
3755 | int UNUSED written = 0; | |
3756 | IADDR UNUSED pc = abuf->addr; | |
3757 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3758 | ||
3759 | { | |
3760 | { | |
3761 | SI opval = sh64_movua (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
3762 | SET_H_GRC (((UINT) 0), opval); | |
3763 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3764 | } | |
3765 | { | |
3766 | SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); | |
3767 | SET_H_GRC (FLD (f_rn), opval); | |
3768 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 | 3769 | } |
c7e628df | 3770 | } |
cbb38b47 BE |
3771 | |
3772 | #undef FLD | |
3773 | } | |
3774 | NEXT (vpc); | |
3775 | ||
3776 | CASE (sem, INSN_MULL_COMPACT) : /* mul.l $rm, $rn */ | |
3777 | { | |
3778 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3779 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3780 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3781 | int UNUSED written = 0; |
3782 | IADDR UNUSED pc = abuf->addr; | |
3783 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3784 | ||
3785 | { | |
3786 | SI opval = MULSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); | |
3787 | SET_H_MACL (opval); | |
3788 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
3789 | } | |
3790 | ||
3791 | #undef FLD | |
3792 | } | |
3793 | NEXT (vpc); | |
3794 | ||
3795 | CASE (sem, INSN_MULSW_COMPACT) : /* muls.w $rm, $rn */ | |
3796 | { | |
3797 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3798 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3799 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3800 | int UNUSED written = 0; |
3801 | IADDR UNUSED pc = abuf->addr; | |
3802 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3803 | ||
3804 | { | |
3805 | SI opval = MULSI (EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)), EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rn)), 1))); | |
3806 | SET_H_MACL (opval); | |
3807 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
3808 | } | |
3809 | ||
3810 | #undef FLD | |
3811 | } | |
3812 | NEXT (vpc); | |
3813 | ||
3814 | CASE (sem, INSN_MULUW_COMPACT) : /* mulu.w $rm, $rn */ | |
3815 | { | |
3816 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3817 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3818 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3819 | int UNUSED written = 0; |
3820 | IADDR UNUSED pc = abuf->addr; | |
3821 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3822 | ||
3823 | { | |
3824 | SI opval = MULSI (ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)), ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rn)), 1))); | |
3825 | SET_H_MACL (opval); | |
3826 | TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); | |
3827 | } | |
3828 | ||
3829 | #undef FLD | |
3830 | } | |
3831 | NEXT (vpc); | |
3832 | ||
3833 | CASE (sem, INSN_NEG_COMPACT) : /* neg $rm, $rn */ | |
3834 | { | |
3835 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3836 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3837 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3838 | int UNUSED written = 0; |
3839 | IADDR UNUSED pc = abuf->addr; | |
3840 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3841 | ||
3842 | { | |
3843 | SI opval = NEGSI (GET_H_GRC (FLD (f_rm))); | |
3844 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3845 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3846 | } |
3847 | ||
3848 | #undef FLD | |
3849 | } | |
3850 | NEXT (vpc); | |
3851 | ||
3852 | CASE (sem, INSN_NEGC_COMPACT) : /* negc $rm, $rn */ | |
3853 | { | |
3854 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3855 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3856 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3857 | int UNUSED written = 0; |
3858 | IADDR UNUSED pc = abuf->addr; | |
3859 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3860 | ||
3861 | { | |
3862 | BI tmp_flag; | |
3863 | tmp_flag = SUBCFSI (0, GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
3864 | { | |
3865 | SI opval = SUBCSI (0, GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
3866 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 3867 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
3868 | } |
3869 | { | |
3870 | BI opval = tmp_flag; | |
3871 | SET_H_TBIT (opval); | |
3872 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
3873 | } | |
3874 | } | |
3875 | ||
3876 | #undef FLD | |
3877 | } | |
3878 | NEXT (vpc); | |
3879 | ||
3880 | CASE (sem, INSN_NOP_COMPACT) : /* nop */ | |
3881 | { | |
3882 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3883 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 3884 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
3885 | int UNUSED written = 0; |
3886 | IADDR UNUSED pc = abuf->addr; | |
3887 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3888 | ||
3889 | ((void) 0); /*nop*/ | |
3890 | ||
3891 | #undef FLD | |
3892 | } | |
3893 | NEXT (vpc); | |
3894 | ||
3895 | CASE (sem, INSN_NOT_COMPACT) : /* not $rm64, $rn64 */ | |
3896 | { | |
3897 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3898 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3899 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3900 | int UNUSED written = 0; |
3901 | IADDR UNUSED pc = abuf->addr; | |
3902 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3903 | ||
3904 | { | |
3905 | DI opval = INVDI (GET_H_GR (FLD (f_rm))); | |
3906 | SET_H_GR (FLD (f_rn), opval); | |
c7e628df | 3907 | TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); |
cbb38b47 BE |
3908 | } |
3909 | ||
3910 | #undef FLD | |
3911 | } | |
3912 | NEXT (vpc); | |
3913 | ||
3914 | CASE (sem, INSN_OCBI_COMPACT) : /* ocbi @$rn */ | |
3915 | { | |
3916 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3917 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3918 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f |
cbb38b47 BE |
3919 | int UNUSED written = 0; |
3920 | IADDR UNUSED pc = abuf->addr; | |
3921 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3922 | ||
c7e628df DB |
3923 | { |
3924 | { | |
3925 | SI opval = GET_H_GRC (FLD (f_rn)); | |
3926 | SET_H_GRC (FLD (f_rn), opval); | |
3927 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3928 | } | |
cbb38b47 | 3929 | ((void) 0); /*nop*/ |
c7e628df | 3930 | } |
cbb38b47 BE |
3931 | |
3932 | #undef FLD | |
3933 | } | |
3934 | NEXT (vpc); | |
3935 | ||
3936 | CASE (sem, INSN_OCBP_COMPACT) : /* ocbp @$rn */ | |
3937 | { | |
3938 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3939 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3940 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f |
cbb38b47 BE |
3941 | int UNUSED written = 0; |
3942 | IADDR UNUSED pc = abuf->addr; | |
3943 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3944 | ||
c7e628df DB |
3945 | { |
3946 | { | |
3947 | SI opval = GET_H_GRC (FLD (f_rn)); | |
3948 | SET_H_GRC (FLD (f_rn), opval); | |
3949 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3950 | } | |
cbb38b47 | 3951 | ((void) 0); /*nop*/ |
c7e628df | 3952 | } |
cbb38b47 BE |
3953 | |
3954 | #undef FLD | |
3955 | } | |
3956 | NEXT (vpc); | |
3957 | ||
3958 | CASE (sem, INSN_OCBWB_COMPACT) : /* ocbwb @$rn */ | |
3959 | { | |
3960 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3961 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3962 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f |
cbb38b47 BE |
3963 | int UNUSED written = 0; |
3964 | IADDR UNUSED pc = abuf->addr; | |
3965 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3966 | ||
c7e628df DB |
3967 | { |
3968 | { | |
3969 | SI opval = GET_H_GRC (FLD (f_rn)); | |
3970 | SET_H_GRC (FLD (f_rn), opval); | |
3971 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
3972 | } | |
cbb38b47 | 3973 | ((void) 0); /*nop*/ |
c7e628df | 3974 | } |
cbb38b47 BE |
3975 | |
3976 | #undef FLD | |
3977 | } | |
3978 | NEXT (vpc); | |
3979 | ||
3980 | CASE (sem, INSN_OR_COMPACT) : /* or $rm64, $rn64 */ | |
3981 | { | |
3982 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3983 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 3984 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
3985 | int UNUSED written = 0; |
3986 | IADDR UNUSED pc = abuf->addr; | |
3987 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3988 | ||
3989 | { | |
3990 | DI opval = ORDI (GET_H_GR (FLD (f_rm)), GET_H_GR (FLD (f_rn))); | |
3991 | SET_H_GR (FLD (f_rn), opval); | |
c7e628df | 3992 | TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); |
cbb38b47 BE |
3993 | } |
3994 | ||
3995 | #undef FLD | |
3996 | } | |
3997 | NEXT (vpc); | |
3998 | ||
3999 | CASE (sem, INSN_ORI_COMPACT) : /* or #$uimm8, r0 */ | |
4000 | { | |
4001 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4002 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4003 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
4004 | int UNUSED written = 0; | |
4005 | IADDR UNUSED pc = abuf->addr; | |
4006 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4007 | ||
4008 | { | |
4009 | SI opval = ORSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); | |
4010 | SET_H_GRC (((UINT) 0), opval); | |
c7e628df | 4011 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4012 | } |
4013 | ||
4014 | #undef FLD | |
4015 | } | |
4016 | NEXT (vpc); | |
4017 | ||
4018 | CASE (sem, INSN_ORB_COMPACT) : /* or.b #$imm8, @(r0, gbr) */ | |
4019 | { | |
4020 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4021 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4022 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
4023 | int UNUSED written = 0; | |
4024 | IADDR UNUSED pc = abuf->addr; | |
4025 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4026 | ||
4027 | { | |
4028 | DI tmp_addr; | |
4029 | UQI tmp_data; | |
4030 | tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); | |
4031 | tmp_data = ORQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); | |
4032 | { | |
4033 | UQI opval = tmp_data; | |
4034 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
4035 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4036 | } | |
4037 | } | |
4038 | ||
4039 | #undef FLD | |
4040 | } | |
4041 | NEXT (vpc); | |
4042 | ||
4043 | CASE (sem, INSN_PREF_COMPACT) : /* pref @$rn */ | |
4044 | { | |
4045 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4046 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4047 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f |
cbb38b47 BE |
4048 | int UNUSED written = 0; |
4049 | IADDR UNUSED pc = abuf->addr; | |
4050 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4051 | ||
c7e628df | 4052 | sh64_pref (current_cpu, GET_H_GRC (FLD (f_rn))); |
cbb38b47 BE |
4053 | |
4054 | #undef FLD | |
4055 | } | |
4056 | NEXT (vpc); | |
4057 | ||
4058 | CASE (sem, INSN_ROTCL_COMPACT) : /* rotcl $rn */ | |
4059 | { | |
4060 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4061 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4062 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4063 | int UNUSED written = 0; | |
4064 | IADDR UNUSED pc = abuf->addr; | |
4065 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4066 | ||
4067 | { | |
4068 | BI tmp_temp; | |
4069 | tmp_temp = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
4070 | { | |
4071 | SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), GET_H_TBIT ()); | |
4072 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4073 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4074 | } |
4075 | { | |
4076 | BI opval = ((tmp_temp) ? (1) : (0)); | |
4077 | SET_H_TBIT (opval); | |
4078 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4079 | } | |
4080 | } | |
4081 | ||
4082 | #undef FLD | |
4083 | } | |
4084 | NEXT (vpc); | |
4085 | ||
4086 | CASE (sem, INSN_ROTCR_COMPACT) : /* rotcr $rn */ | |
4087 | { | |
4088 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4089 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4090 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4091 | int UNUSED written = 0; | |
4092 | IADDR UNUSED pc = abuf->addr; | |
4093 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4094 | ||
4095 | { | |
4096 | BI tmp_lsbit; | |
4097 | SI tmp_temp; | |
4098 | tmp_lsbit = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rn)), 1), 0)) ? (0) : (1)); | |
4099 | tmp_temp = GET_H_TBIT (); | |
4100 | { | |
4101 | SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rn)), 1), SLLSI (tmp_temp, 31)); | |
4102 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4103 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4104 | } |
4105 | { | |
4106 | BI opval = ((tmp_lsbit) ? (1) : (0)); | |
4107 | SET_H_TBIT (opval); | |
4108 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4109 | } | |
4110 | } | |
4111 | ||
4112 | #undef FLD | |
4113 | } | |
4114 | NEXT (vpc); | |
4115 | ||
4116 | CASE (sem, INSN_ROTL_COMPACT) : /* rotl $rn */ | |
4117 | { | |
4118 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4119 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4120 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4121 | int UNUSED written = 0; | |
4122 | IADDR UNUSED pc = abuf->addr; | |
4123 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4124 | ||
4125 | { | |
4126 | BI tmp_temp; | |
4127 | tmp_temp = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
4128 | { | |
4129 | SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), tmp_temp); | |
4130 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4131 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4132 | } |
4133 | { | |
4134 | BI opval = ((tmp_temp) ? (1) : (0)); | |
4135 | SET_H_TBIT (opval); | |
4136 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4137 | } | |
4138 | } | |
4139 | ||
4140 | #undef FLD | |
4141 | } | |
4142 | NEXT (vpc); | |
4143 | ||
4144 | CASE (sem, INSN_ROTR_COMPACT) : /* rotr $rn */ | |
4145 | { | |
4146 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4147 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4148 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4149 | int UNUSED written = 0; | |
4150 | IADDR UNUSED pc = abuf->addr; | |
4151 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4152 | ||
4153 | { | |
4154 | BI tmp_lsbit; | |
4155 | SI tmp_temp; | |
4156 | tmp_lsbit = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rn)), 1), 0)) ? (0) : (1)); | |
4157 | tmp_temp = tmp_lsbit; | |
4158 | { | |
4159 | SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rn)), 1), SLLSI (tmp_temp, 31)); | |
4160 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4161 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4162 | } |
4163 | { | |
4164 | BI opval = ((tmp_lsbit) ? (1) : (0)); | |
4165 | SET_H_TBIT (opval); | |
4166 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4167 | } | |
4168 | } | |
4169 | ||
4170 | #undef FLD | |
4171 | } | |
4172 | NEXT (vpc); | |
4173 | ||
4174 | CASE (sem, INSN_RTS_COMPACT) : /* rts */ | |
4175 | { | |
4176 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4177 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 4178 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
4179 | int UNUSED written = 0; |
4180 | IADDR UNUSED pc = abuf->addr; | |
4181 | SEM_BRANCH_INIT | |
4182 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4183 | ||
c7e628df DB |
4184 | { |
4185 | { | |
4186 | UDI opval = ADDDI (pc, 2); | |
4187 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
4188 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
4189 | } | |
4190 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
4191 | { |
4192 | { | |
4193 | UDI opval = GET_H_PR (); | |
4194 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
4195 | TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
4196 | } | |
c7e628df DB |
4197 | } |
4198 | ((void) 0); /*nop*/ | |
cbb38b47 BE |
4199 | } |
4200 | ||
4201 | SEM_BRANCH_FINI (vpc); | |
4202 | #undef FLD | |
4203 | } | |
4204 | NEXT (vpc); | |
4205 | ||
4206 | CASE (sem, INSN_SETS_COMPACT) : /* sets */ | |
4207 | { | |
4208 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4209 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 4210 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
4211 | int UNUSED written = 0; |
4212 | IADDR UNUSED pc = abuf->addr; | |
4213 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4214 | ||
4215 | { | |
4216 | BI opval = 1; | |
4217 | SET_H_SBIT (opval); | |
4218 | TRACE_RESULT (current_cpu, abuf, "sbit", 'x', opval); | |
4219 | } | |
4220 | ||
4221 | #undef FLD | |
4222 | } | |
4223 | NEXT (vpc); | |
4224 | ||
4225 | CASE (sem, INSN_SETT_COMPACT) : /* sett */ | |
4226 | { | |
4227 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4228 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2310652a | 4229 | #define FLD(f) abuf->fields.sfmt_empty.f |
cbb38b47 BE |
4230 | int UNUSED written = 0; |
4231 | IADDR UNUSED pc = abuf->addr; | |
4232 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4233 | ||
4234 | { | |
4235 | BI opval = 1; | |
4236 | SET_H_TBIT (opval); | |
4237 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4238 | } | |
4239 | ||
4240 | #undef FLD | |
4241 | } | |
4242 | NEXT (vpc); | |
4243 | ||
4244 | CASE (sem, INSN_SHAD_COMPACT) : /* shad $rm, $rn */ | |
4245 | { | |
4246 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4247 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4248 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4249 | int UNUSED written = 0; |
4250 | IADDR UNUSED pc = abuf->addr; | |
4251 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4252 | ||
4253 | { | |
c7e628df DB |
4254 | SI tmp_shamt; |
4255 | tmp_shamt = ANDSI (GET_H_GRC (FLD (f_rm)), 31); | |
cbb38b47 BE |
4256 | if (GESI (GET_H_GRC (FLD (f_rm)), 0)) { |
4257 | { | |
4258 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), tmp_shamt); | |
4259 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4260 | written |= (1 << 2); |
4261 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4262 | } |
4263 | } else { | |
c7e628df | 4264 | if (NESI (tmp_shamt, 0)) { |
cbb38b47 BE |
4265 | { |
4266 | SI opval = SRASI (GET_H_GRC (FLD (f_rn)), SUBSI (32, tmp_shamt)); | |
4267 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4268 | written |= (1 << 2); |
4269 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4270 | } |
4271 | } else { | |
4272 | if (LTSI (GET_H_GRC (FLD (f_rn)), 0)) { | |
4273 | { | |
4274 | SI opval = NEGSI (1); | |
4275 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4276 | written |= (1 << 2); |
4277 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4278 | } |
4279 | } else { | |
4280 | { | |
4281 | SI opval = 0; | |
4282 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4283 | written |= (1 << 2); |
4284 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4285 | } |
4286 | } | |
4287 | } | |
4288 | } | |
4289 | } | |
4290 | ||
4291 | abuf->written = written; | |
4292 | #undef FLD | |
4293 | } | |
4294 | NEXT (vpc); | |
4295 | ||
4296 | CASE (sem, INSN_SHAL_COMPACT) : /* shal $rn */ | |
4297 | { | |
4298 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4299 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4300 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4301 | int UNUSED written = 0; | |
4302 | IADDR UNUSED pc = abuf->addr; | |
4303 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4304 | ||
4305 | { | |
4306 | BI tmp_t; | |
4307 | tmp_t = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
4308 | { | |
4309 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 1); | |
4310 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4311 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4312 | } |
4313 | { | |
4314 | BI opval = ((tmp_t) ? (1) : (0)); | |
4315 | SET_H_TBIT (opval); | |
4316 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4317 | } | |
4318 | } | |
4319 | ||
4320 | #undef FLD | |
4321 | } | |
4322 | NEXT (vpc); | |
4323 | ||
4324 | CASE (sem, INSN_SHAR_COMPACT) : /* shar $rn */ | |
4325 | { | |
4326 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4327 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4328 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4329 | int UNUSED written = 0; | |
4330 | IADDR UNUSED pc = abuf->addr; | |
4331 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4332 | ||
4333 | { | |
4334 | BI tmp_t; | |
4335 | tmp_t = ANDSI (GET_H_GRC (FLD (f_rn)), 1); | |
4336 | { | |
4337 | SI opval = SRASI (GET_H_GRC (FLD (f_rn)), 1); | |
4338 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4339 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4340 | } |
4341 | { | |
4342 | BI opval = ((tmp_t) ? (1) : (0)); | |
4343 | SET_H_TBIT (opval); | |
4344 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4345 | } | |
4346 | } | |
4347 | ||
4348 | #undef FLD | |
4349 | } | |
4350 | NEXT (vpc); | |
4351 | ||
4352 | CASE (sem, INSN_SHLD_COMPACT) : /* shld $rm, $rn */ | |
4353 | { | |
4354 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4355 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4356 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4357 | int UNUSED written = 0; |
4358 | IADDR UNUSED pc = abuf->addr; | |
4359 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4360 | ||
4361 | { | |
c7e628df DB |
4362 | SI tmp_shamt; |
4363 | tmp_shamt = ANDSI (GET_H_GRC (FLD (f_rm)), 31); | |
cbb38b47 BE |
4364 | if (GESI (GET_H_GRC (FLD (f_rm)), 0)) { |
4365 | { | |
4366 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), tmp_shamt); | |
4367 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4368 | written |= (1 << 2); |
4369 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4370 | } |
4371 | } else { | |
c7e628df | 4372 | if (NESI (tmp_shamt, 0)) { |
cbb38b47 BE |
4373 | { |
4374 | SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), SUBSI (32, tmp_shamt)); | |
4375 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4376 | written |= (1 << 2); |
4377 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4378 | } |
4379 | } else { | |
4380 | { | |
4381 | SI opval = 0; | |
4382 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4383 | written |= (1 << 2); |
4384 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4385 | } |
4386 | } | |
4387 | } | |
4388 | } | |
4389 | ||
4390 | abuf->written = written; | |
4391 | #undef FLD | |
4392 | } | |
4393 | NEXT (vpc); | |
4394 | ||
4395 | CASE (sem, INSN_SHLL_COMPACT) : /* shll $rn */ | |
4396 | { | |
4397 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4398 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4399 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4400 | int UNUSED written = 0; | |
4401 | IADDR UNUSED pc = abuf->addr; | |
4402 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4403 | ||
4404 | { | |
4405 | BI tmp_t; | |
4406 | tmp_t = SRLSI (GET_H_GRC (FLD (f_rn)), 31); | |
4407 | { | |
4408 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 1); | |
4409 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4410 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4411 | } |
4412 | { | |
4413 | BI opval = ((tmp_t) ? (1) : (0)); | |
4414 | SET_H_TBIT (opval); | |
4415 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4416 | } | |
4417 | } | |
4418 | ||
4419 | #undef FLD | |
4420 | } | |
4421 | NEXT (vpc); | |
4422 | ||
4423 | CASE (sem, INSN_SHLL2_COMPACT) : /* shll2 $rn */ | |
4424 | { | |
4425 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4426 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4427 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4428 | int UNUSED written = 0; | |
4429 | IADDR UNUSED pc = abuf->addr; | |
4430 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4431 | ||
4432 | { | |
4433 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 2); | |
4434 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4435 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4436 | } |
4437 | ||
4438 | #undef FLD | |
4439 | } | |
4440 | NEXT (vpc); | |
4441 | ||
4442 | CASE (sem, INSN_SHLL8_COMPACT) : /* shll8 $rn */ | |
4443 | { | |
4444 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4445 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4446 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4447 | int UNUSED written = 0; | |
4448 | IADDR UNUSED pc = abuf->addr; | |
4449 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4450 | ||
4451 | { | |
4452 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 8); | |
4453 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4454 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4455 | } |
4456 | ||
4457 | #undef FLD | |
4458 | } | |
4459 | NEXT (vpc); | |
4460 | ||
4461 | CASE (sem, INSN_SHLL16_COMPACT) : /* shll16 $rn */ | |
4462 | { | |
4463 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4464 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4465 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4466 | int UNUSED written = 0; | |
4467 | IADDR UNUSED pc = abuf->addr; | |
4468 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4469 | ||
4470 | { | |
4471 | SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 16); | |
4472 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4473 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4474 | } |
4475 | ||
4476 | #undef FLD | |
4477 | } | |
4478 | NEXT (vpc); | |
4479 | ||
4480 | CASE (sem, INSN_SHLR_COMPACT) : /* shlr $rn */ | |
4481 | { | |
4482 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4483 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4484 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4485 | int UNUSED written = 0; | |
4486 | IADDR UNUSED pc = abuf->addr; | |
4487 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4488 | ||
4489 | { | |
4490 | BI tmp_t; | |
4491 | tmp_t = ANDSI (GET_H_GRC (FLD (f_rn)), 1); | |
4492 | { | |
4493 | SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 1); | |
4494 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4495 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4496 | } |
4497 | { | |
4498 | BI opval = ((tmp_t) ? (1) : (0)); | |
4499 | SET_H_TBIT (opval); | |
4500 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4501 | } | |
4502 | } | |
4503 | ||
4504 | #undef FLD | |
4505 | } | |
4506 | NEXT (vpc); | |
4507 | ||
4508 | CASE (sem, INSN_SHLR2_COMPACT) : /* shlr2 $rn */ | |
4509 | { | |
4510 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4511 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4512 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4513 | int UNUSED written = 0; | |
4514 | IADDR UNUSED pc = abuf->addr; | |
4515 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4516 | ||
4517 | { | |
4518 | SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 2); | |
4519 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4520 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4521 | } |
4522 | ||
4523 | #undef FLD | |
4524 | } | |
4525 | NEXT (vpc); | |
4526 | ||
4527 | CASE (sem, INSN_SHLR8_COMPACT) : /* shlr8 $rn */ | |
4528 | { | |
4529 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4530 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4531 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4532 | int UNUSED written = 0; | |
4533 | IADDR UNUSED pc = abuf->addr; | |
4534 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4535 | ||
4536 | { | |
4537 | SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 8); | |
4538 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4539 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4540 | } |
4541 | ||
4542 | #undef FLD | |
4543 | } | |
4544 | NEXT (vpc); | |
4545 | ||
4546 | CASE (sem, INSN_SHLR16_COMPACT) : /* shlr16 $rn */ | |
4547 | { | |
4548 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4549 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4550 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4551 | int UNUSED written = 0; | |
4552 | IADDR UNUSED pc = abuf->addr; | |
4553 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4554 | ||
4555 | { | |
4556 | SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 16); | |
4557 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4558 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4559 | } |
4560 | ||
4561 | #undef FLD | |
4562 | } | |
4563 | NEXT (vpc); | |
4564 | ||
4565 | CASE (sem, INSN_STC_GBR_COMPACT) : /* stc gbr, $rn */ | |
4566 | { | |
4567 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4568 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4569 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4570 | int UNUSED written = 0; | |
4571 | IADDR UNUSED pc = abuf->addr; | |
4572 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4573 | ||
4574 | { | |
4575 | SI opval = GET_H_GBR (); | |
4576 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4577 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
4578 | } | |
4579 | ||
4580 | #undef FLD | |
4581 | } | |
4582 | NEXT (vpc); | |
4583 | ||
4584 | CASE (sem, INSN_STC_VBR_COMPACT) : /* stc vbr, $rn */ | |
4585 | { | |
4586 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4587 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4588 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4589 | int UNUSED written = 0; | |
4590 | IADDR UNUSED pc = abuf->addr; | |
4591 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4592 | ||
4593 | { | |
4594 | SI opval = GET_H_VBR (); | |
4595 | SET_H_GRC (FLD (f_rn), opval); | |
4596 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4597 | } |
4598 | ||
4599 | #undef FLD | |
4600 | } | |
4601 | NEXT (vpc); | |
4602 | ||
4603 | CASE (sem, INSN_STCL_GBR_COMPACT) : /* stc.l gbr, @-$rn */ | |
4604 | { | |
4605 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4606 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4607 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4608 | int UNUSED written = 0; | |
4609 | IADDR UNUSED pc = abuf->addr; | |
4610 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4611 | ||
4612 | { | |
4613 | DI tmp_addr; | |
4614 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4615 | { | |
4616 | SI opval = GET_H_GBR (); | |
4617 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
4618 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4619 | } | |
4620 | { | |
4621 | SI opval = tmp_addr; | |
4622 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df DB |
4623 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
4624 | } | |
4625 | } | |
4626 | ||
4627 | #undef FLD | |
4628 | } | |
4629 | NEXT (vpc); | |
4630 | ||
4631 | CASE (sem, INSN_STCL_VBR_COMPACT) : /* stc.l vbr, @-$rn */ | |
4632 | { | |
4633 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4634 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4635 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4636 | int UNUSED written = 0; | |
4637 | IADDR UNUSED pc = abuf->addr; | |
4638 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4639 | ||
4640 | { | |
4641 | DI tmp_addr; | |
4642 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4643 | { | |
4644 | SI opval = GET_H_VBR (); | |
4645 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
4646 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4647 | } | |
4648 | { | |
4649 | SI opval = tmp_addr; | |
4650 | SET_H_GRC (FLD (f_rn), opval); | |
4651 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
4652 | } |
4653 | } | |
4654 | ||
4655 | #undef FLD | |
4656 | } | |
4657 | NEXT (vpc); | |
4658 | ||
4659 | CASE (sem, INSN_STS_FPSCR_COMPACT) : /* sts fpscr, $rn */ | |
4660 | { | |
4661 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4662 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4663 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4664 | int UNUSED written = 0; | |
4665 | IADDR UNUSED pc = abuf->addr; | |
4666 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4667 | ||
4668 | { | |
c7e628df | 4669 | SI opval = CPU (h_fpscr); |
cbb38b47 | 4670 | SET_H_GRC (FLD (f_rn), opval); |
c7e628df | 4671 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4672 | } |
4673 | ||
4674 | #undef FLD | |
4675 | } | |
4676 | NEXT (vpc); | |
4677 | ||
4678 | CASE (sem, INSN_STSL_FPSCR_COMPACT) : /* sts.l fpscr, @-$rn */ | |
4679 | { | |
4680 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4681 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4682 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4683 | int UNUSED written = 0; | |
4684 | IADDR UNUSED pc = abuf->addr; | |
4685 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4686 | ||
4687 | { | |
4688 | DI tmp_addr; | |
4689 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4690 | { | |
c7e628df | 4691 | SI opval = CPU (h_fpscr); |
cbb38b47 BE |
4692 | SETMEMSI (current_cpu, pc, tmp_addr, opval); |
4693 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4694 | } | |
4695 | { | |
4696 | SI opval = tmp_addr; | |
4697 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4698 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4699 | } |
4700 | } | |
4701 | ||
4702 | #undef FLD | |
4703 | } | |
4704 | NEXT (vpc); | |
4705 | ||
4706 | CASE (sem, INSN_STS_FPUL_COMPACT) : /* sts fpul, $rn */ | |
4707 | { | |
4708 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4709 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4710 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4711 | int UNUSED written = 0; | |
4712 | IADDR UNUSED pc = abuf->addr; | |
4713 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4714 | ||
4715 | { | |
4716 | SI opval = SUBWORDSFSI (CPU (h_fr[((UINT) 32)])); | |
4717 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4718 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4719 | } |
4720 | ||
4721 | #undef FLD | |
4722 | } | |
4723 | NEXT (vpc); | |
4724 | ||
4725 | CASE (sem, INSN_STSL_FPUL_COMPACT) : /* sts.l fpul, @-$rn */ | |
4726 | { | |
4727 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4728 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4729 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4730 | int UNUSED written = 0; | |
4731 | IADDR UNUSED pc = abuf->addr; | |
4732 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4733 | ||
4734 | { | |
4735 | DI tmp_addr; | |
4736 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4737 | { | |
4738 | SF opval = CPU (h_fr[((UINT) 32)]); | |
4739 | SETMEMSF (current_cpu, pc, tmp_addr, opval); | |
4740 | TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); | |
4741 | } | |
4742 | { | |
4743 | SI opval = tmp_addr; | |
4744 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4745 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4746 | } |
4747 | } | |
4748 | ||
4749 | #undef FLD | |
4750 | } | |
4751 | NEXT (vpc); | |
4752 | ||
4753 | CASE (sem, INSN_STS_MACH_COMPACT) : /* sts mach, $rn */ | |
4754 | { | |
4755 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4756 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4757 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4758 | int UNUSED written = 0; | |
4759 | IADDR UNUSED pc = abuf->addr; | |
4760 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4761 | ||
4762 | { | |
4763 | SI opval = GET_H_MACH (); | |
4764 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4765 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4766 | } |
4767 | ||
4768 | #undef FLD | |
4769 | } | |
4770 | NEXT (vpc); | |
4771 | ||
4772 | CASE (sem, INSN_STSL_MACH_COMPACT) : /* sts.l mach, @-$rn */ | |
4773 | { | |
4774 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4775 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4776 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4777 | int UNUSED written = 0; | |
4778 | IADDR UNUSED pc = abuf->addr; | |
4779 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4780 | ||
4781 | { | |
4782 | DI tmp_addr; | |
4783 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4784 | { | |
4785 | SI opval = GET_H_MACH (); | |
4786 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
4787 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4788 | } | |
4789 | { | |
4790 | SI opval = tmp_addr; | |
4791 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4792 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4793 | } |
4794 | } | |
4795 | ||
4796 | #undef FLD | |
4797 | } | |
4798 | NEXT (vpc); | |
4799 | ||
4800 | CASE (sem, INSN_STS_MACL_COMPACT) : /* sts macl, $rn */ | |
4801 | { | |
4802 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4803 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4804 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4805 | int UNUSED written = 0; | |
4806 | IADDR UNUSED pc = abuf->addr; | |
4807 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4808 | ||
4809 | { | |
4810 | SI opval = GET_H_MACL (); | |
4811 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4812 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4813 | } |
4814 | ||
4815 | #undef FLD | |
4816 | } | |
4817 | NEXT (vpc); | |
4818 | ||
4819 | CASE (sem, INSN_STSL_MACL_COMPACT) : /* sts.l macl, @-$rn */ | |
4820 | { | |
4821 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4822 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4823 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4824 | int UNUSED written = 0; | |
4825 | IADDR UNUSED pc = abuf->addr; | |
4826 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4827 | ||
4828 | { | |
4829 | DI tmp_addr; | |
4830 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4831 | { | |
4832 | SI opval = GET_H_MACL (); | |
4833 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
4834 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4835 | } | |
4836 | { | |
4837 | SI opval = tmp_addr; | |
4838 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4839 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4840 | } |
4841 | } | |
4842 | ||
4843 | #undef FLD | |
4844 | } | |
4845 | NEXT (vpc); | |
4846 | ||
4847 | CASE (sem, INSN_STS_PR_COMPACT) : /* sts pr, $rn */ | |
4848 | { | |
4849 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4850 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4851 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4852 | int UNUSED written = 0; | |
4853 | IADDR UNUSED pc = abuf->addr; | |
4854 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4855 | ||
4856 | { | |
4857 | SI opval = GET_H_PR (); | |
4858 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4859 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4860 | } |
4861 | ||
4862 | #undef FLD | |
4863 | } | |
4864 | NEXT (vpc); | |
4865 | ||
4866 | CASE (sem, INSN_STSL_PR_COMPACT) : /* sts.l pr, @-$rn */ | |
4867 | { | |
4868 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4869 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4870 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
4871 | int UNUSED written = 0; | |
4872 | IADDR UNUSED pc = abuf->addr; | |
4873 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4874 | ||
4875 | { | |
4876 | DI tmp_addr; | |
4877 | tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); | |
4878 | { | |
4879 | SI opval = GET_H_PR (); | |
4880 | SETMEMSI (current_cpu, pc, tmp_addr, opval); | |
4881 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4882 | } | |
4883 | { | |
4884 | SI opval = tmp_addr; | |
4885 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4886 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4887 | } |
4888 | } | |
4889 | ||
4890 | #undef FLD | |
4891 | } | |
4892 | NEXT (vpc); | |
4893 | ||
4894 | CASE (sem, INSN_SUB_COMPACT) : /* sub $rm, $rn */ | |
4895 | { | |
4896 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4897 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4898 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4899 | int UNUSED written = 0; |
4900 | IADDR UNUSED pc = abuf->addr; | |
4901 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4902 | ||
4903 | { | |
4904 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
4905 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4906 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4907 | } |
4908 | ||
4909 | #undef FLD | |
4910 | } | |
4911 | NEXT (vpc); | |
4912 | ||
4913 | CASE (sem, INSN_SUBC_COMPACT) : /* subc $rm, $rn */ | |
4914 | { | |
4915 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4916 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4917 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4918 | int UNUSED written = 0; |
4919 | IADDR UNUSED pc = abuf->addr; | |
4920 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4921 | ||
4922 | { | |
4923 | BI tmp_flag; | |
4924 | tmp_flag = SUBCFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
4925 | { | |
4926 | SI opval = SUBCSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); | |
4927 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4928 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4929 | } |
4930 | { | |
4931 | BI opval = tmp_flag; | |
4932 | SET_H_TBIT (opval); | |
4933 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4934 | } | |
4935 | } | |
4936 | ||
4937 | #undef FLD | |
4938 | } | |
4939 | NEXT (vpc); | |
4940 | ||
4941 | CASE (sem, INSN_SUBV_COMPACT) : /* subv $rm, $rn */ | |
4942 | { | |
4943 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4944 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4945 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4946 | int UNUSED written = 0; |
4947 | IADDR UNUSED pc = abuf->addr; | |
4948 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4949 | ||
4950 | { | |
4951 | BI tmp_t; | |
4952 | tmp_t = SUBOFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), 0); | |
4953 | { | |
4954 | SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); | |
4955 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4956 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4957 | } |
4958 | { | |
4959 | BI opval = ((tmp_t) ? (1) : (0)); | |
4960 | SET_H_TBIT (opval); | |
4961 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
4962 | } | |
4963 | } | |
4964 | ||
4965 | #undef FLD | |
4966 | } | |
4967 | NEXT (vpc); | |
4968 | ||
4969 | CASE (sem, INSN_SWAPB_COMPACT) : /* swap.b $rm, $rn */ | |
4970 | { | |
4971 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4972 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 4973 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
4974 | int UNUSED written = 0; |
4975 | IADDR UNUSED pc = abuf->addr; | |
4976 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4977 | ||
4978 | { | |
4979 | UHI tmp_top_half; | |
4980 | UQI tmp_byte1; | |
4981 | UQI tmp_byte0; | |
4982 | tmp_top_half = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 0); | |
4983 | tmp_byte1 = SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 2); | |
4984 | tmp_byte0 = SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3); | |
4985 | { | |
4986 | SI opval = ORSI (SLLSI (tmp_top_half, 16), ORSI (SLLSI (tmp_byte0, 8), tmp_byte1)); | |
4987 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 4988 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
4989 | } |
4990 | } | |
4991 | ||
4992 | #undef FLD | |
4993 | } | |
4994 | NEXT (vpc); | |
4995 | ||
4996 | CASE (sem, INSN_SWAPW_COMPACT) : /* swap.w $rm, $rn */ | |
4997 | { | |
4998 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4999 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 5000 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
5001 | int UNUSED written = 0; |
5002 | IADDR UNUSED pc = abuf->addr; | |
5003 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5004 | ||
5005 | { | |
5006 | SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rm)), 16), SLLSI (GET_H_GRC (FLD (f_rm)), 16)); | |
5007 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 5008 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
5009 | } |
5010 | ||
5011 | #undef FLD | |
5012 | } | |
5013 | NEXT (vpc); | |
5014 | ||
5015 | CASE (sem, INSN_TASB_COMPACT) : /* tas.b @$rn */ | |
5016 | { | |
5017 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5018 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5019 | #define FLD(f) abuf->fields.sfmt_movw10_compact.f | |
5020 | int UNUSED written = 0; | |
5021 | IADDR UNUSED pc = abuf->addr; | |
5022 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5023 | ||
5024 | { | |
5025 | UQI tmp_byte; | |
5026 | tmp_byte = GETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); | |
5027 | { | |
5028 | BI opval = ((EQQI (tmp_byte, 0)) ? (1) : (0)); | |
5029 | SET_H_TBIT (opval); | |
5030 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
5031 | } | |
5032 | tmp_byte = ORQI (tmp_byte, 128); | |
5033 | { | |
5034 | UQI opval = tmp_byte; | |
5035 | SETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); | |
5036 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5037 | } | |
5038 | } | |
5039 | ||
5040 | #undef FLD | |
5041 | } | |
5042 | NEXT (vpc); | |
5043 | ||
5044 | CASE (sem, INSN_TRAPA_COMPACT) : /* trapa #$uimm8 */ | |
5045 | { | |
5046 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5047 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5048 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
5049 | int UNUSED written = 0; | |
5050 | IADDR UNUSED pc = abuf->addr; | |
5051 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5052 | ||
5053 | sh64_compact_trapa (current_cpu, FLD (f_imm8), pc); | |
5054 | ||
5055 | #undef FLD | |
5056 | } | |
5057 | NEXT (vpc); | |
5058 | ||
5059 | CASE (sem, INSN_TST_COMPACT) : /* tst $rm, $rn */ | |
5060 | { | |
5061 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5062 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 5063 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
5064 | int UNUSED written = 0; |
5065 | IADDR UNUSED pc = abuf->addr; | |
5066 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5067 | ||
5068 | { | |
5069 | BI opval = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))), 0)) ? (1) : (0)); | |
5070 | SET_H_TBIT (opval); | |
5071 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
5072 | } | |
5073 | ||
5074 | #undef FLD | |
5075 | } | |
5076 | NEXT (vpc); | |
5077 | ||
5078 | CASE (sem, INSN_TSTI_COMPACT) : /* tst #$uimm8, r0 */ | |
5079 | { | |
5080 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5081 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5082 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
5083 | int UNUSED written = 0; | |
5084 | IADDR UNUSED pc = abuf->addr; | |
5085 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5086 | ||
5087 | { | |
5088 | BI opval = ((EQSI (ANDSI (GET_H_GRC (((UINT) 0)), ZEXTSISI (FLD (f_imm8))), 0)) ? (1) : (0)); | |
5089 | SET_H_TBIT (opval); | |
5090 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
5091 | } | |
5092 | ||
5093 | #undef FLD | |
5094 | } | |
5095 | NEXT (vpc); | |
5096 | ||
5097 | CASE (sem, INSN_TSTB_COMPACT) : /* tst.b #$imm8, @(r0, gbr) */ | |
5098 | { | |
5099 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5100 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5101 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
5102 | int UNUSED written = 0; | |
5103 | IADDR UNUSED pc = abuf->addr; | |
5104 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5105 | ||
5106 | { | |
5107 | DI tmp_addr; | |
5108 | tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); | |
5109 | { | |
5110 | BI opval = ((EQQI (ANDQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)), 0)) ? (1) : (0)); | |
5111 | SET_H_TBIT (opval); | |
5112 | TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); | |
5113 | } | |
5114 | } | |
5115 | ||
5116 | #undef FLD | |
5117 | } | |
5118 | NEXT (vpc); | |
5119 | ||
5120 | CASE (sem, INSN_XOR_COMPACT) : /* xor $rm64, $rn64 */ | |
5121 | { | |
5122 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5123 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 5124 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
5125 | int UNUSED written = 0; |
5126 | IADDR UNUSED pc = abuf->addr; | |
5127 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5128 | ||
5129 | { | |
5130 | DI opval = XORDI (GET_H_GR (FLD (f_rn)), GET_H_GR (FLD (f_rm))); | |
5131 | SET_H_GR (FLD (f_rn), opval); | |
c7e628df | 5132 | TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); |
cbb38b47 BE |
5133 | } |
5134 | ||
5135 | #undef FLD | |
5136 | } | |
5137 | NEXT (vpc); | |
5138 | ||
5139 | CASE (sem, INSN_XORI_COMPACT) : /* xor #$uimm8, r0 */ | |
5140 | { | |
5141 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5142 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5143 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
5144 | int UNUSED written = 0; | |
5145 | IADDR UNUSED pc = abuf->addr; | |
5146 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5147 | ||
5148 | { | |
c7e628df DB |
5149 | SI opval = XORSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); |
5150 | SET_H_GRC (((UINT) 0), opval); | |
5151 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); | |
cbb38b47 BE |
5152 | } |
5153 | ||
5154 | #undef FLD | |
5155 | } | |
5156 | NEXT (vpc); | |
5157 | ||
5158 | CASE (sem, INSN_XORB_COMPACT) : /* xor.b #$imm8, @(r0, gbr) */ | |
5159 | { | |
5160 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5161 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5162 | #define FLD(f) abuf->fields.sfmt_addi_compact.f | |
5163 | int UNUSED written = 0; | |
5164 | IADDR UNUSED pc = abuf->addr; | |
5165 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5166 | ||
5167 | { | |
5168 | DI tmp_addr; | |
5169 | UQI tmp_data; | |
5170 | tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); | |
5171 | tmp_data = XORQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); | |
5172 | { | |
5173 | UQI opval = tmp_data; | |
5174 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
5175 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5176 | } | |
5177 | } | |
5178 | ||
5179 | #undef FLD | |
5180 | } | |
5181 | NEXT (vpc); | |
5182 | ||
5183 | CASE (sem, INSN_XTRCT_COMPACT) : /* xtrct $rm, $rn */ | |
5184 | { | |
5185 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5186 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
c7e628df | 5187 | #define FLD(f) abuf->fields.sfmt_movl12_compact.f |
cbb38b47 BE |
5188 | int UNUSED written = 0; |
5189 | IADDR UNUSED pc = abuf->addr; | |
5190 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5191 | ||
5192 | { | |
5193 | SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rm)), 16), SRLSI (GET_H_GRC (FLD (f_rn)), 16)); | |
5194 | SET_H_GRC (FLD (f_rn), opval); | |
c7e628df | 5195 | TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); |
cbb38b47 BE |
5196 | } |
5197 | ||
5198 | #undef FLD | |
5199 | } | |
5200 | NEXT (vpc); | |
5201 | ||
5202 | ||
5203 | } | |
5204 | ENDSWITCH (sem) /* End of semantic switch. */ | |
5205 | ||
5206 | /* At this point `vpc' contains the next insn to execute. */ | |
5207 | } | |
5208 | ||
5209 | #undef DEFINE_SWITCH | |
5210 | #endif /* DEFINE_SWITCH */ |