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gdb/
[deliverable/binutils-gdb.git] / sim / sh64 / sh-desc.c
CommitLineData
cbb38b47
BE		 1/* CPU data for sh.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
0f51e9bf 5Copyright 1996-2010 Free Software Foundation, Inc.
cbb38b47
BE		 6
7This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
fda1c30b
DE		 9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
cbb38b47 13
fda1c30b
DE		 14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
cbb38b47 18
fda1c30b
DE		 19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
cbb38b47
BE		 22
23*/
24
25#include "sysdep.h"
cbb38b47
BE		 26#include <stdio.h>
27#include <stdarg.h>
28#include "ansidecl.h"
29#include "bfd.h"
30#include "symcat.h"
31#include "sh-desc.h"
32#include "sh-opc.h"
33#include "opintl.h"
34#include "libiberty.h"
c7e628df 35#include "xregex.h"
cbb38b47
BE		 36
37/* Attributes. */
38
39static const CGEN_ATTR_ENTRY bool_attr[] =
40{
41 { "#f", 0 },
42 { "#t", 1 },
43 { 0, 0 }
44};
45
c7e628df 46static const CGEN_ATTR_ENTRY MACH_attr[] ATTRIBUTE_UNUSED =
cbb38b47
BE		 47{
48 { "base", MACH_BASE },
49 { "sh2", MACH_SH2 },
c7e628df
DB		 50 { "sh2e", MACH_SH2E },
51 { "sh2a_fpu", MACH_SH2A_FPU },
52 { "sh2a_nofpu", MACH_SH2A_NOFPU },
cbb38b47
BE		 53 { "sh3", MACH_SH3 },
54 { "sh3e", MACH_SH3E },
c7e628df 55 { "sh4_nofpu", MACH_SH4_NOFPU },
cbb38b47 56 { "sh4", MACH_SH4 },
c7e628df
DB		 57 { "sh4a_nofpu", MACH_SH4A_NOFPU },
58 { "sh4a", MACH_SH4A },
59 { "sh4al", MACH_SH4AL },
cbb38b47
BE		 60 { "sh5", MACH_SH5 },
61 { "max", MACH_MAX },
62 { 0, 0 }
63};
64
c7e628df 65static const CGEN_ATTR_ENTRY ISA_attr[] ATTRIBUTE_UNUSED =
cbb38b47
BE		 66{
67 { "compact", ISA_COMPACT },
68 { "media", ISA_MEDIA },
69 { "max", ISA_MAX },
70 { 0, 0 }
71};
72
c7e628df
DB		 73static const CGEN_ATTR_ENTRY SH4_GROUP_attr[] ATTRIBUTE_UNUSED =
74{
75 { "NONE", SH4_GROUP_NONE },
76 { "MT", SH4_GROUP_MT },
77 { "EX", SH4_GROUP_EX },
78 { "BR", SH4_GROUP_BR },
79 { "LS", SH4_GROUP_LS },
80 { "FE", SH4_GROUP_FE },
81 { "CO", SH4_GROUP_CO },
82 { "MAX", SH4_GROUP_MAX },
83 { 0, 0 }
84};
85
86static const CGEN_ATTR_ENTRY SH4A_GROUP_attr[] ATTRIBUTE_UNUSED =
87{
88 { "NONE", SH4A_GROUP_NONE },
89 { "MT", SH4A_GROUP_MT },
90 { "EX", SH4A_GROUP_EX },
91 { "BR", SH4A_GROUP_BR },
92 { "LS", SH4A_GROUP_LS },
93 { "FE", SH4A_GROUP_FE },
94 { "CO", SH4A_GROUP_CO },
95 { "MAX", SH4A_GROUP_MAX },
96 { 0, 0 }
97};
98
cbb38b47
BE		 99const CGEN_ATTR_TABLE sh_cgen_ifield_attr_table[] =
100{
101 { "MACH", & MACH_attr[0], & MACH_attr[0] },
102 { "ISA", & ISA_attr[0], & ISA_attr[0] },
103 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
104 { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
105 { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
106 { "RESERVED", &bool_attr[0], &bool_attr[0] },
107 { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
108 { "SIGNED", &bool_attr[0], &bool_attr[0] },
109 { 0, 0, 0 }
110};
111
112const CGEN_ATTR_TABLE sh_cgen_hardware_attr_table[] =
113{
114 { "MACH", & MACH_attr[0], & MACH_attr[0] },
c7e628df 115 { "ISA", & ISA_attr[0], & ISA_attr[0] },
cbb38b47
BE		 116 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
117 { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] },
118 { "PC", &bool_attr[0], &bool_attr[0] },
119 { "PROFILE", &bool_attr[0], &bool_attr[0] },
120 { 0, 0, 0 }
121};
122
123const CGEN_ATTR_TABLE sh_cgen_operand_attr_table[] =
124{
125 { "MACH", & MACH_attr[0], & MACH_attr[0] },
126 { "ISA", & ISA_attr[0], & ISA_attr[0] },
127 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
128 { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
129 { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
130 { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
131 { "SIGNED", &bool_attr[0], &bool_attr[0] },
132 { "NEGATIVE", &bool_attr[0], &bool_attr[0] },
133 { "RELAX", &bool_attr[0], &bool_attr[0] },
134 { "SEM-ONLY", &bool_attr[0], &bool_attr[0] },
135 { 0, 0, 0 }
136};
137
138const CGEN_ATTR_TABLE sh_cgen_insn_attr_table[] =
139{
140 { "MACH", & MACH_attr[0], & MACH_attr[0] },
141 { "ISA", & ISA_attr[0], & ISA_attr[0] },
c7e628df
DB		 142 { "SH4-GROUP", & SH4_GROUP_attr[0], & SH4_GROUP_attr[0] },
143 { "SH4A-GROUP", & SH4A_GROUP_attr[0], & SH4A_GROUP_attr[0] },
cbb38b47
BE		 144 { "ALIAS", &bool_attr[0], &bool_attr[0] },
145 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
146 { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
147 { "COND-CTI", &bool_attr[0], &bool_attr[0] },
148 { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
149 { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
150 { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
c7e628df 151 { "RELAXED", &bool_attr[0], &bool_attr[0] },
cbb38b47
BE		 152 { "NO-DIS", &bool_attr[0], &bool_attr[0] },
153 { "PBB", &bool_attr[0], &bool_attr[0] },
154 { "ILLSLOT", &bool_attr[0], &bool_attr[0] },
155 { "FP-INSN", &bool_attr[0], &bool_attr[0] },
c7e628df 156 { "32-BIT-INSN", &bool_attr[0], &bool_attr[0] },
cbb38b47
BE		 157 { 0, 0, 0 }
158};
159
160/* Instruction set variants. */
161
162static const CGEN_ISA sh_cgen_isa_table[] = {
163 { "media", 32, 32, 32, 32 },
c7e628df 164 { "compact", 32, 32, 16, 32 },
cbb38b47
BE		 165 { 0, 0, 0, 0, 0 }
166};
167
168/* Machine variants. */
169
170static const CGEN_MACH sh_cgen_mach_table[] = {
c7e628df
DB		 171 { "sh2", "sh2", MACH_SH2, 0 },
172 { "sh2e", "sh2e", MACH_SH2E, 0 },
173 { "sh2a-fpu", "sh2a-fpu", MACH_SH2A_FPU, 0 },
174 { "sh2a-nofpu", "sh2a-nofpu", MACH_SH2A_NOFPU, 0 },
175 { "sh3", "sh3", MACH_SH3, 0 },
176 { "sh3e", "sh3e", MACH_SH3E, 0 },
177 { "sh4-nofpu", "sh4-nofpu", MACH_SH4_NOFPU, 0 },
178 { "sh4", "sh4", MACH_SH4, 0 },
179 { "sh4a-nofpu", "sh4a-nofpu", MACH_SH4A_NOFPU, 0 },
180 { "sh4a", "sh4a", MACH_SH4A, 0 },
181 { "sh4al", "sh4al", MACH_SH4AL, 0 },
182 { "sh5", "sh5", MACH_SH5, 0 },
183 { 0, 0, 0, 0 }
cbb38b47
BE		 184};
185
186static CGEN_KEYWORD_ENTRY sh_cgen_opval_frc_names_entries[] =
187{
c7e628df
DB		 188 { "fr0", 0, {0, {{{0, 0}}}}, 0, 0 },
189 { "fr1", 1, {0, {{{0, 0}}}}, 0, 0 },
190 { "fr2", 2, {0, {{{0, 0}}}}, 0, 0 },
191 { "fr3", 3, {0, {{{0, 0}}}}, 0, 0 },
192 { "fr4", 4, {0, {{{0, 0}}}}, 0, 0 },
193 { "fr5", 5, {0, {{{0, 0}}}}, 0, 0 },
194 { "fr6", 6, {0, {{{0, 0}}}}, 0, 0 },
195 { "fr7", 7, {0, {{{0, 0}}}}, 0, 0 },
196 { "fr8", 8, {0, {{{0, 0}}}}, 0, 0 },
197 { "fr9", 9, {0, {{{0, 0}}}}, 0, 0 },
198 { "fr10", 10, {0, {{{0, 0}}}}, 0, 0 },
199 { "fr11", 11, {0, {{{0, 0}}}}, 0, 0 },
200 { "fr12", 12, {0, {{{0, 0}}}}, 0, 0 },
201 { "fr13", 13, {0, {{{0, 0}}}}, 0, 0 },
202 { "fr14", 14, {0, {{{0, 0}}}}, 0, 0 },
203 { "fr15", 15, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 204};
205
206CGEN_KEYWORD sh_cgen_opval_frc_names =
207{
208 & sh_cgen_opval_frc_names_entries[0],
209 16,
c7e628df 210 0, 0, 0, 0, ""
cbb38b47
BE		 211};
212
213static CGEN_KEYWORD_ENTRY sh_cgen_opval_drc_names_entries[] =
214{
c7e628df
DB		 215 { "dr0", 0, {0, {{{0, 0}}}}, 0, 0 },
216 { "dr2", 2, {0, {{{0, 0}}}}, 0, 0 },
217 { "dr4", 4, {0, {{{0, 0}}}}, 0, 0 },
218 { "dr6", 6, {0, {{{0, 0}}}}, 0, 0 },
219 { "dr8", 8, {0, {{{0, 0}}}}, 0, 0 },
220 { "dr10", 10, {0, {{{0, 0}}}}, 0, 0 },
221 { "dr12", 12, {0, {{{0, 0}}}}, 0, 0 },
222 { "dr14", 14, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 223};
224
225CGEN_KEYWORD sh_cgen_opval_drc_names =
226{
227 & sh_cgen_opval_drc_names_entries[0],
228 8,
c7e628df 229 0, 0, 0, 0, ""
cbb38b47
BE		 230};
231
232static CGEN_KEYWORD_ENTRY sh_cgen_opval_xf_names_entries[] =
233{
c7e628df
DB		 234 { "xf0", 0, {0, {{{0, 0}}}}, 0, 0 },
235 { "xf1", 1, {0, {{{0, 0}}}}, 0, 0 },
236 { "xf2", 2, {0, {{{0, 0}}}}, 0, 0 },
237 { "xf3", 3, {0, {{{0, 0}}}}, 0, 0 },
238 { "xf4", 4, {0, {{{0, 0}}}}, 0, 0 },
239 { "xf5", 5, {0, {{{0, 0}}}}, 0, 0 },
240 { "xf6", 6, {0, {{{0, 0}}}}, 0, 0 },
241 { "xf7", 7, {0, {{{0, 0}}}}, 0, 0 },
242 { "xf8", 8, {0, {{{0, 0}}}}, 0, 0 },
243 { "xf9", 9, {0, {{{0, 0}}}}, 0, 0 },
244 { "xf10", 10, {0, {{{0, 0}}}}, 0, 0 },
245 { "xf11", 11, {0, {{{0, 0}}}}, 0, 0 },
246 { "xf12", 12, {0, {{{0, 0}}}}, 0, 0 },
247 { "xf13", 13, {0, {{{0, 0}}}}, 0, 0 },
248 { "xf14", 14, {0, {{{0, 0}}}}, 0, 0 },
249 { "xf15", 15, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 250};
251
252CGEN_KEYWORD sh_cgen_opval_xf_names =
253{
254 & sh_cgen_opval_xf_names_entries[0],
255 16,
c7e628df 256 0, 0, 0, 0, ""
cbb38b47
BE		 257};
258
259static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_gr_entries[] =
260{
c7e628df
DB		 261 { "r0", 0, {0, {{{0, 0}}}}, 0, 0 },
262 { "r1", 1, {0, {{{0, 0}}}}, 0, 0 },
263 { "r2", 2, {0, {{{0, 0}}}}, 0, 0 },
264 { "r3", 3, {0, {{{0, 0}}}}, 0, 0 },
265 { "r4", 4, {0, {{{0, 0}}}}, 0, 0 },
266 { "r5", 5, {0, {{{0, 0}}}}, 0, 0 },
267 { "r6", 6, {0, {{{0, 0}}}}, 0, 0 },
268 { "r7", 7, {0, {{{0, 0}}}}, 0, 0 },
269 { "r8", 8, {0, {{{0, 0}}}}, 0, 0 },
270 { "r9", 9, {0, {{{0, 0}}}}, 0, 0 },
271 { "r10", 10, {0, {{{0, 0}}}}, 0, 0 },
272 { "r11", 11, {0, {{{0, 0}}}}, 0, 0 },
273 { "r12", 12, {0, {{{0, 0}}}}, 0, 0 },
274 { "r13", 13, {0, {{{0, 0}}}}, 0, 0 },
275 { "r14", 14, {0, {{{0, 0}}}}, 0, 0 },
276 { "r15", 15, {0, {{{0, 0}}}}, 0, 0 },
277 { "r16", 16, {0, {{{0, 0}}}}, 0, 0 },
278 { "r17", 17, {0, {{{0, 0}}}}, 0, 0 },
279 { "r18", 18, {0, {{{0, 0}}}}, 0, 0 },
280 { "r19", 19, {0, {{{0, 0}}}}, 0, 0 },
281 { "r20", 20, {0, {{{0, 0}}}}, 0, 0 },
282 { "r21", 21, {0, {{{0, 0}}}}, 0, 0 },
283 { "r22", 22, {0, {{{0, 0}}}}, 0, 0 },
284 { "r23", 23, {0, {{{0, 0}}}}, 0, 0 },
285 { "r24", 24, {0, {{{0, 0}}}}, 0, 0 },
286 { "r25", 25, {0, {{{0, 0}}}}, 0, 0 },
287 { "r26", 26, {0, {{{0, 0}}}}, 0, 0 },
288 { "r27", 27, {0, {{{0, 0}}}}, 0, 0 },
289 { "r28", 28, {0, {{{0, 0}}}}, 0, 0 },
290 { "r29", 29, {0, {{{0, 0}}}}, 0, 0 },
291 { "r30", 30, {0, {{{0, 0}}}}, 0, 0 },
292 { "r31", 31, {0, {{{0, 0}}}}, 0, 0 },
293 { "r32", 32, {0, {{{0, 0}}}}, 0, 0 },
294 { "r33", 33, {0, {{{0, 0}}}}, 0, 0 },
295 { "r34", 34, {0, {{{0, 0}}}}, 0, 0 },
296 { "r35", 35, {0, {{{0, 0}}}}, 0, 0 },
297 { "r36", 36, {0, {{{0, 0}}}}, 0, 0 },
298 { "r37", 37, {0, {{{0, 0}}}}, 0, 0 },
299 { "r38", 38, {0, {{{0, 0}}}}, 0, 0 },
300 { "r39", 39, {0, {{{0, 0}}}}, 0, 0 },
301 { "r40", 40, {0, {{{0, 0}}}}, 0, 0 },
302 { "r41", 41, {0, {{{0, 0}}}}, 0, 0 },
303 { "r42", 42, {0, {{{0, 0}}}}, 0, 0 },
304 { "r43", 43, {0, {{{0, 0}}}}, 0, 0 },
305 { "r44", 44, {0, {{{0, 0}}}}, 0, 0 },
306 { "r45", 45, {0, {{{0, 0}}}}, 0, 0 },
307 { "r46", 46, {0, {{{0, 0}}}}, 0, 0 },
308 { "r47", 47, {0, {{{0, 0}}}}, 0, 0 },
309 { "r48", 48, {0, {{{0, 0}}}}, 0, 0 },
310 { "r49", 49, {0, {{{0, 0}}}}, 0, 0 },
311 { "r50", 50, {0, {{{0, 0}}}}, 0, 0 },
312 { "r51", 51, {0, {{{0, 0}}}}, 0, 0 },
313 { "r52", 52, {0, {{{0, 0}}}}, 0, 0 },
314 { "r53", 53, {0, {{{0, 0}}}}, 0, 0 },
315 { "r54", 54, {0, {{{0, 0}}}}, 0, 0 },
316 { "r55", 55, {0, {{{0, 0}}}}, 0, 0 },
317 { "r56", 56, {0, {{{0, 0}}}}, 0, 0 },
318 { "r57", 57, {0, {{{0, 0}}}}, 0, 0 },
319 { "r58", 58, {0, {{{0, 0}}}}, 0, 0 },
320 { "r59", 59, {0, {{{0, 0}}}}, 0, 0 },
321 { "r60", 60, {0, {{{0, 0}}}}, 0, 0 },
322 { "r61", 61, {0, {{{0, 0}}}}, 0, 0 },
323 { "r62", 62, {0, {{{0, 0}}}}, 0, 0 },
324 { "r63", 63, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 325};
326
327CGEN_KEYWORD sh_cgen_opval_h_gr =
328{
329 & sh_cgen_opval_h_gr_entries[0],
330 64,
c7e628df 331 0, 0, 0, 0, ""
cbb38b47
BE		 332};
333
334static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_grc_entries[] =
335{
c7e628df
DB		 336 { "r0", 0, {0, {{{0, 0}}}}, 0, 0 },
337 { "r1", 1, {0, {{{0, 0}}}}, 0, 0 },
338 { "r2", 2, {0, {{{0, 0}}}}, 0, 0 },
339 { "r3", 3, {0, {{{0, 0}}}}, 0, 0 },
340 { "r4", 4, {0, {{{0, 0}}}}, 0, 0 },
341 { "r5", 5, {0, {{{0, 0}}}}, 0, 0 },
342 { "r6", 6, {0, {{{0, 0}}}}, 0, 0 },
343 { "r7", 7, {0, {{{0, 0}}}}, 0, 0 },
344 { "r8", 8, {0, {{{0, 0}}}}, 0, 0 },
345 { "r9", 9, {0, {{{0, 0}}}}, 0, 0 },
346 { "r10", 10, {0, {{{0, 0}}}}, 0, 0 },
347 { "r11", 11, {0, {{{0, 0}}}}, 0, 0 },
348 { "r12", 12, {0, {{{0, 0}}}}, 0, 0 },
349 { "r13", 13, {0, {{{0, 0}}}}, 0, 0 },
350 { "r14", 14, {0, {{{0, 0}}}}, 0, 0 },
351 { "r15", 15, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 352};
353
354CGEN_KEYWORD sh_cgen_opval_h_grc =
355{
356 & sh_cgen_opval_h_grc_entries[0],
357 16,
c7e628df 358 0, 0, 0, 0, ""
cbb38b47
BE		 359};
360
361static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_cr_entries[] =
362{
c7e628df
DB		 363 { "cr0", 0, {0, {{{0, 0}}}}, 0, 0 },
364 { "cr1", 1, {0, {{{0, 0}}}}, 0, 0 },
365 { "cr2", 2, {0, {{{0, 0}}}}, 0, 0 },
366 { "cr3", 3, {0, {{{0, 0}}}}, 0, 0 },
367 { "cr4", 4, {0, {{{0, 0}}}}, 0, 0 },
368 { "cr5", 5, {0, {{{0, 0}}}}, 0, 0 },
369 { "cr6", 6, {0, {{{0, 0}}}}, 0, 0 },
370 { "cr7", 7, {0, {{{0, 0}}}}, 0, 0 },
371 { "cr8", 8, {0, {{{0, 0}}}}, 0, 0 },
372 { "cr9", 9, {0, {{{0, 0}}}}, 0, 0 },
373 { "cr10", 10, {0, {{{0, 0}}}}, 0, 0 },
374 { "cr11", 11, {0, {{{0, 0}}}}, 0, 0 },
375 { "cr12", 12, {0, {{{0, 0}}}}, 0, 0 },
376 { "cr13", 13, {0, {{{0, 0}}}}, 0, 0 },
377 { "cr14", 14, {0, {{{0, 0}}}}, 0, 0 },
378 { "cr15", 15, {0, {{{0, 0}}}}, 0, 0 },
379 { "cr16", 16, {0, {{{0, 0}}}}, 0, 0 },
380 { "cr17", 17, {0, {{{0, 0}}}}, 0, 0 },
381 { "cr18", 18, {0, {{{0, 0}}}}, 0, 0 },
382 { "cr19", 19, {0, {{{0, 0}}}}, 0, 0 },
383 { "cr20", 20, {0, {{{0, 0}}}}, 0, 0 },
384 { "cr21", 21, {0, {{{0, 0}}}}, 0, 0 },
385 { "cr22", 22, {0, {{{0, 0}}}}, 0, 0 },
386 { "cr23", 23, {0, {{{0, 0}}}}, 0, 0 },
387 { "cr24", 24, {0, {{{0, 0}}}}, 0, 0 },
388 { "cr25", 25, {0, {{{0, 0}}}}, 0, 0 },
389 { "cr26", 26, {0, {{{0, 0}}}}, 0, 0 },
390 { "cr27", 27, {0, {{{0, 0}}}}, 0, 0 },
391 { "cr28", 28, {0, {{{0, 0}}}}, 0, 0 },
392 { "cr29", 29, {0, {{{0, 0}}}}, 0, 0 },
393 { "cr30", 30, {0, {{{0, 0}}}}, 0, 0 },
394 { "cr31", 31, {0, {{{0, 0}}}}, 0, 0 },
395 { "cr32", 32, {0, {{{0, 0}}}}, 0, 0 },
396 { "cr33", 33, {0, {{{0, 0}}}}, 0, 0 },
397 { "cr34", 34, {0, {{{0, 0}}}}, 0, 0 },
398 { "cr35", 35, {0, {{{0, 0}}}}, 0, 0 },
399 { "cr36", 36, {0, {{{0, 0}}}}, 0, 0 },
400 { "cr37", 37, {0, {{{0, 0}}}}, 0, 0 },
401 { "cr38", 38, {0, {{{0, 0}}}}, 0, 0 },
402 { "cr39", 39, {0, {{{0, 0}}}}, 0, 0 },
403 { "cr40", 40, {0, {{{0, 0}}}}, 0, 0 },
404 { "cr41", 41, {0, {{{0, 0}}}}, 0, 0 },
405 { "cr42", 42, {0, {{{0, 0}}}}, 0, 0 },
406 { "cr43", 43, {0, {{{0, 0}}}}, 0, 0 },
407 { "cr44", 44, {0, {{{0, 0}}}}, 0, 0 },
408 { "cr45", 45, {0, {{{0, 0}}}}, 0, 0 },
409 { "cr46", 46, {0, {{{0, 0}}}}, 0, 0 },
410 { "cr47", 47, {0, {{{0, 0}}}}, 0, 0 },
411 { "cr48", 48, {0, {{{0, 0}}}}, 0, 0 },
412 { "cr49", 49, {0, {{{0, 0}}}}, 0, 0 },
413 { "cr50", 50, {0, {{{0, 0}}}}, 0, 0 },
414 { "cr51", 51, {0, {{{0, 0}}}}, 0, 0 },
415 { "cr52", 52, {0, {{{0, 0}}}}, 0, 0 },
416 { "cr53", 53, {0, {{{0, 0}}}}, 0, 0 },
417 { "cr54", 54, {0, {{{0, 0}}}}, 0, 0 },
418 { "cr55", 55, {0, {{{0, 0}}}}, 0, 0 },
419 { "cr56", 56, {0, {{{0, 0}}}}, 0, 0 },
420 { "cr57", 57, {0, {{{0, 0}}}}, 0, 0 },
421 { "cr58", 58, {0, {{{0, 0}}}}, 0, 0 },
422 { "cr59", 59, {0, {{{0, 0}}}}, 0, 0 },
423 { "cr60", 60, {0, {{{0, 0}}}}, 0, 0 },
424 { "cr61", 61, {0, {{{0, 0}}}}, 0, 0 },
425 { "cr62", 62, {0, {{{0, 0}}}}, 0, 0 },
426 { "cr63", 63, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 427};
428
429CGEN_KEYWORD sh_cgen_opval_h_cr =
430{
431 & sh_cgen_opval_h_cr_entries[0],
432 64,
c7e628df 433 0, 0, 0, 0, ""
cbb38b47
BE		 434};
435
436static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fr_entries[] =
437{
c7e628df
DB		 438 { "fr0", 0, {0, {{{0, 0}}}}, 0, 0 },
439 { "fr1", 1, {0, {{{0, 0}}}}, 0, 0 },
440 { "fr2", 2, {0, {{{0, 0}}}}, 0, 0 },
441 { "fr3", 3, {0, {{{0, 0}}}}, 0, 0 },
442 { "fr4", 4, {0, {{{0, 0}}}}, 0, 0 },
443 { "fr5", 5, {0, {{{0, 0}}}}, 0, 0 },
444 { "fr6", 6, {0, {{{0, 0}}}}, 0, 0 },
445 { "fr7", 7, {0, {{{0, 0}}}}, 0, 0 },
446 { "fr8", 8, {0, {{{0, 0}}}}, 0, 0 },
447 { "fr9", 9, {0, {{{0, 0}}}}, 0, 0 },
448 { "fr10", 10, {0, {{{0, 0}}}}, 0, 0 },
449 { "fr11", 11, {0, {{{0, 0}}}}, 0, 0 },
450 { "fr12", 12, {0, {{{0, 0}}}}, 0, 0 },
451 { "fr13", 13, {0, {{{0, 0}}}}, 0, 0 },
452 { "fr14", 14, {0, {{{0, 0}}}}, 0, 0 },
453 { "fr15", 15, {0, {{{0, 0}}}}, 0, 0 },
454 { "fr16", 16, {0, {{{0, 0}}}}, 0, 0 },
455 { "fr17", 17, {0, {{{0, 0}}}}, 0, 0 },
456 { "fr18", 18, {0, {{{0, 0}}}}, 0, 0 },
457 { "fr19", 19, {0, {{{0, 0}}}}, 0, 0 },
458 { "fr20", 20, {0, {{{0, 0}}}}, 0, 0 },
459 { "fr21", 21, {0, {{{0, 0}}}}, 0, 0 },
460 { "fr22", 22, {0, {{{0, 0}}}}, 0, 0 },
461 { "fr23", 23, {0, {{{0, 0}}}}, 0, 0 },
462 { "fr24", 24, {0, {{{0, 0}}}}, 0, 0 },
463 { "fr25", 25, {0, {{{0, 0}}}}, 0, 0 },
464 { "fr26", 26, {0, {{{0, 0}}}}, 0, 0 },
465 { "fr27", 27, {0, {{{0, 0}}}}, 0, 0 },
466 { "fr28", 28, {0, {{{0, 0}}}}, 0, 0 },
467 { "fr29", 29, {0, {{{0, 0}}}}, 0, 0 },
468 { "fr30", 30, {0, {{{0, 0}}}}, 0, 0 },
469 { "fr31", 31, {0, {{{0, 0}}}}, 0, 0 },
470 { "fr32", 32, {0, {{{0, 0}}}}, 0, 0 },
471 { "fr33", 33, {0, {{{0, 0}}}}, 0, 0 },
472 { "fr34", 34, {0, {{{0, 0}}}}, 0, 0 },
473 { "fr35", 35, {0, {{{0, 0}}}}, 0, 0 },
474 { "fr36", 36, {0, {{{0, 0}}}}, 0, 0 },
475 { "fr37", 37, {0, {{{0, 0}}}}, 0, 0 },
476 { "fr38", 38, {0, {{{0, 0}}}}, 0, 0 },
477 { "fr39", 39, {0, {{{0, 0}}}}, 0, 0 },
478 { "fr40", 40, {0, {{{0, 0}}}}, 0, 0 },
479 { "fr41", 41, {0, {{{0, 0}}}}, 0, 0 },
480 { "fr42", 42, {0, {{{0, 0}}}}, 0, 0 },
481 { "fr43", 43, {0, {{{0, 0}}}}, 0, 0 },
482 { "fr44", 44, {0, {{{0, 0}}}}, 0, 0 },
483 { "fr45", 45, {0, {{{0, 0}}}}, 0, 0 },
484 { "fr46", 46, {0, {{{0, 0}}}}, 0, 0 },
485 { "fr47", 47, {0, {{{0, 0}}}}, 0, 0 },
486 { "fr48", 48, {0, {{{0, 0}}}}, 0, 0 },
487 { "fr49", 49, {0, {{{0, 0}}}}, 0, 0 },
488 { "fr50", 50, {0, {{{0, 0}}}}, 0, 0 },
489 { "fr51", 51, {0, {{{0, 0}}}}, 0, 0 },
490 { "fr52", 52, {0, {{{0, 0}}}}, 0, 0 },
491 { "fr53", 53, {0, {{{0, 0}}}}, 0, 0 },
492 { "fr54", 54, {0, {{{0, 0}}}}, 0, 0 },
493 { "fr55", 55, {0, {{{0, 0}}}}, 0, 0 },
494 { "fr56", 56, {0, {{{0, 0}}}}, 0, 0 },
495 { "fr57", 57, {0, {{{0, 0}}}}, 0, 0 },
496 { "fr58", 58, {0, {{{0, 0}}}}, 0, 0 },
497 { "fr59", 59, {0, {{{0, 0}}}}, 0, 0 },
498 { "fr60", 60, {0, {{{0, 0}}}}, 0, 0 },
499 { "fr61", 61, {0, {{{0, 0}}}}, 0, 0 },
500 { "fr62", 62, {0, {{{0, 0}}}}, 0, 0 },
501 { "fr63", 63, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 502};
503
504CGEN_KEYWORD sh_cgen_opval_h_fr =
505{
506 & sh_cgen_opval_h_fr_entries[0],
507 64,
c7e628df 508 0, 0, 0, 0, ""
cbb38b47
BE		 509};
510
511static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fp_entries[] =
512{
c7e628df
DB		 513 { "fp0", 0, {0, {{{0, 0}}}}, 0, 0 },
514 { "fp2", 2, {0, {{{0, 0}}}}, 0, 0 },
515 { "fp4", 4, {0, {{{0, 0}}}}, 0, 0 },
516 { "fp6", 6, {0, {{{0, 0}}}}, 0, 0 },
517 { "fp8", 8, {0, {{{0, 0}}}}, 0, 0 },
518 { "fp10", 10, {0, {{{0, 0}}}}, 0, 0 },
519 { "fp12", 12, {0, {{{0, 0}}}}, 0, 0 },
520 { "fp14", 14, {0, {{{0, 0}}}}, 0, 0 },
521 { "fp16", 16, {0, {{{0, 0}}}}, 0, 0 },
522 { "fp18", 18, {0, {{{0, 0}}}}, 0, 0 },
523 { "fp20", 20, {0, {{{0, 0}}}}, 0, 0 },
524 { "fp22", 22, {0, {{{0, 0}}}}, 0, 0 },
525 { "fp24", 24, {0, {{{0, 0}}}}, 0, 0 },
526 { "fp26", 26, {0, {{{0, 0}}}}, 0, 0 },
527 { "fp28", 28, {0, {{{0, 0}}}}, 0, 0 },
528 { "fp30", 30, {0, {{{0, 0}}}}, 0, 0 },
529 { "fp32", 32, {0, {{{0, 0}}}}, 0, 0 },
530 { "fp34", 34, {0, {{{0, 0}}}}, 0, 0 },
531 { "fp36", 36, {0, {{{0, 0}}}}, 0, 0 },
532 { "fp38", 38, {0, {{{0, 0}}}}, 0, 0 },
533 { "fp40", 40, {0, {{{0, 0}}}}, 0, 0 },
534 { "fp42", 42, {0, {{{0, 0}}}}, 0, 0 },
535 { "fp44", 44, {0, {{{0, 0}}}}, 0, 0 },
536 { "fp46", 46, {0, {{{0, 0}}}}, 0, 0 },
537 { "fp48", 48, {0, {{{0, 0}}}}, 0, 0 },
538 { "fp50", 50, {0, {{{0, 0}}}}, 0, 0 },
539 { "fp52", 52, {0, {{{0, 0}}}}, 0, 0 },
540 { "fp54", 54, {0, {{{0, 0}}}}, 0, 0 },
541 { "fp56", 56, {0, {{{0, 0}}}}, 0, 0 },
542 { "fp58", 58, {0, {{{0, 0}}}}, 0, 0 },
543 { "fp60", 60, {0, {{{0, 0}}}}, 0, 0 },
544 { "fp62", 62, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 545};
546
547CGEN_KEYWORD sh_cgen_opval_h_fp =
548{
549 & sh_cgen_opval_h_fp_entries[0],
550 32,
c7e628df 551 0, 0, 0, 0, ""
cbb38b47
BE		 552};
553
554static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fv_entries[] =
555{
c7e628df
DB		 556 { "fv0", 0, {0, {{{0, 0}}}}, 0, 0 },
557 { "fv4", 4, {0, {{{0, 0}}}}, 0, 0 },
558 { "fv8", 8, {0, {{{0, 0}}}}, 0, 0 },
559 { "fv12", 12, {0, {{{0, 0}}}}, 0, 0 },
560 { "fv16", 16, {0, {{{0, 0}}}}, 0, 0 },
561 { "fv20", 20, {0, {{{0, 0}}}}, 0, 0 },
562 { "fv24", 24, {0, {{{0, 0}}}}, 0, 0 },
563 { "fv28", 28, {0, {{{0, 0}}}}, 0, 0 },
564 { "fv32", 32, {0, {{{0, 0}}}}, 0, 0 },
565 { "fv36", 36, {0, {{{0, 0}}}}, 0, 0 },
566 { "fv40", 40, {0, {{{0, 0}}}}, 0, 0 },
567 { "fv44", 44, {0, {{{0, 0}}}}, 0, 0 },
568 { "fv48", 48, {0, {{{0, 0}}}}, 0, 0 },
569 { "fv52", 52, {0, {{{0, 0}}}}, 0, 0 },
570 { "fv56", 56, {0, {{{0, 0}}}}, 0, 0 },
571 { "fv60", 60, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 572};
573
574CGEN_KEYWORD sh_cgen_opval_h_fv =
575{
576 & sh_cgen_opval_h_fv_entries[0],
577 16,
c7e628df 578 0, 0, 0, 0, ""
cbb38b47
BE		 579};
580
581static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fmtx_entries[] =
582{
c7e628df
DB		 583 { "mtrx0", 0, {0, {{{0, 0}}}}, 0, 0 },
584 { "mtrx16", 16, {0, {{{0, 0}}}}, 0, 0 },
585 { "mtrx32", 32, {0, {{{0, 0}}}}, 0, 0 },
586 { "mtrx48", 48, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 587};
588
589CGEN_KEYWORD sh_cgen_opval_h_fmtx =
590{
591 & sh_cgen_opval_h_fmtx_entries[0],
592 4,
c7e628df 593 0, 0, 0, 0, ""
cbb38b47
BE		 594};
595
596static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_dr_entries[] =
597{
c7e628df
DB		 598 { "dr0", 0, {0, {{{0, 0}}}}, 0, 0 },
599 { "dr2", 2, {0, {{{0, 0}}}}, 0, 0 },
600 { "dr4", 4, {0, {{{0, 0}}}}, 0, 0 },
601 { "dr6", 6, {0, {{{0, 0}}}}, 0, 0 },
602 { "dr8", 8, {0, {{{0, 0}}}}, 0, 0 },
603 { "dr10", 10, {0, {{{0, 0}}}}, 0, 0 },
604 { "dr12", 12, {0, {{{0, 0}}}}, 0, 0 },
605 { "dr14", 14, {0, {{{0, 0}}}}, 0, 0 },
606 { "dr16", 16, {0, {{{0, 0}}}}, 0, 0 },
607 { "dr18", 18, {0, {{{0, 0}}}}, 0, 0 },
608 { "dr20", 20, {0, {{{0, 0}}}}, 0, 0 },
609 { "dr22", 22, {0, {{{0, 0}}}}, 0, 0 },
610 { "dr24", 24, {0, {{{0, 0}}}}, 0, 0 },
611 { "dr26", 26, {0, {{{0, 0}}}}, 0, 0 },
612 { "dr28", 28, {0, {{{0, 0}}}}, 0, 0 },
613 { "dr30", 30, {0, {{{0, 0}}}}, 0, 0 },
614 { "dr32", 32, {0, {{{0, 0}}}}, 0, 0 },
615 { "dr34", 34, {0, {{{0, 0}}}}, 0, 0 },
616 { "dr36", 36, {0, {{{0, 0}}}}, 0, 0 },
617 { "dr38", 38, {0, {{{0, 0}}}}, 0, 0 },
618 { "dr40", 40, {0, {{{0, 0}}}}, 0, 0 },
619 { "dr42", 42, {0, {{{0, 0}}}}, 0, 0 },
620 { "dr44", 44, {0, {{{0, 0}}}}, 0, 0 },
621 { "dr46", 46, {0, {{{0, 0}}}}, 0, 0 },
622 { "dr48", 48, {0, {{{0, 0}}}}, 0, 0 },
623 { "dr50", 50, {0, {{{0, 0}}}}, 0, 0 },
624 { "dr52", 52, {0, {{{0, 0}}}}, 0, 0 },
625 { "dr54", 54, {0, {{{0, 0}}}}, 0, 0 },
626 { "dr56", 56, {0, {{{0, 0}}}}, 0, 0 },
627 { "dr58", 58, {0, {{{0, 0}}}}, 0, 0 },
628 { "dr60", 60, {0, {{{0, 0}}}}, 0, 0 },
629 { "dr62", 62, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 630};
631
632CGEN_KEYWORD sh_cgen_opval_h_dr =
633{
634 & sh_cgen_opval_h_dr_entries[0],
c7e628df
DB		 635 32,
636 0, 0, 0, 0, ""
637};
638
639static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fsd_entries[] =
640{
641 { "fr0", 0, {0, {{{0, 0}}}}, 0, 0 },
642 { "fr1", 1, {0, {{{0, 0}}}}, 0, 0 },
643 { "fr2", 2, {0, {{{0, 0}}}}, 0, 0 },
644 { "fr3", 3, {0, {{{0, 0}}}}, 0, 0 },
645 { "fr4", 4, {0, {{{0, 0}}}}, 0, 0 },
646 { "fr5", 5, {0, {{{0, 0}}}}, 0, 0 },
647 { "fr6", 6, {0, {{{0, 0}}}}, 0, 0 },
648 { "fr7", 7, {0, {{{0, 0}}}}, 0, 0 },
649 { "fr8", 8, {0, {{{0, 0}}}}, 0, 0 },
650 { "fr9", 9, {0, {{{0, 0}}}}, 0, 0 },
651 { "fr10", 10, {0, {{{0, 0}}}}, 0, 0 },
652 { "fr11", 11, {0, {{{0, 0}}}}, 0, 0 },
653 { "fr12", 12, {0, {{{0, 0}}}}, 0, 0 },
654 { "fr13", 13, {0, {{{0, 0}}}}, 0, 0 },
655 { "fr14", 14, {0, {{{0, 0}}}}, 0, 0 },
656 { "fr15", 15, {0, {{{0, 0}}}}, 0, 0 }
657};
658
659CGEN_KEYWORD sh_cgen_opval_h_fsd =
660{
661 & sh_cgen_opval_h_fsd_entries[0],
662 16,
663 0, 0, 0, 0, ""
664};
665
666static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fmov_entries[] =
667{
668 { "fr0", 0, {0, {{{0, 0}}}}, 0, 0 },
669 { "fr1", 1, {0, {{{0, 0}}}}, 0, 0 },
670 { "fr2", 2, {0, {{{0, 0}}}}, 0, 0 },
671 { "fr3", 3, {0, {{{0, 0}}}}, 0, 0 },
672 { "fr4", 4, {0, {{{0, 0}}}}, 0, 0 },
673 { "fr5", 5, {0, {{{0, 0}}}}, 0, 0 },
674 { "fr6", 6, {0, {{{0, 0}}}}, 0, 0 },
675 { "fr7", 7, {0, {{{0, 0}}}}, 0, 0 },
676 { "fr8", 8, {0, {{{0, 0}}}}, 0, 0 },
677 { "fr9", 9, {0, {{{0, 0}}}}, 0, 0 },
678 { "fr10", 10, {0, {{{0, 0}}}}, 0, 0 },
679 { "fr11", 11, {0, {{{0, 0}}}}, 0, 0 },
680 { "fr12", 12, {0, {{{0, 0}}}}, 0, 0 },
681 { "fr13", 13, {0, {{{0, 0}}}}, 0, 0 },
682 { "fr14", 14, {0, {{{0, 0}}}}, 0, 0 },
683 { "fr15", 15, {0, {{{0, 0}}}}, 0, 0 }
684};
685
686CGEN_KEYWORD sh_cgen_opval_h_fmov =
687{
688 & sh_cgen_opval_h_fmov_entries[0],
689 16,
690 0, 0, 0, 0, ""
cbb38b47
BE		 691};
692
693static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_tr_entries[] =
694{
c7e628df
DB		 695 { "tr0", 0, {0, {{{0, 0}}}}, 0, 0 },
696 { "tr1", 1, {0, {{{0, 0}}}}, 0, 0 },
697 { "tr2", 2, {0, {{{0, 0}}}}, 0, 0 },
698 { "tr3", 3, {0, {{{0, 0}}}}, 0, 0 },
699 { "tr4", 4, {0, {{{0, 0}}}}, 0, 0 },
700 { "tr5", 5, {0, {{{0, 0}}}}, 0, 0 },
701 { "tr6", 6, {0, {{{0, 0}}}}, 0, 0 },
702 { "tr7", 7, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 703};
704
705CGEN_KEYWORD sh_cgen_opval_h_tr =
706{
707 & sh_cgen_opval_h_tr_entries[0],
708 8,
c7e628df 709 0, 0, 0, 0, ""
cbb38b47
BE		 710};
711
712static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fvc_entries[] =
713{
c7e628df
DB		 714 { "fv0", 0, {0, {{{0, 0}}}}, 0, 0 },
715 { "fv4", 4, {0, {{{0, 0}}}}, 0, 0 },
716 { "fv8", 8, {0, {{{0, 0}}}}, 0, 0 },
717 { "fv12", 12, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 718};
719
720CGEN_KEYWORD sh_cgen_opval_h_fvc =
721{
722 & sh_cgen_opval_h_fvc_entries[0],
723 4,
c7e628df 724 0, 0, 0, 0, ""
cbb38b47
BE		 725};
726
727
728/* The hardware table. */
729
cbb38b47 730#define A(a) (1 << CGEN_HW_##a)
cbb38b47
BE		 731
732const CGEN_HW_ENTRY sh_cgen_hw_table[] =
733{
c7e628df
DB		 734 { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
735 { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
736 { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
737 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
738 { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
739 { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
740 { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_gr, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
741 { "h-grc", HW_H_GRC, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_grc, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
742 { "h-cr", HW_H_CR, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_cr, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
743 { "h-sr", HW_H_SR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
744 { "h-fpscr", HW_H_FPSCR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
745 { "h-frbit", HW_H_FRBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
746 { "h-szbit", HW_H_SZBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
747 { "h-prbit", HW_H_PRBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
748 { "h-sbit", HW_H_SBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
749 { "h-mbit", HW_H_MBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
750 { "h-qbit", HW_H_QBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
751 { "h-fr", HW_H_FR, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fr, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
752 { "h-fp", HW_H_FP, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fp, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
753 { "h-fv", HW_H_FV, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fv, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
754 { "h-fmtx", HW_H_FMTX, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fmtx, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
755 { "h-dr", HW_H_DR, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_dr, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
756 { "h-fsd", HW_H_FSD, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fsd, { 0|A(PROFILE), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\xc0" } } } } },
757 { "h-fmov", HW_H_FMOV, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fmov, { 0|A(PROFILE), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\xc0" } } } } },
758 { "h-tr", HW_H_TR, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_tr, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
759 { "h-endian", HW_H_ENDIAN, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
760 { "h-ism", HW_H_ISM, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
761 { "h-frc", HW_H_FRC, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_frc_names, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
762 { "h-drc", HW_H_DRC, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_drc_names, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
763 { "h-xf", HW_H_XF, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_xf_names, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
764 { "h-xd", HW_H_XD, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_frc_names, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
765 { "h-fvc", HW_H_FVC, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fvc, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
766 { "h-gbr", HW_H_GBR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
767 { "h-vbr", HW_H_VBR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
768 { "h-pr", HW_H_PR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
769 { "h-macl", HW_H_MACL, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
770 { "h-mach", HW_H_MACH, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
771 { "h-tbit", HW_H_TBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
772 { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
cbb38b47
BE		 773};
774
775#undef A
776
777
778/* The instruction field table. */
779
cbb38b47 780#define A(a) (1 << CGEN_IFLD_##a)
cbb38b47
BE		 781
782const CGEN_IFLD sh_cgen_ifld_table[] =
783{
fda1c30b
DE		 784 { SH_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
785 { SH_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
c7e628df
DB		 786 { SH_F_OP4, "f-op4", 0, 32, 0, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
787 { SH_F_OP8, "f-op8", 0, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
788 { SH_F_OP16, "f-op16", 0, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
789 { SH_F_SUB4, "f-sub4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
790 { SH_F_SUB8, "f-sub8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
791 { SH_F_SUB10, "f-sub10", 0, 32, 6, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
792 { SH_F_RN, "f-rn", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
793 { SH_F_RM, "f-rm", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
794 { SH_F_7_1, "f-7-1", 0, 32, 7, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
795 { SH_F_11_1, "f-11-1", 0, 32, 11, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
796 { SH_F_16_4, "f-16-4", 0, 32, 16, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
797 { SH_F_DISP8, "f-disp8", 0, 32, 8, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
798 { SH_F_DISP12, "f-disp12", 0, 32, 4, 12, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
799 { SH_F_IMM8, "f-imm8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
800 { SH_F_IMM4, "f-imm4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
801 { SH_F_IMM4X2, "f-imm4x2", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
802 { SH_F_IMM4X4, "f-imm4x4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
803 { SH_F_IMM8X2, "f-imm8x2", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
804 { SH_F_IMM8X4, "f-imm8x4", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
805 { SH_F_IMM12X4, "f-imm12x4", 0, 32, 20, 12, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
806 { SH_F_IMM12X8, "f-imm12x8", 0, 32, 20, 12, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
807 { SH_F_DN, "f-dn", 0, 32, 4, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
808 { SH_F_DM, "f-dm", 0, 32, 8, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
809 { SH_F_VN, "f-vn", 0, 32, 4, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
810 { SH_F_VM, "f-vm", 0, 32, 6, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
811 { SH_F_XN, "f-xn", 0, 32, 4, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
812 { SH_F_XM, "f-xm", 0, 32, 8, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
813 { SH_F_IMM20_HI, "f-imm20-hi", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
814 { SH_F_IMM20_LO, "f-imm20-lo", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
815 { SH_F_IMM20, "f-imm20", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
816 { SH_F_OP, "f-op", 0, 32, 0, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
817 { SH_F_EXT, "f-ext", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
818 { SH_F_RSVD, "f-rsvd", 0, 32, 28, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
819 { SH_F_LEFT, "f-left", 0, 32, 6, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
820 { SH_F_RIGHT, "f-right", 0, 32, 16, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
821 { SH_F_DEST, "f-dest", 0, 32, 22, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
822 { SH_F_LEFT_RIGHT, "f-left-right", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
823 { SH_F_TRA, "f-tra", 0, 32, 25, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
824 { SH_F_TRB, "f-trb", 0, 32, 9, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
825 { SH_F_LIKELY, "f-likely", 0, 32, 22, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
826 { SH_F_6_3, "f-6-3", 0, 32, 6, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
827 { SH_F_23_2, "f-23-2", 0, 32, 23, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
828 { SH_F_IMM6, "f-imm6", 0, 32, 16, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
829 { SH_F_IMM10, "f-imm10", 0, 32, 12, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
830 { SH_F_IMM16, "f-imm16", 0, 32, 6, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
831 { SH_F_UIMM6, "f-uimm6", 0, 32, 16, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
832 { SH_F_UIMM16, "f-uimm16", 0, 32, 6, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
833 { SH_F_DISP6, "f-disp6", 0, 32, 16, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
834 { SH_F_DISP6X32, "f-disp6x32", 0, 32, 16, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
835 { SH_F_DISP10, "f-disp10", 0, 32, 12, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
836 { SH_F_DISP10X8, "f-disp10x8", 0, 32, 12, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
837 { SH_F_DISP10X4, "f-disp10x4", 0, 32, 12, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
838 { SH_F_DISP10X2, "f-disp10x2", 0, 32, 12, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
839 { SH_F_DISP16, "f-disp16", 0, 32, 6, 16, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
840 { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
cbb38b47
BE		 841};
842
843#undef A
844
845
c7e628df
DB		 846
847/* multi ifield declarations */
848
849const CGEN_MAYBE_MULTI_IFLD SH_F_IMM20_MULTI_IFIELD [];
850const CGEN_MAYBE_MULTI_IFLD SH_F_LEFT_RIGHT_MULTI_IFIELD [];
851
852
853/* multi ifield definitions */
854
855const CGEN_MAYBE_MULTI_IFLD SH_F_IMM20_MULTI_IFIELD [] =
856{
857 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM20_HI] } },
858 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM20_LO] } },
859 { 0, { (const PTR) 0 } }
860};
861const CGEN_MAYBE_MULTI_IFLD SH_F_LEFT_RIGHT_MULTI_IFIELD [] =
862{
863 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
864 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RIGHT] } },
865 { 0, { (const PTR) 0 } }
866};
867
cbb38b47
BE		 868/* The operand table. */
869
cbb38b47 870#define A(a) (1 << CGEN_OPERAND_##a)
cbb38b47 871#define OPERAND(op) SH_OPERAND_##op
cbb38b47
BE		 872
873const CGEN_OPERAND sh_cgen_operand_table[] =
874{
875/* pc: program counter */
876 { "pc", SH_OPERAND_PC, HW_H_PC, 0, 0,
c7e628df 877 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_NIL] } },
fda1c30b 878 { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
cbb38b47
BE		 879/* endian: Endian mode */
880 { "endian", SH_OPERAND_ENDIAN, HW_H_ENDIAN, 0, 0,
c7e628df
DB		 881 { 0, { (const PTR) 0 } },
882 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
cbb38b47
BE		 883/* ism: Instruction set mode */
884 { "ism", SH_OPERAND_ISM, HW_H_ISM, 0, 0,
c7e628df
DB		 885 { 0, { (const PTR) 0 } },
886 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
cbb38b47 887/* rm: Left general purpose register */
c7e628df
DB		 888 { "rm", SH_OPERAND_RM, HW_H_GRC, 8, 4,
889 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RM] } },
890 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 891/* rn: Right general purpose register */
c7e628df
DB		 892 { "rn", SH_OPERAND_RN, HW_H_GRC, 4, 4,
893 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RN] } },
894 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 895/* r0: Register 0 */
896 { "r0", SH_OPERAND_R0, HW_H_GRC, 0, 0,
c7e628df
DB		 897 { 0, { (const PTR) 0 } },
898 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 899/* frn: Single precision register */
c7e628df
DB		 900 { "frn", SH_OPERAND_FRN, HW_H_FRC, 4, 4,
901 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RN] } },
902 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 903/* frm: Single precision register */
c7e628df
DB		 904 { "frm", SH_OPERAND_FRM, HW_H_FRC, 8, 4,
905 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RM] } },
906 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
907/* fr0: Single precision register 0 */
908 { "fr0", SH_OPERAND_FR0, HW_H_FRC, 0, 0,
909 { 0, { (const PTR) 0 } },
910 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
911/* fmovn: Register for fmov */
912 { "fmovn", SH_OPERAND_FMOVN, HW_H_FMOV, 4, 4,
913 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RN] } },
914 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } } } } },
915/* fmovm: Register for fmov */
916 { "fmovm", SH_OPERAND_FMOVM, HW_H_FMOV, 8, 4,
917 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RM] } },
918 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 919/* fvn: Left floating point vector */
c7e628df
DB		 920 { "fvn", SH_OPERAND_FVN, HW_H_FVC, 4, 2,
921 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_VN] } },
922 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 923/* fvm: Right floating point vector */
c7e628df
DB		 924 { "fvm", SH_OPERAND_FVM, HW_H_FVC, 6, 2,
925 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_VM] } },
926 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 927/* drn: Left double precision register */
c7e628df
DB		 928 { "drn", SH_OPERAND_DRN, HW_H_DRC, 4, 3,
929 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DN] } },
930 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 931/* drm: Right double precision register */
c7e628df
DB		 932 { "drm", SH_OPERAND_DRM, HW_H_DRC, 8, 3,
933 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DM] } },
934 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 935/* imm4: Immediate value (4 bits) */
c7e628df
DB		 936 { "imm4", SH_OPERAND_IMM4, HW_H_SINT, 12, 4,
937 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM4] } },
938 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 939/* imm8: Immediate value (8 bits) */
c7e628df
DB		 940 { "imm8", SH_OPERAND_IMM8, HW_H_SINT, 8, 8,
941 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM8] } },
942 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 943/* uimm8: Immediate value (8 bits unsigned) */
c7e628df
DB		 944 { "uimm8", SH_OPERAND_UIMM8, HW_H_UINT, 8, 8,
945 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM8] } },
946 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
947/* imm20: Immediate value (20 bits) */
948 { "imm20", SH_OPERAND_IMM20, HW_H_SINT, 8, 20,
949 { 2, { (const PTR) &SH_F_IMM20_MULTI_IFIELD[0] } },
950 { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 951/* imm4x2: Immediate value (4 bits, 2x scale) */
c7e628df
DB		 952 { "imm4x2", SH_OPERAND_IMM4X2, HW_H_UINT, 12, 4,
953 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM4X2] } },
954 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 955/* imm4x4: Immediate value (4 bits, 4x scale) */
c7e628df
DB		 956 { "imm4x4", SH_OPERAND_IMM4X4, HW_H_UINT, 12, 4,
957 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM4X4] } },
958 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 959/* imm8x2: Immediate value (8 bits, 2x scale) */
c7e628df
DB		 960 { "imm8x2", SH_OPERAND_IMM8X2, HW_H_UINT, 8, 8,
961 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM8X2] } },
962 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 963/* imm8x4: Immediate value (8 bits, 4x scale) */
c7e628df
DB		 964 { "imm8x4", SH_OPERAND_IMM8X4, HW_H_UINT, 8, 8,
965 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM8X4] } },
966 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 967/* disp8: Displacement (8 bits) */
c7e628df
DB		 968 { "disp8", SH_OPERAND_DISP8, HW_H_IADDR, 8, 8,
969 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP8] } },
970 { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 971/* disp12: Displacement (12 bits) */
c7e628df
DB		 972 { "disp12", SH_OPERAND_DISP12, HW_H_IADDR, 4, 12,
973 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP12] } },
974 { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
975/* imm12x4: Displacement (12 bits) */
976 { "imm12x4", SH_OPERAND_IMM12X4, HW_H_SINT, 20, 12,
977 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM12X4] } },
978 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
979/* imm12x8: Displacement (12 bits) */
980 { "imm12x8", SH_OPERAND_IMM12X8, HW_H_SINT, 20, 12,
981 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM12X8] } },
982 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 983/* rm64: Register m (64 bits) */
c7e628df
DB		 984 { "rm64", SH_OPERAND_RM64, HW_H_GR, 8, 4,
985 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RM] } },
986 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 987/* rn64: Register n (64 bits) */
c7e628df
DB		 988 { "rn64", SH_OPERAND_RN64, HW_H_GR, 4, 4,
989 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RN] } },
990 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 991/* gbr: Global base register */
992 { "gbr", SH_OPERAND_GBR, HW_H_GBR, 0, 0,
c7e628df
DB		 993 { 0, { (const PTR) 0 } },
994 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
995/* vbr: Vector base register */
996 { "vbr", SH_OPERAND_VBR, HW_H_VBR, 0, 0,
997 { 0, { (const PTR) 0 } },
998 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 999/* pr: Procedure link register */
1000 { "pr", SH_OPERAND_PR, HW_H_PR, 0, 0,
c7e628df
DB		 1001 { 0, { (const PTR) 0 } },
1002 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 1003/* fpscr: Floating point status/control register */
c7e628df
DB		 1004 { "fpscr", SH_OPERAND_FPSCR, HW_H_FPSCR, 0, 0,
1005 { 0, { (const PTR) 0 } },
1006 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1007/* tbit: Condition code flag */
1008 { "tbit", SH_OPERAND_TBIT, HW_H_TBIT, 0, 0,
c7e628df
DB		 1009 { 0, { (const PTR) 0 } },
1010 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1011/* sbit: Multiply-accumulate saturation flag */
1012 { "sbit", SH_OPERAND_SBIT, HW_H_SBIT, 0, 0,
c7e628df
DB		 1013 { 0, { (const PTR) 0 } },
1014 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1015/* mbit: Divide-step M flag */
1016 { "mbit", SH_OPERAND_MBIT, HW_H_MBIT, 0, 0,
c7e628df
DB		 1017 { 0, { (const PTR) 0 } },
1018 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1019/* qbit: Divide-step Q flag */
1020 { "qbit", SH_OPERAND_QBIT, HW_H_QBIT, 0, 0,
c7e628df
DB		 1021 { 0, { (const PTR) 0 } },
1022 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1023/* fpul: Floating point ??? */
1024 { "fpul", SH_OPERAND_FPUL, HW_H_FR, 0, 0,
c7e628df
DB		 1025 { 0, { (const PTR) 0 } },
1026 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1027/* frbit: Floating point register bank bit */
1028 { "frbit", SH_OPERAND_FRBIT, HW_H_FRBIT, 0, 0,
c7e628df
DB		 1029 { 0, { (const PTR) 0 } },
1030 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1031/* szbit: Floating point transfer size bit */
1032 { "szbit", SH_OPERAND_SZBIT, HW_H_SZBIT, 0, 0,
c7e628df
DB		 1033 { 0, { (const PTR) 0 } },
1034 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1035/* prbit: Floating point precision bit */
1036 { "prbit", SH_OPERAND_PRBIT, HW_H_PRBIT, 0, 0,
c7e628df
DB		 1037 { 0, { (const PTR) 0 } },
1038 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1039/* macl: Multiply-accumulate low register */
1040 { "macl", SH_OPERAND_MACL, HW_H_MACL, 0, 0,
c7e628df
DB		 1041 { 0, { (const PTR) 0 } },
1042 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1043/* mach: Multiply-accumulate high register */
1044 { "mach", SH_OPERAND_MACH, HW_H_MACH, 0, 0,
c7e628df
DB		 1045 { 0, { (const PTR) 0 } },
1046 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 1047/* fsdm: bar */
c7e628df
DB		 1048 { "fsdm", SH_OPERAND_FSDM, HW_H_FSD, 8, 4,
1049 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RM] } },
1050 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 1051/* fsdn: bar */
c7e628df
DB		 1052 { "fsdn", SH_OPERAND_FSDN, HW_H_FSD, 4, 4,
1053 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RN] } },
1054 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 1055/* rm: Left general purpose reg */
c7e628df
DB		 1056 { "rm", SH_OPERAND_RM, HW_H_GR, 6, 6,
1057 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1058 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1059/* rn: Right general purpose reg */
c7e628df
DB		 1060 { "rn", SH_OPERAND_RN, HW_H_GR, 16, 6,
1061 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RIGHT] } },
1062 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1063/* rd: Destination general purpose reg */
c7e628df
DB		 1064 { "rd", SH_OPERAND_RD, HW_H_GR, 22, 6,
1065 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1066 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1067/* frg: Left single precision register */
c7e628df
DB		 1068 { "frg", SH_OPERAND_FRG, HW_H_FR, 6, 6,
1069 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1070 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1071/* frh: Right single precision register */
c7e628df
DB		 1072 { "frh", SH_OPERAND_FRH, HW_H_FR, 16, 6,
1073 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RIGHT] } },
1074 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1075/* frf: Destination single precision reg */
c7e628df
DB		 1076 { "frf", SH_OPERAND_FRF, HW_H_FR, 22, 6,
1077 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1078 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1079/* frgh: Single precision register pair */
c7e628df
DB		 1080 { "frgh", SH_OPERAND_FRGH, HW_H_FR, 6, 12,
1081 { 2, { (const PTR) &SH_F_LEFT_RIGHT_MULTI_IFIELD[0] } },
1082 { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1083/* fpf: Pair of single precision registers */
c7e628df
DB		 1084 { "fpf", SH_OPERAND_FPF, HW_H_FP, 22, 6,
1085 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1086 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1087/* fvg: Left single precision vector */
c7e628df
DB		 1088 { "fvg", SH_OPERAND_FVG, HW_H_FV, 6, 6,
1089 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1090 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1091/* fvh: Right single precision vector */
c7e628df
DB		 1092 { "fvh", SH_OPERAND_FVH, HW_H_FV, 16, 6,
1093 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RIGHT] } },
1094 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1095/* fvf: Destination single precision vector */
c7e628df
DB		 1096 { "fvf", SH_OPERAND_FVF, HW_H_FV, 22, 6,
1097 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1098 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1099/* mtrxg: Left single precision matrix */
c7e628df
DB		 1100 { "mtrxg", SH_OPERAND_MTRXG, HW_H_FMTX, 6, 6,
1101 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1102 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1103/* drg: Left double precision register */
c7e628df
DB		 1104 { "drg", SH_OPERAND_DRG, HW_H_DR, 6, 6,
1105 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1106 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1107/* drh: Right double precision register */
c7e628df
DB		 1108 { "drh", SH_OPERAND_DRH, HW_H_DR, 16, 6,
1109 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RIGHT] } },
1110 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1111/* drf: Destination double precision reg */
c7e628df
DB		 1112 { "drf", SH_OPERAND_DRF, HW_H_DR, 22, 6,
1113 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1114 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1115/* drgh: Double precision register pair */
c7e628df
DB		 1116 { "drgh", SH_OPERAND_DRGH, HW_H_DR, 6, 12,
1117 { 2, { (const PTR) &SH_F_LEFT_RIGHT_MULTI_IFIELD[0] } },
1118 { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47
BE		 1119/* fpscr: Floating point status register */
1120 { "fpscr", SH_OPERAND_FPSCR, HW_H_FPSCR, 0, 0,
c7e628df
DB		 1121 { 0, { (const PTR) 0 } },
1122 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1123/* crj: Control register j */
c7e628df
DB		 1124 { "crj", SH_OPERAND_CRJ, HW_H_CR, 22, 6,
1125 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1126 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1127/* crk: Control register k */
c7e628df
DB		 1128 { "crk", SH_OPERAND_CRK, HW_H_CR, 6, 6,
1129 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1130 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1131/* tra: Target register a */
c7e628df
DB		 1132 { "tra", SH_OPERAND_TRA, HW_H_TR, 25, 3,
1133 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_TRA] } },
1134 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1135/* trb: Target register b */
c7e628df
DB		 1136 { "trb", SH_OPERAND_TRB, HW_H_TR, 9, 3,
1137 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_TRB] } },
1138 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1139/* disp6: Displacement (6 bits) */
c7e628df
DB		 1140 { "disp6", SH_OPERAND_DISP6, HW_H_SINT, 16, 6,
1141 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP6] } },
1142 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1143/* disp6x32: Displacement (6 bits, scale 32) */
c7e628df
DB		 1144 { "disp6x32", SH_OPERAND_DISP6X32, HW_H_SINT, 16, 6,
1145 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP6X32] } },
1146 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1147/* disp10: Displacement (10 bits) */
c7e628df
DB		 1148 { "disp10", SH_OPERAND_DISP10, HW_H_SINT, 12, 10,
1149 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP10] } },
1150 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1151/* disp10x2: Displacement (10 bits, scale 2) */
c7e628df
DB		 1152 { "disp10x2", SH_OPERAND_DISP10X2, HW_H_SINT, 12, 10,
1153 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP10X2] } },
1154 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1155/* disp10x4: Displacement (10 bits, scale 4) */
c7e628df
DB		 1156 { "disp10x4", SH_OPERAND_DISP10X4, HW_H_SINT, 12, 10,
1157 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP10X4] } },
1158 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1159/* disp10x8: Displacement (10 bits, scale 8) */
c7e628df
DB		 1160 { "disp10x8", SH_OPERAND_DISP10X8, HW_H_SINT, 12, 10,
1161 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP10X8] } },
1162 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1163/* disp16: Displacement (16 bits) */
c7e628df
DB		 1164 { "disp16", SH_OPERAND_DISP16, HW_H_SINT, 6, 16,
1165 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP16] } },
1166 { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1167/* imm6: Immediate (6 bits) */
c7e628df
DB		 1168 { "imm6", SH_OPERAND_IMM6, HW_H_SINT, 16, 6,
1169 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM6] } },
1170 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1171/* imm10: Immediate (10 bits) */
c7e628df
DB		 1172 { "imm10", SH_OPERAND_IMM10, HW_H_SINT, 12, 10,
1173 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM10] } },
1174 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1175/* imm16: Immediate (16 bits) */
c7e628df
DB		 1176 { "imm16", SH_OPERAND_IMM16, HW_H_SINT, 6, 16,
1177 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM16] } },
1178 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1179/* uimm6: Immediate (6 bits) */
c7e628df
DB		 1180 { "uimm6", SH_OPERAND_UIMM6, HW_H_UINT, 16, 6,
1181 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_UIMM6] } },
1182 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1183/* uimm16: Unsigned immediate (16 bits) */
c7e628df
DB		 1184 { "uimm16", SH_OPERAND_UIMM16, HW_H_UINT, 6, 16,
1185 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_UIMM16] } },
1186 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1187/* likely: Likely branch? */
c7e628df
DB		 1188 { "likely", SH_OPERAND_LIKELY, HW_H_UINT, 22, 1,
1189 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LIKELY] } },
1190 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
1191/* sentinel */
1192 { 0, 0, 0, 0, 0,
1193 { 0, { (const PTR) 0 } },
1194 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
cbb38b47
BE		 1195};
1196
1197#undef A
1198
1199
1200/* The instruction table. */
1201
1202#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
cbb38b47 1203#define A(a) (1 << CGEN_INSN_##a)
cbb38b47
BE		 1204
1205static const CGEN_IBASE sh_cgen_insn_table[MAX_INSNS] =
1206{
1207 /* Special null first entry.
1208 A `num' value of zero is thus invalid.
1209 Also, the special `invalid' insn resides here. */
c7e628df 1210 { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } } },
cbb38b47
BE		 1211/* add $rm, $rn */
1212 {
1213 SH_INSN_ADD_COMPACT, "add-compact", "add", 16,
c7e628df 1214 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1215 },
1216/* add #$imm8, $rn */
1217 {
1218 SH_INSN_ADDI_COMPACT, "addi-compact", "add", 16,
c7e628df 1219 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1220 },
1221/* addc $rm, $rn */
1222 {
1223 SH_INSN_ADDC_COMPACT, "addc-compact", "addc", 16,
c7e628df 1224 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1225 },
1226/* addv $rm, $rn */
1227 {
1228 SH_INSN_ADDV_COMPACT, "addv-compact", "addv", 16,
c7e628df 1229 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1230 },
1231/* and $rm64, $rn64 */
1232 {
1233 SH_INSN_AND_COMPACT, "and-compact", "and", 16,
c7e628df 1234 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1235 },
1236/* and #$uimm8, r0 */
1237 {
1238 SH_INSN_ANDI_COMPACT, "andi-compact", "and", 16,
c7e628df 1239 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1240 },
1241/* and.b #$imm8, @(r0, gbr) */
1242 {
1243 SH_INSN_ANDB_COMPACT, "andb-compact", "and.b", 16,
c7e628df 1244 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1245 },
1246/* bf $disp8 */
1247 {
1248 SH_INSN_BF_COMPACT, "bf-compact", "bf", 16,
c7e628df 1249 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1250 },
1251/* bf/s $disp8 */
1252 {
1253 SH_INSN_BFS_COMPACT, "bfs-compact", "bf/s", 16,
c7e628df 1254 { 0|A(COND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1255 },
1256/* bra $disp12 */
1257 {
1258 SH_INSN_BRA_COMPACT, "bra-compact", "bra", 16,
c7e628df 1259 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1260 },
1261/* braf $rn */
1262 {
1263 SH_INSN_BRAF_COMPACT, "braf-compact", "braf", 16,
c7e628df 1264 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1265 },
1266/* brk */
1267 {
1268 SH_INSN_BRK_COMPACT, "brk-compact", "brk", 16,
c7e628df 1269 { 0, { { { (1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1270 },
1271/* bsr $disp12 */
1272 {
1273 SH_INSN_BSR_COMPACT, "bsr-compact", "bsr", 16,
c7e628df 1274 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1275 },
1276/* bsrf $rn */
1277 {
1278 SH_INSN_BSRF_COMPACT, "bsrf-compact", "bsrf", 16,
c7e628df 1279 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1280 },
1281/* bt $disp8 */
1282 {
1283 SH_INSN_BT_COMPACT, "bt-compact", "bt", 16,
c7e628df 1284 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1285 },
1286/* bt/s $disp8 */
1287 {
1288 SH_INSN_BTS_COMPACT, "bts-compact", "bt/s", 16,
c7e628df 1289 { 0|A(COND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1290 },
1291/* clrmac */
1292 {
1293 SH_INSN_CLRMAC_COMPACT, "clrmac-compact", "clrmac", 16,
c7e628df 1294 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1295 },
1296/* clrs */
1297 {
1298 SH_INSN_CLRS_COMPACT, "clrs-compact", "clrs", 16,
c7e628df 1299 { 0, { { { (1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1300 },
1301/* clrt */
1302 {
1303 SH_INSN_CLRT_COMPACT, "clrt-compact", "clrt", 16,
c7e628df 1304 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1305 },
1306/* cmp/eq $rm, $rn */
1307 {
1308 SH_INSN_CMPEQ_COMPACT, "cmpeq-compact", "cmp/eq", 16,
c7e628df 1309 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1310 },
1311/* cmp/eq #$imm8, r0 */
1312 {
1313 SH_INSN_CMPEQI_COMPACT, "cmpeqi-compact", "cmp/eq", 16,
c7e628df 1314 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1315 },
1316/* cmp/ge $rm, $rn */
1317 {
1318 SH_INSN_CMPGE_COMPACT, "cmpge-compact", "cmp/ge", 16,
c7e628df 1319 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1320 },
1321/* cmp/gt $rm, $rn */
1322 {
1323 SH_INSN_CMPGT_COMPACT, "cmpgt-compact", "cmp/gt", 16,
c7e628df 1324 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1325 },
1326/* cmp/hi $rm, $rn */
1327 {
1328 SH_INSN_CMPHI_COMPACT, "cmphi-compact", "cmp/hi", 16,
c7e628df 1329 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1330 },
1331/* cmp/hs $rm, $rn */
1332 {
1333 SH_INSN_CMPHS_COMPACT, "cmphs-compact", "cmp/hs", 16,
c7e628df 1334 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1335 },
1336/* cmp/pl $rn */
1337 {
1338 SH_INSN_CMPPL_COMPACT, "cmppl-compact", "cmp/pl", 16,
c7e628df 1339 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1340 },
1341/* cmp/pz $rn */
1342 {
1343 SH_INSN_CMPPZ_COMPACT, "cmppz-compact", "cmp/pz", 16,
c7e628df 1344 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1345 },
1346/* cmp/str $rm, $rn */
1347 {
1348 SH_INSN_CMPSTR_COMPACT, "cmpstr-compact", "cmp/str", 16,
c7e628df 1349 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1350 },
1351/* div0s $rm, $rn */
1352 {
1353 SH_INSN_DIV0S_COMPACT, "div0s-compact", "div0s", 16,
c7e628df 1354 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1355 },
1356/* div0u */
1357 {
1358 SH_INSN_DIV0U_COMPACT, "div0u-compact", "div0u", 16,
c7e628df 1359 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1360 },
1361/* div1 $rm, $rn */
1362 {
1363 SH_INSN_DIV1_COMPACT, "div1-compact", "div1", 16,
c7e628df
DB		 1364 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
1365 },
1366/* divu r0, $rn */
1367 {
1368 SH_INSN_DIVU_COMPACT, "divu-compact", "divu", 16,
1369 { 0, { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
1370 },
1371/* mulr r0, $rn */
1372 {
1373 SH_INSN_MULR_COMPACT, "mulr-compact", "mulr", 16,
1374 { 0, { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1375 },
1376/* dmuls.l $rm, $rn */
1377 {
1378 SH_INSN_DMULSL_COMPACT, "dmulsl-compact", "dmuls.l", 16,
c7e628df 1379 { 0, { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1380 },
1381/* dmulu.l $rm, $rn */
1382 {
1383 SH_INSN_DMULUL_COMPACT, "dmulul-compact", "dmulu.l", 16,
c7e628df 1384 { 0, { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1385 },
1386/* dt $rn */
1387 {
1388 SH_INSN_DT_COMPACT, "dt-compact", "dt", 16,
c7e628df 1389 { 0, { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1390 },
1391/* exts.b $rm, $rn */
1392 {
1393 SH_INSN_EXTSB_COMPACT, "extsb-compact", "exts.b", 16,
c7e628df 1394 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1395 },
1396/* exts.w $rm, $rn */
1397 {
1398 SH_INSN_EXTSW_COMPACT, "extsw-compact", "exts.w", 16,
c7e628df 1399 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1400 },
1401/* extu.b $rm, $rn */
1402 {
1403 SH_INSN_EXTUB_COMPACT, "extub-compact", "extu.b", 16,
c7e628df 1404 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1405 },
1406/* extu.w $rm, $rn */
1407 {
1408 SH_INSN_EXTUW_COMPACT, "extuw-compact", "extu.w", 16,
c7e628df 1409 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1410 },
1411/* fabs $fsdn */
1412 {
1413 SH_INSN_FABS_COMPACT, "fabs-compact", "fabs", 16,
c7e628df 1414 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1415 },
1416/* fadd $fsdm, $fsdn */
1417 {
1418 SH_INSN_FADD_COMPACT, "fadd-compact", "fadd", 16,
c7e628df 1419 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1420 },
1421/* fcmp/eq $fsdm, $fsdn */
1422 {
1423 SH_INSN_FCMPEQ_COMPACT, "fcmpeq-compact", "fcmp/eq", 16,
c7e628df 1424 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1425 },
1426/* fcmp/gt $fsdm, $fsdn */
1427 {
1428 SH_INSN_FCMPGT_COMPACT, "fcmpgt-compact", "fcmp/gt", 16,
c7e628df 1429 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1430 },
1431/* fcnvds $drn, fpul */
1432 {
1433 SH_INSN_FCNVDS_COMPACT, "fcnvds-compact", "fcnvds", 16,
c7e628df 1434 { 0|A(FP_INSN), { { { (1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1435 },
1436/* fcnvsd fpul, $drn */
1437 {
1438 SH_INSN_FCNVSD_COMPACT, "fcnvsd-compact", "fcnvsd", 16,
c7e628df 1439 { 0|A(FP_INSN), { { { (1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1440 },
1441/* fdiv $fsdm, $fsdn */
1442 {
1443 SH_INSN_FDIV_COMPACT, "fdiv-compact", "fdiv", 16,
c7e628df 1444 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1445 },
1446/* fipr $fvm, $fvn */
1447 {
1448 SH_INSN_FIPR_COMPACT, "fipr-compact", "fipr", 16,
c7e628df 1449 { 0|A(FP_INSN), { { { (1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47 1450 },
c7e628df 1451/* flds $frn, fpul */
cbb38b47
BE		 1452 {
1453 SH_INSN_FLDS_COMPACT, "flds-compact", "flds", 16,
c7e628df 1454 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1455 },
1456/* fldi0 $frn */
1457 {
1458 SH_INSN_FLDI0_COMPACT, "fldi0-compact", "fldi0", 16,
c7e628df 1459 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1460 },
1461/* fldi1 $frn */
1462 {
1463 SH_INSN_FLDI1_COMPACT, "fldi1-compact", "fldi1", 16,
c7e628df 1464 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1465 },
1466/* float fpul, $fsdn */
1467 {
1468 SH_INSN_FLOAT_COMPACT, "float-compact", "float", 16,
c7e628df 1469 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1470 },
1471/* fmac fr0, $frm, $frn */
1472 {
1473 SH_INSN_FMAC_COMPACT, "fmac-compact", "fmac", 16,
c7e628df 1474 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47 1475 },
c7e628df 1476/* fmov $fmovm, $fmovn */
cbb38b47
BE		 1477 {
1478 SH_INSN_FMOV1_COMPACT, "fmov1-compact", "fmov", 16,
c7e628df 1479 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1480 },
c7e628df 1481/* fmov @$rm, $fmovn */
cbb38b47
BE		 1482 {
1483 SH_INSN_FMOV2_COMPACT, "fmov2-compact", "fmov", 16,
c7e628df 1484 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1485 },
c7e628df 1486/* fmov @${rm}+, fmovn */
cbb38b47
BE		 1487 {
1488 SH_INSN_FMOV3_COMPACT, "fmov3-compact", "fmov", 16,
c7e628df 1489 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1490 },
c7e628df 1491/* fmov @(r0, $rm), $fmovn */
cbb38b47
BE		 1492 {
1493 SH_INSN_FMOV4_COMPACT, "fmov4-compact", "fmov", 16,
c7e628df 1494 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1495 },
c7e628df 1496/* fmov $fmovm, @$rn */
cbb38b47
BE		 1497 {
1498 SH_INSN_FMOV5_COMPACT, "fmov5-compact", "fmov", 16,
c7e628df 1499 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1500 },
c7e628df 1501/* fmov $fmovm, @-$rn */
cbb38b47
BE		 1502 {
1503 SH_INSN_FMOV6_COMPACT, "fmov6-compact", "fmov", 16,
c7e628df 1504 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1505 },
c7e628df 1506/* fmov $fmovm, @(r0, $rn) */
cbb38b47
BE		 1507 {
1508 SH_INSN_FMOV7_COMPACT, "fmov7-compact", "fmov", 16,
c7e628df
DB		 1509 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1510 },
1511/* fmov.d @($imm12x8, $rm), $drn */
1512 {
1513 SH_INSN_FMOV8_COMPACT, "fmov8-compact", "fmov.d", 32,
1514 { 0|A(32_BIT_INSN), { { { (1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
1515 },
1516/* mov.l $drm, @($imm12x8, $rn) */
1517 {
1518 SH_INSN_FMOV9_COMPACT, "fmov9-compact", "mov.l", 32,
1519 { 0|A(32_BIT_INSN), { { { (1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1520 },
1521/* fmul $fsdm, $fsdn */
1522 {
1523 SH_INSN_FMUL_COMPACT, "fmul-compact", "fmul", 16,
c7e628df 1524 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1525 },
1526/* fneg $fsdn */
1527 {
1528 SH_INSN_FNEG_COMPACT, "fneg-compact", "fneg", 16,
c7e628df 1529 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1530 },
1531/* frchg */
1532 {
1533 SH_INSN_FRCHG_COMPACT, "frchg-compact", "frchg", 16,
c7e628df 1534 { 0|A(FP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1535 },
1536/* fschg */
1537 {
1538 SH_INSN_FSCHG_COMPACT, "fschg-compact", "fschg", 16,
c7e628df 1539 { 0|A(FP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1540 },
1541/* fsqrt $fsdn */
1542 {
1543 SH_INSN_FSQRT_COMPACT, "fsqrt-compact", "fsqrt", 16,
c7e628df 1544 { 0|A(FP_INSN), { { { (1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1545 },
1546/* fsts fpul, $frn */
1547 {
1548 SH_INSN_FSTS_COMPACT, "fsts-compact", "fsts", 16,
c7e628df 1549 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1550 },
1551/* fsub $fsdm, $fsdn */
1552 {
1553 SH_INSN_FSUB_COMPACT, "fsub-compact", "fsub", 16,
c7e628df 1554 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1555 },
1556/* ftrc $fsdn, fpul */
1557 {
1558 SH_INSN_FTRC_COMPACT, "ftrc-compact", "ftrc", 16,
c7e628df 1559 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1560 },
1561/* ftrv xmtrx, $fvn */
1562 {
1563 SH_INSN_FTRV_COMPACT, "ftrv-compact", "ftrv", 16,
c7e628df 1564 { 0|A(FP_INSN), { { { (1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1565 },
1566/* jmp @$rn */
1567 {
1568 SH_INSN_JMP_COMPACT, "jmp-compact", "jmp", 16,
c7e628df 1569 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1570 },
1571/* jsr @$rn */
1572 {
1573 SH_INSN_JSR_COMPACT, "jsr-compact", "jsr", 16,
c7e628df 1574 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1575 },
1576/* ldc $rn, gbr */
1577 {
c7e628df
DB		 1578 SH_INSN_LDC_GBR_COMPACT, "ldc-gbr-compact", "ldc", 16,
1579 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1580 },
1581/* ldc $rn, vbr */
1582 {
1583 SH_INSN_LDC_VBR_COMPACT, "ldc-vbr-compact", "ldc", 16,
1584 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1585 },
1586/* ldc $rn, sr */
1587 {
1588 SH_INSN_LDC_SR_COMPACT, "ldc-sr-compact", "ldc", 16,
1589 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1590 },
1591/* ldc.l @${rn}+, gbr */
1592 {
c7e628df
DB		 1593 SH_INSN_LDCL_GBR_COMPACT, "ldcl-gbr-compact", "ldc.l", 16,
1594 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1595 },
1596/* ldc.l @${rn}+, vbr */
1597 {
1598 SH_INSN_LDCL_VBR_COMPACT, "ldcl-vbr-compact", "ldc.l", 16,
1599 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1600 },
1601/* lds $rn, fpscr */
1602 {
1603 SH_INSN_LDS_FPSCR_COMPACT, "lds-fpscr-compact", "lds", 16,
c7e628df 1604 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1605 },
1606/* lds.l @${rn}+, fpscr */
1607 {
1608 SH_INSN_LDSL_FPSCR_COMPACT, "ldsl-fpscr-compact", "lds.l", 16,
c7e628df 1609 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1610 },
1611/* lds $rn, fpul */
1612 {
1613 SH_INSN_LDS_FPUL_COMPACT, "lds-fpul-compact", "lds", 16,
c7e628df 1614 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1615 },
1616/* lds.l @${rn}+, fpul */
1617 {
1618 SH_INSN_LDSL_FPUL_COMPACT, "ldsl-fpul-compact", "lds.l", 16,
c7e628df 1619 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1620 },
1621/* lds $rn, mach */
1622 {
1623 SH_INSN_LDS_MACH_COMPACT, "lds-mach-compact", "lds", 16,
c7e628df 1624 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1625 },
1626/* lds.l @${rn}+, mach */
1627 {
1628 SH_INSN_LDSL_MACH_COMPACT, "ldsl-mach-compact", "lds.l", 16,
c7e628df 1629 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1630 },
1631/* lds $rn, macl */
1632 {
1633 SH_INSN_LDS_MACL_COMPACT, "lds-macl-compact", "lds", 16,
c7e628df 1634 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1635 },
1636/* lds.l @${rn}+, macl */
1637 {
1638 SH_INSN_LDSL_MACL_COMPACT, "ldsl-macl-compact", "lds.l", 16,
c7e628df 1639 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1640 },
1641/* lds $rn, pr */
1642 {
1643 SH_INSN_LDS_PR_COMPACT, "lds-pr-compact", "lds", 16,
c7e628df 1644 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1645 },
1646/* lds.l @${rn}+, pr */
1647 {
1648 SH_INSN_LDSL_PR_COMPACT, "ldsl-pr-compact", "lds.l", 16,
c7e628df 1649 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1650 },
1651/* mac.l @${rm}+, @${rn}+ */
1652 {
1653 SH_INSN_MACL_COMPACT, "macl-compact", "mac.l", 16,
c7e628df 1654 { 0, { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1655 },
1656/* mac.w @${rm}+, @${rn}+ */
1657 {
1658 SH_INSN_MACW_COMPACT, "macw-compact", "mac.w", 16,
c7e628df 1659 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1660 },
1661/* mov $rm64, $rn64 */
1662 {
1663 SH_INSN_MOV_COMPACT, "mov-compact", "mov", 16,
c7e628df 1664 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_MT, 0 } } } }
cbb38b47
BE		 1665 },
1666/* mov #$imm8, $rn */
1667 {
1668 SH_INSN_MOVI_COMPACT, "movi-compact", "mov", 16,
c7e628df
DB		 1669 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_MT, 0 } } } }
1670 },
1671/* movi20 #$imm20, $rn */
1672 {
1673 SH_INSN_MOVI20_COMPACT, "movi20-compact", "movi20", 32,
1674 { 0|A(32_BIT_INSN), { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1675 },
1676/* mov.b $rm, @$rn */
1677 {
1678 SH_INSN_MOVB1_COMPACT, "movb1-compact", "mov.b", 16,
c7e628df 1679 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1680 },
1681/* mov.b $rm, @-$rn */
1682 {
1683 SH_INSN_MOVB2_COMPACT, "movb2-compact", "mov.b", 16,
c7e628df 1684 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1685 },
1686/* mov.b $rm, @(r0,$rn) */
1687 {
1688 SH_INSN_MOVB3_COMPACT, "movb3-compact", "mov.b", 16,
c7e628df 1689 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1690 },
1691/* mov.b r0, @($imm8, gbr) */
1692 {
1693 SH_INSN_MOVB4_COMPACT, "movb4-compact", "mov.b", 16,
c7e628df 1694 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1695 },
1696/* mov.b r0, @($imm4, $rm) */
1697 {
1698 SH_INSN_MOVB5_COMPACT, "movb5-compact", "mov.b", 16,
c7e628df 1699 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1700 },
1701/* mov.b @$rm, $rn */
1702 {
1703 SH_INSN_MOVB6_COMPACT, "movb6-compact", "mov.b", 16,
c7e628df 1704 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1705 },
1706/* mov.b @${rm}+, $rn */
1707 {
1708 SH_INSN_MOVB7_COMPACT, "movb7-compact", "mov.b", 16,
c7e628df 1709 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1710 },
1711/* mov.b @(r0, $rm), $rn */
1712 {
1713 SH_INSN_MOVB8_COMPACT, "movb8-compact", "mov.b", 16,
c7e628df 1714 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1715 },
1716/* mov.b @($imm8, gbr), r0 */
1717 {
1718 SH_INSN_MOVB9_COMPACT, "movb9-compact", "mov.b", 16,
c7e628df 1719 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1720 },
1721/* mov.b @($imm4, $rm), r0 */
1722 {
1723 SH_INSN_MOVB10_COMPACT, "movb10-compact", "mov.b", 16,
c7e628df 1724 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1725 },
1726/* mov.l $rm, @$rn */
1727 {
1728 SH_INSN_MOVL1_COMPACT, "movl1-compact", "mov.l", 16,
c7e628df 1729 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1730 },
1731/* mov.l $rm, @-$rn */
1732 {
1733 SH_INSN_MOVL2_COMPACT, "movl2-compact", "mov.l", 16,
c7e628df 1734 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1735 },
1736/* mov.l $rm, @(r0, $rn) */
1737 {
1738 SH_INSN_MOVL3_COMPACT, "movl3-compact", "mov.l", 16,
c7e628df 1739 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1740 },
1741/* mov.l r0, @($imm8x4, gbr) */
1742 {
1743 SH_INSN_MOVL4_COMPACT, "movl4-compact", "mov.l", 16,
c7e628df 1744 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1745 },
1746/* mov.l $rm, @($imm4x4, $rn) */
1747 {
1748 SH_INSN_MOVL5_COMPACT, "movl5-compact", "mov.l", 16,
c7e628df 1749 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1750 },
1751/* mov.l @$rm, $rn */
1752 {
1753 SH_INSN_MOVL6_COMPACT, "movl6-compact", "mov.l", 16,
c7e628df 1754 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1755 },
1756/* mov.l @${rm}+, $rn */
1757 {
1758 SH_INSN_MOVL7_COMPACT, "movl7-compact", "mov.l", 16,
c7e628df 1759 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1760 },
1761/* mov.l @(r0, $rm), $rn */
1762 {
1763 SH_INSN_MOVL8_COMPACT, "movl8-compact", "mov.l", 16,
c7e628df 1764 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1765 },
1766/* mov.l @($imm8x4, gbr), r0 */
1767 {
1768 SH_INSN_MOVL9_COMPACT, "movl9-compact", "mov.l", 16,
c7e628df 1769 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1770 },
1771/* mov.l @($imm8x4, pc), $rn */
1772 {
1773 SH_INSN_MOVL10_COMPACT, "movl10-compact", "mov.l", 16,
c7e628df 1774 { 0|A(ILLSLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1775 },
1776/* mov.l @($imm4x4, $rm), $rn */
1777 {
1778 SH_INSN_MOVL11_COMPACT, "movl11-compact", "mov.l", 16,
c7e628df
DB		 1779 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1780 },
1781/* mov.l @($imm12x4, $rm), $rn */
1782 {
1783 SH_INSN_MOVL12_COMPACT, "movl12-compact", "mov.l", 32,
1784 { 0|A(32_BIT_INSN), { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
1785 },
1786/* mov.l $rm, @($imm12x4, $rn) */
1787 {
1788 SH_INSN_MOVL13_COMPACT, "movl13-compact", "mov.l", 32,
1789 { 0|A(32_BIT_INSN), { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1790 },
1791/* mov.w $rm, @$rn */
1792 {
1793 SH_INSN_MOVW1_COMPACT, "movw1-compact", "mov.w", 16,
c7e628df 1794 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1795 },
1796/* mov.w $rm, @-$rn */
1797 {
1798 SH_INSN_MOVW2_COMPACT, "movw2-compact", "mov.w", 16,
c7e628df 1799 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1800 },
1801/* mov.w $rm, @(r0, $rn) */
1802 {
1803 SH_INSN_MOVW3_COMPACT, "movw3-compact", "mov.w", 16,
c7e628df 1804 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1805 },
1806/* mov.w r0, @($imm8x2, gbr) */
1807 {
1808 SH_INSN_MOVW4_COMPACT, "movw4-compact", "mov.w", 16,
c7e628df 1809 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1810 },
c7e628df 1811/* mov.w r0, @($imm4x2, $rm) */
cbb38b47
BE		 1812 {
1813 SH_INSN_MOVW5_COMPACT, "movw5-compact", "mov.w", 16,
c7e628df 1814 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1815 },
1816/* mov.w @$rm, $rn */
1817 {
1818 SH_INSN_MOVW6_COMPACT, "movw6-compact", "mov.w", 16,
c7e628df 1819 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1820 },
1821/* mov.w @${rm}+, $rn */
1822 {
1823 SH_INSN_MOVW7_COMPACT, "movw7-compact", "mov.w", 16,
c7e628df 1824 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1825 },
1826/* mov.w @(r0, $rm), $rn */
1827 {
1828 SH_INSN_MOVW8_COMPACT, "movw8-compact", "mov.w", 16,
c7e628df 1829 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1830 },
1831/* mov.w @($imm8x2, gbr), r0 */
1832 {
1833 SH_INSN_MOVW9_COMPACT, "movw9-compact", "mov.w", 16,
c7e628df 1834 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1835 },
1836/* mov.w @($imm8x2, pc), $rn */
1837 {
1838 SH_INSN_MOVW10_COMPACT, "movw10-compact", "mov.w", 16,
c7e628df 1839 { 0|A(ILLSLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1840 },
1841/* mov.w @($imm4x2, $rm), r0 */
1842 {
1843 SH_INSN_MOVW11_COMPACT, "movw11-compact", "mov.w", 16,
c7e628df 1844 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1845 },
1846/* mova @($imm8x4, pc), r0 */
1847 {
1848 SH_INSN_MOVA_COMPACT, "mova-compact", "mova", 16,
c7e628df 1849 { 0|A(ILLSLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1850 },
1851/* movca.l r0, @$rn */
1852 {
1853 SH_INSN_MOVCAL_COMPACT, "movcal-compact", "movca.l", 16,
c7e628df
DB		 1854 { 0, { { { (1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1855 },
1856/* movco.l r0, @$rn */
1857 {
1858 SH_INSN_MOVCOL_COMPACT, "movcol-compact", "movco.l", 16,
1859 { 0, { { { (1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1860 },
1861/* movt $rn */
1862 {
1863 SH_INSN_MOVT_COMPACT, "movt-compact", "movt", 16,
c7e628df
DB		 1864 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
1865 },
1866/* movua.l @$rn, r0 */
1867 {
1868 SH_INSN_MOVUAL_COMPACT, "movual-compact", "movua.l", 16,
1869 { 0, { { { (1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1870 },
1871/* movua.l @$rn+, r0 */
1872 {
1873 SH_INSN_MOVUAL2_COMPACT, "movual2-compact", "movua.l", 16,
1874 { 0, { { { (1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1875 },
1876/* mul.l $rm, $rn */
1877 {
1878 SH_INSN_MULL_COMPACT, "mull-compact", "mul.l", 16,
c7e628df 1879 { 0, { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1880 },
1881/* muls.w $rm, $rn */
1882 {
1883 SH_INSN_MULSW_COMPACT, "mulsw-compact", "muls.w", 16,
c7e628df 1884 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1885 },
1886/* mulu.w $rm, $rn */
1887 {
1888 SH_INSN_MULUW_COMPACT, "muluw-compact", "mulu.w", 16,
c7e628df 1889 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1890 },
1891/* neg $rm, $rn */
1892 {
1893 SH_INSN_NEG_COMPACT, "neg-compact", "neg", 16,
c7e628df 1894 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1895 },
1896/* negc $rm, $rn */
1897 {
1898 SH_INSN_NEGC_COMPACT, "negc-compact", "negc", 16,
c7e628df 1899 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1900 },
1901/* nop */
1902 {
1903 SH_INSN_NOP_COMPACT, "nop-compact", "nop", 16,
c7e628df 1904 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_MT, 0 } } } }
cbb38b47
BE		 1905 },
1906/* not $rm64, $rn64 */
1907 {
1908 SH_INSN_NOT_COMPACT, "not-compact", "not", 16,
c7e628df 1909 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1910 },
1911/* ocbi @$rn */
1912 {
1913 SH_INSN_OCBI_COMPACT, "ocbi-compact", "ocbi", 16,
c7e628df 1914 { 0, { { { (1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1915 },
1916/* ocbp @$rn */
1917 {
1918 SH_INSN_OCBP_COMPACT, "ocbp-compact", "ocbp", 16,
c7e628df 1919 { 0, { { { (1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1920 },
1921/* ocbwb @$rn */
1922 {
1923 SH_INSN_OCBWB_COMPACT, "ocbwb-compact", "ocbwb", 16,
c7e628df 1924 { 0, { { { (1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1925 },
1926/* or $rm64, $rn64 */
1927 {
1928 SH_INSN_OR_COMPACT, "or-compact", "or", 16,
c7e628df 1929 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1930 },
1931/* or #$uimm8, r0 */
1932 {
1933 SH_INSN_ORI_COMPACT, "ori-compact", "or", 16,
c7e628df 1934 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1935 },
1936/* or.b #$imm8, @(r0, gbr) */
1937 {
1938 SH_INSN_ORB_COMPACT, "orb-compact", "or.b", 16,
c7e628df 1939 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1940 },
1941/* pref @$rn */
1942 {
1943 SH_INSN_PREF_COMPACT, "pref-compact", "pref", 16,
c7e628df 1944 { 0, { { { (1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1945 },
1946/* rotcl $rn */
1947 {
1948 SH_INSN_ROTCL_COMPACT, "rotcl-compact", "rotcl", 16,
c7e628df 1949 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1950 },
1951/* rotcr $rn */
1952 {
1953 SH_INSN_ROTCR_COMPACT, "rotcr-compact", "rotcr", 16,
c7e628df 1954 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1955 },
1956/* rotl $rn */
1957 {
1958 SH_INSN_ROTL_COMPACT, "rotl-compact", "rotl", 16,
c7e628df 1959 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1960 },
1961/* rotr $rn */
1962 {
1963 SH_INSN_ROTR_COMPACT, "rotr-compact", "rotr", 16,
c7e628df 1964 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1965 },
1966/* rts */
1967 {
1968 SH_INSN_RTS_COMPACT, "rts-compact", "rts", 16,
c7e628df 1969 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1970 },
1971/* sets */
1972 {
1973 SH_INSN_SETS_COMPACT, "sets-compact", "sets", 16,
c7e628df 1974 { 0, { { { (1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1975 },
1976/* sett */
1977 {
1978 SH_INSN_SETT_COMPACT, "sett-compact", "sett", 16,
c7e628df 1979 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1980 },
1981/* shad $rm, $rn */
1982 {
1983 SH_INSN_SHAD_COMPACT, "shad-compact", "shad", 16,
c7e628df 1984 { 0, { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1985 },
1986/* shal $rn */
1987 {
1988 SH_INSN_SHAL_COMPACT, "shal-compact", "shal", 16,
c7e628df 1989 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1990 },
1991/* shar $rn */
1992 {
1993 SH_INSN_SHAR_COMPACT, "shar-compact", "shar", 16,
c7e628df 1994 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1995 },
1996/* shld $rm, $rn */
1997 {
1998 SH_INSN_SHLD_COMPACT, "shld-compact", "shld", 16,
c7e628df 1999 { 0, { { { (1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2000 },
2001/* shll $rn */
2002 {
2003 SH_INSN_SHLL_COMPACT, "shll-compact", "shll", 16,
c7e628df 2004 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2005 },
2006/* shll2 $rn */
2007 {
2008 SH_INSN_SHLL2_COMPACT, "shll2-compact", "shll2", 16,
c7e628df 2009 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2010 },
2011/* shll8 $rn */
2012 {
2013 SH_INSN_SHLL8_COMPACT, "shll8-compact", "shll8", 16,
c7e628df 2014 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2015 },
2016/* shll16 $rn */
2017 {
2018 SH_INSN_SHLL16_COMPACT, "shll16-compact", "shll16", 16,
c7e628df 2019 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2020 },
2021/* shlr $rn */
2022 {
2023 SH_INSN_SHLR_COMPACT, "shlr-compact", "shlr", 16,
c7e628df 2024 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2025 },
2026/* shlr2 $rn */
2027 {
2028 SH_INSN_SHLR2_COMPACT, "shlr2-compact", "shlr2", 16,
c7e628df 2029 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2030 },
2031/* shlr8 $rn */
2032 {
2033 SH_INSN_SHLR8_COMPACT, "shlr8-compact", "shlr8", 16,
c7e628df 2034 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2035 },
2036/* shlr16 $rn */
2037 {
2038 SH_INSN_SHLR16_COMPACT, "shlr16-compact", "shlr16", 16,
c7e628df 2039 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2040 },
2041/* stc gbr, $rn */
2042 {
2043 SH_INSN_STC_GBR_COMPACT, "stc-gbr-compact", "stc", 16,
c7e628df
DB		 2044 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
2045 },
2046/* stc vbr, $rn */
2047 {
2048 SH_INSN_STC_VBR_COMPACT, "stc-vbr-compact", "stc", 16,
2049 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2050 },
2051/* stc.l gbr, @-$rn */
2052 {
2053 SH_INSN_STCL_GBR_COMPACT, "stcl-gbr-compact", "stc.l", 16,
c7e628df
DB		 2054 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
2055 },
2056/* stc.l vbr, @-$rn */
2057 {
2058 SH_INSN_STCL_VBR_COMPACT, "stcl-vbr-compact", "stc.l", 16,
2059 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2060 },
2061/* sts fpscr, $rn */
2062 {
2063 SH_INSN_STS_FPSCR_COMPACT, "sts-fpscr-compact", "sts", 16,
c7e628df 2064 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2065 },
2066/* sts.l fpscr, @-$rn */
2067 {
2068 SH_INSN_STSL_FPSCR_COMPACT, "stsl-fpscr-compact", "sts.l", 16,
c7e628df 2069 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2070 },
2071/* sts fpul, $rn */
2072 {
2073 SH_INSN_STS_FPUL_COMPACT, "sts-fpul-compact", "sts", 16,
c7e628df 2074 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2075 },
2076/* sts.l fpul, @-$rn */
2077 {
2078 SH_INSN_STSL_FPUL_COMPACT, "stsl-fpul-compact", "sts.l", 16,
c7e628df 2079 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2080 },
2081/* sts mach, $rn */
2082 {
2083 SH_INSN_STS_MACH_COMPACT, "sts-mach-compact", "sts", 16,
c7e628df 2084 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2085 },
2086/* sts.l mach, @-$rn */
2087 {
2088 SH_INSN_STSL_MACH_COMPACT, "stsl-mach-compact", "sts.l", 16,
c7e628df 2089 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2090 },
2091/* sts macl, $rn */
2092 {
2093 SH_INSN_STS_MACL_COMPACT, "sts-macl-compact", "sts", 16,
c7e628df 2094 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2095 },
2096/* sts.l macl, @-$rn */
2097 {
2098 SH_INSN_STSL_MACL_COMPACT, "stsl-macl-compact", "sts.l", 16,
c7e628df 2099 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2100 },
2101/* sts pr, $rn */
2102 {
2103 SH_INSN_STS_PR_COMPACT, "sts-pr-compact", "sts", 16,
c7e628df 2104 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2105 },
2106/* sts.l pr, @-$rn */
2107 {
2108 SH_INSN_STSL_PR_COMPACT, "stsl-pr-compact", "sts.l", 16,
c7e628df 2109 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2110 },
2111/* sub $rm, $rn */
2112 {
2113 SH_INSN_SUB_COMPACT, "sub-compact", "sub", 16,
c7e628df 2114 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2115 },
2116/* subc $rm, $rn */
2117 {
2118 SH_INSN_SUBC_COMPACT, "subc-compact", "subc", 16,
c7e628df 2119 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2120 },
2121/* subv $rm, $rn */
2122 {
2123 SH_INSN_SUBV_COMPACT, "subv-compact", "subv", 16,
c7e628df 2124 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2125 },
2126/* swap.b $rm, $rn */
2127 {
2128 SH_INSN_SWAPB_COMPACT, "swapb-compact", "swap.b", 16,
c7e628df 2129 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2130 },
2131/* swap.w $rm, $rn */
2132 {
2133 SH_INSN_SWAPW_COMPACT, "swapw-compact", "swap.w", 16,
c7e628df 2134 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2135 },
2136/* tas.b @$rn */
2137 {
2138 SH_INSN_TASB_COMPACT, "tasb-compact", "tas.b", 16,
c7e628df 2139 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 2140 },
2141/* trapa #$uimm8 */
2142 {
2143 SH_INSN_TRAPA_COMPACT, "trapa-compact", "trapa", 16,
c7e628df 2144 { 0|A(ILLSLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 2145 },
2146/* tst $rm, $rn */
2147 {
2148 SH_INSN_TST_COMPACT, "tst-compact", "tst", 16,
c7e628df 2149 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2150 },
2151/* tst #$uimm8, r0 */
2152 {
2153 SH_INSN_TSTI_COMPACT, "tsti-compact", "tst", 16,
c7e628df 2154 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2155 },
2156/* tst.b #$imm8, @(r0, gbr) */
2157 {
2158 SH_INSN_TSTB_COMPACT, "tstb-compact", "tst.b", 16,
c7e628df 2159 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 2160 },
2161/* xor $rm64, $rn64 */
2162 {
2163 SH_INSN_XOR_COMPACT, "xor-compact", "xor", 16,
c7e628df 2164 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2165 },
2166/* xor #$uimm8, r0 */
2167 {
2168 SH_INSN_XORI_COMPACT, "xori-compact", "xor", 16,
c7e628df 2169 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2170 },
2171/* xor.b #$imm8, @(r0, gbr) */
2172 {
2173 SH_INSN_XORB_COMPACT, "xorb-compact", "xor.b", 16,
c7e628df 2174 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 2175 },
2176/* xtrct $rm, $rn */
2177 {
2178 SH_INSN_XTRCT_COMPACT, "xtrct-compact", "xtrct", 16,
c7e628df 2179 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2180 },
2181/* add $rm, $rn, $rd */
2182 {
2183 SH_INSN_ADD, "add", "add", 32,
c7e628df 2184 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2185 },
2186/* add.l $rm, $rn, $rd */
2187 {
2188 SH_INSN_ADDL, "addl", "add.l", 32,
c7e628df 2189 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2190 },
2191/* addi $rm, $disp10, $rd */
2192 {
2193 SH_INSN_ADDI, "addi", "addi", 32,
c7e628df 2194 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2195 },
2196/* addi.l $rm, $disp10, $rd */
2197 {
2198 SH_INSN_ADDIL, "addil", "addi.l", 32,
c7e628df 2199 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2200 },
2201/* addz.l $rm, $rn, $rd */
2202 {
2203 SH_INSN_ADDZL, "addzl", "addz.l", 32,
c7e628df 2204 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2205 },
2206/* alloco $rm, $disp6x32 */
2207 {
2208 SH_INSN_ALLOCO, "alloco", "alloco", 32,
c7e628df 2209 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2210 },
2211/* and $rm, $rn, $rd */
2212 {
2213 SH_INSN_AND, "and", "and", 32,
c7e628df 2214 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2215 },
2216/* andc $rm, $rn, $rd */
2217 {
2218 SH_INSN_ANDC, "andc", "andc", 32,
c7e628df 2219 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2220 },
2221/* andi $rm, $disp10, $rd */
2222 {
2223 SH_INSN_ANDI, "andi", "andi", 32,
c7e628df 2224 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2225 },
2226/* beq$likely $rm, $rn, $tra */
2227 {
2228 SH_INSN_BEQ, "beq", "beq", 32,
c7e628df 2229 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2230 },
2231/* beqi$likely $rm, $imm6, $tra */
2232 {
2233 SH_INSN_BEQI, "beqi", "beqi", 32,
c7e628df 2234 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2235 },
2236/* bge$likely $rm, $rn, $tra */
2237 {
2238 SH_INSN_BGE, "bge", "bge", 32,
c7e628df 2239 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2240 },
2241/* bgeu$likely $rm, $rn, $tra */
2242 {
2243 SH_INSN_BGEU, "bgeu", "bgeu", 32,
c7e628df 2244 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2245 },
2246/* bgt$likely $rm, $rn, $tra */
2247 {
2248 SH_INSN_BGT, "bgt", "bgt", 32,
c7e628df 2249 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2250 },
2251/* bgtu$likely $rm, $rn, $tra */
2252 {
2253 SH_INSN_BGTU, "bgtu", "bgtu", 32,
c7e628df 2254 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2255 },
2256/* blink $trb, $rd */
2257 {
2258 SH_INSN_BLINK, "blink", "blink", 32,
c7e628df 2259 { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2260 },
2261/* bne$likely $rm, $rn, $tra */
2262 {
2263 SH_INSN_BNE, "bne", "bne", 32,
c7e628df 2264 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2265 },
2266/* bnei$likely $rm, $imm6, $tra */
2267 {
2268 SH_INSN_BNEI, "bnei", "bnei", 32,
c7e628df 2269 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2270 },
2271/* brk */
2272 {
2273 SH_INSN_BRK, "brk", "brk", 32,
c7e628df 2274 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2275 },
2276/* byterev $rm, $rd */
2277 {
2278 SH_INSN_BYTEREV, "byterev", "byterev", 32,
c7e628df 2279 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2280 },
2281/* cmpeq $rm, $rn, $rd */
2282 {
2283 SH_INSN_CMPEQ, "cmpeq", "cmpeq", 32,
c7e628df 2284 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2285 },
2286/* cmpgt $rm, $rn, $rd */
2287 {
2288 SH_INSN_CMPGT, "cmpgt", "cmpgt", 32,
c7e628df 2289 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2290 },
2291/* cmpgtu $rm,$rn, $rd */
2292 {
2293 SH_INSN_CMPGTU, "cmpgtu", "cmpgtu", 32,
c7e628df 2294 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2295 },
2296/* cmveq $rm, $rn, $rd */
2297 {
2298 SH_INSN_CMVEQ, "cmveq", "cmveq", 32,
c7e628df 2299 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2300 },
2301/* cmvne $rm, $rn, $rd */
2302 {
2303 SH_INSN_CMVNE, "cmvne", "cmvne", 32,
c7e628df 2304 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2305 },
2306/* fabs.d $drgh, $drf */
2307 {
2308 SH_INSN_FABSD, "fabsd", "fabs.d", 32,
c7e628df 2309 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2310 },
2311/* fabs.s $frgh, $frf */
2312 {
2313 SH_INSN_FABSS, "fabss", "fabs.s", 32,
c7e628df 2314 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2315 },
2316/* fadd.d $drg, $drh, $drf */
2317 {
2318 SH_INSN_FADDD, "faddd", "fadd.d", 32,
c7e628df 2319 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2320 },
2321/* fadd.s $frg, $frh, $frf */
2322 {
2323 SH_INSN_FADDS, "fadds", "fadd.s", 32,
c7e628df 2324 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2325 },
2326/* fcmpeq.d $drg, $drh, $rd */
2327 {
2328 SH_INSN_FCMPEQD, "fcmpeqd", "fcmpeq.d", 32,
c7e628df 2329 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2330 },
2331/* fcmpeq.s $frg, $frh, $rd */
2332 {
2333 SH_INSN_FCMPEQS, "fcmpeqs", "fcmpeq.s", 32,
c7e628df 2334 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2335 },
2336/* fcmpge.d $drg, $drh, $rd */
2337 {
2338 SH_INSN_FCMPGED, "fcmpged", "fcmpge.d", 32,
c7e628df 2339 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2340 },
2341/* fcmpge.s $frg, $frh, $rd */
2342 {
2343 SH_INSN_FCMPGES, "fcmpges", "fcmpge.s", 32,
c7e628df 2344 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2345 },
2346/* fcmpgt.d $drg, $drh, $rd */
2347 {
2348 SH_INSN_FCMPGTD, "fcmpgtd", "fcmpgt.d", 32,
c7e628df 2349 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2350 },
2351/* fcmpgt.s $frg, $frh, $rd */
2352 {
2353 SH_INSN_FCMPGTS, "fcmpgts", "fcmpgt.s", 32,
c7e628df 2354 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2355 },
2356/* fcmpun.d $drg, $drh, $rd */
2357 {
2358 SH_INSN_FCMPUND, "fcmpund", "fcmpun.d", 32,
c7e628df 2359 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2360 },
2361/* fcmpun.s $frg, $frh, $rd */
2362 {
2363 SH_INSN_FCMPUNS, "fcmpuns", "fcmpun.s", 32,
c7e628df 2364 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2365 },
2366/* fcnv.ds $drgh, $frf */
2367 {
2368 SH_INSN_FCNVDS, "fcnvds", "fcnv.ds", 32,
c7e628df 2369 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2370 },
2371/* fcnv.sd $frgh, $drf */
2372 {
2373 SH_INSN_FCNVSD, "fcnvsd", "fcnv.sd", 32,
c7e628df 2374 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2375 },
2376/* fdiv.d $drg, $drh, $drf */
2377 {
2378 SH_INSN_FDIVD, "fdivd", "fdiv.d", 32,
c7e628df 2379 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2380 },
2381/* fdiv.s $frg, $frh, $frf */
2382 {
2383 SH_INSN_FDIVS, "fdivs", "fdiv.s", 32,
c7e628df 2384 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2385 },
2386/* fgetscr $frf */
2387 {
2388 SH_INSN_FGETSCR, "fgetscr", "fgetscr", 32,
c7e628df 2389 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2390 },
2391/* fipr.s $fvg, $fvh, $frf */
2392 {
2393 SH_INSN_FIPRS, "fiprs", "fipr.s", 32,
c7e628df 2394 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2395 },
2396/* fld.d $rm, $disp10x8, $drf */
2397 {
2398 SH_INSN_FLDD, "fldd", "fld.d", 32,
c7e628df 2399 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2400 },
2401/* fld.p $rm, $disp10x8, $fpf */
2402 {
2403 SH_INSN_FLDP, "fldp", "fld.p", 32,
c7e628df 2404 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2405 },
2406/* fld.s $rm, $disp10x4, $frf */
2407 {
2408 SH_INSN_FLDS, "flds", "fld.s", 32,
c7e628df 2409 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2410 },
2411/* fldx.d $rm, $rn, $drf */
2412 {
2413 SH_INSN_FLDXD, "fldxd", "fldx.d", 32,
c7e628df 2414 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2415 },
2416/* fldx.p $rm, $rn, $fpf */
2417 {
2418 SH_INSN_FLDXP, "fldxp", "fldx.p", 32,
c7e628df 2419 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2420 },
2421/* fldx.s $rm, $rn, $frf */
2422 {
2423 SH_INSN_FLDXS, "fldxs", "fldx.s", 32,
c7e628df 2424 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2425 },
2426/* float.ld $frgh, $drf */
2427 {
2428 SH_INSN_FLOATLD, "floatld", "float.ld", 32,
c7e628df 2429 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2430 },
2431/* float.ls $frgh, $frf */
2432 {
2433 SH_INSN_FLOATLS, "floatls", "float.ls", 32,
c7e628df 2434 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2435 },
2436/* float.qd $drgh, $drf */
2437 {
2438 SH_INSN_FLOATQD, "floatqd", "float.qd", 32,
c7e628df 2439 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2440 },
2441/* float.qs $drgh, $frf */
2442 {
2443 SH_INSN_FLOATQS, "floatqs", "float.qs", 32,
c7e628df 2444 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2445 },
2446/* fmac.s $frg, $frh, $frf */
2447 {
2448 SH_INSN_FMACS, "fmacs", "fmac.s", 32,
c7e628df 2449 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2450 },
2451/* fmov.d $drgh, $drf */
2452 {
2453 SH_INSN_FMOVD, "fmovd", "fmov.d", 32,
c7e628df 2454 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2455 },
2456/* fmov.dq $drgh, $rd */
2457 {
2458 SH_INSN_FMOVDQ, "fmovdq", "fmov.dq", 32,
c7e628df 2459 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2460 },
2461/* fmov.ls $rm, $frf */
2462 {
2463 SH_INSN_FMOVLS, "fmovls", "fmov.ls", 32,
c7e628df 2464 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2465 },
2466/* fmov.qd $rm, $drf */
2467 {
2468 SH_INSN_FMOVQD, "fmovqd", "fmov.qd", 32,
c7e628df 2469 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2470 },
2471/* fmov.s $frgh, $frf */
2472 {
2473 SH_INSN_FMOVS, "fmovs", "fmov.s", 32,
c7e628df 2474 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2475 },
2476/* fmov.sl $frgh, $rd */
2477 {
2478 SH_INSN_FMOVSL, "fmovsl", "fmov.sl", 32,
c7e628df 2479 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2480 },
2481/* fmul.d $drg, $drh, $drf */
2482 {
2483 SH_INSN_FMULD, "fmuld", "fmul.d", 32,
c7e628df 2484 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2485 },
2486/* fmul.s $frg, $frh, $frf */
2487 {
2488 SH_INSN_FMULS, "fmuls", "fmul.s", 32,
c7e628df 2489 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2490 },
2491/* fneg.d $drgh, $drf */
2492 {
2493 SH_INSN_FNEGD, "fnegd", "fneg.d", 32,
c7e628df 2494 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2495 },
2496/* fneg.s $frgh, $frf */
2497 {
2498 SH_INSN_FNEGS, "fnegs", "fneg.s", 32,
c7e628df 2499 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2500 },
2501/* fputscr $frgh */
2502 {
2503 SH_INSN_FPUTSCR, "fputscr", "fputscr", 32,
c7e628df 2504 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2505 },
2506/* fsqrt.d $drgh, $drf */
2507 {
2508 SH_INSN_FSQRTD, "fsqrtd", "fsqrt.d", 32,
c7e628df 2509 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2510 },
2511/* fsqrt.s $frgh, $frf */
2512 {
2513 SH_INSN_FSQRTS, "fsqrts", "fsqrt.s", 32,
c7e628df 2514 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2515 },
2516/* fst.d $rm, $disp10x8, $drf */
2517 {
2518 SH_INSN_FSTD, "fstd", "fst.d", 32,
c7e628df 2519 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2520 },
2521/* fst.p $rm, $disp10x8, $fpf */
2522 {
2523 SH_INSN_FSTP, "fstp", "fst.p", 32,
c7e628df 2524 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2525 },
2526/* fst.s $rm, $disp10x4, $frf */
2527 {
2528 SH_INSN_FSTS, "fsts", "fst.s", 32,
c7e628df 2529 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2530 },
2531/* fstx.d $rm, $rn, $drf */
2532 {
2533 SH_INSN_FSTXD, "fstxd", "fstx.d", 32,
c7e628df 2534 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2535 },
2536/* fstx.p $rm, $rn, $fpf */
2537 {
2538 SH_INSN_FSTXP, "fstxp", "fstx.p", 32,
c7e628df 2539 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2540 },
2541/* fstx.s $rm, $rn, $frf */
2542 {
2543 SH_INSN_FSTXS, "fstxs", "fstx.s", 32,
c7e628df 2544 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2545 },
2546/* fsub.d $drg, $drh, $drf */
2547 {
2548 SH_INSN_FSUBD, "fsubd", "fsub.d", 32,
c7e628df 2549 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2550 },
2551/* fsub.s $frg, $frh, $frf */
2552 {
2553 SH_INSN_FSUBS, "fsubs", "fsub.s", 32,
c7e628df 2554 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2555 },
2556/* ftrc.dl $drgh, $frf */
2557 {
2558 SH_INSN_FTRCDL, "ftrcdl", "ftrc.dl", 32,
c7e628df 2559 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2560 },
2561/* ftrc.sl $frgh, $frf */
2562 {
2563 SH_INSN_FTRCSL, "ftrcsl", "ftrc.sl", 32,
c7e628df 2564 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2565 },
2566/* ftrc.dq $drgh, $drf */
2567 {
2568 SH_INSN_FTRCDQ, "ftrcdq", "ftrc.dq", 32,
c7e628df 2569 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2570 },
2571/* ftrc.sq $frgh, $drf */
2572 {
2573 SH_INSN_FTRCSQ, "ftrcsq", "ftrc.sq", 32,
c7e628df 2574 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2575 },
2576/* ftrv.s $mtrxg, $fvh, $fvf */
2577 {
2578 SH_INSN_FTRVS, "ftrvs", "ftrv.s", 32,
c7e628df 2579 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2580 },
2581/* getcfg $rm, $disp6, $rd */
2582 {
2583 SH_INSN_GETCFG, "getcfg", "getcfg", 32,
c7e628df 2584 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2585 },
2586/* getcon $crk, $rd */
2587 {
2588 SH_INSN_GETCON, "getcon", "getcon", 32,
c7e628df 2589 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2590 },
2591/* gettr $trb, $rd */
2592 {
2593 SH_INSN_GETTR, "gettr", "gettr", 32,
c7e628df 2594 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2595 },
2596/* icbi $rm, $disp6x32 */
2597 {
2598 SH_INSN_ICBI, "icbi", "icbi", 32,
c7e628df 2599 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2600 },
2601/* ld.b $rm, $disp10, $rd */
2602 {
2603 SH_INSN_LDB, "ldb", "ld.b", 32,
c7e628df 2604 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2605 },
2606/* ld.l $rm, $disp10x4, $rd */
2607 {
2608 SH_INSN_LDL, "ldl", "ld.l", 32,
c7e628df 2609 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2610 },
2611/* ld.q $rm, $disp10x8, $rd */
2612 {
2613 SH_INSN_LDQ, "ldq", "ld.q", 32,
c7e628df 2614 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2615 },
2616/* ld.ub $rm, $disp10, $rd */
2617 {
2618 SH_INSN_LDUB, "ldub", "ld.ub", 32,
c7e628df 2619 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2620 },
2621/* ld.uw $rm, $disp10x2, $rd */
2622 {
2623 SH_INSN_LDUW, "lduw", "ld.uw", 32,
c7e628df 2624 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2625 },
2626/* ld.w $rm, $disp10x2, $rd */
2627 {
2628 SH_INSN_LDW, "ldw", "ld.w", 32,
c7e628df 2629 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2630 },
2631/* ldhi.l $rm, $disp6, $rd */
2632 {
2633 SH_INSN_LDHIL, "ldhil", "ldhi.l", 32,
c7e628df 2634 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2635 },
2636/* ldhi.q $rm, $disp6, $rd */
2637 {
2638 SH_INSN_LDHIQ, "ldhiq", "ldhi.q", 32,
c7e628df 2639 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2640 },
2641/* ldlo.l $rm, $disp6, $rd */
2642 {
2643 SH_INSN_LDLOL, "ldlol", "ldlo.l", 32,
c7e628df 2644 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2645 },
2646/* ldlo.q $rm, $disp6, $rd */
2647 {
2648 SH_INSN_LDLOQ, "ldloq", "ldlo.q", 32,
c7e628df 2649 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2650 },
2651/* ldx.b $rm, $rn, $rd */
2652 {
2653 SH_INSN_LDXB, "ldxb", "ldx.b", 32,
c7e628df 2654 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2655 },
2656/* ldx.l $rm, $rn, $rd */
2657 {
2658 SH_INSN_LDXL, "ldxl", "ldx.l", 32,
c7e628df 2659 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2660 },
2661/* ldx.q $rm, $rn, $rd */
2662 {
2663 SH_INSN_LDXQ, "ldxq", "ldx.q", 32,
c7e628df 2664 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2665 },
2666/* ldx.ub $rm, $rn, $rd */
2667 {
2668 SH_INSN_LDXUB, "ldxub", "ldx.ub", 32,
c7e628df 2669 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2670 },
2671/* ldx.uw $rm, $rn, $rd */
2672 {
2673 SH_INSN_LDXUW, "ldxuw", "ldx.uw", 32,
c7e628df 2674 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2675 },
2676/* ldx.w $rm, $rn, $rd */
2677 {
2678 SH_INSN_LDXW, "ldxw", "ldx.w", 32,
c7e628df 2679 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2680 },
2681/* mabs.l $rm, $rd */
2682 {
2683 SH_INSN_MABSL, "mabsl", "mabs.l", 32,
c7e628df 2684 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2685 },
2686/* mabs.w $rm, $rd */
2687 {
2688 SH_INSN_MABSW, "mabsw", "mabs.w", 32,
c7e628df 2689 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2690 },
2691/* madd.l $rm, $rn, $rd */
2692 {
2693 SH_INSN_MADDL, "maddl", "madd.l", 32,
c7e628df 2694 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2695 },
2696/* madd.w $rm, $rn, $rd */
2697 {
2698 SH_INSN_MADDW, "maddw", "madd.w", 32,
c7e628df 2699 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2700 },
2701/* madds.l $rm, $rn, $rd */
2702 {
2703 SH_INSN_MADDSL, "maddsl", "madds.l", 32,
c7e628df 2704 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2705 },
2706/* madds.ub $rm, $rn, $rd */
2707 {
2708 SH_INSN_MADDSUB, "maddsub", "madds.ub", 32,
c7e628df 2709 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2710 },
2711/* madds.w $rm, $rn, $rd */
2712 {
2713 SH_INSN_MADDSW, "maddsw", "madds.w", 32,
c7e628df 2714 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2715 },
2716/* mcmpeq.b $rm, $rn, $rd */
2717 {
2718 SH_INSN_MCMPEQB, "mcmpeqb", "mcmpeq.b", 32,
c7e628df 2719 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2720 },
2721/* mcmpeq.l $rm, $rn, $rd */
2722 {
2723 SH_INSN_MCMPEQL, "mcmpeql", "mcmpeq.l", 32,
c7e628df 2724 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2725 },
2726/* mcmpeq.w $rm, $rn, $rd */
2727 {
2728 SH_INSN_MCMPEQW, "mcmpeqw", "mcmpeq.w", 32,
c7e628df 2729 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2730 },
2731/* mcmpgt.l $rm, $rn, $rd */
2732 {
2733 SH_INSN_MCMPGTL, "mcmpgtl", "mcmpgt.l", 32,
c7e628df 2734 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2735 },
2736/* mcmpgt.ub $rm, $rn, $rd */
2737 {
2738 SH_INSN_MCMPGTUB, "mcmpgtub", "mcmpgt.ub", 32,
c7e628df 2739 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2740 },
2741/* mcmpgt.w $rm, $rn, $rd */
2742 {
2743 SH_INSN_MCMPGTW, "mcmpgtw", "mcmpgt.w", 32,
c7e628df 2744 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2745 },
2746/* mcmv $rm, $rn, $rd */
2747 {
2748 SH_INSN_MCMV, "mcmv", "mcmv", 32,
c7e628df 2749 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2750 },
2751/* mcnvs.lw $rm, $rn, $rd */
2752 {
2753 SH_INSN_MCNVSLW, "mcnvslw", "mcnvs.lw", 32,
c7e628df 2754 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2755 },
2756/* mcnvs.wb $rm, $rn, $rd */
2757 {
2758 SH_INSN_MCNVSWB, "mcnvswb", "mcnvs.wb", 32,
c7e628df 2759 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2760 },
2761/* mcnvs.wub $rm, $rn, $rd */
2762 {
2763 SH_INSN_MCNVSWUB, "mcnvswub", "mcnvs.wub", 32,
c7e628df 2764 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2765 },
2766/* mextr1 $rm, $rn, $rd */
2767 {
2768 SH_INSN_MEXTR1, "mextr1", "mextr1", 32,
c7e628df 2769 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2770 },
2771/* mextr2 $rm, $rn, $rd */
2772 {
2773 SH_INSN_MEXTR2, "mextr2", "mextr2", 32,
c7e628df 2774 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2775 },
2776/* mextr3 $rm, $rn, $rd */
2777 {
2778 SH_INSN_MEXTR3, "mextr3", "mextr3", 32,
c7e628df 2779 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2780 },
2781/* mextr4 $rm, $rn, $rd */
2782 {
2783 SH_INSN_MEXTR4, "mextr4", "mextr4", 32,
c7e628df 2784 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2785 },
2786/* mextr5 $rm, $rn, $rd */
2787 {
2788 SH_INSN_MEXTR5, "mextr5", "mextr5", 32,
c7e628df 2789 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2790 },
2791/* mextr6 $rm, $rn, $rd */
2792 {
2793 SH_INSN_MEXTR6, "mextr6", "mextr6", 32,
c7e628df 2794 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2795 },
2796/* mextr7 $rm, $rn, $rd */
2797 {
2798 SH_INSN_MEXTR7, "mextr7", "mextr7", 32,
c7e628df 2799 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2800 },
2801/* mmacfx.wl $rm, $rn, $rd */
2802 {
2803 SH_INSN_MMACFXWL, "mmacfxwl", "mmacfx.wl", 32,
c7e628df 2804 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2805 },
2806/* mmacnfx.wl $rm, $rn, $rd */
2807 {
2808 SH_INSN_MMACNFX_WL, "mmacnfx.wl", "mmacnfx.wl", 32,
c7e628df 2809 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2810 },
2811/* mmul.l $rm, $rn, $rd */
2812 {
2813 SH_INSN_MMULL, "mmull", "mmul.l", 32,
c7e628df 2814 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2815 },
2816/* mmul.w $rm, $rn, $rd */
2817 {
2818 SH_INSN_MMULW, "mmulw", "mmul.w", 32,
c7e628df 2819 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2820 },
2821/* mmulfx.l $rm, $rn, $rd */
2822 {
2823 SH_INSN_MMULFXL, "mmulfxl", "mmulfx.l", 32,
c7e628df 2824 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2825 },
2826/* mmulfx.w $rm, $rn, $rd */
2827 {
2828 SH_INSN_MMULFXW, "mmulfxw", "mmulfx.w", 32,
c7e628df 2829 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2830 },
2831/* mmulfxrp.w $rm, $rn, $rd */
2832 {
2833 SH_INSN_MMULFXRPW, "mmulfxrpw", "mmulfxrp.w", 32,
c7e628df 2834 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2835 },
2836/* mmulhi.wl $rm, $rn, $rd */
2837 {
2838 SH_INSN_MMULHIWL, "mmulhiwl", "mmulhi.wl", 32,
c7e628df 2839 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2840 },
2841/* mmullo.wl $rm, $rn, $rd */
2842 {
2843 SH_INSN_MMULLOWL, "mmullowl", "mmullo.wl", 32,
c7e628df 2844 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2845 },
2846/* mmulsum.wq $rm, $rn, $rd */
2847 {
2848 SH_INSN_MMULSUMWQ, "mmulsumwq", "mmulsum.wq", 32,
c7e628df 2849 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2850 },
2851/* movi $imm16, $rd */
2852 {
2853 SH_INSN_MOVI, "movi", "movi", 32,
c7e628df 2854 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2855 },
2856/* mperm.w $rm, $rn, $rd */
2857 {
2858 SH_INSN_MPERMW, "mpermw", "mperm.w", 32,
c7e628df 2859 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2860 },
2861/* msad.ubq $rm, $rn, $rd */
2862 {
2863 SH_INSN_MSADUBQ, "msadubq", "msad.ubq", 32,
c7e628df 2864 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2865 },
2866/* mshalds.l $rm, $rn, $rd */
2867 {
2868 SH_INSN_MSHALDSL, "mshaldsl", "mshalds.l", 32,
c7e628df 2869 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2870 },
2871/* mshalds.w $rm, $rn, $rd */
2872 {
2873 SH_INSN_MSHALDSW, "mshaldsw", "mshalds.w", 32,
c7e628df 2874 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2875 },
2876/* mshard.l $rm, $rn, $rd */
2877 {
2878 SH_INSN_MSHARDL, "mshardl", "mshard.l", 32,
c7e628df 2879 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2880 },
2881/* mshard.w $rm, $rn, $rd */
2882 {
2883 SH_INSN_MSHARDW, "mshardw", "mshard.w", 32,
c7e628df 2884 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2885 },
2886/* mshards.q $rm, $rn, $rd */
2887 {
2888 SH_INSN_MSHARDSQ, "mshardsq", "mshards.q", 32,
c7e628df 2889 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2890 },
2891/* mshfhi.b $rm, $rn, $rd */
2892 {
2893 SH_INSN_MSHFHIB, "mshfhib", "mshfhi.b", 32,
c7e628df 2894 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2895 },
2896/* mshfhi.l $rm, $rn, $rd */
2897 {
2898 SH_INSN_MSHFHIL, "mshfhil", "mshfhi.l", 32,
c7e628df 2899 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2900 },
2901/* mshfhi.w $rm, $rn, $rd */
2902 {
2903 SH_INSN_MSHFHIW, "mshfhiw", "mshfhi.w", 32,
c7e628df 2904 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2905 },
2906/* mshflo.b $rm, $rn, $rd */
2907 {
2908 SH_INSN_MSHFLOB, "mshflob", "mshflo.b", 32,
c7e628df 2909 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2910 },
2911/* mshflo.l $rm, $rn, $rd */
2912 {
2913 SH_INSN_MSHFLOL, "mshflol", "mshflo.l", 32,
c7e628df 2914 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2915 },
2916/* mshflo.w $rm, $rn, $rd */
2917 {
2918 SH_INSN_MSHFLOW, "mshflow", "mshflo.w", 32,
c7e628df 2919 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2920 },
2921/* mshlld.l $rm, $rn, $rd */
2922 {
2923 SH_INSN_MSHLLDL, "mshlldl", "mshlld.l", 32,
c7e628df 2924 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2925 },
2926/* mshlld.w $rm, $rn, $rd */
2927 {
2928 SH_INSN_MSHLLDW, "mshlldw", "mshlld.w", 32,
c7e628df 2929 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2930 },
2931/* mshlrd.l $rm, $rn, $rd */
2932 {
2933 SH_INSN_MSHLRDL, "mshlrdl", "mshlrd.l", 32,
c7e628df 2934 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2935 },
2936/* mshlrd.w $rm, $rn, $rd */
2937 {
2938 SH_INSN_MSHLRDW, "mshlrdw", "mshlrd.w", 32,
c7e628df 2939 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2940 },
2941/* msub.l $rm, $rn, $rd */
2942 {
2943 SH_INSN_MSUBL, "msubl", "msub.l", 32,
c7e628df 2944 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2945 },
2946/* msub.w $rm, $rn, $rd */
2947 {
2948 SH_INSN_MSUBW, "msubw", "msub.w", 32,
c7e628df 2949 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2950 },
2951/* msubs.l $rm, $rn, $rd */
2952 {
2953 SH_INSN_MSUBSL, "msubsl", "msubs.l", 32,
c7e628df 2954 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2955 },
2956/* msubs.ub $rm, $rn, $rd */
2957 {
2958 SH_INSN_MSUBSUB, "msubsub", "msubs.ub", 32,
c7e628df 2959 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2960 },
2961/* msubs.w $rm, $rn, $rd */
2962 {
2963 SH_INSN_MSUBSW, "msubsw", "msubs.w", 32,
c7e628df 2964 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2965 },
2966/* muls.l $rm, $rn, $rd */
2967 {
2968 SH_INSN_MULSL, "mulsl", "muls.l", 32,
c7e628df 2969 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2970 },
2971/* mulu.l $rm, $rn, $rd */
2972 {
2973 SH_INSN_MULUL, "mulul", "mulu.l", 32,
c7e628df 2974 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2975 },
2976/* nop */
2977 {
2978 SH_INSN_NOP, "nop", "nop", 32,
c7e628df 2979 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2980 },
2981/* nsb $rm, $rd */
2982 {
2983 SH_INSN_NSB, "nsb", "nsb", 32,
c7e628df 2984 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2985 },
2986/* ocbi $rm, $disp6x32 */
2987 {
2988 SH_INSN_OCBI, "ocbi", "ocbi", 32,
c7e628df 2989 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2990 },
2991/* ocbp $rm, $disp6x32 */
2992 {
2993 SH_INSN_OCBP, "ocbp", "ocbp", 32,
c7e628df 2994 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2995 },
2996/* ocbwb $rm, $disp6x32 */
2997 {
2998 SH_INSN_OCBWB, "ocbwb", "ocbwb", 32,
c7e628df 2999 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3000 },
3001/* or $rm, $rn, $rd */
3002 {
3003 SH_INSN_OR, "or", "or", 32,
c7e628df 3004 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3005 },
3006/* ori $rm, $imm10, $rd */
3007 {
3008 SH_INSN_ORI, "ori", "ori", 32,
c7e628df 3009 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3010 },
3011/* prefi $rm, $disp6x32 */
3012 {
3013 SH_INSN_PREFI, "prefi", "prefi", 32,
c7e628df 3014 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3015 },
3016/* pta$likely $disp16, $tra */
3017 {
3018 SH_INSN_PTA, "pta", "pta", 32,
c7e628df 3019 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3020 },
3021/* ptabs$likely $rn, $tra */
3022 {
3023 SH_INSN_PTABS, "ptabs", "ptabs", 32,
c7e628df 3024 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3025 },
3026/* ptb$likely $disp16, $tra */
3027 {
3028 SH_INSN_PTB, "ptb", "ptb", 32,
c7e628df 3029 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3030 },
3031/* ptrel$likely $rn, $tra */
3032 {
3033 SH_INSN_PTREL, "ptrel", "ptrel", 32,
c7e628df 3034 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3035 },
3036/* putcfg $rm, $disp6, $rd */
3037 {
3038 SH_INSN_PUTCFG, "putcfg", "putcfg", 32,
c7e628df 3039 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3040 },
3041/* putcon $rm, $crj */
3042 {
3043 SH_INSN_PUTCON, "putcon", "putcon", 32,
c7e628df 3044 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3045 },
3046/* rte */
3047 {
3048 SH_INSN_RTE, "rte", "rte", 32,
c7e628df 3049 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3050 },
3051/* shard $rm, $rn, $rd */
3052 {
3053 SH_INSN_SHARD, "shard", "shard", 32,
c7e628df 3054 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3055 },
3056/* shard.l $rm, $rn, $rd */
3057 {
3058 SH_INSN_SHARDL, "shardl", "shard.l", 32,
c7e628df 3059 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3060 },
3061/* shari $rm, $uimm6, $rd */
3062 {
3063 SH_INSN_SHARI, "shari", "shari", 32,
c7e628df 3064 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3065 },
3066/* shari.l $rm, $uimm6, $rd */
3067 {
3068 SH_INSN_SHARIL, "sharil", "shari.l", 32,
c7e628df 3069 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3070 },
3071/* shlld $rm, $rn, $rd */
3072 {
3073 SH_INSN_SHLLD, "shlld", "shlld", 32,
c7e628df 3074 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3075 },
3076/* shlld.l $rm, $rn, $rd */
3077 {
3078 SH_INSN_SHLLDL, "shlldl", "shlld.l", 32,
c7e628df 3079 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3080 },
3081/* shlli $rm, $uimm6, $rd */
3082 {
3083 SH_INSN_SHLLI, "shlli", "shlli", 32,
c7e628df 3084 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3085 },
3086/* shlli.l $rm, $uimm6, $rd */
3087 {
3088 SH_INSN_SHLLIL, "shllil", "shlli.l", 32,
c7e628df 3089 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3090 },
3091/* shlrd $rm, $rn, $rd */
3092 {
3093 SH_INSN_SHLRD, "shlrd", "shlrd", 32,
c7e628df 3094 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3095 },
3096/* shlrd.l $rm, $rn, $rd */
3097 {
3098 SH_INSN_SHLRDL, "shlrdl", "shlrd.l", 32,
c7e628df 3099 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3100 },
3101/* shlri $rm, $uimm6, $rd */
3102 {
3103 SH_INSN_SHLRI, "shlri", "shlri", 32,
c7e628df 3104 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3105 },
3106/* shlri.l $rm, $uimm6, $rd */
3107 {
3108 SH_INSN_SHLRIL, "shlril", "shlri.l", 32,
c7e628df 3109 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3110 },
3111/* shori $uimm16, $rd */
3112 {
3113 SH_INSN_SHORI, "shori", "shori", 32,
c7e628df 3114 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3115 },
3116/* sleep */
3117 {
3118 SH_INSN_SLEEP, "sleep", "sleep", 32,
c7e628df 3119 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3120 },
3121/* st.b $rm, $disp10, $rd */
3122 {
3123 SH_INSN_STB, "stb", "st.b", 32,
c7e628df 3124 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3125 },
3126/* st.l $rm, $disp10x4, $rd */
3127 {
3128 SH_INSN_STL, "stl", "st.l", 32,
c7e628df 3129 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3130 },
3131/* st.q $rm, $disp10x8, $rd */
3132 {
3133 SH_INSN_STQ, "stq", "st.q", 32,
c7e628df 3134 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3135 },
3136/* st.w $rm, $disp10x2, $rd */
3137 {
3138 SH_INSN_STW, "stw", "st.w", 32,
c7e628df 3139 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3140 },
3141/* sthi.l $rm, $disp6, $rd */
3142 {
3143 SH_INSN_STHIL, "sthil", "sthi.l", 32,
c7e628df 3144 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3145 },
3146/* sthi.q $rm, $disp6, $rd */
3147 {
3148 SH_INSN_STHIQ, "sthiq", "sthi.q", 32,
c7e628df 3149 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3150 },
3151/* stlo.l $rm, $disp6, $rd */
3152 {
3153 SH_INSN_STLOL, "stlol", "stlo.l", 32,
c7e628df 3154 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3155 },
3156/* stlo.q $rm, $disp6, $rd */
3157 {
3158 SH_INSN_STLOQ, "stloq", "stlo.q", 32,
c7e628df 3159 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3160 },
3161/* stx.b $rm, $rn, $rd */
3162 {
3163 SH_INSN_STXB, "stxb", "stx.b", 32,
c7e628df 3164 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3165 },
3166/* stx.l $rm, $rn, $rd */
3167 {
3168 SH_INSN_STXL, "stxl", "stx.l", 32,
c7e628df 3169 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3170 },
3171/* stx.q $rm, $rn, $rd */
3172 {
3173 SH_INSN_STXQ, "stxq", "stx.q", 32,
c7e628df 3174 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3175 },
3176/* stx.w $rm, $rn, $rd */
3177 {
3178 SH_INSN_STXW, "stxw", "stx.w", 32,
c7e628df 3179 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3180 },
3181/* sub $rm, $rn, $rd */
3182 {
3183 SH_INSN_SUB, "sub", "sub", 32,
c7e628df 3184 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3185 },
3186/* sub.l $rm, $rn, $rd */
3187 {
3188 SH_INSN_SUBL, "subl", "sub.l", 32,
c7e628df 3189 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3190 },
3191/* swap.q $rm, $rn, $rd */
3192 {
3193 SH_INSN_SWAPQ, "swapq", "swap.q", 32,
c7e628df 3194 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3195 },
3196/* synci */
3197 {
3198 SH_INSN_SYNCI, "synci", "synci", 32,
c7e628df 3199 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3200 },
3201/* synco */
3202 {
3203 SH_INSN_SYNCO, "synco", "synco", 32,
c7e628df 3204 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3205 },
3206/* trapa $rm */
3207 {
3208 SH_INSN_TRAPA, "trapa", "trapa", 32,
c7e628df 3209 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3210 },
3211/* xor $rm, $rn, $rd */
3212 {
3213 SH_INSN_XOR, "xor", "xor", 32,
c7e628df 3214 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3215 },
3216/* xori $rm, $imm6, $rd */
3217 {
3218 SH_INSN_XORI, "xori", "xori", 32,
c7e628df 3219 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3220 },
3221};
3222
3223#undef OP
3224#undef A
3225
3226/* Initialize anything needed to be done once, before any cpu_open call. */
3227
3228static void
c7e628df 3229init_tables (void)
cbb38b47
BE		 3230{
3231}
3232
c7e628df
DB		 3233static const CGEN_MACH * lookup_mach_via_bfd_name (const CGEN_MACH *, const char *);
3234static void build_hw_table (CGEN_CPU_TABLE *);
3235static void build_ifield_table (CGEN_CPU_TABLE *);
3236static void build_operand_table (CGEN_CPU_TABLE *);
3237static void build_insn_table (CGEN_CPU_TABLE *);
3238static void sh_cgen_rebuild_tables (CGEN_CPU_TABLE *);
3239
cbb38b47
BE		 3240/* Subroutine of sh_cgen_cpu_open to look up a mach via its bfd name. */
3241
3242static const CGEN_MACH *
c7e628df 3243lookup_mach_via_bfd_name (const CGEN_MACH *table, const char *name)
cbb38b47
BE		 3244{
3245 while (table->name)
3246 {
3247 if (strcmp (name, table->bfd_name) == 0)
3248 return table;
3249 ++table;
3250 }
3251 abort ();
3252}
3253
3254/* Subroutine of sh_cgen_cpu_open to build the hardware table. */
3255
3256static void
c7e628df 3257build_hw_table (CGEN_CPU_TABLE *cd)
cbb38b47
BE		 3258{
3259 int i;
3260 int machs = cd->machs;
3261 const CGEN_HW_ENTRY *init = & sh_cgen_hw_table[0];
3262 /* MAX_HW is only an upper bound on the number of selected entries.
3263 However each entry is indexed by it's enum so there can be holes in
3264 the table. */
3265 const CGEN_HW_ENTRY **selected =
3266 (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *));
3267
3268 cd->hw_table.init_entries = init;
3269 cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY);
3270 memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *));
3271 /* ??? For now we just use machs to determine which ones we want. */
3272 for (i = 0; init[i].name != NULL; ++i)
3273 if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH)
3274 & machs)
3275 selected[init[i].type] = &init[i];
3276 cd->hw_table.entries = selected;
3277 cd->hw_table.num_entries = MAX_HW;
3278}
3279
3280/* Subroutine of sh_cgen_cpu_open to build the hardware table. */
3281
3282static void
c7e628df 3283build_ifield_table (CGEN_CPU_TABLE *cd)
cbb38b47
BE		 3284{
3285 cd->ifld_table = & sh_cgen_ifld_table[0];
3286}
3287
3288/* Subroutine of sh_cgen_cpu_open to build the hardware table. */
3289
3290static void
c7e628df 3291build_operand_table (CGEN_CPU_TABLE *cd)
cbb38b47
BE		 3292{
3293 int i;
3294 int machs = cd->machs;
3295 const CGEN_OPERAND *init = & sh_cgen_operand_table[0];
3296 /* MAX_OPERANDS is only an upper bound on the number of selected entries.
3297 However each entry is indexed by it's enum so there can be holes in
3298 the table. */
c7e628df 3299 const CGEN_OPERAND **selected = xmalloc (MAX_OPERANDS * sizeof (* selected));
cbb38b47
BE		 3300
3301 cd->operand_table.init_entries = init;
3302 cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
3303 memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *));
3304 /* ??? For now we just use mach to determine which ones we want. */
3305 for (i = 0; init[i].name != NULL; ++i)
3306 if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH)
3307 & machs)
3308 selected[init[i].type] = &init[i];
3309 cd->operand_table.entries = selected;
3310 cd->operand_table.num_entries = MAX_OPERANDS;
3311}
3312
3313/* Subroutine of sh_cgen_cpu_open to build the hardware table.
3314 ??? This could leave out insns not supported by the specified mach/isa,
3315 but that would cause errors like "foo only supported by bar" to become
3316 "unknown insn", so for now we include all insns and require the app to
3317 do the checking later.
3318 ??? On the other hand, parsing of such insns may require their hardware or
3319 operand elements to be in the table [which they mightn't be]. */
3320
3321static void
c7e628df 3322build_insn_table (CGEN_CPU_TABLE *cd)
cbb38b47
BE		 3323{
3324 int i;
3325 const CGEN_IBASE *ib = & sh_cgen_insn_table[0];
c7e628df 3326 CGEN_INSN *insns = xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
cbb38b47
BE		 3327
3328 memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
3329 for (i = 0; i < MAX_INSNS; ++i)
3330 insns[i].base = &ib[i];
3331 cd->insn_table.init_entries = insns;
3332 cd->insn_table.entry_size = sizeof (CGEN_IBASE);
3333 cd->insn_table.num_init_entries = MAX_INSNS;
3334}
3335
3336/* Subroutine of sh_cgen_cpu_open to rebuild the tables. */
3337
3338static void
c7e628df 3339sh_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
cbb38b47 3340{
c7e628df
DB		 3341 int i;
3342 CGEN_BITSET *isas = cd->isas;
cbb38b47 3343 unsigned int machs = cd->machs;
cbb38b47
BE		 3344
3345 cd->int_insn_p = CGEN_INT_INSN_P;
3346
3347 /* Data derived from the isa spec. */
3348#define UNSET (CGEN_SIZE_UNKNOWN + 1)
3349 cd->default_insn_bitsize = UNSET;
3350 cd->base_insn_bitsize = UNSET;
c7e628df 3351 cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
cbb38b47
BE		 3352 cd->max_insn_bitsize = 0;
3353 for (i = 0; i < MAX_ISAS; ++i)
c7e628df 3354 if (cgen_bitset_contains (isas, i))
cbb38b47
BE		 3355 {
3356 const CGEN_ISA *isa = & sh_cgen_isa_table[i];
3357
c7e628df
DB		 3358 /* Default insn sizes of all selected isas must be
3359 equal or we set the result to 0, meaning "unknown". */
cbb38b47
BE		 3360 if (cd->default_insn_bitsize == UNSET)
3361 cd->default_insn_bitsize = isa->default_insn_bitsize;
3362 else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
c7e628df 3363 ; /* This is ok. */
cbb38b47
BE		 3364 else
3365 cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
3366
c7e628df
DB		 3367 /* Base insn sizes of all selected isas must be equal
3368 or we set the result to 0, meaning "unknown". */
cbb38b47
BE		 3369 if (cd->base_insn_bitsize == UNSET)
3370 cd->base_insn_bitsize = isa->base_insn_bitsize;
3371 else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
c7e628df 3372 ; /* This is ok. */
cbb38b47
BE		 3373 else
3374 cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
3375
3376 /* Set min,max insn sizes. */
3377 if (isa->min_insn_bitsize < cd->min_insn_bitsize)
3378 cd->min_insn_bitsize = isa->min_insn_bitsize;
3379 if (isa->max_insn_bitsize > cd->max_insn_bitsize)
3380 cd->max_insn_bitsize = isa->max_insn_bitsize;
cbb38b47
BE		 3381 }
3382
cbb38b47
BE		 3383 /* Data derived from the mach spec. */
3384 for (i = 0; i < MAX_MACHS; ++i)
3385 if (((1 << i) & machs) != 0)
3386 {
3387 const CGEN_MACH *mach = & sh_cgen_mach_table[i];
3388
c7e628df
DB		 3389 if (mach->insn_chunk_bitsize != 0)
3390 {
3391 if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
3392 {
3393 fprintf (stderr, "sh_cgen_rebuild_tables: conflicting insn-chunk-bitsize values: `%d' vs. `%d'\n",
3394 cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
3395 abort ();
3396 }
3397
3398 cd->insn_chunk_bitsize = mach->insn_chunk_bitsize;
3399 }
cbb38b47 3400 }
cbb38b47
BE		 3401
3402 /* Determine which hw elements are used by MACH. */
3403 build_hw_table (cd);
3404
3405 /* Build the ifield table. */
3406 build_ifield_table (cd);
3407
3408 /* Determine which operands are used by MACH/ISA. */
3409 build_operand_table (cd);
3410
3411 /* Build the instruction table. */
3412 build_insn_table (cd);
3413}
3414
3415/* Initialize a cpu table and return a descriptor.
3416 It's much like opening a file, and must be the first function called.
3417 The arguments are a set of (type/value) pairs, terminated with
3418 CGEN_CPU_OPEN_END.
3419
3420 Currently supported values:
3421 CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr
3422 CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
3423 CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
3424 CGEN_CPU_OPEN_ENDIAN: specify endian choice
3425 CGEN_CPU_OPEN_END: terminates arguments
3426
3427 ??? Simultaneous multiple isas might not make sense, but it's not (yet)
2310652a 3428 precluded. */
cbb38b47
BE		 3429
3430CGEN_CPU_DESC
3431sh_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
3432{
3433 CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
3434 static int init_p;
c7e628df 3435 CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
cbb38b47
BE		 3436 unsigned int machs = 0; /* 0 = "unspecified" */
3437 enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
3438 va_list ap;
3439
3440 if (! init_p)
3441 {
3442 init_tables ();
3443 init_p = 1;
3444 }
3445
3446 memset (cd, 0, sizeof (*cd));
3447
3448 va_start (ap, arg_type);
3449 while (arg_type != CGEN_CPU_OPEN_END)
3450 {
3451 switch (arg_type)
3452 {
3453 case CGEN_CPU_OPEN_ISAS :
c7e628df 3454 isas = va_arg (ap, CGEN_BITSET *);
cbb38b47
BE		 3455 break;
3456 case CGEN_CPU_OPEN_MACHS :
3457 machs = va_arg (ap, unsigned int);
3458 break;
3459 case CGEN_CPU_OPEN_BFDMACH :
3460 {
3461 const char *name = va_arg (ap, const char *);
3462 const CGEN_MACH *mach =
3463 lookup_mach_via_bfd_name (sh_cgen_mach_table, name);
3464
c7e628df 3465 machs |= 1 << mach->num;
cbb38b47
BE		 3466 break;
3467 }
3468 case CGEN_CPU_OPEN_ENDIAN :
3469 endian = va_arg (ap, enum cgen_endian);
3470 break;
3471 default :
3472 fprintf (stderr, "sh_cgen_cpu_open: unsupported argument `%d'\n",
3473 arg_type);
3474 abort (); /* ??? return NULL? */
3475 }
3476 arg_type = va_arg (ap, enum cgen_cpu_open_arg);
3477 }
3478 va_end (ap);
3479
c7e628df 3480 /* Mach unspecified means "all". */
cbb38b47
BE		 3481 if (machs == 0)
3482 machs = (1 << MAX_MACHS) - 1;
c7e628df 3483 /* Base mach is always selected. */
cbb38b47 3484 machs |= 1;
cbb38b47
BE		 3485 if (endian == CGEN_ENDIAN_UNKNOWN)
3486 {
3487 /* ??? If target has only one, could have a default. */
3488 fprintf (stderr, "sh_cgen_cpu_open: no endianness specified\n");
3489 abort ();
3490 }
3491
c7e628df 3492 cd->isas = cgen_bitset_copy (isas);
cbb38b47
BE		 3493 cd->machs = machs;
3494 cd->endian = endian;
3495 /* FIXME: for the sparc case we can determine insn-endianness statically.
3496 The worry here is where both data and insn endian can be independently
3497 chosen, in which case this function will need another argument.
3498 Actually, will want to allow for more arguments in the future anyway. */
3499 cd->insn_endian = endian;
3500
3501 /* Table (re)builder. */
3502 cd->rebuild_tables = sh_cgen_rebuild_tables;
3503 sh_cgen_rebuild_tables (cd);
3504
3505 /* Default to not allowing signed overflow. */
3506 cd->signed_overflow_ok_p = 0;
3507
3508 return (CGEN_CPU_DESC) cd;
3509}
3510
3511/* Cover fn to sh_cgen_cpu_open to handle the simple case of 1 isa, 1 mach.
3512 MACH_NAME is the bfd name of the mach. */
3513
3514CGEN_CPU_DESC
c7e628df 3515sh_cgen_cpu_open_1 (const char *mach_name, enum cgen_endian endian)
cbb38b47
BE		 3516{
3517 return sh_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
3518 CGEN_CPU_OPEN_ENDIAN, endian,
3519 CGEN_CPU_OPEN_END);
3520}
3521
3522/* Close a cpu table.
3523 ??? This can live in a machine independent file, but there's currently
3524 no place to put this file (there's no libcgen). libopcodes is the wrong
3525 place as some simulator ports use this but they don't use libopcodes. */
3526
3527void
c7e628df 3528sh_cgen_cpu_close (CGEN_CPU_DESC cd)
cbb38b47 3529{
c7e628df
DB		 3530 unsigned int i;
3531 const CGEN_INSN *insns;
3532
3533 if (cd->macro_insn_table.init_entries)
3534 {
3535 insns = cd->macro_insn_table.init_entries;
3536 for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
3537 if (CGEN_INSN_RX ((insns)))
3538 regfree (CGEN_INSN_RX (insns));
3539 }
3540
3541 if (cd->insn_table.init_entries)
3542 {
3543 insns = cd->insn_table.init_entries;
3544 for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
3545 if (CGEN_INSN_RX (insns))
3546 regfree (CGEN_INSN_RX (insns));
3547 }
3548
3549 if (cd->macro_insn_table.init_entries)
3550 free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
3551
cbb38b47
BE		 3552 if (cd->insn_table.init_entries)
3553 free ((CGEN_INSN *) cd->insn_table.init_entries);
c7e628df 3554
cbb38b47
BE		 3555 if (cd->hw_table.entries)
3556 free ((CGEN_HW_ENTRY *) cd->hw_table.entries);
c7e628df
DB		 3557
3558 if (cd->operand_table.entries)
3559 free ((CGEN_HW_ENTRY *) cd->operand_table.entries);
3560
cbb38b47
BE		 3561 free (cd);
3562}
3563
GDB Binutils - Deliverables
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