Commit | Line | Data |
---|---|---|
cbb38b47 | 1 | /* collection of junk waiting time to sort out |
61baf725 | 2 | Copyright (C) 2000-2017 Free Software Foundation, Inc. |
cbb38b47 BE |
3 | Contributed by Red Hat, Inc. |
4 | ||
5 | This file is part of the GNU Simulators. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
4744ac1b JB |
9 | the Free Software Foundation; either version 3 of the License, or |
10 | (at your option) any later version. | |
cbb38b47 BE |
11 | |
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
4744ac1b JB |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
cbb38b47 BE |
19 | |
20 | #ifndef SH64_SIM_H | |
21 | #define SH64_SIM_H | |
22 | ||
cbb38b47 BE |
23 | enum { |
24 | ISM_COMPACT, ISM_MEDIA | |
25 | }; | |
26 | ||
cbb38b47 BE |
27 | extern IDESC * sh64_idesc_media; |
28 | extern IDESC * sh64_idesc_compact; | |
29 | ||
30 | /* Function prototypes from sh64.c. */ | |
31 | ||
32 | BI sh64_endian (SIM_CPU *); | |
33 | VOID sh64_break (SIM_CPU *, PCADDR); | |
c7e628df | 34 | SI sh64_movua (SIM_CPU *, PCADDR, SI); |
cbb38b47 BE |
35 | VOID sh64_trapa (SIM_CPU *, DI, PCADDR); |
36 | VOID sh64_compact_trapa (SIM_CPU *, UQI, PCADDR); | |
37 | ||
38 | SF sh64_fldi0 (SIM_CPU *); | |
39 | SF sh64_fldi1 (SIM_CPU *); | |
40 | DF sh64_fcnvsd (SIM_CPU *, SF); | |
41 | SF sh64_fcnvds (SIM_CPU *, DF); | |
42 | ||
43 | DF sh64_fabsd (SIM_CPU *, DF); | |
44 | SF sh64_fabss (SIM_CPU *, SF); | |
45 | DF sh64_faddd (SIM_CPU *, DF, DF); | |
46 | SF sh64_fadds (SIM_CPU *, SF, SF); | |
47 | DF sh64_fdivd (SIM_CPU *, DF, DF); | |
48 | SF sh64_fdivs (SIM_CPU *, SF, SF); | |
49 | DF sh64_floatld (SIM_CPU *, SF); | |
50 | SF sh64_floatls (SIM_CPU *, SF); | |
51 | DF sh64_floatqd (SIM_CPU *, DF); | |
52 | SF sh64_floatqs (SIM_CPU *, DF); | |
53 | SF sh64_fmacs(SIM_CPU *, SF, SF, SF); | |
54 | DF sh64_fmuld (SIM_CPU *, DF, DF); | |
55 | SF sh64_fmuls (SIM_CPU *, SF, SF); | |
56 | DF sh64_fnegd (SIM_CPU *, DF); | |
57 | SF sh64_fnegs (SIM_CPU *, SF); | |
58 | DF sh64_fsqrtd (SIM_CPU *, DF); | |
59 | SF sh64_fsqrts (SIM_CPU *, SF); | |
60 | DF sh64_fsubd (SIM_CPU *, DF, DF); | |
61 | SF sh64_fsubs (SIM_CPU *, SF, SF); | |
62 | SF sh64_ftrcdl (SIM_CPU *, DF); | |
63 | DF sh64_ftrcdq (SIM_CPU *, DF); | |
64 | SF sh64_ftrcsl (SIM_CPU *, SF); | |
65 | DF sh64_ftrcsq (SIM_CPU *, SF); | |
66 | VOID sh64_ftrvs (SIM_CPU *, unsigned, unsigned, unsigned); | |
c7e628df DB |
67 | VOID sh64_fipr (SIM_CPU *cpu, unsigned m, unsigned n); |
68 | SF sh64_fiprs (SIM_CPU *cpu, unsigned g, unsigned h); | |
69 | VOID sh64_fldp (SIM_CPU *cpu, PCADDR pc, DI rm, DI rn, unsigned f); | |
70 | VOID sh64_fstp (SIM_CPU *cpu, PCADDR pc, DI rm, DI rn, unsigned f); | |
71 | VOID sh64_ftrv (SIM_CPU *cpu, UINT ignored); | |
72 | VOID sh64_pref (SIM_CPU *cpu, SI addr); | |
cbb38b47 BE |
73 | BI sh64_fcmpeqs (SIM_CPU *, SF, SF); |
74 | BI sh64_fcmpeqd (SIM_CPU *, DF, DF); | |
75 | BI sh64_fcmpges (SIM_CPU *, SF, SF); | |
76 | BI sh64_fcmpged (SIM_CPU *, DF, DF); | |
77 | BI sh64_fcmpgts (SIM_CPU *, SF, SF); | |
78 | BI sh64_fcmpgtd (SIM_CPU *, DF, DF); | |
79 | BI sh64_fcmpund (SIM_CPU *, DF, DF); | |
80 | BI sh64_fcmpuns (SIM_CPU *, SF, SF); | |
81 | ||
82 | DI sh64_nsb (SIM_CPU *, DI); | |
83 | ||
84 | #endif /* SH64_SIM_H */ |