projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| cbb38b47 BE |
1 | /* collection of junk waiting time to sort out |
| 2 | Copyright (C) 2000 Free Software Foundation, Inc. | |
| 3 | Contributed by Red Hat, Inc. | |
| 4 | ||
| 5 | This file is part of the GNU Simulators. | |
| 6 | ||
| 7 | This program is free software; you can redistribute it and/or modify | |
| 8 | it under the terms of the GNU General Public License as published by | |
| 9 | the Free Software Foundation; either version 2, or (at your option) | |
| 10 | any later version. | |
| 11 | ||
| 12 | This program is distributed in the hope that it will be useful, | |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | GNU General Public License for more details. | |
| 16 | ||
| 17 | You should have received a copy of the GNU General Public License along | |
| 18 | with this program; if not, write to the Free Software Foundation, Inc., | |
| 19 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
| 20 | ||
| 21 | #ifndef SH64_SIM_H | |
| 22 | #define SH64_SIM_H | |
| 23 | ||
| 24 | #define GETTWI GETTSI | |
| 25 | #define SETTWI SETTSI | |
| 26 | \f | |
| 27 | ||
| 28 | enum { | |
| 29 | ISM_COMPACT, ISM_MEDIA | |
| 30 | }; | |
| 31 | ||
| 32 | /* Hardware/device support. */ | |
| 33 | extern device sh5_devices; | |
| 34 | ||
| 35 | /* FIXME: Temporary, until device support ready. */ | |
| 36 | struct _device { int foo; }; | |
| 37 | ||
| 38 | extern IDESC * sh64_idesc_media; | |
| 39 | extern IDESC * sh64_idesc_compact; | |
| 40 | ||
| 41 | /* Function prototypes from sh64.c. */ | |
| 42 | ||
| 43 | BI sh64_endian (SIM_CPU *); | |
| 44 | VOID sh64_break (SIM_CPU *, PCADDR); | |
| 45 | VOID sh64_trapa (SIM_CPU *, DI, PCADDR); | |
| 46 | VOID sh64_compact_trapa (SIM_CPU *, UQI, PCADDR); | |
| 47 | ||
| 48 | SF sh64_fldi0 (SIM_CPU *); | |
| 49 | SF sh64_fldi1 (SIM_CPU *); | |
| 50 | DF sh64_fcnvsd (SIM_CPU *, SF); | |
| 51 | SF sh64_fcnvds (SIM_CPU *, DF); | |
| 52 | ||
| 53 | DF sh64_fabsd (SIM_CPU *, DF); | |
| 54 | SF sh64_fabss (SIM_CPU *, SF); | |
| 55 | DF sh64_faddd (SIM_CPU *, DF, DF); | |
| 56 | SF sh64_fadds (SIM_CPU *, SF, SF); | |
| 57 | DF sh64_fdivd (SIM_CPU *, DF, DF); | |
| 58 | SF sh64_fdivs (SIM_CPU *, SF, SF); | |
| 59 | DF sh64_floatld (SIM_CPU *, SF); | |
| 60 | SF sh64_floatls (SIM_CPU *, SF); | |
| 61 | DF sh64_floatqd (SIM_CPU *, DF); | |
| 62 | SF sh64_floatqs (SIM_CPU *, DF); | |
| 63 | SF sh64_fmacs(SIM_CPU *, SF, SF, SF); | |
| 64 | DF sh64_fmuld (SIM_CPU *, DF, DF); | |
| 65 | SF sh64_fmuls (SIM_CPU *, SF, SF); | |
| 66 | DF sh64_fnegd (SIM_CPU *, DF); | |
| 67 | SF sh64_fnegs (SIM_CPU *, SF); | |
| 68 | DF sh64_fsqrtd (SIM_CPU *, DF); | |
| 69 | SF sh64_fsqrts (SIM_CPU *, SF); | |
| 70 | DF sh64_fsubd (SIM_CPU *, DF, DF); | |
| 71 | SF sh64_fsubs (SIM_CPU *, SF, SF); | |
| 72 | SF sh64_ftrcdl (SIM_CPU *, DF); | |
| 73 | DF sh64_ftrcdq (SIM_CPU *, DF); | |
| 74 | SF sh64_ftrcsl (SIM_CPU *, SF); | |
| 75 | DF sh64_ftrcsq (SIM_CPU *, SF); | |
| 76 | VOID sh64_ftrvs (SIM_CPU *, unsigned, unsigned, unsigned); | |
| 77 | ||
| 78 | BI sh64_fcmpeqs (SIM_CPU *, SF, SF); | |
| 79 | BI sh64_fcmpeqd (SIM_CPU *, DF, DF); | |
| 80 | BI sh64_fcmpges (SIM_CPU *, SF, SF); | |
| 81 | BI sh64_fcmpged (SIM_CPU *, DF, DF); | |
| 82 | BI sh64_fcmpgts (SIM_CPU *, SF, SF); | |
| 83 | BI sh64_fcmpgtd (SIM_CPU *, DF, DF); | |
| 84 | BI sh64_fcmpund (SIM_CPU *, DF, DF); | |
| 85 | BI sh64_fcmpuns (SIM_CPU *, SF, SF); | |
| 86 | ||
| 87 | DI sh64_nsb (SIM_CPU *, DI); | |
| 88 | ||
| 89 | #endif /* SH64_SIM_H */ |