Commit | Line | Data |
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cbb38b47 BE |
1 | /* Main header for the Hitachi SH64 architecture. */ |
2 | ||
3 | #ifndef SIM_MAIN_H | |
4 | #define SIM_MAIN_H | |
5 | ||
cbb38b47 BE |
6 | /* sim-basics.h includes config.h but cgen-types.h must be included before |
7 | sim-basics.h and cgen-types.h needs config.h. */ | |
8 | #include "config.h" | |
9 | ||
f0c1b768 MF |
10 | /* This is a global setting. Different cpu families can't mix-n-match -scache |
11 | and -pbb. However some cpu families may use -simple while others use | |
12 | one of -scache/-pbb. ???? */ | |
13 | #define WITH_SCACHE_PBB 1 | |
14 | ||
cbb38b47 BE |
15 | #include "symcat.h" |
16 | #include "sim-basics.h" | |
17 | #include "cgen-types.h" | |
18 | #include "sh-desc.h" | |
19 | #include "sh-opc.h" | |
20 | #include "arch.h" | |
21 | ||
22 | /* These must be defined before sim-base.h. */ | |
23 | typedef UDI sim_cia; | |
7e83aa92 | 24 | #define CIA_ADDR(cia) (cia) |
cbb38b47 | 25 | |
cbb38b47 BE |
26 | #include "sim-base.h" |
27 | #include "cgen-sim.h" | |
28 | #include "sh64-sim.h" | |
29 | \f | |
30 | /* The _sim_cpu struct. */ | |
31 | ||
32 | struct _sim_cpu { | |
33 | /* sim/common cpu base. */ | |
34 | sim_cpu_base base; | |
35 | ||
36 | /* Static parts of cgen. */ | |
37 | CGEN_CPU cgen_cpu; | |
38 | ||
39 | /* CPU specific parts go here. | |
40 | Note that in files that don't need to access these pieces WANT_CPU_FOO | |
41 | won't be defined and thus these parts won't appear. This is ok in the | |
42 | sense that things work. It is a source of bugs though. | |
43 | One has to of course be careful to not take the size of this | |
44 | struct and no structure members accessed in non-cpu specific files can | |
45 | go after here. Oh for a better language. */ | |
46 | #if defined (WANT_CPU_SH64) | |
47 | SH64_CPU_DATA cpu_data; | |
48 | #endif | |
49 | }; | |
50 | \f | |
51 | /* The sim_state struct. */ | |
52 | ||
53 | struct sim_state { | |
f95f4ed2 | 54 | sim_cpu *cpu[MAX_NR_PROCESSORS]; |
cbb38b47 BE |
55 | |
56 | CGEN_STATE cgen_state; | |
57 | ||
58 | sim_state_base base; | |
59 | }; | |
60 | \f | |
61 | /* Misc. */ | |
62 | ||
63 | /* Catch address exceptions. */ | |
64 | extern SIM_CORE_SIGNAL_FN sh64_core_signal; | |
65 | #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ | |
66 | sh64_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ | |
67 | (TRANSFER), (ERROR)) | |
68 | ||
69 | /* Default memory size. */ | |
70 | #define SH64_DEFAULT_MEM_SIZE 0x800000 /* 8M */ | |
71 | ||
72 | #endif /* SIM_MAIN_H */ |