projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| cbb38b47 BE |
1 | /* Main header for the Hitachi SH64 architecture. */ |
| 2 | ||
| 3 | #ifndef SIM_MAIN_H | |
| 4 | #define SIM_MAIN_H | |
| 5 | ||
| 6 | #define USING_SIM_BASE_H /* FIXME: quick hack */ | |
| 7 | ||
| 8 | struct _sim_cpu; /* FIXME: should be in sim-basics.h */ | |
| 9 | typedef struct _sim_cpu SIM_CPU; | |
| 10 | ||
| 11 | /* sim-basics.h includes config.h but cgen-types.h must be included before | |
| 12 | sim-basics.h and cgen-types.h needs config.h. */ | |
| 13 | #include "config.h" | |
| 14 | ||
| 15 | #include "symcat.h" | |
| 16 | #include "sim-basics.h" | |
| 17 | #include "cgen-types.h" | |
| 18 | #include "sh-desc.h" | |
| 19 | #include "sh-opc.h" | |
| 20 | #include "arch.h" | |
| 21 | ||
| 22 | /* These must be defined before sim-base.h. */ | |
| 23 | typedef UDI sim_cia; | |
| 24 | ||
| 25 | #define CIA_GET(cpu) CPU_PC_GET (cpu) | |
| 26 | #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val) | (sh64_h_ism_get (cpu))) | |
| 27 | ||
| 28 | #include "sim-base.h" | |
| 29 | #include "cgen-sim.h" | |
| 30 | #include "sh64-sim.h" | |
| 31 | \f | |
| 32 | /* The _sim_cpu struct. */ | |
| 33 | ||
| 34 | struct _sim_cpu { | |
| 35 | /* sim/common cpu base. */ | |
| 36 | sim_cpu_base base; | |
| 37 | ||
| 38 | /* Static parts of cgen. */ | |
| 39 | CGEN_CPU cgen_cpu; | |
| 40 | ||
| 41 | /* CPU specific parts go here. | |
| 42 | Note that in files that don't need to access these pieces WANT_CPU_FOO | |
| 43 | won't be defined and thus these parts won't appear. This is ok in the | |
| 44 | sense that things work. It is a source of bugs though. | |
| 45 | One has to of course be careful to not take the size of this | |
| 46 | struct and no structure members accessed in non-cpu specific files can | |
| 47 | go after here. Oh for a better language. */ | |
| 48 | #if defined (WANT_CPU_SH64) | |
| 49 | SH64_CPU_DATA cpu_data; | |
| 50 | #endif | |
| 51 | }; | |
| 52 | \f | |
| 53 | /* The sim_state struct. */ | |
| 54 | ||
| 55 | struct sim_state { | |
| 56 | sim_cpu *cpu; | |
| 57 | #define STATE_CPU(sd, n) (/*&*/ (sd)->cpu) | |
| 58 | ||
| 59 | CGEN_STATE cgen_state; | |
| 60 | ||
| 61 | sim_state_base base; | |
| 62 | }; | |
| 63 | \f | |
| 64 | /* Misc. */ | |
| 65 | ||
| 66 | /* Catch address exceptions. */ | |
| 67 | extern SIM_CORE_SIGNAL_FN sh64_core_signal; | |
| 68 | #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ | |
| 69 | sh64_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ | |
| 70 | (TRANSFER), (ERROR)) | |
| 71 | ||
| 72 | /* Default memory size. */ | |
| 73 | #define SH64_DEFAULT_MEM_SIZE 0x800000 /* 8M */ | |
| 74 | ||
| 75 | #endif /* SIM_MAIN_H */ |