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h8300: Add support of EXR register
[deliverable/binutils-gdb.git] / sim / testsuite / ChangeLog
CommitLineData
f18ee7ef
BE		 12001-07-31 Ben Elliston <bje@redhat.com>
2
3 * lib/sim-defs.exp (run_sim_test): Include a description such as
4 "assembling" or "linking" that identifies the phase a test fails
5 in, for easier analysis of failures.
6
0ab7df8a
DB		 72000-11-01 Dave Brolley <brolley@cygnus.com>
8
9 * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
10 "xerror" options do not use a list of machines. Clear options from
11 previous test case. Use "$cpu_option" to identify the machine to the
12 assembler, if specified.
13
eb2d80b4
AC		 14Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
15
16 * configure: Regenerated to track ../common/aclocal.m4 changes.
17
c2c6d25f
JM		 181999-09-15 Doug Evans <devans@casey.cygnus.com>
19
20 * sim/arm/b.cgs: New testcase.
21 * sim/arm/bic.cgs: New testcase.
22 * sim/arm/bl.cgs: New testcase.
23
d4f3574e
SS		 24Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
25
26 * configure: Regenerated to track ../common/aclocal.m4 changes.
27
104c1213
JM		 281999-08-30 Doug Evans <devans@casey.cygnus.com>
29
104c1213
JM		 30 * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
31 requested_machs, now is list of machs to run tests for.
32 Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble
33 and target_link instead.
34
7a292a7a
SS		 351999-04-21 Doug Evans <devans@casey.cygnus.com>
36
37 * sim/m32r/nop.cgs: Add missing nop insn.
38
39Mon Mar 22 13:28:56 1999 Dave Brolley <brolley@cygnus.com>
40
41 * sim/fr30/stb.cgs: Correct for unaligned access.
42 * sim/fr30/sth.cgs: Correct for unaligned access.
43 * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
44 for unaligned access.
45 * sim/fr30/and.cgs: Test unaligned access.
46
c906108c
SS		 47Fri Feb 5 12:41:11 1999 Doug Evans <devans@canuck.cygnus.com>
48
49 * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
50
511999-01-05 Doug Evans <devans@casey.cygnus.com>
52
53 * lib/sim-defs.exp (run_sim_test): New arg all_machs.
54 * sim/fr30/allinsn.exp: Update.
55 * sim/fr30/misc.exp: Update.
56 * sim/m32r/allinsn.exp: Update.
57 * sim/m32r/misc.exp: Update.
58
59Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com>
60
61 * sim/fr30/ldres.cgs: New testcase.
62 * sim/fr30/copld.cgs: New testcase.
63 * sim/fr30/copst.cgs: New testcase.
64 * sim/fr30/copsv.cgs: New testcase.
65 * sim/fr30/nop.cgs: New testcase.
66 * sim/fr30/andccr.cgs: New testcase.
67 * sim/fr30/orccr.cgs: New testcase.
68 * sim/fr30/addsp.cgs: New testcase.
69 * sim/fr30/stilm.cgs: New testcase.
70 * sim/fr30/extsb.cgs: New testcase.
71 * sim/fr30/extub.cgs: New testcase.
72 * sim/fr30/extsh.cgs: New testcase.
73 * sim/fr30/extuh.cgs: New testcase.
74 * sim/fr30/enter.cgs: New testcase.
75 * sim/fr30/leave.cgs: New testcase.
76 * sim/fr30/xchb.cgs: New testcase.
77 * sim/fr30/dmovb.cgs: New testcase.
78 * sim/fr30/dmov.cgs: New testcase.
79 * sim/fr30/dmovh.cgs: New testcase.
80
81Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com>
82
83 * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
84 * sim/fr30/ret.cgs: Add tests fir ret:d.
85 * sim/fr30/inte.cgs: New testcase.
86 * sim/fr30/reti.cgs: New testcase.
87 * sim/fr30/bra.cgs: New testcase.
88 * sim/fr30/bno.cgs: New testcase.
89 * sim/fr30/beq.cgs: New testcase.
90 * sim/fr30/bne.cgs: New testcase.
91 * sim/fr30/bc.cgs: New testcase.
92 * sim/fr30/bnc.cgs: New testcase.
93 * sim/fr30/bn.cgs: New testcase.
94 * sim/fr30/bp.cgs: New testcase.
95 * sim/fr30/bv.cgs: New testcase.
96 * sim/fr30/bnv.cgs: New testcase.
97 * sim/fr30/blt.cgs: New testcase.
98 * sim/fr30/bge.cgs: New testcase.
99 * sim/fr30/ble.cgs: New testcase.
100 * sim/fr30/bgt.cgs: New testcase.
101 * sim/fr30/bls.cgs: New testcase.
102 * sim/fr30/bhi.cgs: New testcase.
103
104Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com>
105
106 * sim/fr30/div.cgs (int): Add signed division scenario.
107 * sim/fr30/int.cgs (int): Complete testcase.
108 * sim/fr30/testutils.inc (_start): Initialize tbr.
109 (test_s_user,test_s_system,set_i,test_i): New macros.
110
1111998-12-14 Doug Evans <devans@casey.cygnus.com>
112
113 * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
114 errors. Translate \n sequences in expected output to newline char.
115 (slurp_options): Make parentheses optional.
116 (sim_run): Look for board_info sim,options.
117 * sim/fr30/hello.ms: Add trailing \n to expected output.
118 * sim/m32r/hello.ms: Ditto.
119 * sim/m32r/hw-trap.ms: Ditto.
120
121 * sim/m32r/trap.cgs: Properly align trap2_handler.
122
123 * sim/m32r/uread16.ms: New testcase.
124 * sim/m32r/uread32.ms: New testcase.
125 * sim/m32r/uwrite16.ms: New testcase.
126 * sim/m32r/uwrite32.ms: New testcase.
127
1281998-12-14 Dave Brolley <brolley@cygnus.com>
129
130 * sim/fr30/call.cgs: Test ret here as well.
131 * sim/fr30/ld.cgs: Remove bogus comment.
132 * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
133 * sim/fr30/div.ms: New testcase.
134 * sim/fr30/st.cgs: New testcase.
135 * sim/fr30/sth.cgs: New testcase.
136 * sim/fr30/stb.cgs: New testcase.
137 * sim/fr30/mov.cgs: New testcase.
138 * sim/fr30/jmp.cgs: New testcase.
139 * sim/fr30/ret.cgs: New testcase.
140 * sim/fr30/int.cgs: New testcase.
141
142Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com>
143
144 * sim/fr30/div0s.cgs: New testcase.
145 * sim/fr30/div0u.cgs: New testcase.
146 * sim/fr30/div1.cgs: New testcase.
147 * sim/fr30/div2.cgs: New testcase.
148 * sim/fr30/div3.cgs: New testcase.
149 * sim/fr30/div4s.cgs: New testcase.
150 * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
151
152Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com>
153
154 * sim/fr30/testutils.inc (set_s_user): Correct Mask.
155 (set_s_system): Correct Mask.
156 * sim/fr30/ld.cgs (ld): Move previously failing test back
157 into place.
158 * sim/fr30/ldm0.cgs: New testcase.
159 * sim/fr30/ldm1.cgs: New testcase.
160 * sim/fr30/stm0.cgs: New testcase.
161 * sim/fr30/stm1.cgs: New testcase.
162
163Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com>
164
165 * sim/fr30/ld.cgs: Implement more loads.
166 * sim/fr30/call.cgs: New testcase.
167 * sim/fr30/testutils.inc (testr_h_dr): New macro.
168 (set_s_user,set_s_system): New macros.
169
170 * sim/fr30: New Directory.
171
172Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
173
174 * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
175 recent sim/common/sim-basics.h changes.
176 * common/Makefile.in: Update.
177
178Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com>
179
180 * lib/sim-defs.exp (sim_run): download target program to remote
181 host, if necessary. for unix-driven win32 testing.
182
183Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com>
184
185 * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
186 * sim/m32r/rte.cgs: Test bbpc,bbpsw.
187 * sim/m32r/trap.cgs: Test bbpc,bbpsw.
188
7a292a7a
SS		 189Fri Jul 31 17:49:13 1998 Felix Lee <flee@cygnus.com>
190
191 * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
192 writeonly.
193
c906108c
SS		 194Fri Jul 24 09:40:34 1998 Doug Evans <devans@canuck.cygnus.com>
195
196 * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
197
198Wed Jul 1 15:57:54 1998 Doug Evans <devans@seba.cygnus.com>
199
200 * sim/m32r/hw-trap.ms: New testcase.
201
7a292a7a
SS		 202Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
203
204 * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
205
206Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com>
207
208 * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
209 which is now a list of options controlling the behaviour of sim_run.
210
c906108c
SS		 211Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com>
212
213 * sim/m32r/addx.cgs: Add another test.
214 * sim/m32r/jmp.cgs: Add another test.
215
216Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com>
217
218 * sim/m32r/trap.cgs: Test trap 2.
219
220Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
221
222 * lib/sim-defs.exp (sim_run): Add possible environment variable
223 list to simulator run.
224
225Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
226
227 * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
228 so that make check can be invoked recursively.
229
230Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com>
231
232 * config/default.exp (CC,SIM): Delete.
233
234 * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
235 New arg prog_opts. All callers updated.
236
237Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com>
238
239 * Makefile.in: Made "check" the target of two
240 dependencies (test1, test2) so that test2 get a chance to
241 run even when test1 failed if "make -k check" is used.
242
243Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com>
244
245 * lib/sim-defs.exp (sim_version): Simplify.
246 (sim_run): Implement.
247 (run_sim_test): Use sim_run.
248 (sim_compile): New proc.
249
250Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com>
251
252 * config/default.exp: Added C compiler settings.
253
254Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com>
255
256 * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
257
258Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com>
259
260 * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
261 try all machs.
262
263 * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
264
265Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com>
266
267 * sim/m32r/mv[ft]achi.cgs: Fix expected result
268 (sign extension of top 8 bits).
269
270Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com>
271
272 * Makefile.in (RUNTEST): Fix path to runtest.
273
c906108c
SS		 274Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com>
275
276 * sim/m32r/unlock.cgs: Fixed test.
277 * sim/m32r/mvfc.cgs: Fixed test.
278 * sim/m32r/remu.cgs: Fixed test.
c906108c
SS		 279 * sim/m32r/bnc24.cgs: Test long BNC instruction.
280 * sim/m32r/bnc8.cgs: Test short BNC instruction.
281 * sim/m32r/ld-plus.cgs: Test LD instruction.
282 * sim/m32r/macwhi.cgs: Test MACWHI instruction.
283 * sim/m32r/macwlo.cgs: Test MACWLO instruction.
284 * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
285 * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
286 * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
287 * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
288 * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
289 * sim/m32r/addv.cgs: Test ADDV instruction.
290 * sim/m32r/addv3.cgs: Test ADDV3 instruction.
291 * sim/m32r/addx.cgs: Test ADDX instruction.
292 * sim/m32r/lock.cgs: Test LOCK instruction.
293 * sim/m32r/neg.cgs: Test NEG instruction.
294 * sim/m32r/not.cgs: Test NOT instruction.
295 * sim/m32r/unlock.cgs: Test UNLOCK instruction.
58fddbac 296
c906108c
SS		 297Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
298
299 * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
300 address into a general register.
301
302 * sim/m32r/or3.cgs: Test OR3 instruction.
303 * sim/m32r/rach.cgs: Test RACH instruction.
304 * sim/m32r/rem.cgs: Test REM instruction.
305 * sim/m32r/sub.cgs: Test SUB instruction.
306 * sim/m32r/mv.cgs: Test MV instruction.
307 * sim/m32r/mul.cgs: Test MUL instruction.
308 * sim/m32r/bl24.cgs: Test long BL instruction.
309 * sim/m32r/bl8.cgs: Test short BL instruction.
310 * sim/m32r/blez.cgs: Test BLEZ instruction.
311 * sim/m32r/bltz.cgs: Test BLTZ instruction.
312 * sim/m32r/bne.cgs: Test BNE instruction.
313 * sim/m32r/bnez.cgs: Test BNEZ instruction.
314 * sim/m32r/bra24.cgs: Test long BRA instruction.
315 * sim/m32r/bra8.cgs: Test short BRA instruction.
316 * sim/m32r/jl.cgs: Test JL instruction.
317 * sim/m32r/or.cgs: Test OR instruction.
318 * sim/m32r/jmp.cgs: Test JMP instruction.
319 * sim/m32r/and.cgs: Test AND instruction.
320 * sim/m32r/and3.cgs: Test AND3 instruction.
321 * sim/m32r/beq.cgs: Test BEQ instruction.
322 * sim/m32r/beqz.cgs: Test BEQZ instruction.
323 * sim/m32r/bgez.cgs: Test BGEZ instruction.
324 * sim/m32r/bgtz.cgs: Test BGTZ instruction.
325 * sim/m32r/cmp.cgs: Test CMP instruction.
326 * sim/m32r/cmpi.cgs: Test CMPI instruction.
327 * sim/m32r/cmpu.cgs: Test CMPU instruction.
328 * sim/m32r/cmpui.cgs: Test CMPUI instruction.
329 * sim/m32r/div.cgs: Test DIV instruction.
330 * sim/m32r/divu.cgs: Test DIVU instruction.
331 * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
332 * sim/m32r/sll.cgs: Test SLL instruction.
333 * sim/m32r/sll3.cgs: Test SLL3 instruction.
334 * sim/m32r/slli.cgs: Test SLLI instruction.
335 * sim/m32r/sra.cgs: Test SRA instruction.
336 * sim/m32r/sra3.cgs: Test SRA3 instruction.
337 * sim/m32r/srai.cgs: Test SRAI instruction.
338 * sim/m32r/srl.cgs: Test SRL instruction.
339 * sim/m32r/srl3.cgs: Test SRL3 instruction.
340 * sim/m32r/srli.cgs: Test SRLI instruction.
341 * sim/m32r/xor3.cgs: Test XOR3 instruction.
342 * sim/m32r/xor.cgs: Test XOR instruction.
58fddbac 343
c906108c
SS		 344Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
345
346 * config/default.exp: New file.
347 * lib/sim-defs.exp: New file.
348 * sim/m32r/*: m32r dejagnu simulator testsuite.
349
350 * Makefile.in (build_alias): Define.
351 (arch): Define.
352 (RUNTEST_FOR_TARGET): Delete.
353 (RUNTEST): Fix.
354 (check): Depend on site.exp. Run dejagnu.
355 (site.exp): New target.
356 * configure.in (arch): Define from target_cpu.
357 * configure: Regenerate.
358
359Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
360
361 * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
362 (gen_mask): Ditto.
363
364 * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
365 (calc): Add support for 8 bit version of macros.
366 (main): Add tests for 8 bit versions of macros.
367 (check_sext): Check SEXT of zero clears bits.
368
369 * common/bits-gen.c (main): Generate tests for 8 bit versions of
370 macros.
371
372Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
373
374 * common/Make-common.in: New file, provide generic rules for
375 running checks.
376
377Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
378
379 * configure.in (configdirs): Test for the target directory instead
380 of matching on a target.
381
GDB Binutils - Deliverables
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