Commit | Line | Data |
---|---|---|
f337710a | 1 | start-sanitize-sky |
072ba148 DE |
2 | Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com> |
3 | ||
4 | * sim/sky/vu01reg-main.c: New file. | |
5 | * sim/sky/vu01reg.dvpasm: New file. | |
6 | * sim/sky/vu01reg.brn: New file. | |
7 | ||
21ba2ab4 DE |
8 | * sim/sky/vu.h (VU0_MEM1_WINDOW_START): New macro. |
9 | (VU0_MEM1_SIZE): New macro. | |
10 | ||
b8f9289f DE |
11 | * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options, |
12 | which is now a list of options controlling the behaviour of sim_run. | |
13 | ||
cfedac22 | 14 | * sim/sky/sky-defs.tcl (run_brn_test): Fix `options' arg to |
bee3033d | 15 | sim_compile. Fix handling of dvpasm_flags. |
b8f9289f | 16 | (run_trc_test): Update to new way of environment variables to sim_run. |
cfedac22 | 17 | |
f337710a FCE |
18 | Wed Jun 10 15:56:10 1998 Frank Ch. Eigler <fche@cygnus.com> |
19 | ||
20 | * sim/sky/t-int.c: New file to test sky hardware | |
21 | interrupts. | |
22 | * sim/sky/t-int-handler.s: New file for null interrupt | |
23 | handler. | |
24 | * sim/sky/t-int.brn: New file to build new test. | |
25 | ||
26 | end-sanitize-sky | |
f3c7eb69 DE |
27 | Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com> |
28 | ||
29 | * sim/m32r/addx.cgs: Add another test. | |
30 | * sim/m32r/jmp.cgs: Add another test. | |
31 | start-sanitize-m32rx | |
32 | * sim/m32r/bra8-2.cgs: New testcase. | |
33 | * sim/m32r/hello.ms: Run on m32rx too. | |
34 | end-sanitize-m32rx | |
35 | ||
5724515d DE |
36 | start-sanitize-sky |
37 | Tue Jun 9 08:55:05 1998 Doug Evans <devans@canuck.cygnus.com> | |
38 | ||
39 | * sim/sky/dma.h: New file. | |
40 | * sim/sky/vif.h: New file. | |
41 | * sim/sky/vu.h: New file. | |
42 | * sim/sky/sce_main.c: Move magic numbers to .h files. | |
43 | ||
44 | end-sanitize-sky | |
cacc8677 DE |
45 | Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com> |
46 | ||
47 | * sim/m32r/trap.cgs: Test trap 2. | |
48 | ||
22134bdb FCE |
49 | Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com> |
50 | ||
51 | * lib/sim-defs.exp (sim_run): Add possible environment variable | |
52 | list to simulator run. | |
53 | start-sanitize-sky | |
54 | * sim/sky/sky-defs.tcl: Use it. | |
55 | ||
56 | * sim/sky/t-pke2.vif1out: Update to match recent word-precise | |
57 | tracking table change in sim/mips/sky-pke.c. | |
58 | * sim/sky/t-pke3.trc: Ditto. | |
59 | * sim/sky/t-pke4.vif0expect: Ditto. | |
60 | end-sanitize-sky | |
61 | ||
62 | Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com> | |
63 | ||
64 | * Makefile.in: Take RUNTEST out of FLAG_TO_PASS | |
65 | so that make check can be invoked recursively. | |
66 | ||
496b3694 DE |
67 | start-sanitize-sky |
68 | Mon May 18 10:37:47 1998 Doug Evans <devans@canuck.cygnus.com> | |
69 | ||
70 | * sim/sky/sky.ld: Delete file. | |
71 | ||
72 | end-sanitize-sky | |
41ab9a4b DE |
73 | Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com> |
74 | ||
90ef07f2 | 75 | * config/default.exp (CC,SIM): Delete. |
1461afc6 | 76 | start-sanitize-sky |
02a0ec91 | 77 | * sim/sky/sky-defs.tcl (LDSCRIPT,SIM): Delete. |
90ef07f2 DE |
78 | (run_trc_test): Use sim_compile, sim_run. Only delete temp files |
79 | if testcase passed. | |
80 | (run_brn_test): Ditto. | |
1461afc6 DE |
81 | * sim/sky/sky.exp: Add runtest_file_p support. Don't print |
82 | unsupported message if not sky. | |
83 | * sim/sky/sky_sce.exp: Likewise. | |
1461afc6 | 84 | end-sanitize-sky |
90ef07f2 | 85 | |
41ab9a4b DE |
86 | * lib/sim-defs.exp (sim_run): Fix handling of output redirection. |
87 | New arg prog_opts. All callers updated. | |
88 | ||
89 | Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com> | |
90 | ||
91 | * Makefile.in: Made "check" the target of two | |
92 | dependencies (test1, test2) so that test2 get a chance to | |
93 | run even when test1 failed if "make -k check" is used. | |
94 | ||
801354e7 DE |
95 | Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com> |
96 | ||
97 | * lib/sim-defs.exp (sim_version): Simplify. | |
98 | (sim_run): Implement. | |
99 | (run_sim_test): Use sim_run. | |
100 | (sim_compile): New proc. | |
101 | ||
102 | Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com> | |
103 | ||
104 | start-sanitize-sky | |
105 | * configure.in (testdir): Don't use old sky test directory. | |
106 | * configure: Regenerated | |
107 | * sky/Makefile.in: swallow stderr on buggy tests | |
108 | end-sanitize-sky | |
109 | * config/default.exp: Added C compiler settings. | |
110 | ||
dca2d4f4 DE |
111 | Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com> |
112 | ||
113 | * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS. | |
114 | ||
aa467704 DE |
115 | Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com> |
116 | ||
117 | * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails, | |
118 | try all machs. | |
119 | ||
581fd042 DE |
120 | * sim/m32r/addx.cgs: Test (-1)+(-1)+1. |
121 | ||
aa467704 DE |
122 | Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com> |
123 | ||
124 | * sim/m32r/mv[ft]achi.cgs: Fix expected result | |
125 | (sign extension of top 8 bits). | |
126 | start-sanitize-m32rx | |
127 | * sim/m32r/mv[ft]achi-a.cgs: Ditto. | |
128 | end-sanitize-m32rx | |
129 | ||
489564e2 DE |
130 | start-sanitize-m32rx |
131 | Tue Apr 14 14:06:34 1998 Doug Evans <devans@canuck.cygnus.com> | |
132 | ||
133 | * sim/m32r/maclh1.cgs: Fix testcase. | |
134 | * sim/m32r/maclh1-2.cgs: New testcase. | |
135 | ||
136 | Tue Mar 3 19:09:09 1998 Doug Evans <devans@canuck.cygnus.com> | |
137 | ||
138 | * sim/m32r/sat.cgs: Change sath to sat. | |
139 | ||
140 | end-sanitize-m32rx | |
9495a61e DE |
141 | Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com> |
142 | ||
143 | * Makefile.in (RUNTEST): Fix path to runtest. | |
144 | ||
559eba20 FCE |
145 | start-sanitize-sky |
146 | Tue Feb 24 19:47:56 1998 Frank Ch. Eigler <fche@cygnus.com> | |
147 | ||
148 | * configure.in (testdir): Added sky subdir for mips64r5900-sky-elf | |
149 | target. | |
150 | * configure: Regenerate. | |
151 | end-sanitize-sky | |
152 | ||
f83a90c4 NC |
153 | Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com> |
154 | ||
c801e51b | 155 | * sim/m32r/unlock.cgs: Fixed test. |
ab361c35 | 156 | * sim/m32r/mvfc.cgs: Fixed test. |
78cbe8f6 NC |
157 | * sim/m32r/remu.cgs: Fixed test. |
158 | ||
caa71f09 NC |
159 | * sim/m32r/bnc24.cgs: Test long BNC instruction. |
160 | * sim/m32r/bnc8.cgs: Test short BNC instruction. | |
161 | * sim/m32r/ld-plus.cgs: Test LD instruction. | |
162 | * sim/m32r/macwhi.cgs: Test MACWHI instruction. | |
163 | * sim/m32r/macwlo.cgs: Test MACWLO instruction. | |
164 | * sim/m32r/mulwhi.cgs: Test MULWHI instruction. | |
165 | * sim/m32r/mulwlo.cgs: Test MULWLO instruction. | |
166 | * sim/m32r/mvfachi.cgs: Test MVFACHI instruction. | |
167 | * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction. | |
168 | * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction. | |
f83a90c4 NC |
169 | * sim/m32r/addv.cgs: Test ADDV instruction. |
170 | * sim/m32r/addv3.cgs: Test ADDV3 instruction. | |
171 | * sim/m32r/addx.cgs: Test ADDX instruction. | |
172 | * sim/m32r/lock.cgs: Test LOCK instruction. | |
173 | * sim/m32r/neg.cgs: Test NEG instruction. | |
174 | * sim/m32r/not.cgs: Test NOT instruction. | |
175 | * sim/m32r/unlock.cgs: Test UNLOCK instruction. | |
caa71f09 NC |
176 | start-sanitize-m32rx |
177 | * sim/m32r/mvfachi-a.cgs: Test extended MVFACHI instruction. | |
aa467704 | 178 | * sim/m32r/mvfaclo-a.cgs: Test extended MVFACLO instruction. |
caa71f09 NC |
179 | * sim/m32r/mvtachi-a.cgs: Test extended MVTACHI instruction. |
180 | * sim/m32r/mvtaclo-a.cgs: Test extended MVTACLO instruction. | |
181 | end-sanitize-m32rx | |
d03da19e NC |
182 | Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com> |
183 | ||
e843e28b NC |
184 | * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an |
185 | address into a general register. | |
186 | ||
c4448eec NC |
187 | * sim/m32r/or3.cgs: Test OR3 instruction. |
188 | * sim/m32r/rach.cgs: Test RACH instruction. | |
189 | * sim/m32r/rem.cgs: Test REM instruction. | |
190 | * sim/m32r/sub.cgs: Test SUB instruction. | |
191 | * sim/m32r/mv.cgs: Test MV instruction. | |
192 | * sim/m32r/mul.cgs: Test MUL instruction. | |
67dfe6e8 NC |
193 | * sim/m32r/bl24.cgs: Test long BL instruction. |
194 | * sim/m32r/bl8.cgs: Test short BL instruction. | |
195 | * sim/m32r/blez.cgs: Test BLEZ instruction. | |
196 | * sim/m32r/bltz.cgs: Test BLTZ instruction. | |
197 | * sim/m32r/bne.cgs: Test BNE instruction. | |
198 | * sim/m32r/bnez.cgs: Test BNEZ instruction. | |
199 | * sim/m32r/bra24.cgs: Test long BRA instruction. | |
200 | * sim/m32r/bra8.cgs: Test short BRA instruction. | |
201 | * sim/m32r/jl.cgs: Test JL instruction. | |
202 | * sim/m32r/or.cgs: Test OR instruction. | |
203 | * sim/m32r/jmp.cgs: Test JMP instruction. | |
dfe9df58 NC |
204 | * sim/m32r/and.cgs: Test AND instruction. |
205 | * sim/m32r/and3.cgs: Test AND3 instruction. | |
206 | * sim/m32r/beq.cgs: Test BEQ instruction. | |
207 | * sim/m32r/beqz.cgs: Test BEQZ instruction. | |
208 | * sim/m32r/bgez.cgs: Test BGEZ instruction. | |
209 | * sim/m32r/bgtz.cgs: Test BGTZ instruction. | |
210 | * sim/m32r/cmp.cgs: Test CMP instruction. | |
211 | * sim/m32r/cmpi.cgs: Test CMPI instruction. | |
212 | * sim/m32r/cmpu.cgs: Test CMPU instruction. | |
213 | * sim/m32r/cmpui.cgs: Test CMPUI instruction. | |
214 | * sim/m32r/div.cgs: Test DIV instruction. | |
67dfe6e8 | 215 | * sim/m32r/divu.cgs: Test DIVU instruction. |
dfe9df58 | 216 | * sim/m32r/cmpeq.cgs: Test CMPEQ instruction. |
dfe9df58 NC |
217 | * sim/m32r/sll.cgs: Test SLL instruction. |
218 | * sim/m32r/sll3.cgs: Test SLL3 instruction. | |
219 | * sim/m32r/slli.cgs: Test SLLI instruction. | |
0a2f6d93 NC |
220 | * sim/m32r/sra.cgs: Test SRA instruction. |
221 | * sim/m32r/sra3.cgs: Test SRA3 instruction. | |
222 | * sim/m32r/srai.cgs: Test SRAI instruction. | |
223 | * sim/m32r/srl.cgs: Test SRL instruction. | |
224 | * sim/m32r/srl3.cgs: Test SRL3 instruction. | |
225 | * sim/m32r/srli.cgs: Test SRLI instruction. | |
226 | * sim/m32r/xor3.cgs: Test XOR3 instruction. | |
227 | * sim/m32r/xor.cgs: Test XOR instruction. | |
489564e2 | 228 | start-sanitize-m32rx |
67dfe6e8 NC |
229 | * sim/m32r/jnc.cgs: Test JNC instruction. |
230 | * sim/m32r/jc.cgs: Test JC instruction. | |
231 | * sim/m32r/cmpz.cgs: Test CMPZ instruction. | |
232 | * sim/m32r/bcl24.cgs: Test long version of BCL instruction | |
233 | * sim/m32r/bcl8.cgs: Test short BCL instruction. | |
234 | * sim/m32r/bncl24.cgs: Test long BNCL instruction. | |
235 | * sim/m32r/bncl8.cgs: Test short BNCL instruction. | |
236 | * sim/m32r/divh.cgs: Test DIVH instruction. | |
c4448eec | 237 | * sim/m32r/rach-dsi.cgs: Test extended RACH instruction. |
489564e2 | 238 | end-sanitize-m32rx |
ed063d52 DE |
239 | Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com> |
240 | ||
fdad7ba5 DE |
241 | * config/default.exp: New file. |
242 | * lib/sim-defs.exp: New file. | |
243 | * sim/m32r/*: m32r dejagnu simulator testsuite. | |
244 | ||
ed063d52 DE |
245 | * Makefile.in (build_alias): Define. |
246 | (arch): Define. | |
247 | (RUNTEST_FOR_TARGET): Delete. | |
248 | (RUNTEST): Fix. | |
d03da19e | 249 | (SCHEME,SCHEMEFLAGS,CGENDIR,CGENFLAGS): Define. |
ed063d52 DE |
250 | (check): Depend on site.exp. Run dejagnu. |
251 | (site.exp): New target. | |
252 | (cgen): New target. | |
253 | * configure.in: Call AC_CHECK_PROG(SCHEME) if using cgen. | |
254 | (arch): Define from target_cpu. | |
255 | * configure: Regenerate. | |
256 | ||
1a6eb36b AC |
257 | Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com> |
258 | ||
259 | * common/bits-gen.c (gen_bit): Pass in the full name of the macro. | |
260 | (gen_mask): Ditto. | |
261 | ||
262 | * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT. | |
263 | (calc): Add support for 8 bit version of macros. | |
264 | (main): Add tests for 8 bit versions of macros. | |
265 | (check_sext): Check SEXT of zero clears bits. | |
266 | ||
267 | * common/bits-gen.c (main): Generate tests for 8 bit versions of | |
268 | macros. | |
269 | ||
a2ab5e65 AC |
270 | Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com> |
271 | ||
272 | * common/Make-common.in: New file, provide generic rules for | |
273 | running checks. | |
274 | ||
52352d38 AC |
275 | Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com> |
276 | ||
277 | * configure.in (configdirs): Test for the target directory instead | |
278 | of matching on a target. | |
279 | ||
ed063d52 | 280 | start-sanitize-r5900 |
52352d38 AC |
281 | Tue Jul 15 13:43:20 1997 Andrew Cagney <cagney@sendai.cygnus.com> |
282 | ||
ed063d52 | 283 | * configure.in (configdirs): Configure mips64vr5900el |
52352d38 AC |
284 | directory. |
285 | * configure: Regenerate. | |
286 | ||
ed063d52 | 287 | end-sanitize-r5900 |