Commit | Line | Data |
---|---|---|
fbd93201 DB |
1 | 2003-09-09 Dave Brolley <brolley@redhat.com> |
2 | ||
3 | * sim/frv/maddaccs.cgs: move to fr400 subdirectory. | |
4 | * sim/frv/msubaccs.cgs: move to fr400 subdirectory. | |
5 | * sim/frv/masaccs.cgs: move to fr400 subdirectory. | |
6 | ||
19121792 MS |
7 | 2003-09-03 Michael Snyder <msnyder@redhat.com> |
8 | ||
cc985513 BE |
9 | * sim/frv/fr500/mclracc.cgs: Change mach to 'all', to be |
10 | consistent with other tests in the directory. | |
19121792 | 11 | |
0eb3d260 MS |
12 | 2003-09-03 Michael Snyder <msnyder@redhat.com> |
13 | ||
14 | * sim/frv/interrupts/Ipipe-fr400.cgs: New file. | |
15 | * sim/frv/interrupts/Ipipe-fr500.cgs: New file. | |
16 | * sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above). | |
17 | ||
51796a3f DB |
18 | 2003-08-20 Michael Snyder <msnyder@redhat.com> |
19 | On behalf of Dave Brolley | |
20 | ||
21 | * sim/frv: New testsuite. | |
22 | * frv-elf: New testsuite. | |
23 | ||
b7c7b624 MS |
24 | 2003-07-09 Michael Snyder <msnyder@redhat.com> |
25 | ||
26 | * sim/sh: New directory. Tests for Renesas sh family. | |
27 | ||
a27a0651 MS |
28 | 2003-04-13 Michael Snyder <msnyder@redhat.com> |
29 | ||
30 | * sim/h8300: New directory. Tests for Renesas h8/300 family. | |
31 | ||
49634642 NC |
32 | 2003-04-01 Nick Clifton <nickc@redhat.com> |
33 | ||
34 | * sim/arm: New directory: Tests for ARM simulator. | |
35 | * sim/arm/allinsn.exp: New file: Test script. | |
36 | * sim/arm/testutils.inc: New file: Test macros. | |
37 | * sim/arm/adc.cgs, sim/arm/add.cgs, sim/arm/and.cgs, | |
38 | sim/arm/b.cgs, sim/arm/bic.cgs, sim/arm/bl.cgs, sim/arm/bx.cgs, | |
39 | sim/arm/cmn.cgs, sim/arm/cmp.cgs, sim/arm/eor.cgs, | |
40 | sim/arm/hello.ms, sim/arm/ldm.cgs, sim/arm/ldr.cgs, | |
41 | sim/arm/ldrb.cgs, sim/arm/ldrh.cgs, sim/arm/ldrsb.cgs, | |
42 | sim/arm/ldrsh.cgs, sim/arm/misaligned1.ms, sim/arm/misaligned2.ms, | |
43 | sim/arm/misaligned3.ms, sim/arm/misc.exp, sim/arm/mla.cgs, | |
44 | sim/arm/mov.cgs, sim/arm/mrs.cgs, sim/arm/msr.cgs, | |
45 | sim/arm/mul.cgs, sim/arm/mvn.cgs, sim/arm/orr.cgs, | |
46 | sim/arm/rsb.cgs, sim/arm/rsc.cgs, sim/arm/sbc.cgs, | |
47 | sim/arm/smlal.cgs, sim/arm/smull.cgs, sim/arm/stm.cgs, | |
48 | sim/arm/str.cgs, sim/arm/strb.cgs, sim/arm/strh.cgs, | |
49 | sim/arm/sub.cgs, sim/arm/swi.cgs, sim/arm/swp.cgs, | |
50 | sim/arm/swpb.cgs, sim/arm/teq.cgs, sim/arm/tst.cgs, | |
51 | sim/arm/umlal.cgs, sim/arm/umull.cgs: New files: ARM tests. | |
52 | * sim/arm/iwmmxt: New Directory: Tests for iWMMXt. | |
53 | * sim/arm/iwmmxt/iwmmxt.exp: New file: Test script. | |
54 | * sim/arm/iwmmxt/testutils.inc: New file: Test macros. | |
55 | * sim/arm/iwmmxt/tbcst.cgs, sim/arm/iwmmxt/textrm.cgs, | |
56 | sim/arm/iwmmxt/tinsr.cgs, sim/arm/iwmmxt/tmia.cgs, | |
57 | sim/arm/iwmmxt/tmiaph.cgs, sim/arm/iwmmxt/tmiaxy.cgs, | |
58 | sim/arm/iwmmxt/tmovmsk.cgss, sim/arm/iwmmxt/wacc.cgs, | |
59 | sim/arm/iwmmxt/wadd.cgs, sim/arm/iwmmxt/waligni.cgs, | |
60 | sim/arm/iwmmxt/walignr.cgs, sim/arm/iwmmxt/wand.cgs, | |
61 | sim/arm/iwmmxt/wandn.cgs, sim/arm/iwmmxt/wavg2.cgs, | |
62 | sim/arm/iwmmxt/wcmpeq.cgs, sim/arm/iwmmxt/wcmpgt.cgs, | |
63 | sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wmadd.cgs, | |
64 | sim/arm/iwmmxt/wmax.cgs, sim/arm/iwmmxt/wmin.cgs, | |
65 | sim/arm/iwmmxt/wmov.cgs, sim/arm/iwmmxt/wmul.cgs, | |
66 | sim/arm/iwmmxt/wor.cgs, sim/arm/iwmmxt/wpack.cgs, | |
67 | sim/arm/iwmmxt/wror.cgs, sim/arm/iwmmxt/wsad.cgs, | |
68 | sim/arm/iwmmxt/wshufh.cgs, sim/arm/iwmmxt/wsll.cgs, | |
69 | sim/arm/iwmmxt/wsra.cgs, sim/arm/iwmmxt/wsrl.cgs, | |
70 | sim/arm/iwmmxt/wsub.cgs, sim/arm/iwmmxt/wunpckeh.cgs, | |
71 | sim/arm/iwmmxt/wunpckel.cgs, sim/arm/iwmmxt/wunpckih.cgs, | |
72 | sim/arm/iwmmxt/wunpckil.cgs, sim/arm/iwmmxt/wxor.cgs, | |
73 | sim/arm/iwmmxt/wzero.cgs: New files: iWMMXt tests. | |
74 | * sim/arm/thumb: New Directory: Thumb tests. | |
75 | * sim/arm/thumb/allthumb.exp: New file: Test script. | |
76 | * sim/arm/thumb/testutils.inc: New file: Test macros. | |
77 | * sim/arm/thumb/adc.cgs, sim/arm/thumb/add-hd-hs.cgs, | |
78 | sim/arm/thumb/add-hd-rs.cgs, sim/arm/thumb/add-rd-hs.cgs, | |
79 | sim/arm/thumb/add-sp.cgs, sim/arm/thumb/add.cgs, | |
80 | sim/arm/thumb/addi.cgs, sim/arm/thumb/addi8.cgs, | |
81 | sim/arm/thumb/and.cgs, sim/arm/thumb/asr.cgs, sim/arm/thumb/b.cgs, | |
82 | sim/arm/thumb/bcc.cgs, sim/arm/thumb/bcs.cgs, | |
83 | sim/arm/thumb/beq.cgs, sim/arm/thumb/bge.cgs, | |
84 | sim/arm/thumb/bgt.cgs, sim/arm/thumb/bhi.cgs, | |
85 | sim/arm/thumb/bic.cgs, sim/arm/thumb/bl-hi.cgs, | |
86 | sim/arm/thumb/bl-lo.cgs, sim/arm/thumb/ble.cgs, | |
87 | sim/arm/thumb/bls.cgs, sim/arm/thumb/blt.cgs, | |
88 | sim/arm/thumb/bmi.cgs, sim/arm/thumb/bne.cgs, | |
89 | sim/arm/thumb/bpl.cgs, sim/arm/thumb/bvc.cgs, | |
90 | sim/arm/thumb/bvs.cgs, sim/arm/thumb/bx-hs.cgs, | |
91 | sim/arm/thumb/bx-rs.cgs, sim/arm/thumb/cmn.cgs, | |
92 | sim/arm/thumb/cmp-hd-hs.cgs, sim/arm/thumb/cmp-hd-rs.cgs, | |
93 | sim/arm/thumb/cmp-rd-hs.cgs, sim/arm/thumb/cmp.cgs, | |
94 | sim/arm/thumb/eor.cgs, sim/arm/thumb/lda-pc.cgs, | |
95 | sim/arm/thumb/lda-sp.cgs, sim/arm/thumb/ldmia.cgs, | |
96 | sim/arm/thumb/ldr-imm.cgs, sim/arm/thumb/ldr-pc.cgs, | |
97 | sim/arm/thumb/ldr-sprel.cgs, sim/arm/thumb/ldr.cgs, | |
98 | sim/arm/thumb/ldrb-imm.cgs, sim/arm/thumb/ldrb.cgs, | |
99 | sim/arm/thumb/ldrh-imm.cgs, sim/arm/thumb/ldrh.cgs, | |
100 | sim/arm/thumb/ldsb.cgs, sim/arm/thumb/ldsh.cgs, | |
101 | sim/arm/thumb/lsl.cgs, sim/arm/thumb/lsr.cgs, | |
102 | sim/arm/thumb/mov-hd-hs.cgs, sim/arm/thumb/mov-hd-rs.cgs, | |
103 | sim/arm/thumb/mov-rd-hs.cgs, sim/arm/thumb/mov.cgs, | |
104 | sim/arm/thumb/mul.cgs, sim/arm/thumb/mvn.cgs, | |
105 | sim/arm/thumb/neg.cgs, sim/arm/thumb/orr.cgs, | |
106 | sim/arm/thumb/pop-pc.cgs, sim/arm/thumb/pop.cgs, | |
107 | sim/arm/thumb/push-lr.cgs, sim/arm/thumb/push.cgs, | |
108 | sim/arm/thumb/ror.cgs, sim/arm/thumb/sbc.cgs, | |
109 | sim/arm/thumb/stmia.cgs, sim/arm/thumb/str-imm.cgs, | |
110 | sim/arm/thumb/str-sprel.cgs, sim/arm/thumb/str.cgs, | |
111 | sim/arm/thumb/strb-imm.cgs, sim/arm/thumb/strb.cgs, | |
112 | sim/arm/thumb/strh-imm.cgs, sim/arm/thumb/strh.cgs, | |
113 | sim/arm/thumb/sub-sp.cgs, sim/arm/thumb/sub.cgs, | |
114 | sim/arm/thumb/subi.cgs, sim/arm/thumb/subi8.cgs, | |
115 | sim/arm/thumb/swi.cgs, sim/arm/thumb/tst.cgs: New files: Thumb | |
116 | tests. | |
117 | * sim/arm/xscale: New directory. | |
118 | * sim/arm/xscale/xscale.exp: New file: Test script. | |
119 | * sim/arm/xscale/testutils.inc: New file: Test macros. | |
120 | * sim/arm/xscale/blx.cgs, sim/arm/xscale/mia.cgs, | |
121 | sim/arm/xscale/miaph.cgs, sim/arm/xscale/miaxy.cgs, | |
122 | sim/arm/xscale/mra.cgs: New files: XScale tests. | |
123 | ||
c8cca39f AC |
124 | 2002-06-16 Andrew Cagney <ac131313@redhat.com> |
125 | ||
126 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
127 | ||
f18ee7ef BE |
128 | 2001-07-31 Ben Elliston <bje@redhat.com> |
129 | ||
130 | * lib/sim-defs.exp (run_sim_test): Include a description such as | |
131 | "assembling" or "linking" that identifies the phase a test fails | |
132 | in, for easier analysis of failures. | |
133 | ||
0ab7df8a DB |
134 | 2000-11-01 Dave Brolley <brolley@cygnus.com> |
135 | ||
136 | * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and | |
137 | "xerror" options do not use a list of machines. Clear options from | |
138 | previous test case. Use "$cpu_option" to identify the machine to the | |
139 | assembler, if specified. | |
140 | ||
eb2d80b4 AC |
141 | Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> |
142 | ||
143 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
144 | ||
c2c6d25f JM |
145 | 1999-09-15 Doug Evans <devans@casey.cygnus.com> |
146 | ||
147 | * sim/arm/b.cgs: New testcase. | |
148 | * sim/arm/bic.cgs: New testcase. | |
149 | * sim/arm/bl.cgs: New testcase. | |
150 | ||
d4f3574e SS |
151 | Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> |
152 | ||
153 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
154 | ||
104c1213 JM |
155 | 1999-08-30 Doug Evans <devans@casey.cygnus.com> |
156 | ||
104c1213 JM |
157 | * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to |
158 | requested_machs, now is list of machs to run tests for. | |
159 | Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble | |
160 | and target_link instead. | |
161 | ||
7a292a7a SS |
162 | 1999-04-21 Doug Evans <devans@casey.cygnus.com> |
163 | ||
164 | * sim/m32r/nop.cgs: Add missing nop insn. | |
165 | ||
166 | Mon Mar 22 13:28:56 1999 Dave Brolley <brolley@cygnus.com> | |
167 | ||
168 | * sim/fr30/stb.cgs: Correct for unaligned access. | |
169 | * sim/fr30/sth.cgs: Correct for unaligned access. | |
170 | * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct | |
171 | for unaligned access. | |
172 | * sim/fr30/and.cgs: Test unaligned access. | |
173 | ||
c906108c SS |
174 | Fri Feb 5 12:41:11 1999 Doug Evans <devans@canuck.cygnus.com> |
175 | ||
176 | * lib/sim-defs.exp (sim_run): Print simulator arguments log message. | |
177 | ||
178 | 1999-01-05 Doug Evans <devans@casey.cygnus.com> | |
179 | ||
180 | * lib/sim-defs.exp (run_sim_test): New arg all_machs. | |
181 | * sim/fr30/allinsn.exp: Update. | |
182 | * sim/fr30/misc.exp: Update. | |
183 | * sim/m32r/allinsn.exp: Update. | |
184 | * sim/m32r/misc.exp: Update. | |
185 | ||
186 | Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com> | |
187 | ||
188 | * sim/fr30/ldres.cgs: New testcase. | |
189 | * sim/fr30/copld.cgs: New testcase. | |
190 | * sim/fr30/copst.cgs: New testcase. | |
191 | * sim/fr30/copsv.cgs: New testcase. | |
192 | * sim/fr30/nop.cgs: New testcase. | |
193 | * sim/fr30/andccr.cgs: New testcase. | |
194 | * sim/fr30/orccr.cgs: New testcase. | |
195 | * sim/fr30/addsp.cgs: New testcase. | |
196 | * sim/fr30/stilm.cgs: New testcase. | |
197 | * sim/fr30/extsb.cgs: New testcase. | |
198 | * sim/fr30/extub.cgs: New testcase. | |
199 | * sim/fr30/extsh.cgs: New testcase. | |
200 | * sim/fr30/extuh.cgs: New testcase. | |
201 | * sim/fr30/enter.cgs: New testcase. | |
202 | * sim/fr30/leave.cgs: New testcase. | |
203 | * sim/fr30/xchb.cgs: New testcase. | |
204 | * sim/fr30/dmovb.cgs: New testcase. | |
205 | * sim/fr30/dmov.cgs: New testcase. | |
206 | * sim/fr30/dmovh.cgs: New testcase. | |
207 | ||
208 | Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com> | |
209 | ||
210 | * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros. | |
211 | * sim/fr30/ret.cgs: Add tests fir ret:d. | |
212 | * sim/fr30/inte.cgs: New testcase. | |
213 | * sim/fr30/reti.cgs: New testcase. | |
214 | * sim/fr30/bra.cgs: New testcase. | |
215 | * sim/fr30/bno.cgs: New testcase. | |
216 | * sim/fr30/beq.cgs: New testcase. | |
217 | * sim/fr30/bne.cgs: New testcase. | |
218 | * sim/fr30/bc.cgs: New testcase. | |
219 | * sim/fr30/bnc.cgs: New testcase. | |
220 | * sim/fr30/bn.cgs: New testcase. | |
221 | * sim/fr30/bp.cgs: New testcase. | |
222 | * sim/fr30/bv.cgs: New testcase. | |
223 | * sim/fr30/bnv.cgs: New testcase. | |
224 | * sim/fr30/blt.cgs: New testcase. | |
225 | * sim/fr30/bge.cgs: New testcase. | |
226 | * sim/fr30/ble.cgs: New testcase. | |
227 | * sim/fr30/bgt.cgs: New testcase. | |
228 | * sim/fr30/bls.cgs: New testcase. | |
229 | * sim/fr30/bhi.cgs: New testcase. | |
230 | ||
231 | Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com> | |
232 | ||
233 | * sim/fr30/div.cgs (int): Add signed division scenario. | |
234 | * sim/fr30/int.cgs (int): Complete testcase. | |
235 | * sim/fr30/testutils.inc (_start): Initialize tbr. | |
236 | (test_s_user,test_s_system,set_i,test_i): New macros. | |
237 | ||
238 | 1998-12-14 Doug Evans <devans@casey.cygnus.com> | |
239 | ||
240 | * lib/sim-defs.exp (run_sim_test): New option xerror, for expected | |
241 | errors. Translate \n sequences in expected output to newline char. | |
242 | (slurp_options): Make parentheses optional. | |
243 | (sim_run): Look for board_info sim,options. | |
244 | * sim/fr30/hello.ms: Add trailing \n to expected output. | |
245 | * sim/m32r/hello.ms: Ditto. | |
246 | * sim/m32r/hw-trap.ms: Ditto. | |
247 | ||
248 | * sim/m32r/trap.cgs: Properly align trap2_handler. | |
249 | ||
250 | * sim/m32r/uread16.ms: New testcase. | |
251 | * sim/m32r/uread32.ms: New testcase. | |
252 | * sim/m32r/uwrite16.ms: New testcase. | |
253 | * sim/m32r/uwrite32.ms: New testcase. | |
254 | ||
255 | 1998-12-14 Dave Brolley <brolley@cygnus.com> | |
256 | ||
257 | * sim/fr30/call.cgs: Test ret here as well. | |
258 | * sim/fr30/ld.cgs: Remove bogus comment. | |
259 | * sim/fr30/testutils.inc (save_rp,restore_rp): New macros. | |
260 | * sim/fr30/div.ms: New testcase. | |
261 | * sim/fr30/st.cgs: New testcase. | |
262 | * sim/fr30/sth.cgs: New testcase. | |
263 | * sim/fr30/stb.cgs: New testcase. | |
264 | * sim/fr30/mov.cgs: New testcase. | |
265 | * sim/fr30/jmp.cgs: New testcase. | |
266 | * sim/fr30/ret.cgs: New testcase. | |
267 | * sim/fr30/int.cgs: New testcase. | |
268 | ||
269 | Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com> | |
270 | ||
271 | * sim/fr30/div0s.cgs: New testcase. | |
272 | * sim/fr30/div0u.cgs: New testcase. | |
273 | * sim/fr30/div1.cgs: New testcase. | |
274 | * sim/fr30/div2.cgs: New testcase. | |
275 | * sim/fr30/div3.cgs: New testcase. | |
276 | * sim/fr30/div4s.cgs: New testcase. | |
277 | * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros. | |
278 | ||
279 | Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com> | |
280 | ||
281 | * sim/fr30/testutils.inc (set_s_user): Correct Mask. | |
282 | (set_s_system): Correct Mask. | |
283 | * sim/fr30/ld.cgs (ld): Move previously failing test back | |
284 | into place. | |
285 | * sim/fr30/ldm0.cgs: New testcase. | |
286 | * sim/fr30/ldm1.cgs: New testcase. | |
287 | * sim/fr30/stm0.cgs: New testcase. | |
288 | * sim/fr30/stm1.cgs: New testcase. | |
289 | ||
290 | Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com> | |
291 | ||
292 | * sim/fr30/ld.cgs: Implement more loads. | |
293 | * sim/fr30/call.cgs: New testcase. | |
294 | * sim/fr30/testutils.inc (testr_h_dr): New macro. | |
295 | (set_s_user,set_s_system): New macros. | |
296 | ||
297 | * sim/fr30: New Directory. | |
298 | ||
299 | Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
300 | ||
301 | * common/bits-gen.c (main): Add BYTE_ORDER so that it matches | |
302 | recent sim/common/sim-basics.h changes. | |
303 | * common/Makefile.in: Update. | |
304 | ||
305 | Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com> | |
306 | ||
307 | * lib/sim-defs.exp (sim_run): download target program to remote | |
308 | host, if necessary. for unix-driven win32 testing. | |
309 | ||
310 | Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com> | |
311 | ||
312 | * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr. | |
313 | * sim/m32r/rte.cgs: Test bbpc,bbpsw. | |
314 | * sim/m32r/trap.cgs: Test bbpc,bbpsw. | |
315 | ||
7a292a7a SS |
316 | Fri Jul 31 17:49:13 1998 Felix Lee <flee@cygnus.com> |
317 | ||
318 | * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of | |
319 | writeonly. | |
320 | ||
c906108c SS |
321 | Fri Jul 24 09:40:34 1998 Doug Evans <devans@canuck.cygnus.com> |
322 | ||
323 | * Makefile.in (clean,mostlyclean): Change leading spaces to a tab. | |
324 | ||
325 | Wed Jul 1 15:57:54 1998 Doug Evans <devans@seba.cygnus.com> | |
326 | ||
327 | * sim/m32r/hw-trap.ms: New testcase. | |
328 | ||
7a292a7a SS |
329 | Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com> |
330 | ||
331 | * lib/sim-defs.exp: Print out timeout setting info when "-v" is used. | |
332 | ||
333 | Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com> | |
334 | ||
335 | * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options, | |
336 | which is now a list of options controlling the behaviour of sim_run. | |
337 | ||
c906108c SS |
338 | Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com> |
339 | ||
340 | * sim/m32r/addx.cgs: Add another test. | |
341 | * sim/m32r/jmp.cgs: Add another test. | |
342 | ||
343 | Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com> | |
344 | ||
345 | * sim/m32r/trap.cgs: Test trap 2. | |
346 | ||
347 | Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com> | |
348 | ||
349 | * lib/sim-defs.exp (sim_run): Add possible environment variable | |
350 | list to simulator run. | |
351 | ||
352 | Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com> | |
353 | ||
354 | * Makefile.in: Take RUNTEST out of FLAG_TO_PASS | |
355 | so that make check can be invoked recursively. | |
356 | ||
357 | Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com> | |
358 | ||
359 | * config/default.exp (CC,SIM): Delete. | |
360 | ||
361 | * lib/sim-defs.exp (sim_run): Fix handling of output redirection. | |
362 | New arg prog_opts. All callers updated. | |
363 | ||
364 | Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com> | |
365 | ||
366 | * Makefile.in: Made "check" the target of two | |
367 | dependencies (test1, test2) so that test2 get a chance to | |
368 | run even when test1 failed if "make -k check" is used. | |
369 | ||
370 | Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com> | |
371 | ||
372 | * lib/sim-defs.exp (sim_version): Simplify. | |
373 | (sim_run): Implement. | |
374 | (run_sim_test): Use sim_run. | |
375 | (sim_compile): New proc. | |
376 | ||
377 | Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com> | |
378 | ||
379 | * config/default.exp: Added C compiler settings. | |
380 | ||
381 | Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com> | |
382 | ||
383 | * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS. | |
384 | ||
385 | Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com> | |
386 | ||
387 | * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails, | |
388 | try all machs. | |
389 | ||
390 | * sim/m32r/addx.cgs: Test (-1)+(-1)+1. | |
391 | ||
392 | Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com> | |
393 | ||
394 | * sim/m32r/mv[ft]achi.cgs: Fix expected result | |
395 | (sign extension of top 8 bits). | |
396 | ||
397 | Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com> | |
398 | ||
399 | * Makefile.in (RUNTEST): Fix path to runtest. | |
400 | ||
c906108c SS |
401 | Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com> |
402 | ||
403 | * sim/m32r/unlock.cgs: Fixed test. | |
404 | * sim/m32r/mvfc.cgs: Fixed test. | |
405 | * sim/m32r/remu.cgs: Fixed test. | |
c906108c SS |
406 | * sim/m32r/bnc24.cgs: Test long BNC instruction. |
407 | * sim/m32r/bnc8.cgs: Test short BNC instruction. | |
408 | * sim/m32r/ld-plus.cgs: Test LD instruction. | |
409 | * sim/m32r/macwhi.cgs: Test MACWHI instruction. | |
410 | * sim/m32r/macwlo.cgs: Test MACWLO instruction. | |
411 | * sim/m32r/mulwhi.cgs: Test MULWHI instruction. | |
412 | * sim/m32r/mulwlo.cgs: Test MULWLO instruction. | |
413 | * sim/m32r/mvfachi.cgs: Test MVFACHI instruction. | |
414 | * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction. | |
415 | * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction. | |
416 | * sim/m32r/addv.cgs: Test ADDV instruction. | |
417 | * sim/m32r/addv3.cgs: Test ADDV3 instruction. | |
418 | * sim/m32r/addx.cgs: Test ADDX instruction. | |
419 | * sim/m32r/lock.cgs: Test LOCK instruction. | |
420 | * sim/m32r/neg.cgs: Test NEG instruction. | |
421 | * sim/m32r/not.cgs: Test NOT instruction. | |
422 | * sim/m32r/unlock.cgs: Test UNLOCK instruction. | |
58fddbac | 423 | |
c906108c SS |
424 | Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com> |
425 | ||
426 | * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an | |
427 | address into a general register. | |
428 | ||
429 | * sim/m32r/or3.cgs: Test OR3 instruction. | |
430 | * sim/m32r/rach.cgs: Test RACH instruction. | |
431 | * sim/m32r/rem.cgs: Test REM instruction. | |
432 | * sim/m32r/sub.cgs: Test SUB instruction. | |
433 | * sim/m32r/mv.cgs: Test MV instruction. | |
434 | * sim/m32r/mul.cgs: Test MUL instruction. | |
435 | * sim/m32r/bl24.cgs: Test long BL instruction. | |
436 | * sim/m32r/bl8.cgs: Test short BL instruction. | |
437 | * sim/m32r/blez.cgs: Test BLEZ instruction. | |
438 | * sim/m32r/bltz.cgs: Test BLTZ instruction. | |
439 | * sim/m32r/bne.cgs: Test BNE instruction. | |
440 | * sim/m32r/bnez.cgs: Test BNEZ instruction. | |
441 | * sim/m32r/bra24.cgs: Test long BRA instruction. | |
442 | * sim/m32r/bra8.cgs: Test short BRA instruction. | |
443 | * sim/m32r/jl.cgs: Test JL instruction. | |
444 | * sim/m32r/or.cgs: Test OR instruction. | |
445 | * sim/m32r/jmp.cgs: Test JMP instruction. | |
446 | * sim/m32r/and.cgs: Test AND instruction. | |
447 | * sim/m32r/and3.cgs: Test AND3 instruction. | |
448 | * sim/m32r/beq.cgs: Test BEQ instruction. | |
449 | * sim/m32r/beqz.cgs: Test BEQZ instruction. | |
450 | * sim/m32r/bgez.cgs: Test BGEZ instruction. | |
451 | * sim/m32r/bgtz.cgs: Test BGTZ instruction. | |
452 | * sim/m32r/cmp.cgs: Test CMP instruction. | |
453 | * sim/m32r/cmpi.cgs: Test CMPI instruction. | |
454 | * sim/m32r/cmpu.cgs: Test CMPU instruction. | |
455 | * sim/m32r/cmpui.cgs: Test CMPUI instruction. | |
456 | * sim/m32r/div.cgs: Test DIV instruction. | |
457 | * sim/m32r/divu.cgs: Test DIVU instruction. | |
458 | * sim/m32r/cmpeq.cgs: Test CMPEQ instruction. | |
459 | * sim/m32r/sll.cgs: Test SLL instruction. | |
460 | * sim/m32r/sll3.cgs: Test SLL3 instruction. | |
461 | * sim/m32r/slli.cgs: Test SLLI instruction. | |
462 | * sim/m32r/sra.cgs: Test SRA instruction. | |
463 | * sim/m32r/sra3.cgs: Test SRA3 instruction. | |
464 | * sim/m32r/srai.cgs: Test SRAI instruction. | |
465 | * sim/m32r/srl.cgs: Test SRL instruction. | |
466 | * sim/m32r/srl3.cgs: Test SRL3 instruction. | |
467 | * sim/m32r/srli.cgs: Test SRLI instruction. | |
468 | * sim/m32r/xor3.cgs: Test XOR3 instruction. | |
469 | * sim/m32r/xor.cgs: Test XOR instruction. | |
58fddbac | 470 | |
c906108c SS |
471 | Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com> |
472 | ||
473 | * config/default.exp: New file. | |
474 | * lib/sim-defs.exp: New file. | |
475 | * sim/m32r/*: m32r dejagnu simulator testsuite. | |
476 | ||
477 | * Makefile.in (build_alias): Define. | |
478 | (arch): Define. | |
479 | (RUNTEST_FOR_TARGET): Delete. | |
480 | (RUNTEST): Fix. | |
481 | (check): Depend on site.exp. Run dejagnu. | |
482 | (site.exp): New target. | |
483 | * configure.in (arch): Define from target_cpu. | |
484 | * configure: Regenerate. | |
485 | ||
486 | Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
487 | ||
488 | * common/bits-gen.c (gen_bit): Pass in the full name of the macro. | |
489 | (gen_mask): Ditto. | |
490 | ||
491 | * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT. | |
492 | (calc): Add support for 8 bit version of macros. | |
493 | (main): Add tests for 8 bit versions of macros. | |
494 | (check_sext): Check SEXT of zero clears bits. | |
495 | ||
496 | * common/bits-gen.c (main): Generate tests for 8 bit versions of | |
497 | macros. | |
498 | ||
499 | Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
500 | ||
501 | * common/Make-common.in: New file, provide generic rules for | |
502 | running checks. | |
503 | ||
504 | Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
505 | ||
506 | * configure.in (configdirs): Test for the target directory instead | |
507 | of matching on a target. | |
508 |