Commit | Line | Data |
---|---|---|
1d7b4a70 MF |
1 | //Original:/testcases/core/c_multi_issue_dsp_ld_ld/c_multi_issue_dsp_ld_ld.dsp |
2 | // Spec Reference: dsp32mac and 2 loads | |
3 | # mach: bfin | |
4 | ||
5 | .include "testutils.inc" | |
6 | start | |
7 | ||
8 | INIT_R_REGS 0; | |
9 | ||
10 | imm32 r0, 0x00000000; | |
11 | A0 = 0; | |
12 | A1 = 0; | |
13 | ASTAT = r0; | |
14 | ||
15 | loadsym I0, DATA0 | |
16 | loadsym I1, DATA1 | |
17 | ||
18 | loadsym P1, DATA0 | |
19 | loadsym P2, DATA1 | |
20 | ||
21 | // test the default (signed fraction : left ) | |
22 | imm32 r0, 0x12345678; | |
23 | imm32 r1, 0x33456789; | |
24 | imm32 r2, 0x5556789a; | |
25 | imm32 r3, 0x75678912; | |
26 | imm32 r4, 0x86789123; | |
27 | imm32 r5, 0xa7891234; | |
28 | imm32 r6, 0xc1234567; | |
29 | imm32 r7, 0xf1234567; | |
30 | A1 = R0.L * R1.L, A0 = R0.L * R1.L || R0 = [ I0 ++ ] || R1 = [ I1 ++ ]; | |
31 | A1 += R2.L * R3.L, A0 += R2.L * R3.H || R2 = [ I0 ++ ] || R3 = [ I1 ++ ]; | |
32 | A1 += R6.H * R7.H, A0 += R6.H * R7.L || R4 = [ P1 ++ ] || R5 = [ I1 ++ ]; | |
33 | R6 = A0.w; | |
34 | R7 = A1.w; | |
35 | CHECKREG r0, 0x000A0000; | |
36 | CHECKREG r1, 0x00F00100; | |
37 | CHECKREG r2, 0x000B0001; | |
38 | CHECKREG r3, 0x00E00101; | |
39 | CHECKREG r4, 0x000A0000; | |
40 | CHECKREG r5, 0x00D00102; | |
41 | CHECKREG r6, 0x92793486; | |
42 | CHECKREG r7, 0xDD2F9BAA; | |
43 | ||
44 | imm32 r0, 0x12245618; | |
45 | imm32 r1, 0x23256719; | |
46 | imm32 r2, 0x3426781a; | |
47 | imm32 r3, 0x45278912; | |
48 | imm32 r4, 0x56289113; | |
49 | imm32 r5, 0x67291214; | |
50 | imm32 r6, 0xa1234517; | |
51 | imm32 r7, 0xc1234517; | |
52 | A1 = R0.L * R1.L, A0 = R0.L * R1.L || R4 = [ P1 ++ ] || R6 = [ I0 ++ ]; | |
53 | A1 -= R2.L * R3.L, A0 += R2.L * R3.H || R2 = [ P2 ++ ] || R3 = [ I1 ++ ]; | |
54 | A1 += R4.H * R6.H, A0 -= R4.H * R6.L || [ P2 ++ ] = R5 || R7 = [ I1 ++ ]; | |
55 | R6 = A0.w; | |
56 | R7 = A1.w; | |
57 | CHECKREG r0, 0x12245618; | |
58 | CHECKREG r1, 0x23256719; | |
59 | CHECKREG r2, 0x00F00100; | |
60 | CHECKREG r3, 0x00C00103; | |
61 | CHECKREG r4, 0x000B0001; | |
62 | CHECKREG r5, 0x67291214; | |
63 | CHECKREG r6, 0x863ABC70; | |
64 | CHECKREG r7, 0xB4EF6A10; | |
65 | ||
66 | imm32 r0, 0x15245648; | |
67 | imm32 r1, 0x25256749; | |
68 | imm32 r2, 0x3526784a; | |
69 | imm32 r3, 0x45278942; | |
70 | imm32 r4, 0x55389143; | |
71 | imm32 r5, 0x65391244; | |
72 | imm32 r6, 0xa5334547; | |
73 | imm32 r7, 0xc5334547; | |
74 | A1 += R0.H * R1.H, A0 += R0.L * R1.L || R2 = [ P1 ++ ] || R0 = [ I1 -- ]; | |
75 | A1 += R2.H * R3.H, A0 += R2.L * R3.H || NOP || R4 = [ I0 ++ ]; | |
76 | A1 = R4.H * R5.L, A0 += R4.H * R5.L || R3 = [ P2 -- ] || R5 = [ I0 -- ]; | |
77 | R6 = A0.w; | |
78 | R7 = A1.w; | |
79 | CHECKREG r0, 0x00A00105; | |
80 | CHECKREG r1, 0x25256749; | |
81 | CHECKREG r2, 0x000C0002; | |
82 | CHECKREG r3, 0x00D00102; | |
83 | CHECKREG r4, 0x000D0003; | |
84 | CHECKREG r5, 0x000E0004; | |
85 | CHECKREG r6, 0xCBDCD104; | |
86 | CHECKREG r7, 0x0001DAE8; | |
87 | ||
88 | imm32 r1, 0x02450789; | |
89 | imm32 r2, 0x0356089a; | |
90 | imm32 r3, 0x04670912; | |
91 | imm32 r4, 0x05780123; | |
92 | imm32 r5, 0x06890234; | |
93 | imm32 r6, 0x07230567; | |
94 | imm32 r7, 0x00230567; | |
95 | R2 = R0 +|+ R7, R4 = R0 -|- R7 (ASR) || R1 = [ I1 ++ ] || R0 = [ I0 -- ]; | |
96 | R1 = R6 +|+ R3, R5 = R6 -|- R3 || R6 = [ P1 ] || R3 = [ I0 -- ]; | |
97 | R5 = R4 +|+ R2, R0 = R4 -|- R2 (CO) || NOP || R4 = [ I0 ++ ]; | |
98 | CHECKREG r0, 0xFA99FFDD; | |
99 | CHECKREG r1, 0x0B8A0E79; | |
100 | CHECKREG r2, 0x00610336; | |
101 | CHECKREG r3, 0x000C0002; | |
102 | CHECKREG r4, 0x000B0001; | |
103 | CHECKREG r5, 0x009F0105; | |
104 | CHECKREG r6, 0x000D0003; | |
105 | CHECKREG r7, 0x00230567; | |
106 | ||
107 | pass | |
108 | ||
109 | .data | |
110 | DATA0: | |
111 | .dd 0x000a0000 | |
112 | .dd 0x000b0001 | |
113 | .dd 0x000c0002 | |
114 | .dd 0x000d0003 | |
115 | .dd 0x000e0004 | |
116 | .dd 0x000f0005 | |
117 | .dd 0x00100006 | |
118 | .dd 0x00200007 | |
119 | .dd 0x00300008 | |
120 | .dd 0x00400009 | |
121 | .dd 0x0050000a | |
122 | .dd 0x0060000b | |
123 | .dd 0x0070000c | |
124 | .dd 0x0080000d | |
125 | .dd 0x0090000e | |
126 | .dd 0x0100000f | |
127 | .dd 0x02000010 | |
128 | .dd 0x03000011 | |
129 | .dd 0x04000012 | |
130 | .dd 0x05000013 | |
131 | .dd 0x06000014 | |
132 | .dd 0x001a0000 | |
133 | .dd 0x001b0001 | |
134 | .dd 0x001c0002 | |
135 | .dd 0x001d0003 | |
136 | .dd 0x00010004 | |
137 | .dd 0x00010005 | |
138 | .dd 0x02100006 | |
139 | .dd 0x02200007 | |
140 | .dd 0x02300008 | |
141 | .dd 0x02200009 | |
142 | .dd 0x0250000a | |
143 | .dd 0x0260000b | |
144 | .dd 0x0270000c | |
145 | .dd 0x0280000d | |
146 | .dd 0x0290000e | |
147 | .dd 0x2100000f | |
148 | .dd 0x22000010 | |
149 | .dd 0x22000011 | |
150 | .dd 0x24000012 | |
151 | .dd 0x25000013 | |
152 | .dd 0x26000014 | |
153 | ||
154 | DATA1: | |
155 | .dd 0x00f00100 | |
156 | .dd 0x00e00101 | |
157 | .dd 0x00d00102 | |
158 | .dd 0x00c00103 | |
159 | .dd 0x00b00104 | |
160 | .dd 0x00a00105 | |
161 | .dd 0x00900106 | |
162 | .dd 0x00800107 | |
163 | .dd 0x00100108 | |
164 | .dd 0x00200109 | |
165 | .dd 0x0030010a | |
166 | .dd 0x0040010b | |
167 | .dd 0x0050011c | |
168 | .dd 0x0060010d | |
169 | .dd 0x0070010e | |
170 | .dd 0x0080010f | |
171 | .dd 0x00900110 | |
172 | .dd 0x01000111 | |
173 | .dd 0x02000112 | |
174 | .dd 0x03000113 | |
175 | .dd 0x04000114 | |
176 | .dd 0x05000115 | |
177 | .dd 0x03f00100 | |
178 | .dd 0x03e00101 | |
179 | .dd 0x03d00102 | |
180 | .dd 0x03c00103 | |
181 | .dd 0x03b00104 | |
182 | .dd 0x03a00105 | |
183 | .dd 0x03900106 | |
184 | .dd 0x03800107 | |
185 | .dd 0x03100108 | |
186 | .dd 0x03200109 | |
187 | .dd 0x0330010a | |
188 | .dd 0x0330010b | |
189 | .dd 0x0350011c | |
190 | .dd 0x0360010d | |
191 | .dd 0x0370010e | |
192 | .dd 0x0380010f | |
193 | .dd 0x03900110 | |
194 | .dd 0x31000111 | |
195 | .dd 0x32000112 | |
196 | .dd 0x33000113 | |
197 | .dd 0x34000114 |