ld: Require GCC 5 for Build pr25749-1b (-pie -fPIE)
[deliverable/binutils-gdb.git] / sim / testsuite / d10v-elf / t-mvtc.s
CommitLineData
c906108c
SS
1.include "t-macros.i"
2
3 start
4
5;;; Try out each bit in the PSW
6
7 loadpsw2 PSW_SM
8 checkpsw2 1 PSW_SM
9
10 loadpsw2 PSW_01
11 checkpsw2 2 0 ;; PSW_01
12
13 loadpsw2 PSW_EA
14 checkpsw2 3 PSW_EA
15
16 loadpsw2 PSW_DB
17 checkpsw2 4 PSW_DB
18
19 loadpsw2 PSW_DM
4ce44c66 20 checkpsw2 5 0 ;; PSW_DM
c906108c
SS
21
22 loadpsw2 PSW_IE
23 checkpsw2 6 PSW_IE
24
25 loadpsw2 PSW_RP
26 checkpsw2 7 PSW_RP
27
28 loadpsw2 PSW_MD
29 checkpsw2 8 PSW_MD
30
31 loadpsw2 PSW_FX|PSW_ST
32 checkpsw2 9 PSW_FX|PSW_ST
33
34 ;; loadpsw2 PSW_ST
35 ;; checkpsw2 10
36
37 loadpsw2 PSW_10
38 checkpsw2 11 0 ;; PSW_10
39
40 loadpsw2 PSW_11
41 checkpsw2 12 0 ;; PSW_11
42
43 loadpsw2 PSW_F0
44 checkpsw2 13 PSW_F0
45
46 loadpsw2 PSW_F1
47 checkpsw2 14 PSW_F1
48
49 loadpsw2 PSW_14
50 checkpsw2 15 0 ;; PSW_14
51
52 loadpsw2 PSW_C
53 checkpsw2 16 PSW_C
54
55
56;;; Check that bit 0 (LSB) of the MOD_E & MOD_S registers are stuck at ZERO.
57
58 ldi r6, #0xdead
59 mvtc r6, cr10
60 ldi r6, #0xbeef
61 mvtc r6, cr11
62
63 mvfc r7, cr10
64 check 17 r7 0xdeac
65 mvfc r7, cr11
66 check 18 r7 0xbeee
67
4ce44c66 68;;; Check that certain bits of the PSW, DPSW and BPSW are hardwired to zero
c906108c 69
4ce44c66
JM
70psw_ffff:
71 ldi r6, 0xffff
72 mvtc r6, psw
73 mvfc r7, psw
74 check 18 r7 0xb7cd
75
76bpsw_ffff:
c906108c
SS
77 ldi r6, 0xffff
78 mvtc r6, bpsw
79 mvfc r7, bpsw
4ce44c66 80 check 18 r7 0xb7cd
c906108c 81
4ce44c66 82dpsw_ffff:
c906108c
SS
83 ldi r6, 0xffff
84 mvtc r6, dpsw
85 mvfc r7, dpsw
4ce44c66
JM
86 check 18 r7 0xb7cd
87
88;;; Another check. Very similar
89
90psw_dfff:
91 ldi r6, 0xdfff
92 mvtc r6, psw
93 mvfc r7, psw
94 check 18 r7 0x97cd
95
96bpsw_dfff:
97 ldi r6, 0xdfff
98 mvtc r6, bpsw
99 mvfc r7, bpsw
100 check 18 r7 0x97cd
101
102dpsw_dfff:
103 ldi r6, 0xdfff
104 mvtc r6, dpsw
105 mvfc r7, dpsw
106 check 18 r7 0x97cd
107
108;;; And again.
109
110psw_8005:
111 ldi r6, 0x8005
112 mvtc r6, psw
113 mvfc r7, psw
114 check 18 r7 0x8005
115
116bpsw_8005:
117 ldi r6, 0x8005
118 mvtc r6, bpsw
119 mvfc r7, bpsw
120 check 18 r7 0x8005
121
122dpsw_8005:
123 ldi r6, 0x8005
124 mvtc r6, dpsw
125 mvfc r7, dpsw
126 check 18 r7 0x8005
c906108c
SS
127
128
129 exit0
This page took 0.926039 seconds and 4 git commands to generate.