Commit | Line | Data |
---|---|---|
c906108c SS |
1 | .include "t-macros.i" |
2 | ||
3 | start | |
4 | ||
5 | ;;; Try out each bit in the PSW | |
6 | ||
7 | loadpsw2 PSW_SM | |
8 | checkpsw2 1 PSW_SM | |
9 | ||
10 | loadpsw2 PSW_01 | |
11 | checkpsw2 2 0 ;; PSW_01 | |
12 | ||
13 | loadpsw2 PSW_EA | |
14 | checkpsw2 3 PSW_EA | |
15 | ||
16 | loadpsw2 PSW_DB | |
17 | checkpsw2 4 PSW_DB | |
18 | ||
19 | loadpsw2 PSW_DM | |
20 | checkpsw2 5 PSW_DM | |
21 | ||
22 | loadpsw2 PSW_IE | |
23 | checkpsw2 6 PSW_IE | |
24 | ||
25 | loadpsw2 PSW_RP | |
26 | checkpsw2 7 PSW_RP | |
27 | ||
28 | loadpsw2 PSW_MD | |
29 | checkpsw2 8 PSW_MD | |
30 | ||
31 | loadpsw2 PSW_FX|PSW_ST | |
32 | checkpsw2 9 PSW_FX|PSW_ST | |
33 | ||
34 | ;; loadpsw2 PSW_ST | |
35 | ;; checkpsw2 10 | |
36 | ||
37 | loadpsw2 PSW_10 | |
38 | checkpsw2 11 0 ;; PSW_10 | |
39 | ||
40 | loadpsw2 PSW_11 | |
41 | checkpsw2 12 0 ;; PSW_11 | |
42 | ||
43 | loadpsw2 PSW_F0 | |
44 | checkpsw2 13 PSW_F0 | |
45 | ||
46 | loadpsw2 PSW_F1 | |
47 | checkpsw2 14 PSW_F1 | |
48 | ||
49 | loadpsw2 PSW_14 | |
50 | checkpsw2 15 0 ;; PSW_14 | |
51 | ||
52 | loadpsw2 PSW_C | |
53 | checkpsw2 16 PSW_C | |
54 | ||
55 | ||
56 | ;;; Check that bit 0 (LSB) of the MOD_E & MOD_S registers are stuck at ZERO. | |
57 | ||
58 | ldi r6, #0xdead | |
59 | mvtc r6, cr10 | |
60 | ldi r6, #0xbeef | |
61 | mvtc r6, cr11 | |
62 | ||
63 | mvfc r7, cr10 | |
64 | check 17 r7 0xdeac | |
65 | mvfc r7, cr11 | |
66 | check 18 r7 0xbeee | |
67 | ||
68 | ;;; Check that certain bits of the DPSW and BPSW are hardwired to zero | |
69 | ||
70 | ldi r6, 0xffff | |
71 | mvtc r6, bpsw | |
72 | mvfc r7, bpsw | |
73 | check 18 r7 0xbfcd | |
74 | ||
75 | ldi r6, 0xffff | |
76 | mvtc r6, dpsw | |
77 | mvfc r7, dpsw | |
78 | check 18 r7 0xbfcd | |
79 | ||
80 | ||
81 | exit0 |