[deliverable/binutils-gdb.git] / sim / testsuite / sim / cris / asm / movecrt10.ms

#mach: crisv10
#output: ffffff42\n94\nffff4321\n9234\n76543210\n76540000\n
#output: Basic clock cycles, total @: 22\n
#output: Memory source stall cycles: 0\n
#output: Memory read-after-write stall cycles: 0\n
#output: Movem source stall cycles: 0\n
#output: Movem destination stall cycles: 0\n
#output: Movem address stall cycles: 0\n
#output: Multiplication source stall cycles: 0\n
#output: Jump source stall cycles: 0\n
#output: Branch misprediction stall cycles: 0\n
#output: Jump target stall cycles: 0\n
#sim: --cris-cycles=basic
 .include "movecr.ms"

# This test-case is accidentally the same; gets the same cycle
# count as movecrt32.ms, but please keep them separate.
Commit	Line	Data
5e1f6430 HPN	1	#mach: crisv10
	2	#output: ffffff42\n94\nffff4321\n9234\n76543210\n76540000\n
	3	#output: Basic clock cycles, total @: 22\n
	4	#output: Memory source stall cycles: 0\n
	5	#output: Memory read-after-write stall cycles: 0\n
	6	#output: Movem source stall cycles: 0\n
	7	#output: Movem destination stall cycles: 0\n
	8	#output: Movem address stall cycles: 0\n
	9	#output: Multiplication source stall cycles: 0\n
	10	#output: Jump source stall cycles: 0\n
	11	#output: Branch misprediction stall cycles: 0\n
	12	#output: Jump target stall cycles: 0\n
	13	#sim: --cris-cycles=basic
	14	.include "movecr.ms"
	15
	16	# This test-case is accidentally the same; gets the same cycle
	17	# count as movecrt32.ms, but please keep them separate.